10 output AA, AB, AC, AD,
15 localparam LOG2DELAY = 22;
17 reg [BITS+LOG2DELAY-1:0] counter = 0;
18 reg [BITS-1:0] outcnt;
20 always @(posedge clk) begin
21 counter <= counter + SW1 + SW2 + 1;
22 outcnt <= counter >> LOG2DELAY;
25 assign {LED1, LED2, LED3, LED4} = outcnt ^ (outcnt >> 1);
27 // assign CA = counter[10];
28 // seg7enc seg7encinst (
29 // .seg({AA, AB, AC, AD, AE, AF, AG}),
30 // .dat(CA ? outcnt[3:0] : outcnt[7:4])
33 assign {AA, AB, AC, AD, AE, AF, AG} = ~(7'b 100_0000 >> outcnt[6:4]);
34 assign CA = outcnt[7];
45 4'h0: seg_inv = 7'b 0111111;
46 4'h1: seg_inv = 7'b 0000110;
47 4'h2: seg_inv = 7'b 1011011;
48 4'h3: seg_inv = 7'b 1001111;
49 4'h4: seg_inv = 7'b 1100110;
50 4'h5: seg_inv = 7'b 1101101;
51 4'h6: seg_inv = 7'b 1111101;
52 4'h7: seg_inv = 7'b 0000111;
53 4'h8: seg_inv = 7'b 1111111;
54 4'h9: seg_inv = 7'b 1101111;
55 4'hA: seg_inv = 7'b 1110111;
56 4'hB: seg_inv = 7'b 1111100;
57 4'hC: seg_inv = 7'b 0111001;
58 4'hD: seg_inv = 7'b 1011110;
59 4'hE: seg_inv = 7'b 1111001;
60 4'hF: seg_inv = 7'b 1110001;
63 assign seg = ~seg_inv;