765b0de82f8aca4f10876d5b38d67ae4c4503767
1 from migen
.fhdl
.structure
import *
2 from migen
.sim
.generic
import Simulator
3 from migen
.sim
.icarus
import Runner
7 self
.a
= Signal(BV(12))
8 self
.d
= Signal(BV(16))
9 p
= MemoryPort(self
.a
, self
.d
)
10 # Initialize the beginning of the memory with integers
12 self
.mem
= Memory(16, 2**12, p
, init
=list(range(20)))
14 def do_simulation(self
, s
):
15 # Read the memory. Use the cycle counter as address.
16 value
= s
.rd(self
.mem
, s
.cycle_counter
)
17 # Print the result. Output is:
23 # Demonstrate how to interrupt the simulator.
27 def get_fragment(self
):
28 return Fragment(memories
=[self
.mem
], sim
=[self
.do_simulation
])
32 sim
= Simulator(dut
.get_fragment(), Runner())
33 # No need for a cycle limit here, we use sim.interrupt instead.