3 from pyosys
import libyosys
as ys
5 import matplotlib
.pyplot
as plt
9 ys
.run_pass("read_verilog ../../tests/simple/fiedler-cooley.v", design
);
10 ys
.run_pass("prep", design
)
11 ys
.run_pass("opt -full", design
)
14 for module
in design
.selected_whole_modules_warn():
15 for cell
in module
.selected_cells():
16 if cell
.type.str() in cell_stats
:
17 cell_stats
[cell
.type.str()] += 1
19 cell_stats
[cell
.type.str()] = 1
20 plt
.bar(range(len(cell_stats
)), height
= list(cell_stats
.values()),align
='center')
21 plt
.xticks(range(len(cell_stats
)), list(cell_stats
.keys()))