ext/drampower/src/MemorySpecification.h

   1 /*
   2  * Copyright (c) 2012-2014, TU Delft
   3  * Copyright (c) 2012-2014, TU Eindhoven
   4  * Copyright (c) 2012-2014, TU Kaiserslautern
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are
   9  * met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  * notice, this list of conditions and the following disclaimer.
  13  *
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  * notice, this list of conditions and the following disclaimer in the
  16  * documentation and/or other materials provided with the distribution.
  17  *
  18  * 3. Neither the name of the copyright holder nor the names of its
  19  * contributors may be used to endorse or promote products derived from
  20  * this software without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  23  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  24  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  25  * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  26  * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
  28  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  29  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  30  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  31  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  *
  34  * Authors: Karthik Chandrasekar
  35  *
  36  */
  37
  38 #ifndef TOOLS_MEMORY_SPECIFICATION_H
  39 #define TOOLS_MEMORY_SPECIFICATION_H
  40
  41 #include <cassert>
  42 #include <string>
  43
  44 #include "MemArchitectureSpec.h"
  45 #include "MemTimingSpec.h"
  46 #include "MemPowerSpec.h"
  47 #include "Parametrisable.h"
  48
  49
  50 namespace Data {
  51 // Supported memory types
  52 class MemoryType {
  53  public:
  54   enum MemoryType_t {
  55     DDR2 = 0,
  56     DDR3,
  57     DDR4,
  58     LPDDR,
  59     LPDDR2,
  60     LPDDR3,
  61     WIDEIO_SDR,
  62     MEMORY_TYPE_INVALID
  63   };
  64
  65   MemoryType(MemoryType_t _val) :
  66     val(_val)
  67   {
  68   }
  69
  70   MemoryType() :
  71     val(MEMORY_TYPE_INVALID)
  72   {
  73   }
  74
  75   MemoryType(const std::string& _val) :
  76     val(MEMORY_TYPE_INVALID)
  77   {
  78     if (_val == "DDR2") {
  79       val = DDR2;
  80     } else if (_val == "DDR3") {
  81       val = DDR3;
  82     } else if (_val == "DDR4") {
  83       val = DDR4;
  84     } else if (_val == "LPDDR") {
  85       val = LPDDR;
  86     } else if (_val == "LPDDR2") {
  87       val = LPDDR2;
  88     } else if (_val == "LPDDR3") {
  89       val = LPDDR3;
  90     } else if (_val == "WIDEIO_SDR") {
  91       val = WIDEIO_SDR;
  92     }
  93     assert("Unknown memory type." && val != MEMORY_TYPE_INVALID);
  94   }
  95
  96   bool isLPDDRFamily() const
  97   {
  98     return val == LPDDR ||
  99            val == LPDDR2 ||
 100            val == LPDDR3 ||
 101            val == WIDEIO_SDR;
 102   }
 103
 104   bool hasTwoVoltageDomains() const
 105   {
 106     return val == LPDDR ||
 107            val == LPDDR2 ||
 108            val == LPDDR3 ||
 109            val == WIDEIO_SDR;
 110   }
 111
 112   bool isDDRFamily() const
 113   {
 114     return val == DDR2 ||
 115            val == DDR3 ||
 116            val == DDR4;
 117   }
 118
 119   bool hasDll() const
 120   {
 121     return val == DDR2 ||
 122            val == DDR3 ||
 123            val == DDR4;
 124   }
 125
 126   bool hasTermination() const
 127   {
 128     return val == DDR2 ||
 129            val == DDR3 ||
 130            val == DDR4;
 131   }
 132
 133   double getCapacitance() const
 134   {
 135     // LPDDR/2/3 and DDR memories only have IO Power (no ODT)
 136     // Conservative estimates based on Micron Mobile LPDDR2 Power Calculator
 137       // LPDDR/2/3 IO Capacitance in mF
 138     if (val == LPDDR) {
 139         return 0.0000000045;
 140     } else if (val == LPDDR2) {
 141         return 0.0000000025;
 142     } else if (val == LPDDR3) {
 143         return 0.0000000018;
 144     } else {
 145         return 0.0;
 146     }
 147   }
 148
 149   double getIoPower() const
 150   {
 151     if (val == DDR2) {
 152         // Conservative estimates based on Micron DDR2 Power Calculator
 153         return 1.5;    // in mW
 154     } else if (val == DDR3) {
 155         // Conservative estimates based on Micron DDR3 Power Calculator
 156         return 4.6;    // in mW
 157     } else if (val == DDR4) {
 158         // Conservative estimates based on Micron DDR3 Power Calculator
 159         // using available termination resistance values from Micron DDR4 Datasheets
 160         return 3.7;    // in mW
 161     } else {
 162         return 0.0;
 163     }
 164   }
 165
 166   double getWrOdtPower() const
 167   {
 168     if (val == DDR2) {
 169         // Conservative estimates based on Micron DDR2 Power Calculator
 170         return 8.2;    // in mW
 171     } else if (val == DDR3) {
 172         // Conservative estimates based on Micron DDR3 Power Calculator
 173         return 21.2;    // in mW
 174     } else if (val == DDR4) {
 175         // Conservative estimates based on Micron DDR3 Power Calculator
 176         // using available termination resistance values from Micron DDR4 Datasheets
 177         return 17.0;    // in mW
 178     } else {
 179         return 0.0;
 180     }
 181   }
 182
 183   double getTermRdPower() const
 184   {
 185     if (val == DDR2) {
 186         // Conservative estimates based on Micron DDR2 Power Calculator
 187         return 13.1;    // in mW
 188     } else if (val == DDR3) {
 189         // Conservative estimates based on Micron DDR3 Power Calculator
 190         return 15.5;    // in mW
 191     } else if (val == DDR4) {
 192         // Conservative estimates based on Micron DDR3 Power Calculator
 193         // using available termination resistance values from Micron DDR4 Datasheets
 194         return 12.4;    // in mW
 195     } else {
 196         return 0.0;
 197     }
 198   }
 199
 200   double getTermWrPower() const
 201   {
 202     if (val == DDR2) {
 203         // Conservative estimates based on Micron DDR2 Power Calculator
 204         return 14.6;    // in mW
 205     } else if (val == DDR3) {
 206         // Conservative estimates based on Micron DDR3 Power Calculator
 207         return 15.4;    // in mW
 208     } else if (val == DDR4) {
 209         // Conservative estimates based on Micron DDR3 Power Calculator
 210         // using available termination resistance values from Micron DDR4 Datasheets
 211         return 12.3;    // in mW
 212     } else {
 213         return 0.0;
 214     }
 215   }
 216
 217   operator MemoryType_t() const {
 218     return val;
 219   }
 220
 221  private:
 222   MemoryType_t val;
 223 };
 224
 225 class MemorySpecification : public virtual Parametrisable {
 226  public:
 227   std::string id;
 228   MemoryType  memoryType;
 229
 230   MemArchitectureSpec memArchSpec;
 231   MemTimingSpec memTimingSpec;
 232   MemPowerSpec  memPowerSpec;
 233
 234   void processParameters();
 235
 236   static MemorySpecification getMemSpecFromXML(const std::string& id);
 237 };
 238 }  // namespace Data
 239 #endif // ifndef TOOLS_MEMORY_SPECIFICATION_H