1 /* Copyright (c) 2012 Massachusetts Institute of Technology
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 #include "model/timing_graph/ElectricalTimingOptimizer.h"
24 #include "model/PortInfo.h"
25 #include "model/ModelGen.h"
26 #include "model/std_cells/StdCell.h"
27 #include "model/std_cells/StdCellLib.h"
28 #include "model/timing_graph/ElectricalNet.h"
29 #include "model/timing_graph/ElectricalTimingTree.h"
33 ElectricalTimingOptimizer::ElectricalTimingOptimizer(const String
& instance_name_
, const TechModel
* tech_model_
)
34 : ElectricalModel(instance_name_
, tech_model_
), m_model_(NULL
)
37 ElectricalTimingOptimizer::~ElectricalTimingOptimizer()
40 void ElectricalTimingOptimizer::setModel(ElectricalModel
* model_
)
46 ElectricalModel
* ElectricalTimingOptimizer::getModel()
51 void ElectricalTimingOptimizer::constructModel()
53 if(getModel() == NULL
)
58 const Map
<PortInfo
*>* port_info
= getModel()->getInputs();
59 Map
<PortInfo
*>::ConstIterator it_begin
= port_info
->begin();
60 Map
<PortInfo
*>::ConstIterator it_end
= port_info
->end();
61 Map
<PortInfo
*>::ConstIterator it
;
63 for(it
= it_begin
; it
!= it_end
; ++it
)
65 const String
& port_name
= it
->first
;
66 const PortInfo
* port_info
= it
->second
;
67 StdCell
* inv0
= getTechModel()->getStdCellLib()->createStdCell("INV", port_name
+ "Driver0");
69 StdCell
* inv1
= getTechModel()->getStdCellLib()->createStdCell("INV", port_name
+ "Driver1");
72 addSubInstances(inv0
, 1.0);
73 addSubInstances(inv1
, 1.0);
75 createInputPort(port_name
, port_info
->getNetIndex());
76 createNet(port_name
+ "Driver0In");
77 createNet(port_name
+ "Driver0Out");
78 createNet(port_name
+ "Driver1Out");
79 assignVirtualFanin(port_name
+ "Driver0In", port_name
);
80 portConnect(inv0
, "A", port_name
+ "Driver0In");
81 portConnect(inv0
, "Y", port_name
+ "Driver0Out");
82 portConnect(inv1
, "A", port_name
+ "Driver0Out");
83 portConnect(inv1
, "Y", port_name
+ "Driver1Out");
85 createNet(port_name
+ "In", port_info
->getNetIndex());
86 assignVirtualFanout(port_name
+ "In", port_name
+ "Driver1Out");
88 portConnect(getModel(), port_name
, port_name
+ "In");