2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
10 RESET_ADDRESS : std_logic_vector(63 downto 0) := (others => '0');
11 ALT_RESET_ADDRESS : std_logic_vector(63 downto 0) := (others => '0')
18 stall_in : in std_ulogic;
19 flush_in : in std_ulogic;
20 stop_in : in std_ulogic;
21 alt_reset_in : in std_ulogic;
23 -- redirect from execution unit
24 e_in : in Execute1ToFetch1Type;
26 -- redirect from decode1
27 d_in : in Decode1ToFetch1Type;
30 i_out : out Fetch1ToIcacheType;
33 log_out : out std_ulogic_vector(42 downto 0)
37 architecture behaviour of fetch1 is
38 type reg_internal_t is record
39 mode_32bit: std_ulogic;
41 signal r, r_next : Fetch1ToIcacheType;
42 signal r_int, r_next_int : reg_internal_t;
43 signal log_nia : std_ulogic_vector(42 downto 0);
48 if rising_edge(clk) then
49 log_nia <= r.nia(63) & r.nia(43 downto 2);
51 report "fetch1 rst:" & std_ulogic'image(rst) &
52 " IR:" & std_ulogic'image(r_next.virt_mode) &
53 " P:" & std_ulogic'image(r_next.priv_mode) &
54 " E:" & std_ulogic'image(r_next.big_endian) &
55 " 32:" & std_ulogic'image(r_next_int.mode_32bit) &
56 " R:" & std_ulogic'image(e_in.redirect) & std_ulogic'image(d_in.redirect) &
57 " S:" & std_ulogic'image(stall_in) &
58 " T:" & std_ulogic'image(stop_in) &
59 " nia:" & to_hstring(r_next.nia) &
60 " SM:" & std_ulogic'image(r_next.stop_mark);
69 variable v : Fetch1ToIcacheType;
70 variable v_int : reg_internal_t;
77 if alt_reset_in = '1' then
78 v.nia := ALT_RESET_ADDRESS;
80 v.nia := RESET_ADDRESS;
85 v_int.mode_32bit := '0';
86 elsif e_in.redirect = '1' then
87 v.nia := e_in.redirect_nia(63 downto 2) & "00";
88 if e_in.mode_32bit = '1' then
89 v.nia(63 downto 32) := (others => '0');
91 v.virt_mode := e_in.virt_mode;
92 v.priv_mode := e_in.priv_mode;
93 v.big_endian := e_in.big_endian;
94 v_int.mode_32bit := e_in.mode_32bit;
95 elsif d_in.redirect = '1' then
96 v.nia := d_in.redirect_nia(63 downto 2) & "00";
97 if r_int.mode_32bit = '1' then
98 v.nia(63 downto 32) := (others => '0');
100 elsif stall_in = '0' then
102 -- If the last NIA value went down with a stop mark, it didn't get
103 -- executed, and hence we shouldn't increment NIA.
104 if r.stop_mark = '0' then
105 if r_int.mode_32bit = '0' then
106 v.nia := std_ulogic_vector(unsigned(r.nia) + 4);
108 v.nia := x"00000000" & std_ulogic_vector(unsigned(r.nia(31 downto 0)) + 4);
114 v.req := not rst and not stop_in;
115 v.stop_mark := stop_in;
120 -- Update outputs to the icache
125 end architecture behaviour;