fpga/pp_utilities.vhd

   1 -- The Potato Processor - A simple processor for FPGAs
   2 -- (c) Kristian Klomsten Skordal 2014 <kristian.skordal@wafflemail.net>
   3
   4 library ieee;
   5 use ieee.std_logic_1164.all;
   6
   7 package pp_utilities is
   8
   9         --! Converts a boolean to an std_logic.
  10         function to_std_logic(input : in boolean) return std_logic;
  11
  12         -- Checks if a number is 2^n:
  13         function is_pow2(input : in natural) return boolean;
  14
  15         --! Calculates log2 with integers.
  16         function log2(input : in natural) return natural;
  17
  18         -- Gets the value of the sel signals to the wishbone interconnect for the specified
  19         -- operand size and address.
  20         function wb_get_data_sel(size : in std_logic_vector(1 downto 0); address : in std_logic_vector)
  21                 return std_logic_vector;
  22
  23 end package pp_utilities;
  24
  25 package body pp_utilities is
  26
  27         function to_std_logic(input : in boolean) return std_logic is
  28         begin
  29                 if input then
  30                         return '1';
  31                 else
  32                         return '0';
  33                 end if;
  34         end function to_std_logic;
  35
  36         function is_pow2(input : in natural) return boolean is
  37                 variable c : natural := 1;
  38         begin
  39                 for i in 0 to 31 loop
  40                         if input = c then
  41                                 return true;
  42                         end if;
  43
  44                         c := c * 2;
  45                 end loop;
  46
  47                 return false;
  48         end function is_pow2;
  49
  50         function log2(input : in natural) return natural is
  51                 variable retval : natural := 0;
  52                 variable temp   : natural := input;
  53         begin
  54                 while temp > 1 loop
  55                         retval := retval + 1;
  56                         temp := temp / 2;
  57                 end loop;
  58
  59                 return retval;
  60         end function log2;
  61
  62         function wb_get_data_sel(size : in std_logic_vector(1 downto 0); address : in std_logic_vector)
  63                 return std_logic_vector is
  64         begin
  65                 case size is
  66                         when b"01" =>
  67                                 case address(1 downto 0) is
  68                                         when b"00" =>
  69                                                 return b"0001";
  70                                         when b"01" =>
  71                                                 return b"0010";
  72                                         when b"10" =>
  73                                                 return b"0100";
  74                                         when b"11" =>
  75                                                 return b"1000";
  76                                         when others =>
  77                                                 return b"0001";
  78                                 end case;
  79                         when b"10" =>
  80                                 if address(1) = '0' then
  81                                         return b"0011";
  82                                 else
  83                                         return b"1100";
  84                                 end if;
  85                         when others =>
  86                                 return b"1111";
  87                 end case;
  88         end function wb_get_data_sel;
  89
  90 end package body pp_utilities;