frontends/verilog/verilog_parser.y

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
   5  *
   6  *  Permission to use, copy, modify, and/or distribute this software for any
   7  *  purpose with or without fee is hereby granted, provided that the above
   8  *  copyright notice and this permission notice appear in all copies.
   9  *
  10  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  *  ---
  19  *
  20  *  The Verilog frontend.
  21  *
  22  *  This frontend is using the AST frontend library (see frontends/ast/).
  23  *  Thus this frontend does not generate RTLIL code directly but creates an
  24  *  AST directly from the Verilog parse tree and then passes this AST to
  25  *  the AST frontend library.
  26  *
  27  *  ---
  28  *
  29  *  This is the actual bison parser for Verilog code. The AST ist created directly
  30  *  from the bison reduce functions here. Note that this code uses a few global
  31  *  variables to hold the state of the AST generator and therefore this parser is
  32  *  not reentrant.
  33  *
  34  */
  35
  36 %{
  37 #include <list>
  38 #include <stack>
  39 #include <string.h>
  40 #include "frontends/verilog/verilog_frontend.h"
  41 #include "frontends/verilog/verilog_parser.tab.hh"
  42 #include "kernel/log.h"
  43
  44 #define YYLEX_PARAM &yylval, &yylloc
  45
  46 USING_YOSYS_NAMESPACE
  47 using namespace AST;
  48 using namespace VERILOG_FRONTEND;
  49
  50 YOSYS_NAMESPACE_BEGIN
  51 namespace VERILOG_FRONTEND {
  52         int port_counter;
  53         dict<std::string, int> port_stubs;
  54         dict<IdString, AstNode*> *attr_list, default_attr_list;
  55         std::stack<dict<IdString, AstNode*> *> attr_list_stack;
  56         dict<IdString, AstNode*> *albuf;
  57         std::vector<UserTypeMap*> user_type_stack;
  58         dict<std::string, AstNode*> pkg_user_types;
  59         std::vector<AstNode*> ast_stack;
  60         struct AstNode *astbuf1, *astbuf2, *astbuf3;
  61         struct AstNode *current_function_or_task;
  62         struct AstNode *current_ast, *current_ast_mod;
  63         int current_function_or_task_port_id;
  64         std::vector<char> case_type_stack;
  65         bool do_not_require_port_stubs;
  66         bool default_nettype_wire;
  67         bool sv_mode, formal_mode, lib_mode, specify_mode;
  68         bool noassert_mode, noassume_mode, norestrict_mode;
  69         bool assume_asserts_mode, assert_assumes_mode;
  70         bool current_wire_rand, current_wire_const;
  71         bool current_modport_input, current_modport_output;
  72         std::istream *lexin;
  73 }
  74 YOSYS_NAMESPACE_END
  75
  76 #define SET_AST_NODE_LOC(WHICH, BEGIN, END) \
  77     do { (WHICH)->location.first_line = (BEGIN).first_line; \
  78     (WHICH)->location.first_column = (BEGIN).first_column; \
  79     (WHICH)->location.last_line = (END).last_line; \
  80     (WHICH)->location.last_column = (END).last_column; } while(0)
  81
  82 #define SET_RULE_LOC(LHS, BEGIN, END) \
  83     do { (LHS).first_line = (BEGIN).first_line; \
  84     (LHS).first_column = (BEGIN).first_column; \
  85     (LHS).last_line = (END).last_line; \
  86     (LHS).last_column = (END).last_column; } while(0)
  87
  88 int frontend_verilog_yylex(YYSTYPE *yylval_param, YYLTYPE *yyloc_param);
  89
  90 static void append_attr(AstNode *ast, dict<IdString, AstNode*> *al)
  91 {
  92         for (auto &it : *al) {
  93                 if (ast->attributes.count(it.first) > 0)
  94                         delete ast->attributes[it.first];
  95                 ast->attributes[it.first] = it.second;
  96         }
  97         delete al;
  98 }
  99
 100 static void append_attr_clone(AstNode *ast, dict<IdString, AstNode*> *al)
 101 {
 102         for (auto &it : *al) {
 103                 if (ast->attributes.count(it.first) > 0)
 104                         delete ast->attributes[it.first];
 105                 ast->attributes[it.first] = it.second->clone();
 106         }
 107 }
 108
 109 static void free_attr(dict<IdString, AstNode*> *al)
 110 {
 111         for (auto &it : *al)
 112                 delete it.second;
 113         delete al;
 114 }
 115
 116 struct specify_target {
 117         char polarity_op;
 118         AstNode *dst, *dat;
 119 };
 120
 121 struct specify_triple {
 122         AstNode *t_min, *t_avg, *t_max;
 123 };
 124
 125 struct specify_rise_fall {
 126         specify_triple rise;
 127         specify_triple fall;
 128 };
 129
 130 static void addTypedefNode(std::string *name, AstNode *node)
 131 {
 132         log_assert(node);
 133         auto *tnode = new AstNode(AST_TYPEDEF, node);
 134         tnode->str = *name;
 135         auto user_types = user_type_stack.back();
 136         (*user_types)[*name] = tnode;
 137         if (current_ast_mod && current_ast_mod->type == AST_PACKAGE) {
 138                 // typedef inside a package so we need the qualified name
 139                 auto qname = current_ast_mod->str + "::" + (*name).substr(1);
 140                 pkg_user_types[qname] = tnode;
 141         }
 142         delete name;
 143         ast_stack.back()->children.push_back(tnode);
 144 }
 145
 146 static void enterTypeScope()
 147 {
 148         auto user_types = new UserTypeMap();
 149         user_type_stack.push_back(user_types);
 150 }
 151
 152 static void exitTypeScope()
 153 {
 154         user_type_stack.pop_back();
 155 }
 156
 157 static bool isInLocalScope(const std::string *name)
 158 {
 159         // tests if a name was declared in the current block scope
 160         auto user_types = user_type_stack.back();
 161         return (user_types->count(*name) > 0);
 162 }
 163
 164 static AstNode *getTypeDefinitionNode(std::string type_name)
 165 {
 166         // return the definition nodes from the typedef statement
 167         auto user_types = user_type_stack.back();
 168         log_assert(user_types->count(type_name) > 0);
 169         auto typedef_node = (*user_types)[type_name];
 170         log_assert(typedef_node->type == AST_TYPEDEF);
 171         return typedef_node->children[0];
 172 }
 173
 174 static AstNode *copyTypeDefinition(std::string type_name)
 175 {
 176         // return a copy of the template from a typedef definition
 177         auto typedef_node = getTypeDefinitionNode(type_name);
 178         return typedef_node->clone();
 179 }
 180
 181 static AstNode *makeRange(int msb = 31, int lsb = 0, bool isSigned = true)
 182 {
 183         auto range = new AstNode(AST_RANGE);
 184         range->children.push_back(AstNode::mkconst_int(msb, true));
 185         range->children.push_back(AstNode::mkconst_int(lsb, true));
 186         range->is_signed = isSigned;
 187         return range;
 188 }
 189
 190 static void addRange(AstNode *parent, int msb = 31, int lsb = 0, bool isSigned = true)
 191 {
 192         auto range = makeRange(msb, lsb, isSigned);
 193         parent->children.push_back(range);
 194 }
 195
 196 static AstNode *checkRange(AstNode *type_node, AstNode *range_node)
 197 {
 198         if (type_node->range_left >= 0 && type_node->range_right >= 0) {
 199                 // type already restricts the range
 200                 if (range_node) {
 201                         frontend_verilog_yyerror("integer/genvar types cannot have packed dimensions.");
 202                 }
 203                 else {
 204                         range_node = makeRange(type_node->range_left, type_node->range_right, false);
 205                 }
 206         }
 207         if (range_node && range_node->children.size() != 2) {
 208                 frontend_verilog_yyerror("wire/reg/logic packed dimension must be of the form: [<expr>:<expr>], [<expr>+:<expr>], or [<expr>-:<expr>]");
 209         }
 210         return range_node;
 211 }
 212
 213 static void rewriteAsMemoryNode(AstNode *node, AstNode *rangeNode)
 214 {
 215         node->type = AST_MEMORY;
 216         if (rangeNode->type == AST_RANGE && rangeNode->children.size() == 1) {
 217                 // SV array size [n], rewrite as [n-1:0]
 218                 rangeNode->children[0] = new AstNode(AST_SUB, rangeNode->children[0], AstNode::mkconst_int(1, true));
 219                 rangeNode->children.push_back(AstNode::mkconst_int(0, false));
 220         }
 221         node->children.push_back(rangeNode);
 222 }
 223
 224 %}
 225
 226 %define api.prefix {frontend_verilog_yy}
 227 %define api.pure
 228
 229 /* The union is defined in the header, so we need to provide all the
 230  * includes it requires
 231  */
 232 %code requires {
 233 #include <map>
 234 #include <string>
 235 #include "frontends/verilog/verilog_frontend.h"
 236 }
 237
 238 %union {
 239         std::string *string;
 240         struct YOSYS_NAMESPACE_PREFIX AST::AstNode *ast;
 241         YOSYS_NAMESPACE_PREFIX dict<YOSYS_NAMESPACE_PREFIX RTLIL::IdString, YOSYS_NAMESPACE_PREFIX AST::AstNode*> *al;
 242         struct specify_target *specify_target_ptr;
 243         struct specify_triple *specify_triple_ptr;
 244         struct specify_rise_fall *specify_rise_fall_ptr;
 245         bool boolean;
 246         char ch;
 247 }
 248
 249 %token <string> TOK_STRING TOK_ID TOK_CONSTVAL TOK_REALVAL TOK_PRIMITIVE
 250 %token <string> TOK_SVA_LABEL TOK_SPECIFY_OPER TOK_MSG_TASKS
 251 %token <string> TOK_BASE TOK_BASED_CONSTVAL TOK_UNBASED_UNSIZED_CONSTVAL
 252 %token <string> TOK_USER_TYPE TOK_PKG_USER_TYPE
 253 %token TOK_ASSERT TOK_ASSUME TOK_RESTRICT TOK_COVER TOK_FINAL
 254 %token ATTR_BEGIN ATTR_END DEFATTR_BEGIN DEFATTR_END
 255 %token TOK_MODULE TOK_ENDMODULE TOK_PARAMETER TOK_LOCALPARAM TOK_DEFPARAM
 256 %token TOK_PACKAGE TOK_ENDPACKAGE TOK_PACKAGESEP
 257 %token TOK_INTERFACE TOK_ENDINTERFACE TOK_MODPORT TOK_VAR TOK_WILDCARD_CONNECT
 258 %token TOK_INPUT TOK_OUTPUT TOK_INOUT TOK_WIRE TOK_WAND TOK_WOR TOK_REG TOK_LOGIC
 259 %token TOK_INTEGER TOK_SIGNED TOK_ASSIGN TOK_ALWAYS TOK_INITIAL
 260 %token TOK_ALWAYS_FF TOK_ALWAYS_COMB TOK_ALWAYS_LATCH
 261 %token TOK_BEGIN TOK_END TOK_IF TOK_ELSE TOK_FOR TOK_WHILE TOK_REPEAT
 262 %token TOK_DPI_FUNCTION TOK_POSEDGE TOK_NEGEDGE TOK_OR TOK_AUTOMATIC
 263 %token TOK_CASE TOK_CASEX TOK_CASEZ TOK_ENDCASE TOK_DEFAULT
 264 %token TOK_FUNCTION TOK_ENDFUNCTION TOK_TASK TOK_ENDTASK TOK_SPECIFY
 265 %token TOK_IGNORED_SPECIFY TOK_ENDSPECIFY TOK_SPECPARAM TOK_SPECIFY_AND TOK_IGNORED_SPECIFY_AND
 266 %token TOK_GENERATE TOK_ENDGENERATE TOK_GENVAR TOK_REAL
 267 %token TOK_SYNOPSYS_FULL_CASE TOK_SYNOPSYS_PARALLEL_CASE
 268 %token TOK_SUPPLY0 TOK_SUPPLY1 TOK_TO_SIGNED TOK_TO_UNSIGNED
 269 %token TOK_POS_INDEXED TOK_NEG_INDEXED TOK_PROPERTY TOK_ENUM TOK_TYPEDEF
 270 %token TOK_RAND TOK_CONST TOK_CHECKER TOK_ENDCHECKER TOK_EVENTUALLY
 271 %token TOK_INCREMENT TOK_DECREMENT TOK_UNIQUE TOK_PRIORITY
 272 %token TOK_STRUCT TOK_PACKED TOK_UNSIGNED TOK_INT TOK_BYTE TOK_SHORTINT TOK_UNION
 273
 274 %type <ast> range range_or_multirange  non_opt_range non_opt_multirange range_or_signed_int
 275 %type <ast> wire_type expr basic_expr concat_list rvalue lvalue lvalue_concat_list
 276 %type <string> opt_label opt_sva_label tok_prim_wrapper hierarchical_id hierarchical_type_id integral_number
 277 %type <string> type_name
 278 %type <ast> opt_enum_init enum_type struct_type non_wire_data_type
 279 %type <boolean> opt_signed opt_property unique_case_attr always_comb_or_latch always_or_always_ff
 280 %type <al> attr case_attr
 281 %type <ast> struct_union
 282
 283 %type <specify_target_ptr> specify_target
 284 %type <specify_triple_ptr> specify_triple specify_opt_triple
 285 %type <specify_rise_fall_ptr> specify_rise_fall
 286 %type <ast> specify_if specify_condition
 287 %type <ch> specify_edge
 288
 289 // operator precedence from low to high
 290 %left OP_LOR
 291 %left OP_LAND
 292 %left '|' OP_NOR
 293 %left '^' OP_XNOR
 294 %left '&' OP_NAND
 295 %left OP_EQ OP_NE OP_EQX OP_NEX
 296 %left '<' OP_LE OP_GE '>'
 297 %left OP_SHL OP_SHR OP_SSHL OP_SSHR
 298 %left '+' '-'
 299 %left '*' '/' '%'
 300 %left OP_POW
 301 %right UNARY_OPS
 302
 303 %define parse.error verbose
 304 %define parse.lac full
 305
 306 %nonassoc FAKE_THEN
 307 %nonassoc TOK_ELSE
 308
 309 %debug
 310 %locations
 311
 312 %%
 313
 314 input: {
 315         ast_stack.clear();
 316         ast_stack.push_back(current_ast);
 317 } design {
 318         ast_stack.pop_back();
 319         log_assert(GetSize(ast_stack) == 0);
 320         for (auto &it : default_attr_list)
 321                 delete it.second;
 322         default_attr_list.clear();
 323 };
 324
 325 design:
 326         module design |
 327         defattr design |
 328         task_func_decl design |
 329         param_decl design |
 330         localparam_decl design |
 331         typedef_decl design |
 332         package design |
 333         interface design |
 334         /* empty */;
 335
 336 attr:
 337         {
 338                 if (attr_list != nullptr)
 339                         attr_list_stack.push(attr_list);
 340                 attr_list = new dict<IdString, AstNode*>;
 341                 for (auto &it : default_attr_list)
 342                         (*attr_list)[it.first] = it.second->clone();
 343         } attr_opt {
 344                 $$ = attr_list;
 345                 if (!attr_list_stack.empty()) {
 346                         attr_list = attr_list_stack.top();
 347                         attr_list_stack.pop();
 348                 } else
 349                         attr_list = nullptr;
 350         };
 351
 352 attr_opt:
 353         attr_opt ATTR_BEGIN opt_attr_list ATTR_END {
 354                 SET_RULE_LOC(@$, @2, @$);
 355         }|
 356         /* empty */;
 357
 358 defattr:
 359         DEFATTR_BEGIN {
 360                 if (attr_list != nullptr)
 361                         attr_list_stack.push(attr_list);
 362                 attr_list = new dict<IdString, AstNode*>;
 363                 for (auto &it : default_attr_list)
 364                         delete it.second;
 365                 default_attr_list.clear();
 366         } opt_attr_list {
 367                 attr_list->swap(default_attr_list);
 368                 delete attr_list;
 369                 if (!attr_list_stack.empty()) {
 370                         attr_list = attr_list_stack.top();
 371                         attr_list_stack.pop();
 372                 } else
 373                         attr_list = nullptr;
 374         } DEFATTR_END;
 375
 376 opt_attr_list:
 377         attr_list | /* empty */;
 378
 379 attr_list:
 380         attr_assign |
 381         attr_list ',' attr_assign;
 382
 383 attr_assign:
 384         hierarchical_id {
 385                 if (attr_list->count(*$1) != 0)
 386                         delete (*attr_list)[*$1];
 387                 (*attr_list)[*$1] = AstNode::mkconst_int(1, false);
 388                 delete $1;
 389         } |
 390         hierarchical_id '=' expr {
 391                 if (attr_list->count(*$1) != 0)
 392                         delete (*attr_list)[*$1];
 393                 (*attr_list)[*$1] = $3;
 394                 delete $1;
 395         };
 396
 397 hierarchical_id:
 398         TOK_ID {
 399                 $$ = $1;
 400         } |
 401         hierarchical_id TOK_PACKAGESEP TOK_ID {
 402                 if ($3->compare(0, 1, "\\") == 0)
 403                         *$1 += "::" + $3->substr(1);
 404                 else
 405                         *$1 += "::" + *$3;
 406                 delete $3;
 407                 $$ = $1;
 408         } |
 409         hierarchical_id '.' TOK_ID {
 410                 if ($3->compare(0, 1, "\\") == 0)
 411                         *$1 += "." + $3->substr(1);
 412                 else
 413                         *$1 += "." + *$3;
 414                 delete $3;
 415                 $$ = $1;
 416         };
 417
 418 hierarchical_type_id:
 419         TOK_USER_TYPE
 420         | TOK_PKG_USER_TYPE                             // package qualified type name
 421         | '(' TOK_USER_TYPE ')' { $$ = $2; }            // non-standard grammar
 422         ;
 423
 424 module:
 425         attr TOK_MODULE {
 426                 enterTypeScope();
 427         } TOK_ID {
 428                 do_not_require_port_stubs = false;
 429                 AstNode *mod = new AstNode(AST_MODULE);
 430                 ast_stack.back()->children.push_back(mod);
 431                 ast_stack.push_back(mod);
 432                 current_ast_mod = mod;
 433                 port_stubs.clear();
 434                 port_counter = 0;
 435                 mod->str = *$4;
 436                 append_attr(mod, $1);
 437                 delete $4;
 438         } module_para_opt module_args_opt ';' module_body TOK_ENDMODULE {
 439                 if (port_stubs.size() != 0)
 440                         frontend_verilog_yyerror("Missing details for module port `%s'.",
 441                                         port_stubs.begin()->first.c_str());
 442                 SET_AST_NODE_LOC(ast_stack.back(), @2, @$);
 443                 ast_stack.pop_back();
 444                 log_assert(ast_stack.size() == 1);
 445                 current_ast_mod = NULL;
 446                 exitTypeScope();
 447         };
 448
 449 module_para_opt:
 450         '#' '(' { astbuf1 = nullptr; } module_para_list { if (astbuf1) delete astbuf1; } ')' | /* empty */;
 451
 452 module_para_list:
 453         single_module_para | module_para_list ',' single_module_para;
 454
 455 single_module_para:
 456         /* empty */ |
 457         attr TOK_PARAMETER {
 458                 if (astbuf1) delete astbuf1;
 459                 astbuf1 = new AstNode(AST_PARAMETER);
 460                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
 461                 append_attr(astbuf1, $1);
 462         } param_type single_param_decl |
 463         attr TOK_LOCALPARAM {
 464                 if (astbuf1) delete astbuf1;
 465                 astbuf1 = new AstNode(AST_LOCALPARAM);
 466                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
 467                 append_attr(astbuf1, $1);
 468         } param_type single_param_decl |
 469         single_param_decl;
 470
 471 module_args_opt:
 472         '(' ')' | /* empty */ | '(' module_args optional_comma ')';
 473
 474 module_args:
 475         module_arg | module_args ',' module_arg;
 476
 477 optional_comma:
 478         ',' | /* empty */;
 479
 480 module_arg_opt_assignment:
 481         '=' expr {
 482                 if (ast_stack.back()->children.size() > 0 && ast_stack.back()->children.back()->type == AST_WIRE) {
 483                         AstNode *wire = new AstNode(AST_IDENTIFIER);
 484                         wire->str = ast_stack.back()->children.back()->str;
 485                         if (ast_stack.back()->children.back()->is_input) {
 486                                 AstNode *n = ast_stack.back()->children.back();
 487                                 if (n->attributes.count(ID::defaultvalue))
 488                                         delete n->attributes.at(ID::defaultvalue);
 489                                 n->attributes[ID::defaultvalue] = $2;
 490                         } else
 491                         if (ast_stack.back()->children.back()->is_reg || ast_stack.back()->children.back()->is_logic)
 492                                 ast_stack.back()->children.push_back(new AstNode(AST_INITIAL, new AstNode(AST_BLOCK, new AstNode(AST_ASSIGN_LE, wire, $2))));
 493                         else
 494                                 ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, wire, $2));
 495                 } else
 496                         frontend_verilog_yyerror("SystemVerilog interface in module port list cannot have a default value.");
 497         } |
 498         /* empty */;
 499
 500 module_arg:
 501         TOK_ID {
 502                 if (ast_stack.back()->children.size() > 0 && ast_stack.back()->children.back()->type == AST_WIRE) {
 503                         AstNode *node = ast_stack.back()->children.back()->clone();
 504                         node->str = *$1;
 505                         node->port_id = ++port_counter;
 506                         ast_stack.back()->children.push_back(node);
 507                         SET_AST_NODE_LOC(node, @1, @1);
 508                 } else {
 509                         if (port_stubs.count(*$1) != 0)
 510                                 frontend_verilog_yyerror("Duplicate module port `%s'.", $1->c_str());
 511                         port_stubs[*$1] = ++port_counter;
 512                 }
 513                 delete $1;
 514         } module_arg_opt_assignment |
 515         TOK_ID {
 516                 astbuf1 = new AstNode(AST_INTERFACEPORT);
 517                 astbuf1->children.push_back(new AstNode(AST_INTERFACEPORTTYPE));
 518                 astbuf1->children[0]->str = *$1;
 519                 delete $1;
 520         } TOK_ID {  /* SV interfaces */
 521                 if (!sv_mode)
 522                         frontend_verilog_yyerror("Interface found in port list (%s). This is not supported unless read_verilog is called with -sv!", $3->c_str());
 523                 astbuf2 = astbuf1->clone(); // really only needed if multiple instances of same type.
 524                 astbuf2->str = *$3;
 525                 delete $3;
 526                 astbuf2->port_id = ++port_counter;
 527                 ast_stack.back()->children.push_back(astbuf2);
 528                 delete astbuf1; // really only needed if multiple instances of same type.
 529         } module_arg_opt_assignment |
 530         attr wire_type range TOK_ID {
 531                 AstNode *node = $2;
 532                 node->str = *$4;
 533                 SET_AST_NODE_LOC(node, @4, @4);
 534                 node->port_id = ++port_counter;
 535                 if ($3 != NULL)
 536                         node->children.push_back($3);
 537                 if (!node->is_input && !node->is_output)
 538                         frontend_verilog_yyerror("Module port `%s' is neither input nor output.", $4->c_str());
 539                 if (node->is_reg && node->is_input && !node->is_output && !sv_mode)
 540                         frontend_verilog_yyerror("Input port `%s' is declared as register.", $4->c_str());
 541                 ast_stack.back()->children.push_back(node);
 542                 append_attr(node, $1);
 543                 delete $4;
 544         } module_arg_opt_assignment |
 545         '.' '.' '.' {
 546                 do_not_require_port_stubs = true;
 547         };
 548
 549 package:
 550         attr TOK_PACKAGE {
 551                 enterTypeScope();
 552         } TOK_ID {
 553                 AstNode *mod = new AstNode(AST_PACKAGE);
 554                 ast_stack.back()->children.push_back(mod);
 555                 ast_stack.push_back(mod);
 556                 current_ast_mod = mod;
 557                 mod->str = *$4;
 558                 append_attr(mod, $1);
 559         } ';' package_body TOK_ENDPACKAGE {
 560                 ast_stack.pop_back();
 561                 current_ast_mod = NULL;
 562                 exitTypeScope();
 563         };
 564
 565 package_body:
 566         package_body package_body_stmt
 567         | // optional
 568         ;
 569
 570 package_body_stmt:
 571           typedef_decl
 572         | localparam_decl
 573         | param_decl
 574         ;
 575
 576 interface:
 577         TOK_INTERFACE {
 578                 enterTypeScope();
 579         } TOK_ID {
 580                 do_not_require_port_stubs = false;
 581                 AstNode *intf = new AstNode(AST_INTERFACE);
 582                 ast_stack.back()->children.push_back(intf);
 583                 ast_stack.push_back(intf);
 584                 current_ast_mod = intf;
 585                 port_stubs.clear();
 586                 port_counter = 0;
 587                 intf->str = *$3;
 588                 delete $3;
 589         } module_para_opt module_args_opt ';' interface_body TOK_ENDINTERFACE {
 590                 if (port_stubs.size() != 0)
 591                         frontend_verilog_yyerror("Missing details for module port `%s'.",
 592                                 port_stubs.begin()->first.c_str());
 593                 ast_stack.pop_back();
 594                 log_assert(ast_stack.size() == 1);
 595                 current_ast_mod = NULL;
 596                 exitTypeScope();
 597         };
 598
 599 interface_body:
 600         interface_body interface_body_stmt |;
 601
 602 interface_body_stmt:
 603         param_decl | localparam_decl | typedef_decl | defparam_decl | wire_decl | always_stmt | assign_stmt |
 604         modport_stmt;
 605
 606 non_opt_delay:
 607         '#' TOK_ID { delete $2; } |
 608         '#' TOK_CONSTVAL { delete $2; } |
 609         '#' TOK_REALVAL { delete $2; } |
 610         '#' '(' expr ')' { delete $3; } |
 611         '#' '(' expr ':' expr ':' expr ')' { delete $3; delete $5; delete $7; };
 612
 613 delay:
 614         non_opt_delay | /* empty */;
 615
 616 wire_type:
 617         {
 618                 astbuf3 = new AstNode(AST_WIRE);
 619                 current_wire_rand = false;
 620                 current_wire_const = false;
 621         } wire_type_token_list {
 622                 $$ = astbuf3;
 623                 SET_RULE_LOC(@$, @2, @$);
 624         };
 625
 626 wire_type_token_list:
 627         wire_type_token |
 628         wire_type_token_list wire_type_token |
 629         wire_type_token_io |
 630         hierarchical_type_id {
 631                 astbuf3->is_custom_type = true;
 632                 astbuf3->children.push_back(new AstNode(AST_WIRETYPE));
 633                 astbuf3->children.back()->str = *$1;
 634                 delete $1;
 635         };
 636
 637 wire_type_token_io:
 638         TOK_INPUT {
 639                 astbuf3->is_input = true;
 640         } |
 641         TOK_OUTPUT {
 642                 astbuf3->is_output = true;
 643         } |
 644         TOK_INOUT {
 645                 astbuf3->is_input = true;
 646                 astbuf3->is_output = true;
 647         };
 648
 649 wire_type_token:
 650         TOK_WIRE {
 651         } |
 652         TOK_WOR {
 653                 astbuf3->is_wor = true;
 654         } |
 655         TOK_WAND {
 656                 astbuf3->is_wand = true;
 657         } |
 658         TOK_REG {
 659                 astbuf3->is_reg = true;
 660         } |
 661         TOK_LOGIC {
 662                 astbuf3->is_logic = true;
 663         } |
 664         TOK_VAR {
 665                 astbuf3->is_logic = true;
 666         } |
 667         TOK_INTEGER {
 668                 astbuf3->is_reg = true;
 669                 astbuf3->range_left = 31;
 670                 astbuf3->range_right = 0;
 671                 astbuf3->is_signed = true;
 672         } |
 673         TOK_GENVAR {
 674                 astbuf3->type = AST_GENVAR;
 675                 astbuf3->is_reg = true;
 676                 astbuf3->is_signed = true;
 677                 astbuf3->range_left = 31;
 678                 astbuf3->range_right = 0;
 679         } |
 680         TOK_SIGNED {
 681                 astbuf3->is_signed = true;
 682         } |
 683         TOK_RAND {
 684                 current_wire_rand = true;
 685         } |
 686         TOK_CONST {
 687                 current_wire_const = true;
 688         };
 689
 690 non_opt_range:
 691         '[' expr ':' expr ']' {
 692                 $$ = new AstNode(AST_RANGE);
 693                 $$->children.push_back($2);
 694                 $$->children.push_back($4);
 695         } |
 696         '[' expr TOK_POS_INDEXED expr ']' {
 697                 $$ = new AstNode(AST_RANGE);
 698                 AstNode *expr = new AstNode(AST_SELFSZ, $2);
 699                 $$->children.push_back(new AstNode(AST_SUB, new AstNode(AST_ADD, expr->clone(), $4), AstNode::mkconst_int(1, true)));
 700                 $$->children.push_back(new AstNode(AST_ADD, expr, AstNode::mkconst_int(0, true)));
 701         } |
 702         '[' expr TOK_NEG_INDEXED expr ']' {
 703                 $$ = new AstNode(AST_RANGE);
 704                 AstNode *expr = new AstNode(AST_SELFSZ, $2);
 705                 $$->children.push_back(new AstNode(AST_ADD, expr, AstNode::mkconst_int(0, true)));
 706                 $$->children.push_back(new AstNode(AST_SUB, new AstNode(AST_ADD, expr->clone(), AstNode::mkconst_int(1, true)), $4));
 707         } |
 708         '[' expr ']' {
 709                 $$ = new AstNode(AST_RANGE);
 710                 $$->children.push_back($2);
 711         };
 712
 713 non_opt_multirange:
 714         non_opt_range non_opt_range {
 715                 $$ = new AstNode(AST_MULTIRANGE, $1, $2);
 716         } |
 717         non_opt_multirange non_opt_range {
 718                 $$ = $1;
 719                 $$->children.push_back($2);
 720         };
 721
 722 range:
 723         non_opt_range {
 724                 $$ = $1;
 725         } |
 726         /* empty */ {
 727                 $$ = NULL;
 728         };
 729
 730 range_or_multirange:
 731         range { $$ = $1; } |
 732         non_opt_multirange { $$ = $1; };
 733
 734 range_or_signed_int:
 735           range                 { $$ = $1; }
 736         | TOK_INTEGER           { $$ = makeRange(); }
 737         ;
 738
 739 module_body:
 740         module_body module_body_stmt |
 741         /* the following line makes the generate..endgenrate keywords optional */
 742         module_body gen_stmt |
 743         /* empty */;
 744
 745 module_body_stmt:
 746         task_func_decl | specify_block | param_decl | localparam_decl | typedef_decl | defparam_decl | specparam_declaration | wire_decl | assign_stmt | cell_stmt |
 747         enum_decl | struct_decl |
 748         always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block;
 749
 750 checker_decl:
 751         TOK_CHECKER TOK_ID ';' {
 752                 AstNode *node = new AstNode(AST_GENBLOCK);
 753                 node->str = *$2;
 754                 ast_stack.back()->children.push_back(node);
 755                 ast_stack.push_back(node);
 756         } module_body TOK_ENDCHECKER {
 757                 delete $2;
 758                 ast_stack.pop_back();
 759         };
 760
 761 task_func_decl:
 762         attr TOK_DPI_FUNCTION TOK_ID TOK_ID {
 763                 current_function_or_task = new AstNode(AST_DPI_FUNCTION, AstNode::mkconst_str(*$3), AstNode::mkconst_str(*$4));
 764                 current_function_or_task->str = *$4;
 765                 append_attr(current_function_or_task, $1);
 766                 ast_stack.back()->children.push_back(current_function_or_task);
 767                 delete $3;
 768                 delete $4;
 769         } opt_dpi_function_args ';' {
 770                 current_function_or_task = NULL;
 771         } |
 772         attr TOK_DPI_FUNCTION TOK_ID '=' TOK_ID TOK_ID {
 773                 current_function_or_task = new AstNode(AST_DPI_FUNCTION, AstNode::mkconst_str(*$5), AstNode::mkconst_str(*$3));
 774                 current_function_or_task->str = *$6;
 775                 append_attr(current_function_or_task, $1);
 776                 ast_stack.back()->children.push_back(current_function_or_task);
 777                 delete $3;
 778                 delete $5;
 779                 delete $6;
 780         } opt_dpi_function_args ';' {
 781                 current_function_or_task = NULL;
 782         } |
 783         attr TOK_DPI_FUNCTION TOK_ID ':' TOK_ID '=' TOK_ID TOK_ID {
 784                 current_function_or_task = new AstNode(AST_DPI_FUNCTION, AstNode::mkconst_str(*$7), AstNode::mkconst_str(*$3 + ":" + RTLIL::unescape_id(*$5)));
 785                 current_function_or_task->str = *$8;
 786                 append_attr(current_function_or_task, $1);
 787                 ast_stack.back()->children.push_back(current_function_or_task);
 788                 delete $3;
 789                 delete $5;
 790                 delete $7;
 791                 delete $8;
 792         } opt_dpi_function_args ';' {
 793                 current_function_or_task = NULL;
 794         } |
 795         attr TOK_TASK opt_automatic TOK_ID {
 796                 current_function_or_task = new AstNode(AST_TASK);
 797                 current_function_or_task->str = *$4;
 798                 append_attr(current_function_or_task, $1);
 799                 ast_stack.back()->children.push_back(current_function_or_task);
 800                 ast_stack.push_back(current_function_or_task);
 801                 current_function_or_task_port_id = 1;
 802                 delete $4;
 803         } task_func_args_opt ';' task_func_body TOK_ENDTASK {
 804                 current_function_or_task = NULL;
 805                 ast_stack.pop_back();
 806         } |
 807         attr TOK_FUNCTION opt_automatic opt_signed range_or_signed_int TOK_ID {
 808                 current_function_or_task = new AstNode(AST_FUNCTION);
 809                 current_function_or_task->str = *$6;
 810                 append_attr(current_function_or_task, $1);
 811                 ast_stack.back()->children.push_back(current_function_or_task);
 812                 ast_stack.push_back(current_function_or_task);
 813                 AstNode *outreg = new AstNode(AST_WIRE);
 814                 outreg->str = *$6;
 815                 outreg->is_signed = $4;
 816                 outreg->is_reg = true;
 817                 if ($5 != NULL) {
 818                         outreg->children.push_back($5);
 819                         outreg->is_signed = $4 || $5->is_signed;
 820                         $5->is_signed = false;
 821                 }
 822                 current_function_or_task->children.push_back(outreg);
 823                 current_function_or_task_port_id = 1;
 824                 delete $6;
 825         } task_func_args_opt ';' task_func_body TOK_ENDFUNCTION {
 826                 current_function_or_task = NULL;
 827                 ast_stack.pop_back();
 828         };
 829
 830 dpi_function_arg:
 831         TOK_ID TOK_ID {
 832                 current_function_or_task->children.push_back(AstNode::mkconst_str(*$1));
 833                 delete $1;
 834                 delete $2;
 835         } |
 836         TOK_ID {
 837                 current_function_or_task->children.push_back(AstNode::mkconst_str(*$1));
 838                 delete $1;
 839         };
 840
 841 opt_dpi_function_args:
 842         '(' dpi_function_args ')' |
 843         /* empty */;
 844
 845 dpi_function_args:
 846         dpi_function_args ',' dpi_function_arg |
 847         dpi_function_args ',' |
 848         dpi_function_arg |
 849         /* empty */;
 850
 851 opt_automatic:
 852         TOK_AUTOMATIC |
 853         /* empty */;
 854
 855 opt_signed:
 856         TOK_SIGNED {
 857                 $$ = true;
 858         } |
 859         /* empty */ {
 860                 $$ = false;
 861         };
 862
 863 task_func_args_opt:
 864         '(' ')' | /* empty */ | '(' {
 865                 albuf = nullptr;
 866                 astbuf1 = nullptr;
 867                 astbuf2 = nullptr;
 868         } task_func_args optional_comma {
 869                 delete astbuf1;
 870                 if (astbuf2 != NULL)
 871                         delete astbuf2;
 872                 free_attr(albuf);
 873         } ')';
 874
 875 task_func_args:
 876         task_func_port | task_func_args ',' task_func_port;
 877
 878 task_func_port:
 879         attr wire_type range {
 880                 if (albuf) {
 881                         delete astbuf1;
 882                         if (astbuf2 != NULL)
 883                                 delete astbuf2;
 884                         free_attr(albuf);
 885                 }
 886                 albuf = $1;
 887                 astbuf1 = $2;
 888                 astbuf2 = checkRange(astbuf1, $3);
 889         } wire_name |
 890         {
 891                 if (!astbuf1) {
 892                         if (!sv_mode)
 893                                 frontend_verilog_yyerror("task/function argument direction missing");
 894                         albuf = new dict<IdString, AstNode*>;
 895                         astbuf1 = new AstNode(AST_WIRE);
 896                         current_wire_rand = false;
 897                         current_wire_const = false;
 898                         astbuf1->is_input = true;
 899                         astbuf2 = NULL;
 900                 }
 901         } wire_name;
 902
 903 task_func_body:
 904         task_func_body behavioral_stmt |
 905         /* empty */;
 906
 907 /*************************** specify parser ***************************/
 908
 909 specify_block:
 910         TOK_SPECIFY specify_item_list TOK_ENDSPECIFY;
 911
 912 specify_item_list:
 913         specify_item specify_item_list |
 914         /* empty */;
 915
 916 specify_item:
 917         specify_if '(' specify_edge expr TOK_SPECIFY_OPER specify_target ')' '=' specify_rise_fall ';' {
 918                 AstNode *en_expr = $1;
 919                 char specify_edge = $3;
 920                 AstNode *src_expr = $4;
 921                 string *oper = $5;
 922                 specify_target *target = $6;
 923                 specify_rise_fall *timing = $9;
 924
 925                 if (specify_edge != 0 && target->dat == nullptr)
 926                         frontend_verilog_yyerror("Found specify edge but no data spec.\n");
 927
 928                 AstNode *cell = new AstNode(AST_CELL);
 929                 ast_stack.back()->children.push_back(cell);
 930                 cell->str = stringf("$specify$%d", autoidx++);
 931                 cell->children.push_back(new AstNode(AST_CELLTYPE));
 932                 cell->children.back()->str = target->dat ? "$specify3" : "$specify2";
 933                 SET_AST_NODE_LOC(cell, en_expr ? @1 : @2, @10);
 934
 935                 char oper_polarity = 0;
 936                 char oper_type = oper->at(0);
 937
 938                 if (oper->size() == 3) {
 939                         oper_polarity = oper->at(0);
 940                         oper_type = oper->at(1);
 941                 }
 942
 943                 cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(oper_type == '*', false, 1)));
 944                 cell->children.back()->str = "\\FULL";
 945
 946                 cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(oper_polarity != 0, false, 1)));
 947                 cell->children.back()->str = "\\SRC_DST_PEN";
 948
 949                 cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(oper_polarity == '+', false, 1)));
 950                 cell->children.back()->str = "\\SRC_DST_POL";
 951
 952                 cell->children.push_back(new AstNode(AST_PARASET, timing->rise.t_min));
 953                 cell->children.back()->str = "\\T_RISE_MIN";
 954
 955                 cell->children.push_back(new AstNode(AST_PARASET, timing->rise.t_avg));
 956                 cell->children.back()->str = "\\T_RISE_TYP";
 957
 958                 cell->children.push_back(new AstNode(AST_PARASET, timing->rise.t_max));
 959                 cell->children.back()->str = "\\T_RISE_MAX";
 960
 961                 cell->children.push_back(new AstNode(AST_PARASET, timing->fall.t_min));
 962                 cell->children.back()->str = "\\T_FALL_MIN";
 963
 964                 cell->children.push_back(new AstNode(AST_PARASET, timing->fall.t_avg));
 965                 cell->children.back()->str = "\\T_FALL_TYP";
 966
 967                 cell->children.push_back(new AstNode(AST_PARASET, timing->fall.t_max));
 968                 cell->children.back()->str = "\\T_FALL_MAX";
 969
 970                 cell->children.push_back(new AstNode(AST_ARGUMENT, en_expr ? en_expr : AstNode::mkconst_int(1, false, 1)));
 971                 cell->children.back()->str = "\\EN";
 972
 973                 cell->children.push_back(new AstNode(AST_ARGUMENT, src_expr));
 974                 cell->children.back()->str = "\\SRC";
 975
 976                 cell->children.push_back(new AstNode(AST_ARGUMENT, target->dst));
 977                 cell->children.back()->str = "\\DST";
 978
 979                 if (target->dat)
 980                 {
 981                         cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(specify_edge != 0, false, 1)));
 982                         cell->children.back()->str = "\\EDGE_EN";
 983
 984                         cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(specify_edge == 'p', false, 1)));
 985                         cell->children.back()->str = "\\EDGE_POL";
 986
 987                         cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(target->polarity_op != 0, false, 1)));
 988                         cell->children.back()->str = "\\DAT_DST_PEN";
 989
 990                         cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(target->polarity_op == '+', false, 1)));
 991                         cell->children.back()->str = "\\DAT_DST_POL";
 992
 993                         cell->children.push_back(new AstNode(AST_ARGUMENT, target->dat));
 994                         cell->children.back()->str = "\\DAT";
 995                 }
 996
 997                 delete oper;
 998                 delete target;
 999                 delete timing;
1000         } |
1001         TOK_ID '(' specify_edge expr specify_condition ',' specify_edge expr specify_condition ',' specify_triple specify_opt_triple ')' ';' {
1002                 if (*$1 != "$setup" && *$1 != "$hold" && *$1 != "$setuphold" && *$1 != "$removal" && *$1 != "$recovery" &&
1003                                 *$1 != "$recrem" && *$1 != "$skew" && *$1 != "$timeskew" && *$1 != "$fullskew" && *$1 != "$nochange")
1004                         frontend_verilog_yyerror("Unsupported specify rule type: %s\n", $1->c_str());
1005
1006                 AstNode *src_pen = AstNode::mkconst_int($3 != 0, false, 1);
1007                 AstNode *src_pol = AstNode::mkconst_int($3 == 'p', false, 1);
1008                 AstNode *src_expr = $4, *src_en = $5 ? $5 : AstNode::mkconst_int(1, false, 1);
1009
1010                 AstNode *dst_pen = AstNode::mkconst_int($7 != 0, false, 1);
1011                 AstNode *dst_pol = AstNode::mkconst_int($7 == 'p', false, 1);
1012                 AstNode *dst_expr = $8, *dst_en = $9 ? $9 : AstNode::mkconst_int(1, false, 1);
1013
1014                 specify_triple *limit = $11;
1015                 specify_triple *limit2 = $12;
1016
1017                 AstNode *cell = new AstNode(AST_CELL);
1018                 ast_stack.back()->children.push_back(cell);
1019                 cell->str = stringf("$specify$%d", autoidx++);
1020                 cell->children.push_back(new AstNode(AST_CELLTYPE));
1021                 cell->children.back()->str = "$specrule";
1022                 SET_AST_NODE_LOC(cell, @1, @14);
1023
1024                 cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_str(*$1)));
1025                 cell->children.back()->str = "\\TYPE";
1026
1027                 cell->children.push_back(new AstNode(AST_PARASET, limit->t_min));
1028                 cell->children.back()->str = "\\T_LIMIT_MIN";
1029
1030                 cell->children.push_back(new AstNode(AST_PARASET, limit->t_avg));
1031                 cell->children.back()->str = "\\T_LIMIT_TYP";
1032
1033                 cell->children.push_back(new AstNode(AST_PARASET, limit->t_max));
1034                 cell->children.back()->str = "\\T_LIMIT_MAX";
1035
1036                 cell->children.push_back(new AstNode(AST_PARASET, limit2 ? limit2->t_min : AstNode::mkconst_int(0, true)));
1037                 cell->children.back()->str = "\\T_LIMIT2_MIN";
1038
1039                 cell->children.push_back(new AstNode(AST_PARASET, limit2 ? limit2->t_avg : AstNode::mkconst_int(0, true)));
1040                 cell->children.back()->str = "\\T_LIMIT2_TYP";
1041
1042                 cell->children.push_back(new AstNode(AST_PARASET, limit2 ? limit2->t_max : AstNode::mkconst_int(0, true)));
1043                 cell->children.back()->str = "\\T_LIMIT2_MAX";
1044
1045                 cell->children.push_back(new AstNode(AST_PARASET, src_pen));
1046                 cell->children.back()->str = "\\SRC_PEN";
1047
1048                 cell->children.push_back(new AstNode(AST_PARASET, src_pol));
1049                 cell->children.back()->str = "\\SRC_POL";
1050
1051                 cell->children.push_back(new AstNode(AST_PARASET, dst_pen));
1052                 cell->children.back()->str = "\\DST_PEN";
1053
1054                 cell->children.push_back(new AstNode(AST_PARASET, dst_pol));
1055                 cell->children.back()->str = "\\DST_POL";
1056
1057                 cell->children.push_back(new AstNode(AST_ARGUMENT, src_en));
1058                 cell->children.back()->str = "\\SRC_EN";
1059
1060                 cell->children.push_back(new AstNode(AST_ARGUMENT, src_expr));
1061                 cell->children.back()->str = "\\SRC";
1062
1063                 cell->children.push_back(new AstNode(AST_ARGUMENT, dst_en));
1064                 cell->children.back()->str = "\\DST_EN";
1065
1066                 cell->children.push_back(new AstNode(AST_ARGUMENT, dst_expr));
1067                 cell->children.back()->str = "\\DST";
1068
1069                 delete $1;
1070         };
1071
1072 specify_opt_triple:
1073         ',' specify_triple {
1074                 $$ = $2;
1075         } |
1076         /* empty */ {
1077                 $$ = nullptr;
1078         };
1079
1080 specify_if:
1081         TOK_IF '(' expr ')' {
1082                 $$ = $3;
1083         } |
1084         /* empty */ {
1085                 $$ = nullptr;
1086         };
1087
1088 specify_condition:
1089         TOK_SPECIFY_AND expr {
1090                 $$ = $2;
1091         } |
1092         /* empty */ {
1093                 $$ = nullptr;
1094         };
1095
1096 specify_target:
1097         expr {
1098                 $$ = new specify_target;
1099                 $$->polarity_op = 0;
1100                 $$->dst = $1;
1101                 $$->dat = nullptr;
1102         } |
1103         '(' expr ':' expr ')'{
1104                 $$ = new specify_target;
1105                 $$->polarity_op = 0;
1106                 $$->dst = $2;
1107                 $$->dat = $4;
1108         } |
1109         '(' expr TOK_NEG_INDEXED expr ')'{
1110                 $$ = new specify_target;
1111                 $$->polarity_op = '-';
1112                 $$->dst = $2;
1113                 $$->dat = $4;
1114         } |
1115         '(' expr TOK_POS_INDEXED expr ')'{
1116                 $$ = new specify_target;
1117                 $$->polarity_op = '+';
1118                 $$->dst = $2;
1119                 $$->dat = $4;
1120         };
1121
1122 specify_edge:
1123         TOK_POSEDGE { $$ = 'p'; } |
1124         TOK_NEGEDGE { $$ = 'n'; } |
1125         { $$ = 0; };
1126
1127 specify_rise_fall:
1128         specify_triple {
1129                 $$ = new specify_rise_fall;
1130                 $$->rise = *$1;
1131                 $$->fall.t_min = $1->t_min->clone();
1132                 $$->fall.t_avg = $1->t_avg->clone();
1133                 $$->fall.t_max = $1->t_max->clone();
1134                 delete $1;
1135         } |
1136         '(' specify_triple ',' specify_triple ')' {
1137                 $$ = new specify_rise_fall;
1138                 $$->rise = *$2;
1139                 $$->fall = *$4;
1140                 delete $2;
1141                 delete $4;
1142         } |
1143         '(' specify_triple ',' specify_triple ',' specify_triple ')' {
1144                 $$ = new specify_rise_fall;
1145                 $$->rise = *$2;
1146                 $$->fall = *$4;
1147                 delete $2;
1148                 delete $4;
1149                 delete $6;
1150                 log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
1151         } |
1152         '(' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ')' {
1153                 $$ = new specify_rise_fall;
1154                 $$->rise = *$2;
1155                 $$->fall = *$4;
1156                 delete $2;
1157                 delete $4;
1158                 delete $6;
1159                 delete $8;
1160                 delete $10;
1161                 delete $12;
1162                 log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
1163         } |
1164         '(' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ')' {
1165                 $$ = new specify_rise_fall;
1166                 $$->rise = *$2;
1167                 $$->fall = *$4;
1168                 delete $2;
1169                 delete $4;
1170                 delete $6;
1171                 delete $8;
1172                 delete $10;
1173                 delete $12;
1174                 delete $14;
1175                 delete $16;
1176                 delete $18;
1177                 delete $20;
1178                 delete $22;
1179                 delete $24;
1180                 log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
1181         }
1182
1183 specify_triple:
1184         expr {
1185                 $$ = new specify_triple;
1186                 $$->t_min = $1;
1187                 $$->t_avg = $1->clone();
1188                 $$->t_max = $1->clone();
1189         } |
1190         expr ':' expr ':' expr {
1191                 $$ = new specify_triple;
1192                 $$->t_min = $1;
1193                 $$->t_avg = $3;
1194                 $$->t_max = $5;
1195         };
1196
1197 /******************** ignored specify parser **************************/
1198
1199 ignored_specify_block:
1200         TOK_IGNORED_SPECIFY ignored_specify_item_opt TOK_ENDSPECIFY |
1201         TOK_IGNORED_SPECIFY TOK_ENDSPECIFY ;
1202
1203 ignored_specify_item_opt:
1204         ignored_specify_item_opt ignored_specify_item |
1205         ignored_specify_item ;
1206
1207 ignored_specify_item:
1208         specparam_declaration
1209         // | pulsestyle_declaration
1210         // | showcancelled_declaration
1211         | path_declaration
1212         | system_timing_declaration
1213         ;
1214
1215 specparam_declaration:
1216         TOK_SPECPARAM list_of_specparam_assignments ';' |
1217         TOK_SPECPARAM specparam_range list_of_specparam_assignments ';' ;
1218
1219 // IEEE 1364-2005 calls this sinmply 'range' but the current 'range' rule allows empty match
1220 // and the 'non_opt_range' rule allows index ranges not allowed by 1364-2005
1221 // exxxxtending this for SV specparam would change this anyhow
1222 specparam_range:
1223         '[' ignspec_constant_expression ':' ignspec_constant_expression ']' ;
1224
1225 list_of_specparam_assignments:
1226         specparam_assignment | list_of_specparam_assignments ',' specparam_assignment;
1227
1228 specparam_assignment:
1229         ignspec_id '=' ignspec_expr ;
1230
1231 ignspec_opt_cond:
1232         TOK_IF '(' ignspec_expr ')' | /* empty */;
1233
1234 path_declaration :
1235         simple_path_declaration ';'
1236         // | edge_sensitive_path_declaration
1237         // | state_dependent_path_declaration
1238         ;
1239
1240 simple_path_declaration :
1241         ignspec_opt_cond parallel_path_description '=' path_delay_value |
1242         ignspec_opt_cond full_path_description '=' path_delay_value
1243         ;
1244
1245 path_delay_value :
1246         '(' ignspec_expr list_of_path_delay_extra_expressions ')'
1247         |     ignspec_expr
1248         |     ignspec_expr list_of_path_delay_extra_expressions
1249         ;
1250
1251 list_of_path_delay_extra_expressions :
1252         ',' ignspec_expr
1253         | ',' ignspec_expr list_of_path_delay_extra_expressions
1254         ;
1255
1256 specify_edge_identifier :
1257         TOK_POSEDGE | TOK_NEGEDGE ;
1258
1259 parallel_path_description :
1260         '(' specify_input_terminal_descriptor opt_polarity_operator '=' '>' specify_output_terminal_descriptor ')' |
1261         '(' specify_edge_identifier specify_input_terminal_descriptor '=' '>' '(' specify_output_terminal_descriptor opt_polarity_operator ':' ignspec_expr ')' ')' |
1262         '(' specify_edge_identifier specify_input_terminal_descriptor '=' '>' '(' specify_output_terminal_descriptor TOK_POS_INDEXED ignspec_expr ')' ')' ;
1263
1264 full_path_description :
1265         '(' list_of_path_inputs '*' '>' list_of_path_outputs ')' |
1266         '(' specify_edge_identifier list_of_path_inputs '*' '>' '(' list_of_path_outputs opt_polarity_operator ':' ignspec_expr ')' ')' |
1267         '(' specify_edge_identifier list_of_path_inputs '*' '>' '(' list_of_path_outputs TOK_POS_INDEXED ignspec_expr ')' ')' ;
1268
1269 // This was broken into 2 rules to solve shift/reduce conflicts
1270 list_of_path_inputs :
1271         specify_input_terminal_descriptor                  opt_polarity_operator  |
1272         specify_input_terminal_descriptor more_path_inputs opt_polarity_operator ;
1273
1274 more_path_inputs :
1275     ',' specify_input_terminal_descriptor |
1276     more_path_inputs ',' specify_input_terminal_descriptor ;
1277
1278 list_of_path_outputs :
1279         specify_output_terminal_descriptor |
1280         list_of_path_outputs ',' specify_output_terminal_descriptor ;
1281
1282 opt_polarity_operator :
1283         '+'
1284         | '-'
1285         | ;
1286
1287 // Good enough for the time being
1288 specify_input_terminal_descriptor :
1289         ignspec_id ;
1290
1291 // Good enough for the time being
1292 specify_output_terminal_descriptor :
1293         ignspec_id ;
1294
1295 system_timing_declaration :
1296         ignspec_id '(' system_timing_args ')' ';' ;
1297
1298 system_timing_arg :
1299         TOK_POSEDGE ignspec_id |
1300         TOK_NEGEDGE ignspec_id |
1301         ignspec_expr ;
1302
1303 system_timing_args :
1304         system_timing_arg |
1305         system_timing_args TOK_IGNORED_SPECIFY_AND system_timing_arg |
1306         system_timing_args ',' system_timing_arg ;
1307
1308 // for the time being this is OK, but we may write our own expr here.
1309 // as I'm not sure it is legal to use a full expr here (probably not)
1310 // On the other hand, other rules requiring constant expressions also use 'expr'
1311 // (such as param assignment), so we may leave this as-is, perhaps adding runtime checks for constant-ness
1312 ignspec_constant_expression:
1313         expr { delete $1; };
1314
1315 ignspec_expr:
1316         expr { delete $1; } |
1317         expr ':' expr ':' expr {
1318                 delete $1;
1319                 delete $3;
1320                 delete $5;
1321         };
1322
1323 ignspec_id:
1324         TOK_ID { delete $1; }
1325         range_or_multirange { delete $3; };
1326
1327 /**********************************************************************/
1328
1329 param_signed:
1330         TOK_SIGNED {
1331                 astbuf1->is_signed = true;
1332         } | TOK_UNSIGNED {
1333                 astbuf1->is_signed = false;
1334         } | /* empty */;
1335
1336 param_integer:
1337         TOK_INTEGER {
1338                 if (astbuf1->children.size() != 1)
1339                         frontend_verilog_yyerror("Internal error in param_integer - should not happen?");
1340                 astbuf1->children.push_back(new AstNode(AST_RANGE));
1341                 astbuf1->children.back()->children.push_back(AstNode::mkconst_int(31, true));
1342                 astbuf1->children.back()->children.push_back(AstNode::mkconst_int(0, true));
1343                 astbuf1->is_signed = true;
1344         }
1345
1346 param_real:
1347         TOK_REAL {
1348                 if (astbuf1->children.size() != 1)
1349                         frontend_verilog_yyerror("Parameter already declared as integer, cannot set to real.");
1350                 astbuf1->children.push_back(new AstNode(AST_REALVALUE));
1351         }
1352
1353 param_range:
1354         range {
1355                 if ($1 != NULL) {
1356                         if (astbuf1->children.size() != 1)
1357                                 frontend_verilog_yyerror("integer/real parameters should not have a range.");
1358                         astbuf1->children.push_back($1);
1359                 }
1360         };
1361
1362 param_integer_type: param_integer param_signed
1363 param_range_type: type_vec param_signed param_range
1364 param_implicit_type: param_signed param_range
1365
1366 param_type:
1367         param_integer_type | param_real | param_range_type | param_implicit_type |
1368         hierarchical_type_id {
1369                 astbuf1->is_custom_type = true;
1370                 astbuf1->children.push_back(new AstNode(AST_WIRETYPE));
1371                 astbuf1->children.back()->str = *$1;
1372         };
1373
1374 param_decl:
1375         attr TOK_PARAMETER {
1376                 astbuf1 = new AstNode(AST_PARAMETER);
1377                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
1378                 append_attr(astbuf1, $1);
1379         } param_type param_decl_list ';' {
1380                 delete astbuf1;
1381         };
1382
1383 localparam_decl:
1384         attr TOK_LOCALPARAM {
1385                 astbuf1 = new AstNode(AST_LOCALPARAM);
1386                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
1387                 append_attr(astbuf1, $1);
1388         } param_type param_decl_list ';' {
1389                 delete astbuf1;
1390         };
1391
1392 param_decl_list:
1393         single_param_decl | param_decl_list ',' single_param_decl;
1394
1395 single_param_decl:
1396         TOK_ID '=' expr {
1397                 AstNode *node;
1398                 if (astbuf1 == nullptr) {
1399                         if (!sv_mode)
1400                                 frontend_verilog_yyerror("In pure Verilog (not SystemVerilog), parameter/localparam with an initializer must use the parameter/localparam keyword");
1401                         node = new AstNode(AST_PARAMETER);
1402                         node->children.push_back(AstNode::mkconst_int(0, true));
1403                 } else {
1404                         node = astbuf1->clone();
1405                 }
1406                 node->str = *$1;
1407                 delete node->children[0];
1408                 node->children[0] = $3;
1409                 ast_stack.back()->children.push_back(node);
1410                 delete $1;
1411         };
1412
1413 defparam_decl:
1414         TOK_DEFPARAM defparam_decl_list ';';
1415
1416 defparam_decl_list:
1417         single_defparam_decl | defparam_decl_list ',' single_defparam_decl;
1418
1419 single_defparam_decl:
1420         range rvalue '=' expr {
1421                 AstNode *node = new AstNode(AST_DEFPARAM);
1422                 node->children.push_back($2);
1423                 node->children.push_back($4);
1424                 if ($1 != NULL)
1425                         node->children.push_back($1);
1426                 ast_stack.back()->children.push_back(node);
1427         };
1428
1429 /////////
1430 // enum
1431 /////////
1432
1433 enum_type: TOK_ENUM {
1434                 static int enum_count;
1435                 // create parent node for the enum
1436                 astbuf2 = new AstNode(AST_ENUM);
1437                 ast_stack.back()->children.push_back(astbuf2);
1438                 astbuf2->str = std::string("$enum");
1439                 astbuf2->str += std::to_string(enum_count++);
1440                 // create the template for the names
1441                 astbuf1 = new AstNode(AST_ENUM_ITEM);
1442                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
1443          } enum_base_type '{' enum_name_list '}' {      // create template for the enum vars
1444                                                         auto tnode = astbuf1->clone();
1445                                                         delete astbuf1;
1446                                                         astbuf1 = tnode;
1447                                                         tnode->type = AST_WIRE;
1448                                                         tnode->attributes[ID::enum_type] = AstNode::mkconst_str(astbuf2->str);
1449                                                         // drop constant but keep any range
1450                                                         delete tnode->children[0];
1451                                                         tnode->children.erase(tnode->children.begin());
1452                                                         $$ = astbuf1; }
1453          ;
1454
1455 enum_base_type: type_atom type_signing
1456         | type_vec type_signing range   { if ($3) astbuf1->children.push_back($3); }
1457         | /* nothing */                 { astbuf1->is_reg = true; addRange(astbuf1); }
1458         ;
1459
1460 type_atom: TOK_INTEGER          { astbuf1->is_reg = true; addRange(astbuf1); }          // 4-state signed
1461         |  TOK_INT              { astbuf1->is_reg = true; addRange(astbuf1); }          // 2-state signed
1462         |  TOK_SHORTINT         { astbuf1->is_reg = true; addRange(astbuf1, 15, 0); }   // 2-state signed
1463         |  TOK_BYTE             { astbuf1->is_reg = true; addRange(astbuf1,  7, 0); }   // 2-state signed
1464         ;
1465
1466 type_vec: TOK_REG               { astbuf1->is_reg   = true; }           // unsigned
1467         | TOK_LOGIC             { astbuf1->is_logic = true; }           // unsigned
1468         ;
1469
1470 type_signing:
1471           TOK_SIGNED            { astbuf1->is_signed = true; }
1472         | TOK_UNSIGNED          { astbuf1->is_signed = false; }
1473         | // optional
1474         ;
1475
1476 enum_name_list: enum_name_decl
1477         | enum_name_list ',' enum_name_decl
1478         ;
1479
1480 enum_name_decl:
1481         TOK_ID opt_enum_init {
1482                 // put in fn
1483                 log_assert(astbuf1);
1484                 log_assert(astbuf2);
1485                 auto node = astbuf1->clone();
1486                 node->str = *$1;
1487                 delete $1;
1488                 SET_AST_NODE_LOC(node, @1, @1);
1489                 delete node->children[0];
1490                 node->children[0] = $2 ? $2 : new AstNode(AST_NONE);
1491                 astbuf2->children.push_back(node);
1492         }
1493         ;
1494
1495 opt_enum_init:
1496         '=' basic_expr          { $$ = $2; }    // TODO: restrict this
1497         | /* optional */        { $$ = NULL; }
1498         ;
1499
1500 enum_var_list:
1501         enum_var
1502         | enum_var_list ',' enum_var
1503         ;
1504
1505 enum_var: TOK_ID {
1506                 log_assert(astbuf1);
1507                 log_assert(astbuf2);
1508                 auto node = astbuf1->clone();
1509                 ast_stack.back()->children.push_back(node);
1510                 node->str = *$1;
1511                 delete $1;
1512                 SET_AST_NODE_LOC(node, @1, @1);
1513                 node->is_enum = true;
1514         }
1515         ;
1516
1517 enum_decl: enum_type enum_var_list ';'          { delete $1; }
1518         ;
1519
1520 //////////////////
1521 // struct or union
1522 //////////////////
1523
1524 struct_decl: struct_type struct_var_list ';'    { delete astbuf2; }
1525         ;
1526
1527 struct_type: struct_union { astbuf2 = $1; } struct_body { $$ = astbuf2; }
1528         ;
1529
1530 struct_union:
1531           TOK_STRUCT            { $$ = new AstNode(AST_STRUCT); }
1532         | TOK_UNION             { $$ = new AstNode(AST_UNION); }
1533         ;
1534
1535 struct_body: opt_packed '{' struct_member_list '}'
1536         ;
1537
1538 opt_packed: TOK_PACKED opt_signed_struct
1539         | { frontend_verilog_yyerror("Only PACKED supported at this time"); }
1540         ;
1541
1542 opt_signed_struct:
1543           TOK_SIGNED            { astbuf2->is_signed = true; }
1544         | TOK_UNSIGNED          { astbuf2->is_signed = false; }
1545         | // default is unsigned
1546         ;
1547
1548 struct_member_list: struct_member
1549         | struct_member_list struct_member
1550         ;
1551
1552 struct_member: struct_member_type member_name_list ';'          { delete astbuf1; }
1553         ;
1554
1555 member_name_list:
1556           member_name
1557         | member_name_list ',' member_name
1558         ;
1559
1560 member_name: TOK_ID {
1561                         astbuf1->str = $1->substr(1);
1562                         delete $1;
1563                         astbuf3 = astbuf1->clone();
1564                         SET_AST_NODE_LOC(astbuf3, @1, @1);
1565                         astbuf2->children.push_back(astbuf3);
1566                 } range { if ($3) astbuf3->children.push_back($3); }
1567         ;
1568
1569 struct_member_type: { astbuf1 = new AstNode(AST_STRUCT_ITEM); } member_type_token
1570         ;
1571
1572 member_type_token:
1573           member_type
1574         | hierarchical_type_id {
1575                         // use a clone of the typedef definition nodes
1576                         auto template_node = copyTypeDefinition(*$1);
1577                         delete $1;
1578                         switch (template_node->type) {
1579                         case AST_WIRE:
1580                                 template_node->type = AST_STRUCT_ITEM;
1581                                 break;
1582                         case AST_STRUCT:
1583                         case AST_UNION:
1584                                 break;
1585                         default:
1586                                 frontend_verilog_yyerror("Invalid type for struct member: %s", type2str(template_node->type).c_str());
1587                         }
1588                         delete astbuf1;
1589                         astbuf1 = template_node;
1590                 }
1591         | struct_union {
1592                         // stash state on ast_stack
1593                         ast_stack.push_back(astbuf2);
1594                         astbuf2 = $1;
1595                 } struct_body  {
1596                         astbuf1 = astbuf2;
1597                         // recover state
1598                         astbuf2 = ast_stack.back();
1599                         ast_stack.pop_back();
1600                 }
1601         ;
1602
1603 member_type: type_atom type_signing
1604         | type_vec type_signing range_or_multirange     { if ($3) astbuf1->children.push_back($3); }
1605         ;
1606
1607 struct_var_list: struct_var
1608         | struct_var_list ',' struct_var
1609         ;
1610
1611 struct_var: TOK_ID      {       auto *var_node = astbuf2->clone();
1612                                 var_node->str = *$1;
1613                                 delete $1;
1614                                 SET_AST_NODE_LOC(var_node, @1, @1);
1615                                 ast_stack.back()->children.push_back(var_node);
1616                         }
1617         ;
1618
1619 /////////
1620 // wire
1621 /////////
1622
1623 wire_decl:
1624         attr wire_type range {
1625                 albuf = $1;
1626                 astbuf1 = $2;
1627                 astbuf2 = checkRange(astbuf1, $3);
1628         } delay wire_name_list {
1629                 delete astbuf1;
1630                 if (astbuf2 != NULL)
1631                         delete astbuf2;
1632                 free_attr(albuf);
1633         } ';' |
1634         attr TOK_SUPPLY0 TOK_ID {
1635                 ast_stack.back()->children.push_back(new AstNode(AST_WIRE));
1636                 ast_stack.back()->children.back()->str = *$3;
1637                 append_attr(ast_stack.back()->children.back(), $1);
1638                 ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, new AstNode(AST_IDENTIFIER), AstNode::mkconst_int(0, false, 1)));
1639                 ast_stack.back()->children.back()->children[0]->str = *$3;
1640                 delete $3;
1641         } opt_supply_wires ';' |
1642         attr TOK_SUPPLY1 TOK_ID {
1643                 ast_stack.back()->children.push_back(new AstNode(AST_WIRE));
1644                 ast_stack.back()->children.back()->str = *$3;
1645                 append_attr(ast_stack.back()->children.back(), $1);
1646                 ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, new AstNode(AST_IDENTIFIER), AstNode::mkconst_int(1, false, 1)));
1647                 ast_stack.back()->children.back()->children[0]->str = *$3;
1648                 delete $3;
1649         } opt_supply_wires ';';
1650
1651 opt_supply_wires:
1652         /* empty */ |
1653         opt_supply_wires ',' TOK_ID {
1654                 AstNode *wire_node = ast_stack.back()->children.at(GetSize(ast_stack.back()->children)-2)->clone();
1655                 AstNode *assign_node = ast_stack.back()->children.at(GetSize(ast_stack.back()->children)-1)->clone();
1656                 wire_node->str = *$3;
1657                 assign_node->children[0]->str = *$3;
1658                 ast_stack.back()->children.push_back(wire_node);
1659                 ast_stack.back()->children.push_back(assign_node);
1660                 delete $3;
1661         };
1662
1663 wire_name_list:
1664         wire_name_and_opt_assign | wire_name_list ',' wire_name_and_opt_assign;
1665
1666 wire_name_and_opt_assign:
1667         wire_name {
1668                 bool attr_anyconst = false;
1669                 bool attr_anyseq = false;
1670                 bool attr_allconst = false;
1671                 bool attr_allseq = false;
1672                 if (ast_stack.back()->children.back()->get_bool_attribute(ID::anyconst)) {
1673                         delete ast_stack.back()->children.back()->attributes.at(ID::anyconst);
1674                         ast_stack.back()->children.back()->attributes.erase(ID::anyconst);
1675                         attr_anyconst = true;
1676                 }
1677                 if (ast_stack.back()->children.back()->get_bool_attribute(ID::anyseq)) {
1678                         delete ast_stack.back()->children.back()->attributes.at(ID::anyseq);
1679                         ast_stack.back()->children.back()->attributes.erase(ID::anyseq);
1680                         attr_anyseq = true;
1681                 }
1682                 if (ast_stack.back()->children.back()->get_bool_attribute(ID::allconst)) {
1683                         delete ast_stack.back()->children.back()->attributes.at(ID::allconst);
1684                         ast_stack.back()->children.back()->attributes.erase(ID::allconst);
1685                         attr_allconst = true;
1686                 }
1687                 if (ast_stack.back()->children.back()->get_bool_attribute(ID::allseq)) {
1688                         delete ast_stack.back()->children.back()->attributes.at(ID::allseq);
1689                         ast_stack.back()->children.back()->attributes.erase(ID::allseq);
1690                         attr_allseq = true;
1691                 }
1692                 if (current_wire_rand || attr_anyconst || attr_anyseq || attr_allconst || attr_allseq) {
1693                         AstNode *wire = new AstNode(AST_IDENTIFIER);
1694                         AstNode *fcall = new AstNode(AST_FCALL);
1695                         wire->str = ast_stack.back()->children.back()->str;
1696                         fcall->str = current_wire_const ? "\\$anyconst" : "\\$anyseq";
1697                         if (attr_anyconst)
1698                                 fcall->str = "\\$anyconst";
1699                         if (attr_anyseq)
1700                                 fcall->str = "\\$anyseq";
1701                         if (attr_allconst)
1702                                 fcall->str = "\\$allconst";
1703                         if (attr_allseq)
1704                                 fcall->str = "\\$allseq";
1705                         fcall->attributes[ID::reg] = AstNode::mkconst_str(RTLIL::unescape_id(wire->str));
1706                         ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, wire, fcall));
1707                 }
1708         } |
1709         wire_name '=' expr {
1710                 AstNode *wire = new AstNode(AST_IDENTIFIER);
1711                 wire->str = ast_stack.back()->children.back()->str;
1712                 if (astbuf1->is_input) {
1713                         if (astbuf1->attributes.count(ID::defaultvalue))
1714                                 delete astbuf1->attributes.at(ID::defaultvalue);
1715                         astbuf1->attributes[ID::defaultvalue] = $3;
1716                 }
1717                 else if (astbuf1->is_reg || astbuf1->is_logic){
1718                         AstNode *assign = new AstNode(AST_ASSIGN_LE, wire, $3);
1719                         AstNode *block = new AstNode(AST_BLOCK, assign);
1720                         AstNode *init = new AstNode(AST_INITIAL, block);
1721
1722                         SET_AST_NODE_LOC(assign, @1, @3);
1723                         SET_AST_NODE_LOC(block, @1, @3);
1724                         SET_AST_NODE_LOC(init, @1, @3);
1725
1726                         ast_stack.back()->children.push_back(init);
1727                 }
1728                 else {
1729                         AstNode *assign = new AstNode(AST_ASSIGN, wire, $3);
1730                         SET_AST_NODE_LOC(assign, @1, @3);
1731                         ast_stack.back()->children.push_back(assign);
1732                 }
1733
1734         };
1735
1736 wire_name:
1737         TOK_ID range_or_multirange {
1738                 if (astbuf1 == nullptr)
1739                         frontend_verilog_yyerror("Internal error - should not happen - no AST_WIRE node.");
1740                 AstNode *node = astbuf1->clone();
1741                 node->str = *$1;
1742                 append_attr_clone(node, albuf);
1743                 if (astbuf2 != NULL)
1744                         node->children.push_back(astbuf2->clone());
1745                 if ($2 != NULL) {
1746                         if (node->is_input || node->is_output)
1747                                 frontend_verilog_yyerror("input/output/inout ports cannot have unpacked dimensions.");
1748                         if (!astbuf2 && !node->is_custom_type) {
1749                                 addRange(node, 0, 0, false);
1750                         }
1751                         rewriteAsMemoryNode(node, $2);
1752                 }
1753                 if (current_function_or_task == NULL) {
1754                         if (do_not_require_port_stubs && (node->is_input || node->is_output) && port_stubs.count(*$1) == 0) {
1755                                 port_stubs[*$1] = ++port_counter;
1756                         }
1757                         if (port_stubs.count(*$1) != 0) {
1758                                 if (!node->is_input && !node->is_output)
1759                                         frontend_verilog_yyerror("Module port `%s' is neither input nor output.", $1->c_str());
1760                                 if (node->is_reg && node->is_input && !node->is_output && !sv_mode)
1761                                         frontend_verilog_yyerror("Input port `%s' is declared as register.", $1->c_str());
1762                                 node->port_id = port_stubs[*$1];
1763                                 port_stubs.erase(*$1);
1764                         } else {
1765                                 if (node->is_input || node->is_output)
1766                                         frontend_verilog_yyerror("Module port `%s' is not declared in module header.", $1->c_str());
1767                         }
1768                 } else {
1769                         if (node->is_input || node->is_output)
1770                                 node->port_id = current_function_or_task_port_id++;
1771                 }
1772                 //FIXME: for some reason, TOK_ID has a location which always points to one column *after* the real last column...
1773                 SET_AST_NODE_LOC(node, @1, @1);
1774                 ast_stack.back()->children.push_back(node);
1775
1776                 delete $1;
1777         };
1778
1779 assign_stmt:
1780         TOK_ASSIGN delay assign_expr_list ';';
1781
1782 assign_expr_list:
1783         assign_expr | assign_expr_list ',' assign_expr;
1784
1785 assign_expr:
1786         lvalue '=' expr {
1787                 AstNode *node = new AstNode(AST_ASSIGN, $1, $3);
1788                 SET_AST_NODE_LOC(node, @$, @$);
1789                 ast_stack.back()->children.push_back(node);
1790         };
1791
1792 type_name: TOK_ID               // first time seen
1793          | TOK_USER_TYPE        { if (isInLocalScope($1)) frontend_verilog_yyerror("Duplicate declaration of TYPEDEF '%s'", $1->c_str()+1); }
1794          ;
1795
1796 typedef_decl:
1797         TOK_TYPEDEF wire_type range type_name range_or_multirange ';' {
1798                 astbuf1 = $2;
1799                 astbuf2 = checkRange(astbuf1, $3);
1800                 if (astbuf2)
1801                         astbuf1->children.push_back(astbuf2);
1802
1803                 if ($5 != NULL) {
1804                         if (!astbuf2) {
1805                                 addRange(astbuf1, 0, 0, false);
1806                         }
1807                         rewriteAsMemoryNode(astbuf1, $5);
1808                 }
1809                 addTypedefNode($4, astbuf1); }
1810         | TOK_TYPEDEF non_wire_data_type type_name ';'   { addTypedefNode($3, $2); }
1811         ;
1812
1813 non_wire_data_type:
1814           enum_type
1815         | struct_type
1816         ;
1817
1818 cell_stmt:
1819         attr TOK_ID {
1820                 astbuf1 = new AstNode(AST_CELL);
1821                 append_attr(astbuf1, $1);
1822                 astbuf1->children.push_back(new AstNode(AST_CELLTYPE));
1823                 astbuf1->children[0]->str = *$2;
1824                 delete $2;
1825         } cell_parameter_list_opt cell_list ';' {
1826                 delete astbuf1;
1827         } |
1828         attr tok_prim_wrapper delay {
1829                 astbuf1 = new AstNode(AST_PRIMITIVE);
1830                 astbuf1->str = *$2;
1831                 append_attr(astbuf1, $1);
1832                 delete $2;
1833         } prim_list ';' {
1834                 delete astbuf1;
1835         };
1836
1837 tok_prim_wrapper:
1838         TOK_PRIMITIVE {
1839                 $$ = $1;
1840         } |
1841         TOK_OR {
1842                 $$ = new std::string("or");
1843         };
1844
1845 cell_list:
1846         single_cell |
1847         cell_list ',' single_cell;
1848
1849 single_cell:
1850         TOK_ID {
1851                 astbuf2 = astbuf1->clone();
1852                 if (astbuf2->type != AST_PRIMITIVE)
1853                         astbuf2->str = *$1;
1854                 delete $1;
1855                 ast_stack.back()->children.push_back(astbuf2);
1856         } '(' cell_port_list ')' {
1857                 SET_AST_NODE_LOC(astbuf2, @1, @$);
1858         } |
1859         TOK_ID non_opt_range {
1860                 astbuf2 = astbuf1->clone();
1861                 if (astbuf2->type != AST_PRIMITIVE)
1862                         astbuf2->str = *$1;
1863                 delete $1;
1864                 ast_stack.back()->children.push_back(new AstNode(AST_CELLARRAY, $2, astbuf2));
1865         } '(' cell_port_list ')'{
1866                 SET_AST_NODE_LOC(astbuf2, @1, @$);
1867         };
1868
1869 prim_list:
1870         single_prim |
1871         prim_list ',' single_prim;
1872
1873 single_prim:
1874         single_cell |
1875         /* no name */ {
1876                 astbuf2 = astbuf1->clone();
1877                 ast_stack.back()->children.push_back(astbuf2);
1878         } '(' cell_port_list ')' {
1879                 SET_AST_NODE_LOC(astbuf2, @1, @$);
1880         }
1881
1882 cell_parameter_list_opt:
1883         '#' '(' cell_parameter_list ')' | /* empty */;
1884
1885 cell_parameter_list:
1886         cell_parameter | cell_parameter_list ',' cell_parameter;
1887
1888 cell_parameter:
1889         /* empty */ |
1890         expr {
1891                 AstNode *node = new AstNode(AST_PARASET);
1892                 astbuf1->children.push_back(node);
1893                 node->children.push_back($1);
1894         } |
1895         '.' TOK_ID '(' expr ')' {
1896                 AstNode *node = new AstNode(AST_PARASET);
1897                 node->str = *$2;
1898                 astbuf1->children.push_back(node);
1899                 node->children.push_back($4);
1900                 delete $2;
1901         };
1902
1903 cell_port_list:
1904         cell_port_list_rules {
1905                 // remove empty args from end of list
1906                 while (!astbuf2->children.empty()) {
1907                         AstNode *node = astbuf2->children.back();
1908                         if (node->type != AST_ARGUMENT) break;
1909                         if (!node->children.empty()) break;
1910                         if (!node->str.empty()) break;
1911                         astbuf2->children.pop_back();
1912                         delete node;
1913                 }
1914
1915                 // check port types
1916                 bool has_positional_args = false;
1917                 bool has_named_args = false;
1918                 for (auto node : astbuf2->children) {
1919                         if (node->type != AST_ARGUMENT) continue;
1920                         if (node->str.empty())
1921                                 has_positional_args = true;
1922                         else
1923                                 has_named_args = true;
1924                 }
1925
1926                 if (has_positional_args && has_named_args)
1927                         frontend_verilog_yyerror("Mix of positional and named cell ports.");
1928         };
1929
1930 cell_port_list_rules:
1931         cell_port | cell_port_list_rules ',' cell_port;
1932
1933 cell_port:
1934         attr {
1935                 AstNode *node = new AstNode(AST_ARGUMENT);
1936                 astbuf2->children.push_back(node);
1937                 free_attr($1);
1938         } |
1939         attr expr {
1940                 AstNode *node = new AstNode(AST_ARGUMENT);
1941                 astbuf2->children.push_back(node);
1942                 node->children.push_back($2);
1943                 free_attr($1);
1944         } |
1945         attr '.' TOK_ID '(' expr ')' {
1946                 AstNode *node = new AstNode(AST_ARGUMENT);
1947                 node->str = *$3;
1948                 astbuf2->children.push_back(node);
1949                 node->children.push_back($5);
1950                 delete $3;
1951                 free_attr($1);
1952         } |
1953         attr '.' TOK_ID '(' ')' {
1954                 AstNode *node = new AstNode(AST_ARGUMENT);
1955                 node->str = *$3;
1956                 astbuf2->children.push_back(node);
1957                 delete $3;
1958                 free_attr($1);
1959         } |
1960         attr '.' TOK_ID {
1961                 AstNode *node = new AstNode(AST_ARGUMENT);
1962                 node->str = *$3;
1963                 astbuf2->children.push_back(node);
1964                 node->children.push_back(new AstNode(AST_IDENTIFIER));
1965                 node->children.back()->str = *$3;
1966                 delete $3;
1967                 free_attr($1);
1968         } |
1969         attr TOK_WILDCARD_CONNECT {
1970                 if (!sv_mode)
1971                         frontend_verilog_yyerror("Wildcard port connections are only supported in SystemVerilog mode.");
1972                 astbuf2->attributes[ID::wildcard_port_conns] = AstNode::mkconst_int(1, false);
1973         };
1974
1975 always_comb_or_latch:
1976         TOK_ALWAYS_COMB {
1977                 $$ = false;
1978         } |
1979         TOK_ALWAYS_LATCH {
1980                 $$ = true;
1981         };
1982
1983 always_or_always_ff:
1984         TOK_ALWAYS {
1985                 $$ = false;
1986         } |
1987         TOK_ALWAYS_FF {
1988                 $$ = true;
1989         };
1990
1991 always_stmt:
1992         attr always_or_always_ff {
1993                 AstNode *node = new AstNode(AST_ALWAYS);
1994                 append_attr(node, $1);
1995                 if ($2)
1996                         node->attributes[ID::always_ff] = AstNode::mkconst_int(1, false);
1997                 ast_stack.back()->children.push_back(node);
1998                 ast_stack.push_back(node);
1999         } always_cond {
2000                 AstNode *block = new AstNode(AST_BLOCK);
2001                 ast_stack.back()->children.push_back(block);
2002                 ast_stack.push_back(block);
2003         } behavioral_stmt {
2004                 SET_AST_NODE_LOC(ast_stack.back(), @6, @6);
2005                 ast_stack.pop_back();
2006
2007                 SET_AST_NODE_LOC(ast_stack.back(), @2, @$);
2008                 ast_stack.pop_back();
2009
2010                 SET_RULE_LOC(@$, @2, @$);
2011         } |
2012         attr always_comb_or_latch {
2013                 AstNode *node = new AstNode(AST_ALWAYS);
2014                 append_attr(node, $1);
2015                 if ($2)
2016                         node->attributes[ID::always_latch] = AstNode::mkconst_int(1, false);
2017                 else
2018                         node->attributes[ID::always_comb] = AstNode::mkconst_int(1, false);
2019                 ast_stack.back()->children.push_back(node);
2020                 ast_stack.push_back(node);
2021                 AstNode *block = new AstNode(AST_BLOCK);
2022                 ast_stack.back()->children.push_back(block);
2023                 ast_stack.push_back(block);
2024         } behavioral_stmt {
2025                 ast_stack.pop_back();
2026                 ast_stack.pop_back();
2027         } |
2028         attr TOK_INITIAL {
2029                 AstNode *node = new AstNode(AST_INITIAL);
2030                 append_attr(node, $1);
2031                 ast_stack.back()->children.push_back(node);
2032                 ast_stack.push_back(node);
2033                 AstNode *block = new AstNode(AST_BLOCK);
2034                 ast_stack.back()->children.push_back(block);
2035                 ast_stack.push_back(block);
2036         } behavioral_stmt {
2037                 ast_stack.pop_back();
2038                 ast_stack.pop_back();
2039         };
2040
2041 always_cond:
2042         '@' '(' always_events ')' |
2043         '@' '(' '*' ')' |
2044         '@' ATTR_BEGIN ')' |
2045         '@' '(' ATTR_END |
2046         '@' '*' |
2047         /* empty */;
2048
2049 always_events:
2050         always_event |
2051         always_events TOK_OR always_event |
2052         always_events ',' always_event;
2053
2054 always_event:
2055         TOK_POSEDGE expr {
2056                 AstNode *node = new AstNode(AST_POSEDGE);
2057                 SET_AST_NODE_LOC(node, @1, @1);
2058                 ast_stack.back()->children.push_back(node);
2059                 node->children.push_back($2);
2060         } |
2061         TOK_NEGEDGE expr {
2062                 AstNode *node = new AstNode(AST_NEGEDGE);
2063                 SET_AST_NODE_LOC(node, @1, @1);
2064                 ast_stack.back()->children.push_back(node);
2065                 node->children.push_back($2);
2066         } |
2067         expr {
2068                 AstNode *node = new AstNode(AST_EDGE);
2069                 ast_stack.back()->children.push_back(node);
2070                 node->children.push_back($1);
2071         };
2072
2073 opt_label:
2074         ':' TOK_ID {
2075                 $$ = $2;
2076         } |
2077         /* empty */ {
2078                 $$ = NULL;
2079         };
2080
2081 opt_sva_label:
2082         TOK_SVA_LABEL ':' {
2083                 $$ = $1;
2084         } |
2085         /* empty */ {
2086                 $$ = NULL;
2087         };
2088
2089 opt_property:
2090         TOK_PROPERTY {
2091                 $$ = true;
2092         } |
2093         TOK_FINAL {
2094                 $$ = false;
2095         } |
2096         /* empty */ {
2097                 $$ = false;
2098         };
2099
2100 modport_stmt:
2101     TOK_MODPORT TOK_ID {
2102         AstNode *modport = new AstNode(AST_MODPORT);
2103         ast_stack.back()->children.push_back(modport);
2104         ast_stack.push_back(modport);
2105         modport->str = *$2;
2106         delete $2;
2107     }  modport_args_opt {
2108         ast_stack.pop_back();
2109         log_assert(ast_stack.size() == 2);
2110     } ';'
2111
2112 modport_args_opt:
2113     '(' ')' | '(' modport_args optional_comma ')';
2114
2115 modport_args:
2116     modport_arg | modport_args ',' modport_arg;
2117
2118 modport_arg:
2119     modport_type_token modport_member |
2120     modport_member
2121
2122 modport_member:
2123     TOK_ID {
2124         AstNode *modport_member = new AstNode(AST_MODPORTMEMBER);
2125         ast_stack.back()->children.push_back(modport_member);
2126         modport_member->str = *$1;
2127         modport_member->is_input = current_modport_input;
2128         modport_member->is_output = current_modport_output;
2129         delete $1;
2130     }
2131
2132 modport_type_token:
2133     TOK_INPUT {current_modport_input = 1; current_modport_output = 0;} | TOK_OUTPUT {current_modport_input = 0; current_modport_output = 1;}
2134
2135 assert:
2136         opt_sva_label TOK_ASSERT opt_property '(' expr ')' ';' {
2137                 if (noassert_mode) {
2138                         delete $5;
2139                 } else {
2140                         AstNode *node = new AstNode(assume_asserts_mode ? AST_ASSUME : AST_ASSERT, $5);
2141                         SET_AST_NODE_LOC(node, @1, @6);
2142                         if ($1 != nullptr)
2143                                 node->str = *$1;
2144                         ast_stack.back()->children.push_back(node);
2145                 }
2146                 if ($1 != nullptr)
2147                         delete $1;
2148         } |
2149         opt_sva_label TOK_ASSUME opt_property '(' expr ')' ';' {
2150                 if (noassume_mode) {
2151                         delete $5;
2152                 } else {
2153                         AstNode *node = new AstNode(assert_assumes_mode ? AST_ASSERT : AST_ASSUME, $5);
2154                         SET_AST_NODE_LOC(node, @1, @6);
2155                         if ($1 != nullptr)
2156                                 node->str = *$1;
2157                         ast_stack.back()->children.push_back(node);
2158                 }
2159                 if ($1 != nullptr)
2160                         delete $1;
2161         } |
2162         opt_sva_label TOK_ASSERT opt_property '(' TOK_EVENTUALLY expr ')' ';' {
2163                 if (noassert_mode) {
2164                         delete $6;
2165                 } else {
2166                         AstNode *node = new AstNode(assume_asserts_mode ? AST_FAIR : AST_LIVE, $6);
2167                         SET_AST_NODE_LOC(node, @1, @7);
2168                         if ($1 != nullptr)
2169                                 node->str = *$1;
2170                         ast_stack.back()->children.push_back(node);
2171                 }
2172                 if ($1 != nullptr)
2173                         delete $1;
2174         } |
2175         opt_sva_label TOK_ASSUME opt_property '(' TOK_EVENTUALLY expr ')' ';' {
2176                 if (noassume_mode) {
2177                         delete $6;
2178                 } else {
2179                         AstNode *node = new AstNode(assert_assumes_mode ? AST_LIVE : AST_FAIR, $6);
2180                         SET_AST_NODE_LOC(node, @1, @7);
2181                         if ($1 != nullptr)
2182                                 node->str = *$1;
2183                         ast_stack.back()->children.push_back(node);
2184                 }
2185                 if ($1 != nullptr)
2186                         delete $1;
2187         } |
2188         opt_sva_label TOK_COVER opt_property '(' expr ')' ';' {
2189                 AstNode *node = new AstNode(AST_COVER, $5);
2190                 SET_AST_NODE_LOC(node, @1, @6);
2191                 if ($1 != nullptr) {
2192                         node->str = *$1;
2193                         delete $1;
2194                 }
2195                 ast_stack.back()->children.push_back(node);
2196         } |
2197         opt_sva_label TOK_COVER opt_property '(' ')' ';' {
2198                 AstNode *node = new AstNode(AST_COVER, AstNode::mkconst_int(1, false));
2199                 SET_AST_NODE_LOC(node, @1, @5);
2200                 if ($1 != nullptr) {
2201                         node->str = *$1;
2202                         delete $1;
2203                 }
2204                 ast_stack.back()->children.push_back(node);
2205         } |
2206         opt_sva_label TOK_COVER ';' {
2207                 AstNode *node = new AstNode(AST_COVER, AstNode::mkconst_int(1, false));
2208                 SET_AST_NODE_LOC(node, @1, @2);
2209                 if ($1 != nullptr) {
2210                         node->str = *$1;
2211                         delete $1;
2212                 }
2213                 ast_stack.back()->children.push_back(node);
2214         } |
2215         opt_sva_label TOK_RESTRICT opt_property '(' expr ')' ';' {
2216                 if (norestrict_mode) {
2217                         delete $5;
2218                 } else {
2219                         AstNode *node = new AstNode(AST_ASSUME, $5);
2220                         SET_AST_NODE_LOC(node, @1, @6);
2221                         if ($1 != nullptr)
2222                                 node->str = *$1;
2223                         ast_stack.back()->children.push_back(node);
2224                 }
2225                 if (!$3)
2226                         log_file_warning(current_filename, get_line_num(), "SystemVerilog does not allow \"restrict\" without \"property\".\n");
2227                 if ($1 != nullptr)
2228                         delete $1;
2229         } |
2230         opt_sva_label TOK_RESTRICT opt_property '(' TOK_EVENTUALLY expr ')' ';' {
2231                 if (norestrict_mode) {
2232                         delete $6;
2233                 } else {
2234                         AstNode *node = new AstNode(AST_FAIR, $6);
2235                         SET_AST_NODE_LOC(node, @1, @7);
2236                         if ($1 != nullptr)
2237                                 node->str = *$1;
2238                         ast_stack.back()->children.push_back(node);
2239                 }
2240                 if (!$3)
2241                         log_file_warning(current_filename, get_line_num(), "SystemVerilog does not allow \"restrict\" without \"property\".\n");
2242                 if ($1 != nullptr)
2243                         delete $1;
2244         };
2245
2246 assert_property:
2247         opt_sva_label TOK_ASSERT TOK_PROPERTY '(' expr ')' ';' {
2248                 AstNode *node = new AstNode(assume_asserts_mode ? AST_ASSUME : AST_ASSERT, $5);
2249                 SET_AST_NODE_LOC(node, @1, @6);
2250                 ast_stack.back()->children.push_back(node);
2251                 if ($1 != nullptr) {
2252                         ast_stack.back()->children.back()->str = *$1;
2253                         delete $1;
2254                 }
2255         } |
2256         opt_sva_label TOK_ASSUME TOK_PROPERTY '(' expr ')' ';' {
2257                 AstNode *node = new AstNode(AST_ASSUME, $5);
2258                 SET_AST_NODE_LOC(node, @1, @6);
2259                 ast_stack.back()->children.push_back(node);
2260                 if ($1 != nullptr) {
2261                         ast_stack.back()->children.back()->str = *$1;
2262                         delete $1;
2263                 }
2264         } |
2265         opt_sva_label TOK_ASSERT TOK_PROPERTY '(' TOK_EVENTUALLY expr ')' ';' {
2266                 AstNode *node = new AstNode(assume_asserts_mode ? AST_FAIR : AST_LIVE, $6);
2267                 SET_AST_NODE_LOC(node, @1, @7);
2268                 ast_stack.back()->children.push_back(node);
2269                 if ($1 != nullptr) {
2270                         ast_stack.back()->children.back()->str = *$1;
2271                         delete $1;
2272                 }
2273         } |
2274         opt_sva_label TOK_ASSUME TOK_PROPERTY '(' TOK_EVENTUALLY expr ')' ';' {
2275                 AstNode *node = new AstNode(AST_FAIR, $6);
2276                 SET_AST_NODE_LOC(node, @1, @7);
2277                 ast_stack.back()->children.push_back(node);
2278                 if ($1 != nullptr) {
2279                         ast_stack.back()->children.back()->str = *$1;
2280                         delete $1;
2281                 }
2282         } |
2283         opt_sva_label TOK_COVER TOK_PROPERTY '(' expr ')' ';' {
2284                 AstNode *node = new AstNode(AST_COVER, $5);
2285                 SET_AST_NODE_LOC(node, @1, @6);
2286                 ast_stack.back()->children.push_back(node);
2287                 if ($1 != nullptr) {
2288                         ast_stack.back()->children.back()->str = *$1;
2289                         delete $1;
2290                 }
2291         } |
2292         opt_sva_label TOK_RESTRICT TOK_PROPERTY '(' expr ')' ';' {
2293                 if (norestrict_mode) {
2294                         delete $5;
2295                 } else {
2296                         AstNode *node = new AstNode(AST_ASSUME, $5);
2297                         SET_AST_NODE_LOC(node, @1, @6);
2298                         ast_stack.back()->children.push_back(node);
2299                         if ($1 != nullptr) {
2300                                 ast_stack.back()->children.back()->str = *$1;
2301                                 delete $1;
2302                         }
2303                 }
2304         } |
2305         opt_sva_label TOK_RESTRICT TOK_PROPERTY '(' TOK_EVENTUALLY expr ')' ';' {
2306                 if (norestrict_mode) {
2307                         delete $6;
2308                 } else {
2309                         AstNode *node = new AstNode(AST_FAIR, $6);
2310                         SET_AST_NODE_LOC(node, @1, @7);
2311                         ast_stack.back()->children.push_back(node);
2312                         if ($1 != nullptr) {
2313                                 ast_stack.back()->children.back()->str = *$1;
2314                                 delete $1;
2315                         }
2316                 }
2317         };
2318
2319 simple_behavioral_stmt:
2320         attr lvalue '=' delay expr {
2321                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, $5);
2322                 ast_stack.back()->children.push_back(node);
2323                 SET_AST_NODE_LOC(node, @2, @5);
2324                 append_attr(node, $1);
2325         } |
2326         attr lvalue TOK_INCREMENT {
2327                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, new AstNode(AST_ADD, $2->clone(), AstNode::mkconst_int(1, true)));
2328                 ast_stack.back()->children.push_back(node);
2329                 SET_AST_NODE_LOC(node, @2, @3);
2330                 append_attr(node, $1);
2331         } |
2332         attr lvalue TOK_DECREMENT {
2333                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, new AstNode(AST_SUB, $2->clone(), AstNode::mkconst_int(1, true)));
2334                 ast_stack.back()->children.push_back(node);
2335                 SET_AST_NODE_LOC(node, @2, @3);
2336                 append_attr(node, $1);
2337         } |
2338         attr lvalue OP_LE delay expr {
2339                 AstNode *node = new AstNode(AST_ASSIGN_LE, $2, $5);
2340                 ast_stack.back()->children.push_back(node);
2341                 SET_AST_NODE_LOC(node, @2, @5);
2342                 append_attr(node, $1);
2343         };
2344
2345 // this production creates the obligatory if-else shift/reduce conflict
2346 behavioral_stmt:
2347         defattr | assert | wire_decl | param_decl | localparam_decl | typedef_decl |
2348         non_opt_delay behavioral_stmt |
2349         simple_behavioral_stmt ';' |
2350         attr ';' {
2351                 free_attr($1);
2352         } |
2353         attr hierarchical_id {
2354                 AstNode *node = new AstNode(AST_TCALL);
2355                 node->str = *$2;
2356                 delete $2;
2357                 ast_stack.back()->children.push_back(node);
2358                 ast_stack.push_back(node);
2359                 append_attr(node, $1);
2360         } opt_arg_list ';'{
2361                 ast_stack.pop_back();
2362         } |
2363         attr TOK_MSG_TASKS {
2364                 AstNode *node = new AstNode(AST_TCALL);
2365                 node->str = *$2;
2366                 delete $2;
2367                 ast_stack.back()->children.push_back(node);
2368                 ast_stack.push_back(node);
2369                 append_attr(node, $1);
2370         } opt_arg_list ';'{
2371                 ast_stack.pop_back();
2372         } |
2373         attr TOK_BEGIN {
2374                 enterTypeScope();
2375         } opt_label {
2376                 AstNode *node = new AstNode(AST_BLOCK);
2377                 ast_stack.back()->children.push_back(node);
2378                 ast_stack.push_back(node);
2379                 append_attr(node, $1);
2380                 if ($4 != NULL)
2381                         node->str = *$4;
2382         } behavioral_stmt_list TOK_END opt_label {
2383                 exitTypeScope();
2384                 if ($4 != NULL && $8 != NULL && *$4 != *$8)
2385                         frontend_verilog_yyerror("Begin label (%s) and end label (%s) don't match.", $4->c_str()+1, $8->c_str()+1);
2386                 SET_AST_NODE_LOC(ast_stack.back(), @2, @8);
2387                 delete $4;
2388                 delete $8;
2389                 ast_stack.pop_back();
2390         } |
2391         attr TOK_FOR '(' {
2392                 AstNode *node = new AstNode(AST_FOR);
2393                 ast_stack.back()->children.push_back(node);
2394                 ast_stack.push_back(node);
2395                 append_attr(node, $1);
2396         } simple_behavioral_stmt ';' expr {
2397                 ast_stack.back()->children.push_back($7);
2398         } ';' simple_behavioral_stmt ')' {
2399                 AstNode *block = new AstNode(AST_BLOCK);
2400                 ast_stack.back()->children.push_back(block);
2401                 ast_stack.push_back(block);
2402         } behavioral_stmt {
2403                 SET_AST_NODE_LOC(ast_stack.back(), @13, @13);
2404                 ast_stack.pop_back();
2405                 SET_AST_NODE_LOC(ast_stack.back(), @2, @13);
2406                 ast_stack.pop_back();
2407         } |
2408         attr TOK_WHILE '(' expr ')' {
2409                 AstNode *node = new AstNode(AST_WHILE);
2410                 ast_stack.back()->children.push_back(node);
2411                 ast_stack.push_back(node);
2412                 append_attr(node, $1);
2413                 AstNode *block = new AstNode(AST_BLOCK);
2414                 ast_stack.back()->children.push_back($4);
2415                 ast_stack.back()->children.push_back(block);
2416                 ast_stack.push_back(block);
2417         } behavioral_stmt {
2418                 SET_AST_NODE_LOC(ast_stack.back(), @7, @7);
2419                 ast_stack.pop_back();
2420                 ast_stack.pop_back();
2421         } |
2422         attr TOK_REPEAT '(' expr ')' {
2423                 AstNode *node = new AstNode(AST_REPEAT);
2424                 ast_stack.back()->children.push_back(node);
2425                 ast_stack.push_back(node);
2426                 append_attr(node, $1);
2427                 AstNode *block = new AstNode(AST_BLOCK);
2428                 ast_stack.back()->children.push_back($4);
2429                 ast_stack.back()->children.push_back(block);
2430                 ast_stack.push_back(block);
2431         } behavioral_stmt {
2432                 SET_AST_NODE_LOC(ast_stack.back(), @7, @7);
2433                 ast_stack.pop_back();
2434                 ast_stack.pop_back();
2435         } |
2436         attr TOK_IF '(' expr ')' {
2437                 AstNode *node = new AstNode(AST_CASE);
2438                 AstNode *block = new AstNode(AST_BLOCK);
2439                 AstNode *cond = new AstNode(AST_COND, AstNode::mkconst_int(1, false, 1), block);
2440                 SET_AST_NODE_LOC(cond, @4, @4);
2441                 ast_stack.back()->children.push_back(node);
2442                 node->children.push_back(new AstNode(AST_REDUCE_BOOL, $4));
2443                 node->children.push_back(cond);
2444                 ast_stack.push_back(node);
2445                 ast_stack.push_back(block);
2446                 append_attr(node, $1);
2447         } behavioral_stmt {
2448                 SET_AST_NODE_LOC(ast_stack.back(), @7, @7);
2449         } optional_else {
2450                 ast_stack.pop_back();
2451                 SET_AST_NODE_LOC(ast_stack.back(), @2, @9);
2452                 ast_stack.pop_back();
2453         } |
2454         case_attr case_type '(' expr ')' {
2455                 AstNode *node = new AstNode(AST_CASE, $4);
2456                 ast_stack.back()->children.push_back(node);
2457                 ast_stack.push_back(node);
2458                 append_attr(node, $1);
2459                 SET_AST_NODE_LOC(ast_stack.back(), @4, @4);
2460         } opt_synopsys_attr case_body TOK_ENDCASE {
2461                 SET_AST_NODE_LOC(ast_stack.back(), @2, @9);
2462                 case_type_stack.pop_back();
2463                 ast_stack.pop_back();
2464         };
2465
2466 unique_case_attr:
2467         /* empty */ {
2468                 $$ = false;
2469         } |
2470         TOK_PRIORITY case_attr {
2471                 $$ = $2;
2472         } |
2473         TOK_UNIQUE case_attr {
2474                 $$ = true;
2475         };
2476
2477 case_attr:
2478         attr unique_case_attr {
2479                 if ($2) (*$1)[ID::parallel_case] = AstNode::mkconst_int(1, false);
2480                 $$ = $1;
2481         };
2482
2483 case_type:
2484         TOK_CASE {
2485                 case_type_stack.push_back(0);
2486         } |
2487         TOK_CASEX {
2488                 case_type_stack.push_back('x');
2489         } |
2490         TOK_CASEZ {
2491                 case_type_stack.push_back('z');
2492         };
2493
2494 opt_synopsys_attr:
2495         opt_synopsys_attr TOK_SYNOPSYS_FULL_CASE {
2496                 if (ast_stack.back()->attributes.count(ID::full_case) == 0)
2497                         ast_stack.back()->attributes[ID::full_case] = AstNode::mkconst_int(1, false);
2498         } |
2499         opt_synopsys_attr TOK_SYNOPSYS_PARALLEL_CASE {
2500                 if (ast_stack.back()->attributes.count(ID::parallel_case) == 0)
2501                         ast_stack.back()->attributes[ID::parallel_case] = AstNode::mkconst_int(1, false);
2502         } |
2503         /* empty */;
2504
2505 behavioral_stmt_list:
2506         behavioral_stmt_list behavioral_stmt |
2507         /* empty */;
2508
2509 optional_else:
2510         TOK_ELSE {
2511                 AstNode *block = new AstNode(AST_BLOCK);
2512                 AstNode *cond = new AstNode(AST_COND, new AstNode(AST_DEFAULT), block);
2513                 SET_AST_NODE_LOC(cond, @1, @1);
2514
2515                 ast_stack.pop_back();
2516                 ast_stack.back()->children.push_back(cond);
2517                 ast_stack.push_back(block);
2518         } behavioral_stmt {
2519                 SET_AST_NODE_LOC(ast_stack.back(), @3, @3);
2520         } |
2521         /* empty */ %prec FAKE_THEN;
2522
2523 case_body:
2524         case_body case_item |
2525         /* empty */;
2526
2527 case_item:
2528         {
2529                 AstNode *node = new AstNode(
2530                                 case_type_stack.size() && case_type_stack.back() == 'x' ? AST_CONDX :
2531                                 case_type_stack.size() && case_type_stack.back() == 'z' ? AST_CONDZ : AST_COND);
2532                 ast_stack.back()->children.push_back(node);
2533                 ast_stack.push_back(node);
2534         } case_select {
2535                 AstNode *block = new AstNode(AST_BLOCK);
2536                 ast_stack.back()->children.push_back(block);
2537                 ast_stack.push_back(block);
2538                 case_type_stack.push_back(0);
2539         } behavioral_stmt {
2540                 case_type_stack.pop_back();
2541                 SET_AST_NODE_LOC(ast_stack.back(), @4, @4);
2542                 ast_stack.pop_back();
2543                 ast_stack.pop_back();
2544         };
2545
2546 gen_case_body:
2547         gen_case_body gen_case_item |
2548         /* empty */;
2549
2550 gen_case_item:
2551         {
2552                 AstNode *node = new AstNode(
2553                                 case_type_stack.size() && case_type_stack.back() == 'x' ? AST_CONDX :
2554                                 case_type_stack.size() && case_type_stack.back() == 'z' ? AST_CONDZ : AST_COND);
2555                 ast_stack.back()->children.push_back(node);
2556                 ast_stack.push_back(node);
2557         } case_select {
2558                 case_type_stack.push_back(0);
2559                 SET_AST_NODE_LOC(ast_stack.back(), @2, @2);
2560         } gen_stmt_block {
2561                 case_type_stack.pop_back();
2562                 ast_stack.pop_back();
2563         };
2564
2565 case_select:
2566         case_expr_list ':' |
2567         TOK_DEFAULT;
2568
2569 case_expr_list:
2570         TOK_DEFAULT {
2571                 AstNode *node = new AstNode(AST_DEFAULT);
2572                 SET_AST_NODE_LOC(node, @1, @1);
2573                 ast_stack.back()->children.push_back(node);
2574         } |
2575         TOK_SVA_LABEL {
2576                 AstNode *node = new AstNode(AST_IDENTIFIER);
2577                 SET_AST_NODE_LOC(node, @1, @1);
2578                 ast_stack.back()->children.push_back(node);
2579                 ast_stack.back()->children.back()->str = *$1;
2580                 delete $1;
2581         } |
2582         expr {
2583                 ast_stack.back()->children.push_back($1);
2584         } |
2585         case_expr_list ',' expr {
2586                 ast_stack.back()->children.push_back($3);
2587         };
2588
2589 rvalue:
2590         hierarchical_id '[' expr ']' '.' rvalue {
2591                 $$ = new AstNode(AST_PREFIX, $3, $6);
2592                 $$->str = *$1;
2593                 delete $1;
2594         } |
2595         hierarchical_id range {
2596                 $$ = new AstNode(AST_IDENTIFIER, $2);
2597                 $$->str = *$1;
2598                 SET_AST_NODE_LOC($$, @1, @1);
2599                 delete $1;
2600                 if ($2 == nullptr && ($$->str == "\\$initstate" ||
2601                                 $$->str == "\\$anyconst" || $$->str == "\\$anyseq" ||
2602                                 $$->str == "\\$allconst" || $$->str == "\\$allseq"))
2603                         $$->type = AST_FCALL;
2604         } |
2605         hierarchical_id non_opt_multirange {
2606                 $$ = new AstNode(AST_IDENTIFIER, $2);
2607                 $$->str = *$1;
2608                 SET_AST_NODE_LOC($$, @1, @1);
2609                 delete $1;
2610         };
2611
2612 lvalue:
2613         rvalue {
2614                 $$ = $1;
2615         } |
2616         '{' lvalue_concat_list '}' {
2617                 $$ = $2;
2618         };
2619
2620 lvalue_concat_list:
2621         expr {
2622                 $$ = new AstNode(AST_CONCAT);
2623                 $$->children.push_back($1);
2624         } |
2625         expr ',' lvalue_concat_list {
2626                 $$ = $3;
2627                 $$->children.push_back($1);
2628         };
2629
2630 opt_arg_list:
2631         '(' arg_list optional_comma ')' |
2632         /* empty */;
2633
2634 arg_list:
2635         arg_list2 |
2636         /* empty */;
2637
2638 arg_list2:
2639         single_arg |
2640         arg_list ',' single_arg;
2641
2642 single_arg:
2643         expr {
2644                 ast_stack.back()->children.push_back($1);
2645         };
2646
2647 module_gen_body:
2648         module_gen_body gen_stmt_or_module_body_stmt |
2649         /* empty */;
2650
2651 gen_stmt_or_module_body_stmt:
2652         gen_stmt | module_body_stmt |
2653         attr ';' {
2654                 free_attr($1);
2655         };
2656
2657 // this production creates the obligatory if-else shift/reduce conflict
2658 gen_stmt:
2659         TOK_FOR '(' {
2660                 AstNode *node = new AstNode(AST_GENFOR);
2661                 ast_stack.back()->children.push_back(node);
2662                 ast_stack.push_back(node);
2663         } simple_behavioral_stmt ';' expr {
2664                 ast_stack.back()->children.push_back($6);
2665         } ';' simple_behavioral_stmt ')' gen_stmt_block {
2666                 SET_AST_NODE_LOC(ast_stack.back(), @1, @11);
2667                 ast_stack.pop_back();
2668         } |
2669         TOK_IF '(' expr ')' {
2670                 AstNode *node = new AstNode(AST_GENIF);
2671                 ast_stack.back()->children.push_back(node);
2672                 ast_stack.push_back(node);
2673                 ast_stack.back()->children.push_back($3);
2674                 AstNode *block = new AstNode(AST_GENBLOCK);
2675                 ast_stack.back()->children.push_back(block);
2676                 ast_stack.push_back(block);
2677         } gen_stmt_block {
2678                 ast_stack.pop_back();
2679         } opt_gen_else {
2680                 SET_AST_NODE_LOC(ast_stack.back(), @1, @7);
2681                 ast_stack.pop_back();
2682         } |
2683         case_type '(' expr ')' {
2684                 AstNode *node = new AstNode(AST_GENCASE, $3);
2685                 ast_stack.back()->children.push_back(node);
2686                 ast_stack.push_back(node);
2687         } gen_case_body TOK_ENDCASE {
2688                 case_type_stack.pop_back();
2689                 SET_AST_NODE_LOC(ast_stack.back(), @1, @7);
2690                 ast_stack.pop_back();
2691         } |
2692         TOK_BEGIN {
2693                 enterTypeScope();
2694         } opt_label {
2695                 AstNode *node = new AstNode(AST_GENBLOCK);
2696                 node->str = $3 ? *$3 : std::string();
2697                 ast_stack.back()->children.push_back(node);
2698                 ast_stack.push_back(node);
2699         } module_gen_body TOK_END opt_label {
2700                 exitTypeScope();
2701                 delete $3;
2702                 delete $7;
2703                 SET_AST_NODE_LOC(ast_stack.back(), @1, @7);
2704                 ast_stack.pop_back();
2705         } |
2706         TOK_MSG_TASKS {
2707                 AstNode *node = new AstNode(AST_TECALL);
2708                 node->str = *$1;
2709                 delete $1;
2710                 ast_stack.back()->children.push_back(node);
2711                 ast_stack.push_back(node);
2712         } opt_arg_list ';'{
2713                 SET_AST_NODE_LOC(ast_stack.back(), @1, @3);
2714                 ast_stack.pop_back();
2715         };
2716
2717 gen_stmt_block:
2718         {
2719                 AstNode *node = new AstNode(AST_GENBLOCK);
2720                 ast_stack.back()->children.push_back(node);
2721                 ast_stack.push_back(node);
2722         } gen_stmt_or_module_body_stmt {
2723                 SET_AST_NODE_LOC(ast_stack.back(), @2, @2);
2724                 ast_stack.pop_back();
2725         };
2726
2727 opt_gen_else:
2728         TOK_ELSE gen_stmt_block | /* empty */ %prec FAKE_THEN;
2729
2730 expr:
2731         basic_expr {
2732                 $$ = $1;
2733         } |
2734         basic_expr '?' attr expr ':' expr {
2735                 $$ = new AstNode(AST_TERNARY);
2736                 $$->children.push_back($1);
2737                 $$->children.push_back($4);
2738                 $$->children.push_back($6);
2739                 SET_AST_NODE_LOC($$, @1, @$);
2740                 append_attr($$, $3);
2741         };
2742
2743 basic_expr:
2744         rvalue {
2745                 $$ = $1;
2746         } |
2747         '(' expr ')' integral_number {
2748                 if ($4->compare(0, 1, "'") != 0)
2749                         frontend_verilog_yyerror("Cast operation must be applied on sized constants e.g. (<expr>)<constval> , while %s is not a sized constant.", $4->c_str());
2750                 AstNode *bits = $2;
2751                 AstNode *val = const2ast(*$4, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
2752                 if (val == NULL)
2753                         log_error("Value conversion failed: `%s'\n", $4->c_str());
2754                 $$ = new AstNode(AST_TO_BITS, bits, val);
2755                 delete $4;
2756         } |
2757         hierarchical_id integral_number {
2758                 if ($2->compare(0, 1, "'") != 0)
2759                         frontend_verilog_yyerror("Cast operation must be applied on sized constants, e.g. <ID>\'d0, while %s is not a sized constant.", $2->c_str());
2760                 AstNode *bits = new AstNode(AST_IDENTIFIER);
2761                 bits->str = *$1;
2762                 SET_AST_NODE_LOC(bits, @1, @1);
2763                 AstNode *val = const2ast(*$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
2764                 SET_AST_NODE_LOC(val, @2, @2);
2765                 if (val == NULL)
2766                         log_error("Value conversion failed: `%s'\n", $2->c_str());
2767                 $$ = new AstNode(AST_TO_BITS, bits, val);
2768                 delete $1;
2769                 delete $2;
2770         } |
2771         integral_number {
2772                 $$ = const2ast(*$1, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
2773                 SET_AST_NODE_LOC($$, @1, @1);
2774                 if ($$ == NULL)
2775                         log_error("Value conversion failed: `%s'\n", $1->c_str());
2776                 delete $1;
2777         } |
2778         TOK_REALVAL {
2779                 $$ = new AstNode(AST_REALVALUE);
2780                 char *p = (char*)malloc(GetSize(*$1) + 1), *q;
2781                 for (int i = 0, j = 0; j < GetSize(*$1); j++)
2782                         if ((*$1)[j] != '_')
2783                                 p[i++] = (*$1)[j], p[i] = 0;
2784                 $$->realvalue = strtod(p, &q);
2785                 SET_AST_NODE_LOC($$, @1, @1);
2786                 log_assert(*q == 0);
2787                 delete $1;
2788                 free(p);
2789         } |
2790         TOK_STRING {
2791                 $$ = AstNode::mkconst_str(*$1);
2792                 SET_AST_NODE_LOC($$, @1, @1);
2793                 delete $1;
2794         } |
2795         hierarchical_id attr {
2796                 AstNode *node = new AstNode(AST_FCALL);
2797                 node->str = *$1;
2798                 delete $1;
2799                 ast_stack.push_back(node);
2800                 SET_AST_NODE_LOC(node, @1, @1);
2801                 append_attr(node, $2);
2802         } '(' arg_list optional_comma ')' {
2803                 $$ = ast_stack.back();
2804                 ast_stack.pop_back();
2805         } |
2806         TOK_TO_SIGNED attr '(' expr ')' {
2807                 $$ = new AstNode(AST_TO_SIGNED, $4);
2808                 append_attr($$, $2);
2809         } |
2810         TOK_TO_UNSIGNED attr '(' expr ')' {
2811                 $$ = new AstNode(AST_TO_UNSIGNED, $4);
2812                 append_attr($$, $2);
2813         } |
2814         '(' expr ')' {
2815                 $$ = $2;
2816         } |
2817         '(' expr ':' expr ':' expr ')' {
2818                 delete $2;
2819                 $$ = $4;
2820                 delete $6;
2821         } |
2822         '{' concat_list '}' {
2823                 $$ = $2;
2824         } |
2825         '{' expr '{' concat_list '}' '}' {
2826                 $$ = new AstNode(AST_REPLICATE, $2, $4);
2827         } |
2828         '~' attr basic_expr %prec UNARY_OPS {
2829                 $$ = new AstNode(AST_BIT_NOT, $3);
2830                 SET_AST_NODE_LOC($$, @1, @3);
2831                 append_attr($$, $2);
2832         } |
2833         basic_expr '&' attr basic_expr {
2834                 $$ = new AstNode(AST_BIT_AND, $1, $4);
2835                 SET_AST_NODE_LOC($$, @1, @4);
2836                 append_attr($$, $3);
2837         } |
2838         basic_expr OP_NAND attr basic_expr {
2839                 $$ = new AstNode(AST_BIT_NOT, new AstNode(AST_BIT_AND, $1, $4));
2840                 SET_AST_NODE_LOC($$, @1, @4);
2841                 append_attr($$, $3);
2842         } |
2843         basic_expr '|' attr basic_expr {
2844                 $$ = new AstNode(AST_BIT_OR, $1, $4);
2845                 SET_AST_NODE_LOC($$, @1, @4);
2846                 append_attr($$, $3);
2847         } |
2848         basic_expr OP_NOR attr basic_expr {
2849                 $$ = new AstNode(AST_BIT_NOT, new AstNode(AST_BIT_OR, $1, $4));
2850                 SET_AST_NODE_LOC($$, @1, @4);
2851                 append_attr($$, $3);
2852         } |
2853         basic_expr '^' attr basic_expr {
2854                 $$ = new AstNode(AST_BIT_XOR, $1, $4);
2855                 SET_AST_NODE_LOC($$, @1, @4);
2856                 append_attr($$, $3);
2857         } |
2858         basic_expr OP_XNOR attr basic_expr {
2859                 $$ = new AstNode(AST_BIT_XNOR, $1, $4);
2860                 SET_AST_NODE_LOC($$, @1, @4);
2861                 append_attr($$, $3);
2862         } |
2863         '&' attr basic_expr %prec UNARY_OPS {
2864                 $$ = new AstNode(AST_REDUCE_AND, $3);
2865                 SET_AST_NODE_LOC($$, @1, @3);
2866                 append_attr($$, $2);
2867         } |
2868         OP_NAND attr basic_expr %prec UNARY_OPS {
2869                 $$ = new AstNode(AST_REDUCE_AND, $3);
2870                 SET_AST_NODE_LOC($$, @1, @3);
2871                 append_attr($$, $2);
2872                 $$ = new AstNode(AST_LOGIC_NOT, $$);
2873         } |
2874         '|' attr basic_expr %prec UNARY_OPS {
2875                 $$ = new AstNode(AST_REDUCE_OR, $3);
2876                 SET_AST_NODE_LOC($$, @1, @3);
2877                 append_attr($$, $2);
2878         } |
2879         OP_NOR attr basic_expr %prec UNARY_OPS {
2880                 $$ = new AstNode(AST_REDUCE_OR, $3);
2881                 SET_AST_NODE_LOC($$, @1, @3);
2882                 append_attr($$, $2);
2883                 $$ = new AstNode(AST_LOGIC_NOT, $$);
2884                 SET_AST_NODE_LOC($$, @1, @3);
2885         } |
2886         '^' attr basic_expr %prec UNARY_OPS {
2887                 $$ = new AstNode(AST_REDUCE_XOR, $3);
2888                 SET_AST_NODE_LOC($$, @1, @3);
2889                 append_attr($$, $2);
2890         } |
2891         OP_XNOR attr basic_expr %prec UNARY_OPS {
2892                 $$ = new AstNode(AST_REDUCE_XNOR, $3);
2893                 SET_AST_NODE_LOC($$, @1, @3);
2894                 append_attr($$, $2);
2895         } |
2896         basic_expr OP_SHL attr basic_expr {
2897                 $$ = new AstNode(AST_SHIFT_LEFT, $1, new AstNode(AST_TO_UNSIGNED, $4));
2898                 SET_AST_NODE_LOC($$, @1, @4);
2899                 append_attr($$, $3);
2900         } |
2901         basic_expr OP_SHR attr basic_expr {
2902                 $$ = new AstNode(AST_SHIFT_RIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4));
2903                 SET_AST_NODE_LOC($$, @1, @4);
2904                 append_attr($$, $3);
2905         } |
2906         basic_expr OP_SSHL attr basic_expr {
2907                 $$ = new AstNode(AST_SHIFT_SLEFT, $1, new AstNode(AST_TO_UNSIGNED, $4));
2908                 SET_AST_NODE_LOC($$, @1, @4);
2909                 append_attr($$, $3);
2910         } |
2911         basic_expr OP_SSHR attr basic_expr {
2912                 $$ = new AstNode(AST_SHIFT_SRIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4));
2913                 SET_AST_NODE_LOC($$, @1, @4);
2914                 append_attr($$, $3);
2915         } |
2916         basic_expr '<' attr basic_expr {
2917                 $$ = new AstNode(AST_LT, $1, $4);
2918                 SET_AST_NODE_LOC($$, @1, @4);
2919                 append_attr($$, $3);
2920         } |
2921         basic_expr OP_LE attr basic_expr {
2922                 $$ = new AstNode(AST_LE, $1, $4);
2923                 SET_AST_NODE_LOC($$, @1, @4);
2924                 append_attr($$, $3);
2925         } |
2926         basic_expr OP_EQ attr basic_expr {
2927                 $$ = new AstNode(AST_EQ, $1, $4);
2928                 SET_AST_NODE_LOC($$, @1, @4);
2929                 append_attr($$, $3);
2930         } |
2931         basic_expr OP_NE attr basic_expr {
2932                 $$ = new AstNode(AST_NE, $1, $4);
2933                 SET_AST_NODE_LOC($$, @1, @4);
2934                 append_attr($$, $3);
2935         } |
2936         basic_expr OP_EQX attr basic_expr {
2937                 $$ = new AstNode(AST_EQX, $1, $4);
2938                 SET_AST_NODE_LOC($$, @1, @4);
2939                 append_attr($$, $3);
2940         } |
2941         basic_expr OP_NEX attr basic_expr {
2942                 $$ = new AstNode(AST_NEX, $1, $4);
2943                 SET_AST_NODE_LOC($$, @1, @4);
2944                 append_attr($$, $3);
2945         } |
2946         basic_expr OP_GE attr basic_expr {
2947                 $$ = new AstNode(AST_GE, $1, $4);
2948                 SET_AST_NODE_LOC($$, @1, @4);
2949                 append_attr($$, $3);
2950         } |
2951         basic_expr '>' attr basic_expr {
2952                 $$ = new AstNode(AST_GT, $1, $4);
2953                 SET_AST_NODE_LOC($$, @1, @4);
2954                 append_attr($$, $3);
2955         } |
2956         basic_expr '+' attr basic_expr {
2957                 $$ = new AstNode(AST_ADD, $1, $4);
2958                 SET_AST_NODE_LOC($$, @1, @4);
2959                 append_attr($$, $3);
2960         } |
2961         basic_expr '-' attr basic_expr {
2962                 $$ = new AstNode(AST_SUB, $1, $4);
2963                 SET_AST_NODE_LOC($$, @1, @4);
2964                 append_attr($$, $3);
2965         } |
2966         basic_expr '*' attr basic_expr {
2967                 $$ = new AstNode(AST_MUL, $1, $4);
2968                 SET_AST_NODE_LOC($$, @1, @4);
2969                 append_attr($$, $3);
2970         } |
2971         basic_expr '/' attr basic_expr {
2972                 $$ = new AstNode(AST_DIV, $1, $4);
2973                 SET_AST_NODE_LOC($$, @1, @4);
2974                 append_attr($$, $3);
2975         } |
2976         basic_expr '%' attr basic_expr {
2977                 $$ = new AstNode(AST_MOD, $1, $4);
2978                 SET_AST_NODE_LOC($$, @1, @4);
2979                 append_attr($$, $3);
2980         } |
2981         basic_expr OP_POW attr basic_expr {
2982                 $$ = new AstNode(AST_POW, $1, $4);
2983                 SET_AST_NODE_LOC($$, @1, @4);
2984                 append_attr($$, $3);
2985         } |
2986         '+' attr basic_expr %prec UNARY_OPS {
2987                 $$ = new AstNode(AST_POS, $3);
2988                 SET_AST_NODE_LOC($$, @1, @3);
2989                 append_attr($$, $2);
2990         } |
2991         '-' attr basic_expr %prec UNARY_OPS {
2992                 $$ = new AstNode(AST_NEG, $3);
2993                 SET_AST_NODE_LOC($$, @1, @3);
2994                 append_attr($$, $2);
2995         } |
2996         basic_expr OP_LAND attr basic_expr {
2997                 $$ = new AstNode(AST_LOGIC_AND, $1, $4);
2998                 SET_AST_NODE_LOC($$, @1, @4);
2999                 append_attr($$, $3);
3000         } |
3001         basic_expr OP_LOR attr basic_expr {
3002                 $$ = new AstNode(AST_LOGIC_OR, $1, $4);
3003                 SET_AST_NODE_LOC($$, @1, @4);
3004                 append_attr($$, $3);
3005         } |
3006         '!' attr basic_expr %prec UNARY_OPS {
3007                 $$ = new AstNode(AST_LOGIC_NOT, $3);
3008                 SET_AST_NODE_LOC($$, @1, @3);
3009                 append_attr($$, $2);
3010         };
3011
3012 concat_list:
3013         expr {
3014                 $$ = new AstNode(AST_CONCAT, $1);
3015         } |
3016         expr ',' concat_list {
3017                 $$ = $3;
3018                 $$->children.push_back($1);
3019         };
3020
3021 integral_number:
3022         TOK_CONSTVAL { $$ = $1; } |
3023         TOK_UNBASED_UNSIZED_CONSTVAL { $$ = $1; } |
3024         TOK_BASE TOK_BASED_CONSTVAL {
3025                 $1->append(*$2);
3026                 $$ = $1;
3027                 delete $2;
3028         } |
3029         TOK_CONSTVAL TOK_BASE TOK_BASED_CONSTVAL {
3030                 $1->append(*$2).append(*$3);
3031                 $$ = $1;
3032                 delete $2;
3033                 delete $3;
3034         };