frontends/verilog/verilog_parser.y

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
   5  *
   6  *  Permission to use, copy, modify, and/or distribute this software for any
   7  *  purpose with or without fee is hereby granted, provided that the above
   8  *  copyright notice and this permission notice appear in all copies.
   9  *
  10  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  *  ---
  19  *
  20  *  The Verilog frontend.
  21  *
  22  *  This frontend is using the AST frontend library (see frontends/ast/).
  23  *  Thus this frontend does not generate RTLIL code directly but creates an
  24  *  AST directly from the Verilog parse tree and then passes this AST to
  25  *  the AST frontend library.
  26  *
  27  *  ---
  28  *
  29  *  This is the actual bison parser for Verilog code. The AST ist created directly
  30  *  from the bison reduce functions here. Note that this code uses a few global
  31  *  variables to hold the state of the AST generator and therefore this parser is
  32  *  not reentrant.
  33  *
  34  */
  35
  36 %{
  37 #include <list>
  38 #include <stack>
  39 #include <string.h>
  40 #include "frontends/verilog/verilog_frontend.h"
  41 #include "frontends/verilog/verilog_parser.tab.hh"
  42 #include "kernel/log.h"
  43
  44 #define YYLEX_PARAM &yylval, &yylloc
  45
  46 USING_YOSYS_NAMESPACE
  47 using namespace AST;
  48 using namespace VERILOG_FRONTEND;
  49
  50 YOSYS_NAMESPACE_BEGIN
  51 namespace VERILOG_FRONTEND {
  52         int port_counter;
  53         dict<std::string, int> port_stubs;
  54         dict<IdString, AstNode*> *attr_list, default_attr_list;
  55         std::stack<dict<IdString, AstNode*> *> attr_list_stack;
  56         dict<IdString, AstNode*> *albuf;
  57         std::vector<UserTypeMap*> user_type_stack;
  58         dict<std::string, AstNode*> pkg_user_types;
  59         std::vector<AstNode*> ast_stack;
  60         struct AstNode *astbuf1, *astbuf2, *astbuf3;
  61         struct AstNode *current_function_or_task;
  62         struct AstNode *current_ast, *current_ast_mod;
  63         int current_function_or_task_port_id;
  64         std::vector<char> case_type_stack;
  65         bool do_not_require_port_stubs;
  66         bool default_nettype_wire;
  67         bool sv_mode, formal_mode, lib_mode, specify_mode;
  68         bool noassert_mode, noassume_mode, norestrict_mode;
  69         bool assume_asserts_mode, assert_assumes_mode;
  70         bool current_wire_rand, current_wire_const;
  71         bool current_modport_input, current_modport_output;
  72         std::istream *lexin;
  73 }
  74 YOSYS_NAMESPACE_END
  75
  76 #define SET_AST_NODE_LOC(WHICH, BEGIN, END) \
  77     do { (WHICH)->location.first_line = (BEGIN).first_line; \
  78     (WHICH)->location.first_column = (BEGIN).first_column; \
  79     (WHICH)->location.last_line = (END).last_line; \
  80     (WHICH)->location.last_column = (END).last_column; } while(0)
  81
  82 #define SET_RULE_LOC(LHS, BEGIN, END) \
  83     do { (LHS).first_line = (BEGIN).first_line; \
  84     (LHS).first_column = (BEGIN).first_column; \
  85     (LHS).last_line = (END).last_line; \
  86     (LHS).last_column = (END).last_column; } while(0)
  87
  88 int frontend_verilog_yylex(YYSTYPE *yylval_param, YYLTYPE *yyloc_param);
  89
  90 static void append_attr(AstNode *ast, dict<IdString, AstNode*> *al)
  91 {
  92         for (auto &it : *al) {
  93                 if (ast->attributes.count(it.first) > 0)
  94                         delete ast->attributes[it.first];
  95                 ast->attributes[it.first] = it.second;
  96         }
  97         delete al;
  98 }
  99
 100 static void append_attr_clone(AstNode *ast, dict<IdString, AstNode*> *al)
 101 {
 102         for (auto &it : *al) {
 103                 if (ast->attributes.count(it.first) > 0)
 104                         delete ast->attributes[it.first];
 105                 ast->attributes[it.first] = it.second->clone();
 106         }
 107 }
 108
 109 static void free_attr(dict<IdString, AstNode*> *al)
 110 {
 111         for (auto &it : *al)
 112                 delete it.second;
 113         delete al;
 114 }
 115
 116 struct specify_target {
 117         char polarity_op;
 118         AstNode *dst, *dat;
 119 };
 120
 121 struct specify_triple {
 122         AstNode *t_min, *t_avg, *t_max;
 123 };
 124
 125 struct specify_rise_fall {
 126         specify_triple rise;
 127         specify_triple fall;
 128 };
 129
 130 static void addTypedefNode(std::string *name, AstNode *node)
 131 {
 132         log_assert(node);
 133         auto *tnode = new AstNode(AST_TYPEDEF, node);
 134         tnode->str = *name;
 135         auto user_types = user_type_stack.back();
 136         (*user_types)[*name] = tnode;
 137         if (current_ast_mod && current_ast_mod->type == AST_PACKAGE) {
 138                 // typedef inside a package so we need the qualified name
 139                 auto qname = current_ast_mod->str + "::" + (*name).substr(1);
 140                 pkg_user_types[qname] = tnode;
 141         }
 142         delete name;
 143         ast_stack.back()->children.push_back(tnode);
 144 }
 145
 146 static void enterTypeScope()
 147 {
 148         auto user_types = new UserTypeMap();
 149         user_type_stack.push_back(user_types);
 150 }
 151
 152 static void exitTypeScope()
 153 {
 154         user_type_stack.pop_back();
 155 }
 156
 157 static bool isInLocalScope(const std::string *name)
 158 {
 159         // tests if a name was declared in the current block scope
 160         auto user_types = user_type_stack.back();
 161         return (user_types->count(*name) > 0);
 162 }
 163
 164 static AstNode *getTypeDefinitionNode(std::string type_name)
 165 {
 166         // return the definition nodes from the typedef statement
 167         auto user_types = user_type_stack.back();
 168         log_assert(user_types->count(type_name) > 0);
 169         auto typedef_node = (*user_types)[type_name];
 170         log_assert(typedef_node->type == AST_TYPEDEF);
 171         return typedef_node->children[0];
 172 }
 173
 174 static AstNode *copyTypeDefinition(std::string type_name)
 175 {
 176         // return a copy of the template from a typedef definition
 177         auto typedef_node = getTypeDefinitionNode(type_name);
 178         return typedef_node->clone();
 179 }
 180
 181 static AstNode *makeRange(int msb = 31, int lsb = 0, bool isSigned = true)
 182 {
 183         auto range = new AstNode(AST_RANGE);
 184         range->children.push_back(AstNode::mkconst_int(msb, true));
 185         range->children.push_back(AstNode::mkconst_int(lsb, true));
 186         range->is_signed = isSigned;
 187         return range;
 188 }
 189
 190 static void addRange(AstNode *parent, int msb = 31, int lsb = 0, bool isSigned = true)
 191 {
 192         auto range = makeRange(msb, lsb, isSigned);
 193         parent->children.push_back(range);
 194 }
 195
 196 static AstNode *checkRange(AstNode *type_node, AstNode *range_node)
 197 {
 198         if (type_node->range_left >= 0 && type_node->range_right >= 0) {
 199                 // type already restricts the range
 200                 if (range_node) {
 201                         frontend_verilog_yyerror("integer/genvar types cannot have packed dimensions.");
 202                 }
 203                 else {
 204                         range_node = makeRange(type_node->range_left, type_node->range_right, false);
 205                 }
 206         }
 207         if (range_node && range_node->children.size() != 2) {
 208                 frontend_verilog_yyerror("wire/reg/logic packed dimension must be of the form: [<expr>:<expr>], [<expr>+:<expr>], or [<expr>-:<expr>]");
 209         }
 210         return range_node;
 211 }
 212
 213 static void rewriteRange(AstNode *rangeNode)
 214 {
 215         if (rangeNode->type == AST_RANGE && rangeNode->children.size() == 1) {
 216                 // SV array size [n], rewrite as [n-1:0]
 217                 rangeNode->children[0] = new AstNode(AST_SUB, rangeNode->children[0], AstNode::mkconst_int(1, true));
 218                 rangeNode->children.push_back(AstNode::mkconst_int(0, false));
 219         }
 220 }
 221
 222 static void rewriteAsMemoryNode(AstNode *node, AstNode *rangeNode)
 223 {
 224         node->type = AST_MEMORY;
 225         if (rangeNode->type == AST_MULTIRANGE) {
 226                 for (auto *itr : rangeNode->children)
 227                         rewriteRange(itr);
 228         } else
 229                 rewriteRange(rangeNode);
 230         node->children.push_back(rangeNode);
 231 }
 232
 233 %}
 234
 235 %define api.prefix {frontend_verilog_yy}
 236 %define api.pure
 237
 238 /* The union is defined in the header, so we need to provide all the
 239  * includes it requires
 240  */
 241 %code requires {
 242 #include <map>
 243 #include <string>
 244 #include "frontends/verilog/verilog_frontend.h"
 245 }
 246
 247 %union {
 248         std::string *string;
 249         struct YOSYS_NAMESPACE_PREFIX AST::AstNode *ast;
 250         YOSYS_NAMESPACE_PREFIX dict<YOSYS_NAMESPACE_PREFIX RTLIL::IdString, YOSYS_NAMESPACE_PREFIX AST::AstNode*> *al;
 251         struct specify_target *specify_target_ptr;
 252         struct specify_triple *specify_triple_ptr;
 253         struct specify_rise_fall *specify_rise_fall_ptr;
 254         bool boolean;
 255         char ch;
 256 }
 257
 258 %token <string> TOK_STRING TOK_ID TOK_CONSTVAL TOK_REALVAL TOK_PRIMITIVE
 259 %token <string> TOK_SVA_LABEL TOK_SPECIFY_OPER TOK_MSG_TASKS
 260 %token <string> TOK_BASE TOK_BASED_CONSTVAL TOK_UNBASED_UNSIZED_CONSTVAL
 261 %token <string> TOK_USER_TYPE TOK_PKG_USER_TYPE
 262 %token TOK_ASSERT TOK_ASSUME TOK_RESTRICT TOK_COVER TOK_FINAL
 263 %token ATTR_BEGIN ATTR_END DEFATTR_BEGIN DEFATTR_END
 264 %token TOK_MODULE TOK_ENDMODULE TOK_PARAMETER TOK_LOCALPARAM TOK_DEFPARAM
 265 %token TOK_PACKAGE TOK_ENDPACKAGE TOK_PACKAGESEP
 266 %token TOK_INTERFACE TOK_ENDINTERFACE TOK_MODPORT TOK_VAR TOK_WILDCARD_CONNECT
 267 %token TOK_INPUT TOK_OUTPUT TOK_INOUT TOK_WIRE TOK_WAND TOK_WOR TOK_REG TOK_LOGIC
 268 %token TOK_INTEGER TOK_SIGNED TOK_ASSIGN TOK_PLUS_ASSIGN TOK_ALWAYS TOK_INITIAL
 269 %token TOK_ALWAYS_FF TOK_ALWAYS_COMB TOK_ALWAYS_LATCH
 270 %token TOK_BEGIN TOK_END TOK_IF TOK_ELSE TOK_FOR TOK_WHILE TOK_REPEAT
 271 %token TOK_DPI_FUNCTION TOK_POSEDGE TOK_NEGEDGE TOK_OR TOK_AUTOMATIC
 272 %token TOK_CASE TOK_CASEX TOK_CASEZ TOK_ENDCASE TOK_DEFAULT
 273 %token TOK_FUNCTION TOK_ENDFUNCTION TOK_TASK TOK_ENDTASK TOK_SPECIFY
 274 %token TOK_IGNORED_SPECIFY TOK_ENDSPECIFY TOK_SPECPARAM TOK_SPECIFY_AND TOK_IGNORED_SPECIFY_AND
 275 %token TOK_GENERATE TOK_ENDGENERATE TOK_GENVAR TOK_REAL
 276 %token TOK_SYNOPSYS_FULL_CASE TOK_SYNOPSYS_PARALLEL_CASE
 277 %token TOK_SUPPLY0 TOK_SUPPLY1 TOK_TO_SIGNED TOK_TO_UNSIGNED
 278 %token TOK_POS_INDEXED TOK_NEG_INDEXED TOK_PROPERTY TOK_ENUM TOK_TYPEDEF
 279 %token TOK_RAND TOK_CONST TOK_CHECKER TOK_ENDCHECKER TOK_EVENTUALLY
 280 %token TOK_INCREMENT TOK_DECREMENT TOK_UNIQUE TOK_PRIORITY
 281 %token TOK_STRUCT TOK_PACKED TOK_UNSIGNED TOK_INT TOK_BYTE TOK_SHORTINT TOK_UNION
 282 %token TOK_OR_ASSIGN TOK_XOR_ASSIGN TOK_AND_ASSIGN TOK_SUB_ASSIGN
 283
 284 %type <ast> range range_or_multirange  non_opt_range non_opt_multirange range_or_signed_int
 285 %type <ast> wire_type expr basic_expr concat_list rvalue lvalue lvalue_concat_list non_io_wire_type io_wire_type
 286 %type <string> opt_label opt_sva_label tok_prim_wrapper hierarchical_id hierarchical_type_id integral_number
 287 %type <string> type_name
 288 %type <ast> opt_enum_init enum_type struct_type non_wire_data_type
 289 %type <boolean> opt_signed opt_property unique_case_attr always_comb_or_latch always_or_always_ff
 290 %type <al> attr case_attr
 291 %type <ast> struct_union
 292
 293 %type <specify_target_ptr> specify_target
 294 %type <specify_triple_ptr> specify_triple specify_opt_triple
 295 %type <specify_rise_fall_ptr> specify_rise_fall
 296 %type <ast> specify_if specify_condition
 297 %type <ch> specify_edge
 298
 299 // operator precedence from low to high
 300 %left OP_LOR
 301 %left OP_LAND
 302 %left '|' OP_NOR
 303 %left '^' OP_XNOR
 304 %left '&' OP_NAND
 305 %left OP_EQ OP_NE OP_EQX OP_NEX
 306 %left '<' OP_LE OP_GE '>'
 307 %left OP_SHL OP_SHR OP_SSHL OP_SSHR
 308 %left '+' '-'
 309 %left '*' '/' '%'
 310 %left OP_POW
 311 %precedence OP_CAST
 312 %precedence UNARY_OPS
 313
 314 %define parse.error verbose
 315 %define parse.lac full
 316
 317 %precedence FAKE_THEN
 318 %precedence TOK_ELSE
 319
 320 %debug
 321 %locations
 322
 323 %%
 324
 325 input: {
 326         ast_stack.clear();
 327         ast_stack.push_back(current_ast);
 328 } design {
 329         ast_stack.pop_back();
 330         log_assert(GetSize(ast_stack) == 0);
 331         for (auto &it : default_attr_list)
 332                 delete it.second;
 333         default_attr_list.clear();
 334 };
 335
 336 design:
 337         module design |
 338         defattr design |
 339         task_func_decl design |
 340         param_decl design |
 341         localparam_decl design |
 342         typedef_decl design |
 343         package design |
 344         interface design |
 345         %empty;
 346
 347 attr:
 348         {
 349                 if (attr_list != nullptr)
 350                         attr_list_stack.push(attr_list);
 351                 attr_list = new dict<IdString, AstNode*>;
 352                 for (auto &it : default_attr_list)
 353                         (*attr_list)[it.first] = it.second->clone();
 354         } attr_opt {
 355                 $$ = attr_list;
 356                 if (!attr_list_stack.empty()) {
 357                         attr_list = attr_list_stack.top();
 358                         attr_list_stack.pop();
 359                 } else
 360                         attr_list = nullptr;
 361         };
 362
 363 attr_opt:
 364         attr_opt ATTR_BEGIN opt_attr_list ATTR_END {
 365                 SET_RULE_LOC(@$, @2, @$);
 366         }|
 367         %empty;
 368
 369 defattr:
 370         DEFATTR_BEGIN {
 371                 if (attr_list != nullptr)
 372                         attr_list_stack.push(attr_list);
 373                 attr_list = new dict<IdString, AstNode*>;
 374                 for (auto &it : default_attr_list)
 375                         delete it.second;
 376                 default_attr_list.clear();
 377         } opt_attr_list {
 378                 attr_list->swap(default_attr_list);
 379                 delete attr_list;
 380                 if (!attr_list_stack.empty()) {
 381                         attr_list = attr_list_stack.top();
 382                         attr_list_stack.pop();
 383                 } else
 384                         attr_list = nullptr;
 385         } DEFATTR_END;
 386
 387 opt_attr_list:
 388         attr_list | %empty;
 389
 390 attr_list:
 391         attr_assign |
 392         attr_list ',' attr_assign;
 393
 394 attr_assign:
 395         hierarchical_id {
 396                 if (attr_list->count(*$1) != 0)
 397                         delete (*attr_list)[*$1];
 398                 (*attr_list)[*$1] = AstNode::mkconst_int(1, false);
 399                 delete $1;
 400         } |
 401         hierarchical_id '=' expr {
 402                 if (attr_list->count(*$1) != 0)
 403                         delete (*attr_list)[*$1];
 404                 (*attr_list)[*$1] = $3;
 405                 delete $1;
 406         };
 407
 408 hierarchical_id:
 409         TOK_ID {
 410                 $$ = $1;
 411         } |
 412         hierarchical_id TOK_PACKAGESEP TOK_ID {
 413                 if ($3->compare(0, 1, "\\") == 0)
 414                         *$1 += "::" + $3->substr(1);
 415                 else
 416                         *$1 += "::" + *$3;
 417                 delete $3;
 418                 $$ = $1;
 419         } |
 420         hierarchical_id '.' TOK_ID {
 421                 if ($3->compare(0, 1, "\\") == 0)
 422                         *$1 += "." + $3->substr(1);
 423                 else
 424                         *$1 += "." + *$3;
 425                 delete $3;
 426                 $$ = $1;
 427         };
 428
 429 hierarchical_type_id:
 430         TOK_USER_TYPE
 431         | TOK_PKG_USER_TYPE                             // package qualified type name
 432         | '(' TOK_USER_TYPE ')' { $$ = $2; }            // non-standard grammar
 433         ;
 434
 435 module:
 436         attr TOK_MODULE {
 437                 enterTypeScope();
 438         } TOK_ID {
 439                 do_not_require_port_stubs = false;
 440                 AstNode *mod = new AstNode(AST_MODULE);
 441                 ast_stack.back()->children.push_back(mod);
 442                 ast_stack.push_back(mod);
 443                 current_ast_mod = mod;
 444                 port_stubs.clear();
 445                 port_counter = 0;
 446                 mod->str = *$4;
 447                 append_attr(mod, $1);
 448                 delete $4;
 449         } module_para_opt module_args_opt ';' module_body TOK_ENDMODULE opt_label {
 450                 if (port_stubs.size() != 0)
 451                         frontend_verilog_yyerror("Missing details for module port `%s'.",
 452                                         port_stubs.begin()->first.c_str());
 453                 SET_AST_NODE_LOC(ast_stack.back(), @2, @$);
 454                 ast_stack.pop_back();
 455                 log_assert(ast_stack.size() == 1);
 456                 current_ast_mod = NULL;
 457                 exitTypeScope();
 458         };
 459
 460 module_para_opt:
 461         '#' '(' { astbuf1 = nullptr; } module_para_list { if (astbuf1) delete astbuf1; } ')' | %empty;
 462
 463 module_para_list:
 464         single_module_para | module_para_list ',' single_module_para;
 465
 466 single_module_para:
 467         %empty |
 468         attr TOK_PARAMETER {
 469                 if (astbuf1) delete astbuf1;
 470                 astbuf1 = new AstNode(AST_PARAMETER);
 471                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
 472                 append_attr(astbuf1, $1);
 473         } param_type single_param_decl |
 474         attr TOK_LOCALPARAM {
 475                 if (astbuf1) delete astbuf1;
 476                 astbuf1 = new AstNode(AST_LOCALPARAM);
 477                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
 478                 append_attr(astbuf1, $1);
 479         } param_type single_param_decl |
 480         single_param_decl;
 481
 482 module_args_opt:
 483         '(' ')' | %empty | '(' module_args optional_comma ')';
 484
 485 module_args:
 486         module_arg | module_args ',' module_arg;
 487
 488 optional_comma:
 489         ',' | %empty;
 490
 491 module_arg_opt_assignment:
 492         '=' expr {
 493                 if (ast_stack.back()->children.size() > 0 && ast_stack.back()->children.back()->type == AST_WIRE) {
 494                         AstNode *wire = new AstNode(AST_IDENTIFIER);
 495                         wire->str = ast_stack.back()->children.back()->str;
 496                         if (ast_stack.back()->children.back()->is_input) {
 497                                 AstNode *n = ast_stack.back()->children.back();
 498                                 if (n->attributes.count(ID::defaultvalue))
 499                                         delete n->attributes.at(ID::defaultvalue);
 500                                 n->attributes[ID::defaultvalue] = $2;
 501                         } else
 502                         if (ast_stack.back()->children.back()->is_reg || ast_stack.back()->children.back()->is_logic)
 503                                 ast_stack.back()->children.push_back(new AstNode(AST_INITIAL, new AstNode(AST_BLOCK, new AstNode(AST_ASSIGN_LE, wire, $2))));
 504                         else
 505                                 ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, wire, $2));
 506                 } else
 507                         frontend_verilog_yyerror("SystemVerilog interface in module port list cannot have a default value.");
 508         } |
 509         %empty;
 510
 511 module_arg:
 512         TOK_ID {
 513                 if (ast_stack.back()->children.size() > 0 && ast_stack.back()->children.back()->type == AST_WIRE) {
 514                         AstNode *node = ast_stack.back()->children.back()->clone();
 515                         node->str = *$1;
 516                         node->port_id = ++port_counter;
 517                         ast_stack.back()->children.push_back(node);
 518                         SET_AST_NODE_LOC(node, @1, @1);
 519                 } else {
 520                         if (port_stubs.count(*$1) != 0)
 521                                 frontend_verilog_yyerror("Duplicate module port `%s'.", $1->c_str());
 522                         port_stubs[*$1] = ++port_counter;
 523                 }
 524                 delete $1;
 525         } module_arg_opt_assignment |
 526         TOK_ID {
 527                 astbuf1 = new AstNode(AST_INTERFACEPORT);
 528                 astbuf1->children.push_back(new AstNode(AST_INTERFACEPORTTYPE));
 529                 astbuf1->children[0]->str = *$1;
 530                 delete $1;
 531         } TOK_ID {  /* SV interfaces */
 532                 if (!sv_mode)
 533                         frontend_verilog_yyerror("Interface found in port list (%s). This is not supported unless read_verilog is called with -sv!", $3->c_str());
 534                 astbuf2 = astbuf1->clone(); // really only needed if multiple instances of same type.
 535                 astbuf2->str = *$3;
 536                 delete $3;
 537                 astbuf2->port_id = ++port_counter;
 538                 ast_stack.back()->children.push_back(astbuf2);
 539                 delete astbuf1; // really only needed if multiple instances of same type.
 540         } module_arg_opt_assignment |
 541         attr wire_type range TOK_ID {
 542                 AstNode *node = $2;
 543                 node->str = *$4;
 544                 SET_AST_NODE_LOC(node, @4, @4);
 545                 node->port_id = ++port_counter;
 546                 if ($3 != NULL)
 547                         node->children.push_back($3);
 548                 if (!node->is_input && !node->is_output)
 549                         frontend_verilog_yyerror("Module port `%s' is neither input nor output.", $4->c_str());
 550                 if (node->is_reg && node->is_input && !node->is_output && !sv_mode)
 551                         frontend_verilog_yyerror("Input port `%s' is declared as register.", $4->c_str());
 552                 ast_stack.back()->children.push_back(node);
 553                 append_attr(node, $1);
 554                 delete $4;
 555         } module_arg_opt_assignment |
 556         '.' '.' '.' {
 557                 do_not_require_port_stubs = true;
 558         };
 559
 560 package:
 561         attr TOK_PACKAGE {
 562                 enterTypeScope();
 563         } TOK_ID {
 564                 AstNode *mod = new AstNode(AST_PACKAGE);
 565                 ast_stack.back()->children.push_back(mod);
 566                 ast_stack.push_back(mod);
 567                 current_ast_mod = mod;
 568                 mod->str = *$4;
 569                 append_attr(mod, $1);
 570         } ';' package_body TOK_ENDPACKAGE opt_label {
 571                 ast_stack.pop_back();
 572                 current_ast_mod = NULL;
 573                 exitTypeScope();
 574         };
 575
 576 package_body:
 577         package_body package_body_stmt | %empty;
 578
 579 package_body_stmt:
 580         typedef_decl | localparam_decl | param_decl;
 581
 582 interface:
 583         TOK_INTERFACE {
 584                 enterTypeScope();
 585         } TOK_ID {
 586                 do_not_require_port_stubs = false;
 587                 AstNode *intf = new AstNode(AST_INTERFACE);
 588                 ast_stack.back()->children.push_back(intf);
 589                 ast_stack.push_back(intf);
 590                 current_ast_mod = intf;
 591                 port_stubs.clear();
 592                 port_counter = 0;
 593                 intf->str = *$3;
 594                 delete $3;
 595         } module_para_opt module_args_opt ';' interface_body TOK_ENDINTERFACE {
 596                 if (port_stubs.size() != 0)
 597                         frontend_verilog_yyerror("Missing details for module port `%s'.",
 598                                 port_stubs.begin()->first.c_str());
 599                 ast_stack.pop_back();
 600                 log_assert(ast_stack.size() == 1);
 601                 current_ast_mod = NULL;
 602                 exitTypeScope();
 603         };
 604
 605 interface_body:
 606         interface_body interface_body_stmt | %empty;
 607
 608 interface_body_stmt:
 609         param_decl | localparam_decl | typedef_decl | defparam_decl | wire_decl | always_stmt | assign_stmt |
 610         modport_stmt;
 611
 612 non_opt_delay:
 613         '#' TOK_ID { delete $2; } |
 614         '#' TOK_CONSTVAL { delete $2; } |
 615         '#' TOK_REALVAL { delete $2; } |
 616         '#' '(' expr ')' { delete $3; } |
 617         '#' '(' expr ':' expr ':' expr ')' { delete $3; delete $5; delete $7; };
 618
 619 delay:
 620         non_opt_delay | %empty;
 621
 622 io_wire_type:
 623         { astbuf3 = new AstNode(AST_WIRE); current_wire_rand = false; current_wire_const = false; }
 624         wire_type_token_io wire_type_const_rand opt_wire_type_token wire_type_signedness
 625         { $$ = astbuf3; SET_RULE_LOC(@$, @2, @$); };
 626
 627 non_io_wire_type:
 628         { astbuf3 = new AstNode(AST_WIRE); current_wire_rand = false; current_wire_const = false; }
 629         wire_type_const_rand wire_type_token wire_type_signedness
 630         { $$ = astbuf3; SET_RULE_LOC(@$, @2, @$); };
 631
 632 wire_type:
 633         io_wire_type  |
 634         non_io_wire_type;
 635
 636 wire_type_token_io:
 637         TOK_INPUT {
 638                 astbuf3->is_input = true;
 639         } |
 640         TOK_OUTPUT {
 641                 astbuf3->is_output = true;
 642         } |
 643         TOK_INOUT {
 644                 astbuf3->is_input = true;
 645                 astbuf3->is_output = true;
 646         };
 647
 648 wire_type_signedness:
 649         TOK_SIGNED   { astbuf3->is_signed = true;  } |
 650         TOK_UNSIGNED { astbuf3->is_signed = false; } |
 651         %empty;
 652
 653 wire_type_const_rand:
 654         TOK_RAND TOK_CONST {
 655             current_wire_rand = true;
 656             current_wire_const = true;
 657         } |
 658         TOK_CONST {
 659             current_wire_const = true;
 660         } |
 661         TOK_RAND {
 662             current_wire_rand = true;
 663         } |
 664         %empty;
 665
 666 opt_wire_type_token:
 667         wire_type_token | %empty;
 668
 669 wire_type_token:
 670         hierarchical_type_id {
 671                 astbuf3->is_custom_type = true;
 672                 astbuf3->children.push_back(new AstNode(AST_WIRETYPE));
 673                 astbuf3->children.back()->str = *$1;
 674         } |
 675         TOK_WOR {
 676                 astbuf3->is_wor = true;
 677         } |
 678         TOK_WAND {
 679                 astbuf3->is_wand = true;
 680         } |
 681         // wires
 682         TOK_WIRE {
 683         } |
 684         TOK_WIRE logic_type {
 685         } |
 686         // regs
 687         TOK_REG {
 688                 astbuf3->is_reg = true;
 689         } |
 690         TOK_VAR TOK_REG {
 691                 astbuf3->is_reg = true;
 692         } |
 693         // logics
 694         TOK_VAR {
 695                 astbuf3->is_logic = true;
 696         } |
 697         TOK_VAR logic_type {
 698                 astbuf3->is_logic = true;
 699         } |
 700         logic_type {
 701                 astbuf3->is_logic = true;
 702         } |
 703         TOK_GENVAR {
 704                 astbuf3->type = AST_GENVAR;
 705                 astbuf3->is_reg = true;
 706                 astbuf3->is_signed = true;
 707                 astbuf3->range_left = 31;
 708                 astbuf3->range_right = 0;
 709         };
 710
 711 logic_type:
 712         TOK_LOGIC {
 713         } |
 714         TOK_INTEGER {
 715                 astbuf3->range_left = 31;
 716                 astbuf3->range_right = 0;
 717                 astbuf3->is_signed = true;
 718         };
 719
 720 non_opt_range:
 721         '[' expr ':' expr ']' {
 722                 $$ = new AstNode(AST_RANGE);
 723                 $$->children.push_back($2);
 724                 $$->children.push_back($4);
 725         } |
 726         '[' expr TOK_POS_INDEXED expr ']' {
 727                 $$ = new AstNode(AST_RANGE);
 728                 AstNode *expr = new AstNode(AST_SELFSZ, $2);
 729                 $$->children.push_back(new AstNode(AST_SUB, new AstNode(AST_ADD, expr->clone(), $4), AstNode::mkconst_int(1, true)));
 730                 $$->children.push_back(new AstNode(AST_ADD, expr, AstNode::mkconst_int(0, true)));
 731         } |
 732         '[' expr TOK_NEG_INDEXED expr ']' {
 733                 $$ = new AstNode(AST_RANGE);
 734                 AstNode *expr = new AstNode(AST_SELFSZ, $2);
 735                 $$->children.push_back(new AstNode(AST_ADD, expr, AstNode::mkconst_int(0, true)));
 736                 $$->children.push_back(new AstNode(AST_SUB, new AstNode(AST_ADD, expr->clone(), AstNode::mkconst_int(1, true)), $4));
 737         } |
 738         '[' expr ']' {
 739                 $$ = new AstNode(AST_RANGE);
 740                 $$->children.push_back($2);
 741         };
 742
 743 non_opt_multirange:
 744         non_opt_range non_opt_range {
 745                 $$ = new AstNode(AST_MULTIRANGE, $1, $2);
 746         } |
 747         non_opt_multirange non_opt_range {
 748                 $$ = $1;
 749                 $$->children.push_back($2);
 750         };
 751
 752 range:
 753         non_opt_range {
 754                 $$ = $1;
 755         } |
 756         %empty {
 757                 $$ = NULL;
 758         };
 759
 760 range_or_multirange:
 761         range { $$ = $1; } |
 762         non_opt_multirange { $$ = $1; };
 763
 764 range_or_signed_int:
 765           range                 { $$ = $1; }
 766         | TOK_INTEGER           { $$ = makeRange(); }
 767         ;
 768
 769 module_body:
 770         module_body module_body_stmt |
 771         /* the following line makes the generate..endgenrate keywords optional */
 772         module_body gen_stmt |
 773         module_body gen_block |
 774         module_body ';' |
 775         %empty;
 776
 777 module_body_stmt:
 778         task_func_decl | specify_block | param_decl | localparam_decl | typedef_decl | defparam_decl | specparam_declaration | wire_decl | assign_stmt | cell_stmt |
 779         enum_decl | struct_decl |
 780         always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block;
 781
 782 checker_decl:
 783         TOK_CHECKER TOK_ID ';' {
 784                 AstNode *node = new AstNode(AST_GENBLOCK);
 785                 node->str = *$2;
 786                 ast_stack.back()->children.push_back(node);
 787                 ast_stack.push_back(node);
 788         } module_body TOK_ENDCHECKER {
 789                 delete $2;
 790                 ast_stack.pop_back();
 791         };
 792
 793 task_func_decl:
 794         attr TOK_DPI_FUNCTION TOK_ID TOK_ID {
 795                 current_function_or_task = new AstNode(AST_DPI_FUNCTION, AstNode::mkconst_str(*$3), AstNode::mkconst_str(*$4));
 796                 current_function_or_task->str = *$4;
 797                 append_attr(current_function_or_task, $1);
 798                 ast_stack.back()->children.push_back(current_function_or_task);
 799                 delete $3;
 800                 delete $4;
 801         } opt_dpi_function_args ';' {
 802                 current_function_or_task = NULL;
 803         } |
 804         attr TOK_DPI_FUNCTION TOK_ID '=' TOK_ID TOK_ID {
 805                 current_function_or_task = new AstNode(AST_DPI_FUNCTION, AstNode::mkconst_str(*$5), AstNode::mkconst_str(*$3));
 806                 current_function_or_task->str = *$6;
 807                 append_attr(current_function_or_task, $1);
 808                 ast_stack.back()->children.push_back(current_function_or_task);
 809                 delete $3;
 810                 delete $5;
 811                 delete $6;
 812         } opt_dpi_function_args ';' {
 813                 current_function_or_task = NULL;
 814         } |
 815         attr TOK_DPI_FUNCTION TOK_ID ':' TOK_ID '=' TOK_ID TOK_ID {
 816                 current_function_or_task = new AstNode(AST_DPI_FUNCTION, AstNode::mkconst_str(*$7), AstNode::mkconst_str(*$3 + ":" + RTLIL::unescape_id(*$5)));
 817                 current_function_or_task->str = *$8;
 818                 append_attr(current_function_or_task, $1);
 819                 ast_stack.back()->children.push_back(current_function_or_task);
 820                 delete $3;
 821                 delete $5;
 822                 delete $7;
 823                 delete $8;
 824         } opt_dpi_function_args ';' {
 825                 current_function_or_task = NULL;
 826         } |
 827         attr TOK_TASK opt_automatic TOK_ID {
 828                 current_function_or_task = new AstNode(AST_TASK);
 829                 current_function_or_task->str = *$4;
 830                 append_attr(current_function_or_task, $1);
 831                 ast_stack.back()->children.push_back(current_function_or_task);
 832                 ast_stack.push_back(current_function_or_task);
 833                 current_function_or_task_port_id = 1;
 834                 delete $4;
 835         } task_func_args_opt ';' task_func_body TOK_ENDTASK {
 836                 current_function_or_task = NULL;
 837                 ast_stack.pop_back();
 838         } |
 839         attr TOK_FUNCTION opt_automatic opt_signed range_or_signed_int TOK_ID {
 840                 current_function_or_task = new AstNode(AST_FUNCTION);
 841                 current_function_or_task->str = *$6;
 842                 append_attr(current_function_or_task, $1);
 843                 ast_stack.back()->children.push_back(current_function_or_task);
 844                 ast_stack.push_back(current_function_or_task);
 845                 AstNode *outreg = new AstNode(AST_WIRE);
 846                 outreg->str = *$6;
 847                 outreg->is_signed = $4;
 848                 outreg->is_reg = true;
 849                 if ($5 != NULL) {
 850                         outreg->children.push_back($5);
 851                         outreg->is_signed = $4 || $5->is_signed;
 852                         $5->is_signed = false;
 853                 }
 854                 current_function_or_task->children.push_back(outreg);
 855                 current_function_or_task_port_id = 1;
 856                 delete $6;
 857         } task_func_args_opt ';' task_func_body TOK_ENDFUNCTION {
 858                 current_function_or_task = NULL;
 859                 ast_stack.pop_back();
 860         };
 861
 862 dpi_function_arg:
 863         TOK_ID TOK_ID {
 864                 current_function_or_task->children.push_back(AstNode::mkconst_str(*$1));
 865                 delete $1;
 866                 delete $2;
 867         } |
 868         TOK_ID {
 869                 current_function_or_task->children.push_back(AstNode::mkconst_str(*$1));
 870                 delete $1;
 871         };
 872
 873 opt_dpi_function_args:
 874         '(' dpi_function_args ')' |
 875         %empty;
 876
 877 dpi_function_args:
 878         dpi_function_args ',' dpi_function_arg |
 879         dpi_function_args ',' |
 880         dpi_function_arg |
 881         %empty;
 882
 883 opt_automatic:
 884         TOK_AUTOMATIC |
 885         %empty;
 886
 887 opt_signed:
 888         TOK_SIGNED {
 889                 $$ = true;
 890         } |
 891         %empty {
 892                 $$ = false;
 893         };
 894
 895 task_func_args_opt:
 896         '(' ')' | %empty | '(' {
 897                 albuf = nullptr;
 898                 astbuf1 = nullptr;
 899                 astbuf2 = nullptr;
 900         } task_func_args optional_comma {
 901                 delete astbuf1;
 902                 if (astbuf2 != NULL)
 903                         delete astbuf2;
 904                 free_attr(albuf);
 905         } ')';
 906
 907 task_func_args:
 908         task_func_port | task_func_args ',' task_func_port;
 909
 910 task_func_port:
 911         attr wire_type range {
 912                 bool prev_was_input = true;
 913                 bool prev_was_output = false;
 914                 if (albuf) {
 915                         prev_was_input = astbuf1->is_input;
 916                         prev_was_output = astbuf1->is_output;
 917                         delete astbuf1;
 918                         if (astbuf2 != NULL)
 919                                 delete astbuf2;
 920                         free_attr(albuf);
 921                 }
 922                 albuf = $1;
 923                 astbuf1 = $2;
 924                 astbuf2 = checkRange(astbuf1, $3);
 925                 if (!astbuf1->is_input && !astbuf1->is_output) {
 926                         if (!sv_mode)
 927                                 frontend_verilog_yyerror("task/function argument direction missing");
 928                         astbuf1->is_input = prev_was_input;
 929                         astbuf1->is_output = prev_was_output;
 930                 }
 931         } wire_name |
 932         {
 933                 if (!astbuf1) {
 934                         if (!sv_mode)
 935                                 frontend_verilog_yyerror("task/function argument direction missing");
 936                         albuf = new dict<IdString, AstNode*>;
 937                         astbuf1 = new AstNode(AST_WIRE);
 938                         current_wire_rand = false;
 939                         current_wire_const = false;
 940                         astbuf1->is_input = true;
 941                         astbuf2 = NULL;
 942                 }
 943         } wire_name;
 944
 945 task_func_body:
 946         task_func_body behavioral_stmt |
 947         %empty;
 948
 949 /*************************** specify parser ***************************/
 950
 951 specify_block:
 952         TOK_SPECIFY specify_item_list TOK_ENDSPECIFY;
 953
 954 specify_item_list:
 955         specify_item specify_item_list |
 956         %empty;
 957
 958 specify_item:
 959         specify_if '(' specify_edge expr TOK_SPECIFY_OPER specify_target ')' '=' specify_rise_fall ';' {
 960                 AstNode *en_expr = $1;
 961                 char specify_edge = $3;
 962                 AstNode *src_expr = $4;
 963                 string *oper = $5;
 964                 specify_target *target = $6;
 965                 specify_rise_fall *timing = $9;
 966
 967                 if (specify_edge != 0 && target->dat == nullptr)
 968                         frontend_verilog_yyerror("Found specify edge but no data spec.\n");
 969
 970                 AstNode *cell = new AstNode(AST_CELL);
 971                 ast_stack.back()->children.push_back(cell);
 972                 cell->str = stringf("$specify$%d", autoidx++);
 973                 cell->children.push_back(new AstNode(AST_CELLTYPE));
 974                 cell->children.back()->str = target->dat ? "$specify3" : "$specify2";
 975                 SET_AST_NODE_LOC(cell, en_expr ? @1 : @2, @10);
 976
 977                 char oper_polarity = 0;
 978                 char oper_type = oper->at(0);
 979
 980                 if (oper->size() == 3) {
 981                         oper_polarity = oper->at(0);
 982                         oper_type = oper->at(1);
 983                 }
 984
 985                 cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(oper_type == '*', false, 1)));
 986                 cell->children.back()->str = "\\FULL";
 987
 988                 cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(oper_polarity != 0, false, 1)));
 989                 cell->children.back()->str = "\\SRC_DST_PEN";
 990
 991                 cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(oper_polarity == '+', false, 1)));
 992                 cell->children.back()->str = "\\SRC_DST_POL";
 993
 994                 cell->children.push_back(new AstNode(AST_PARASET, timing->rise.t_min));
 995                 cell->children.back()->str = "\\T_RISE_MIN";
 996
 997                 cell->children.push_back(new AstNode(AST_PARASET, timing->rise.t_avg));
 998                 cell->children.back()->str = "\\T_RISE_TYP";
 999
1000                 cell->children.push_back(new AstNode(AST_PARASET, timing->rise.t_max));
1001                 cell->children.back()->str = "\\T_RISE_MAX";
1002
1003                 cell->children.push_back(new AstNode(AST_PARASET, timing->fall.t_min));
1004                 cell->children.back()->str = "\\T_FALL_MIN";
1005
1006                 cell->children.push_back(new AstNode(AST_PARASET, timing->fall.t_avg));
1007                 cell->children.back()->str = "\\T_FALL_TYP";
1008
1009                 cell->children.push_back(new AstNode(AST_PARASET, timing->fall.t_max));
1010                 cell->children.back()->str = "\\T_FALL_MAX";
1011
1012                 cell->children.push_back(new AstNode(AST_ARGUMENT, en_expr ? en_expr : AstNode::mkconst_int(1, false, 1)));
1013                 cell->children.back()->str = "\\EN";
1014
1015                 cell->children.push_back(new AstNode(AST_ARGUMENT, src_expr));
1016                 cell->children.back()->str = "\\SRC";
1017
1018                 cell->children.push_back(new AstNode(AST_ARGUMENT, target->dst));
1019                 cell->children.back()->str = "\\DST";
1020
1021                 if (target->dat)
1022                 {
1023                         cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(specify_edge != 0, false, 1)));
1024                         cell->children.back()->str = "\\EDGE_EN";
1025
1026                         cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(specify_edge == 'p', false, 1)));
1027                         cell->children.back()->str = "\\EDGE_POL";
1028
1029                         cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(target->polarity_op != 0, false, 1)));
1030                         cell->children.back()->str = "\\DAT_DST_PEN";
1031
1032                         cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_int(target->polarity_op == '+', false, 1)));
1033                         cell->children.back()->str = "\\DAT_DST_POL";
1034
1035                         cell->children.push_back(new AstNode(AST_ARGUMENT, target->dat));
1036                         cell->children.back()->str = "\\DAT";
1037                 }
1038
1039                 delete oper;
1040                 delete target;
1041                 delete timing;
1042         } |
1043         TOK_ID '(' specify_edge expr specify_condition ',' specify_edge expr specify_condition ',' specify_triple specify_opt_triple ')' ';' {
1044                 if (*$1 != "$setup" && *$1 != "$hold" && *$1 != "$setuphold" && *$1 != "$removal" && *$1 != "$recovery" &&
1045                                 *$1 != "$recrem" && *$1 != "$skew" && *$1 != "$timeskew" && *$1 != "$fullskew" && *$1 != "$nochange")
1046                         frontend_verilog_yyerror("Unsupported specify rule type: %s\n", $1->c_str());
1047
1048                 AstNode *src_pen = AstNode::mkconst_int($3 != 0, false, 1);
1049                 AstNode *src_pol = AstNode::mkconst_int($3 == 'p', false, 1);
1050                 AstNode *src_expr = $4, *src_en = $5 ? $5 : AstNode::mkconst_int(1, false, 1);
1051
1052                 AstNode *dst_pen = AstNode::mkconst_int($7 != 0, false, 1);
1053                 AstNode *dst_pol = AstNode::mkconst_int($7 == 'p', false, 1);
1054                 AstNode *dst_expr = $8, *dst_en = $9 ? $9 : AstNode::mkconst_int(1, false, 1);
1055
1056                 specify_triple *limit = $11;
1057                 specify_triple *limit2 = $12;
1058
1059                 AstNode *cell = new AstNode(AST_CELL);
1060                 ast_stack.back()->children.push_back(cell);
1061                 cell->str = stringf("$specify$%d", autoidx++);
1062                 cell->children.push_back(new AstNode(AST_CELLTYPE));
1063                 cell->children.back()->str = "$specrule";
1064                 SET_AST_NODE_LOC(cell, @1, @14);
1065
1066                 cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_str(*$1)));
1067                 cell->children.back()->str = "\\TYPE";
1068
1069                 cell->children.push_back(new AstNode(AST_PARASET, limit->t_min));
1070                 cell->children.back()->str = "\\T_LIMIT_MIN";
1071
1072                 cell->children.push_back(new AstNode(AST_PARASET, limit->t_avg));
1073                 cell->children.back()->str = "\\T_LIMIT_TYP";
1074
1075                 cell->children.push_back(new AstNode(AST_PARASET, limit->t_max));
1076                 cell->children.back()->str = "\\T_LIMIT_MAX";
1077
1078                 cell->children.push_back(new AstNode(AST_PARASET, limit2 ? limit2->t_min : AstNode::mkconst_int(0, true)));
1079                 cell->children.back()->str = "\\T_LIMIT2_MIN";
1080
1081                 cell->children.push_back(new AstNode(AST_PARASET, limit2 ? limit2->t_avg : AstNode::mkconst_int(0, true)));
1082                 cell->children.back()->str = "\\T_LIMIT2_TYP";
1083
1084                 cell->children.push_back(new AstNode(AST_PARASET, limit2 ? limit2->t_max : AstNode::mkconst_int(0, true)));
1085                 cell->children.back()->str = "\\T_LIMIT2_MAX";
1086
1087                 cell->children.push_back(new AstNode(AST_PARASET, src_pen));
1088                 cell->children.back()->str = "\\SRC_PEN";
1089
1090                 cell->children.push_back(new AstNode(AST_PARASET, src_pol));
1091                 cell->children.back()->str = "\\SRC_POL";
1092
1093                 cell->children.push_back(new AstNode(AST_PARASET, dst_pen));
1094                 cell->children.back()->str = "\\DST_PEN";
1095
1096                 cell->children.push_back(new AstNode(AST_PARASET, dst_pol));
1097                 cell->children.back()->str = "\\DST_POL";
1098
1099                 cell->children.push_back(new AstNode(AST_ARGUMENT, src_en));
1100                 cell->children.back()->str = "\\SRC_EN";
1101
1102                 cell->children.push_back(new AstNode(AST_ARGUMENT, src_expr));
1103                 cell->children.back()->str = "\\SRC";
1104
1105                 cell->children.push_back(new AstNode(AST_ARGUMENT, dst_en));
1106                 cell->children.back()->str = "\\DST_EN";
1107
1108                 cell->children.push_back(new AstNode(AST_ARGUMENT, dst_expr));
1109                 cell->children.back()->str = "\\DST";
1110
1111                 delete $1;
1112         };
1113
1114 specify_opt_triple:
1115         ',' specify_triple {
1116                 $$ = $2;
1117         } |
1118         %empty {
1119                 $$ = nullptr;
1120         };
1121
1122 specify_if:
1123         TOK_IF '(' expr ')' {
1124                 $$ = $3;
1125         } |
1126         %empty {
1127                 $$ = nullptr;
1128         };
1129
1130 specify_condition:
1131         TOK_SPECIFY_AND expr {
1132                 $$ = $2;
1133         } |
1134         %empty {
1135                 $$ = nullptr;
1136         };
1137
1138 specify_target:
1139         expr {
1140                 $$ = new specify_target;
1141                 $$->polarity_op = 0;
1142                 $$->dst = $1;
1143                 $$->dat = nullptr;
1144         } |
1145         '(' expr ':' expr ')'{
1146                 $$ = new specify_target;
1147                 $$->polarity_op = 0;
1148                 $$->dst = $2;
1149                 $$->dat = $4;
1150         } |
1151         '(' expr TOK_NEG_INDEXED expr ')'{
1152                 $$ = new specify_target;
1153                 $$->polarity_op = '-';
1154                 $$->dst = $2;
1155                 $$->dat = $4;
1156         } |
1157         '(' expr TOK_POS_INDEXED expr ')'{
1158                 $$ = new specify_target;
1159                 $$->polarity_op = '+';
1160                 $$->dst = $2;
1161                 $$->dat = $4;
1162         };
1163
1164 specify_edge:
1165         TOK_POSEDGE { $$ = 'p'; } |
1166         TOK_NEGEDGE { $$ = 'n'; } |
1167         %empty { $$ = 0; };
1168
1169 specify_rise_fall:
1170         specify_triple {
1171                 $$ = new specify_rise_fall;
1172                 $$->rise = *$1;
1173                 $$->fall.t_min = $1->t_min->clone();
1174                 $$->fall.t_avg = $1->t_avg->clone();
1175                 $$->fall.t_max = $1->t_max->clone();
1176                 delete $1;
1177         } |
1178         '(' specify_triple ',' specify_triple ')' {
1179                 $$ = new specify_rise_fall;
1180                 $$->rise = *$2;
1181                 $$->fall = *$4;
1182                 delete $2;
1183                 delete $4;
1184         } |
1185         '(' specify_triple ',' specify_triple ',' specify_triple ')' {
1186                 $$ = new specify_rise_fall;
1187                 $$->rise = *$2;
1188                 $$->fall = *$4;
1189                 delete $2;
1190                 delete $4;
1191                 delete $6;
1192                 log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
1193         } |
1194         '(' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ')' {
1195                 $$ = new specify_rise_fall;
1196                 $$->rise = *$2;
1197                 $$->fall = *$4;
1198                 delete $2;
1199                 delete $4;
1200                 delete $6;
1201                 delete $8;
1202                 delete $10;
1203                 delete $12;
1204                 log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
1205         } |
1206         '(' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ')' {
1207                 $$ = new specify_rise_fall;
1208                 $$->rise = *$2;
1209                 $$->fall = *$4;
1210                 delete $2;
1211                 delete $4;
1212                 delete $6;
1213                 delete $8;
1214                 delete $10;
1215                 delete $12;
1216                 delete $14;
1217                 delete $16;
1218                 delete $18;
1219                 delete $20;
1220                 delete $22;
1221                 delete $24;
1222                 log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
1223         }
1224
1225 specify_triple:
1226         expr {
1227                 $$ = new specify_triple;
1228                 $$->t_min = $1;
1229                 $$->t_avg = $1->clone();
1230                 $$->t_max = $1->clone();
1231         } |
1232         expr ':' expr ':' expr {
1233                 $$ = new specify_triple;
1234                 $$->t_min = $1;
1235                 $$->t_avg = $3;
1236                 $$->t_max = $5;
1237         };
1238
1239 /******************** ignored specify parser **************************/
1240
1241 ignored_specify_block:
1242         TOK_IGNORED_SPECIFY ignored_specify_item_opt TOK_ENDSPECIFY |
1243         TOK_IGNORED_SPECIFY TOK_ENDSPECIFY ;
1244
1245 ignored_specify_item_opt:
1246         ignored_specify_item_opt ignored_specify_item |
1247         ignored_specify_item ;
1248
1249 ignored_specify_item:
1250         specparam_declaration
1251         // | pulsestyle_declaration
1252         // | showcancelled_declaration
1253         | path_declaration
1254         | system_timing_declaration
1255         ;
1256
1257 specparam_declaration:
1258         TOK_SPECPARAM list_of_specparam_assignments ';' |
1259         TOK_SPECPARAM specparam_range list_of_specparam_assignments ';' ;
1260
1261 // IEEE 1364-2005 calls this sinmply 'range' but the current 'range' rule allows empty match
1262 // and the 'non_opt_range' rule allows index ranges not allowed by 1364-2005
1263 // exxxxtending this for SV specparam would change this anyhow
1264 specparam_range:
1265         '[' ignspec_constant_expression ':' ignspec_constant_expression ']' ;
1266
1267 list_of_specparam_assignments:
1268         specparam_assignment | list_of_specparam_assignments ',' specparam_assignment;
1269
1270 specparam_assignment:
1271         ignspec_id '=' ignspec_expr ;
1272
1273 ignspec_opt_cond:
1274         TOK_IF '(' ignspec_expr ')' | %empty;
1275
1276 path_declaration :
1277         simple_path_declaration ';'
1278         // | edge_sensitive_path_declaration
1279         // | state_dependent_path_declaration
1280         ;
1281
1282 simple_path_declaration :
1283         ignspec_opt_cond parallel_path_description '=' path_delay_value |
1284         ignspec_opt_cond full_path_description '=' path_delay_value
1285         ;
1286
1287 path_delay_value :
1288         '(' ignspec_expr list_of_path_delay_extra_expressions ')'
1289         |     ignspec_expr
1290         |     ignspec_expr list_of_path_delay_extra_expressions
1291         ;
1292
1293 list_of_path_delay_extra_expressions :
1294         ',' ignspec_expr
1295         | ',' ignspec_expr list_of_path_delay_extra_expressions
1296         ;
1297
1298 specify_edge_identifier :
1299         TOK_POSEDGE | TOK_NEGEDGE ;
1300
1301 parallel_path_description :
1302         '(' specify_input_terminal_descriptor opt_polarity_operator '=' '>' specify_output_terminal_descriptor ')' |
1303         '(' specify_edge_identifier specify_input_terminal_descriptor '=' '>' '(' specify_output_terminal_descriptor opt_polarity_operator ':' ignspec_expr ')' ')' |
1304         '(' specify_edge_identifier specify_input_terminal_descriptor '=' '>' '(' specify_output_terminal_descriptor TOK_POS_INDEXED ignspec_expr ')' ')' ;
1305
1306 full_path_description :
1307         '(' list_of_path_inputs '*' '>' list_of_path_outputs ')' |
1308         '(' specify_edge_identifier list_of_path_inputs '*' '>' '(' list_of_path_outputs opt_polarity_operator ':' ignspec_expr ')' ')' |
1309         '(' specify_edge_identifier list_of_path_inputs '*' '>' '(' list_of_path_outputs TOK_POS_INDEXED ignspec_expr ')' ')' ;
1310
1311 // This was broken into 2 rules to solve shift/reduce conflicts
1312 list_of_path_inputs :
1313         specify_input_terminal_descriptor                  opt_polarity_operator  |
1314         specify_input_terminal_descriptor more_path_inputs opt_polarity_operator ;
1315
1316 more_path_inputs :
1317     ',' specify_input_terminal_descriptor |
1318     more_path_inputs ',' specify_input_terminal_descriptor ;
1319
1320 list_of_path_outputs :
1321         specify_output_terminal_descriptor |
1322         list_of_path_outputs ',' specify_output_terminal_descriptor ;
1323
1324 opt_polarity_operator :
1325         '+' | '-' | %empty;
1326
1327 // Good enough for the time being
1328 specify_input_terminal_descriptor :
1329         ignspec_id ;
1330
1331 // Good enough for the time being
1332 specify_output_terminal_descriptor :
1333         ignspec_id ;
1334
1335 system_timing_declaration :
1336         ignspec_id '(' system_timing_args ')' ';' ;
1337
1338 system_timing_arg :
1339         TOK_POSEDGE ignspec_id |
1340         TOK_NEGEDGE ignspec_id |
1341         ignspec_expr ;
1342
1343 system_timing_args :
1344         system_timing_arg |
1345         system_timing_args TOK_IGNORED_SPECIFY_AND system_timing_arg |
1346         system_timing_args ',' system_timing_arg ;
1347
1348 // for the time being this is OK, but we may write our own expr here.
1349 // as I'm not sure it is legal to use a full expr here (probably not)
1350 // On the other hand, other rules requiring constant expressions also use 'expr'
1351 // (such as param assignment), so we may leave this as-is, perhaps adding runtime checks for constant-ness
1352 ignspec_constant_expression:
1353         expr { delete $1; };
1354
1355 ignspec_expr:
1356         expr { delete $1; } |
1357         expr ':' expr ':' expr {
1358                 delete $1;
1359                 delete $3;
1360                 delete $5;
1361         };
1362
1363 ignspec_id:
1364         TOK_ID { delete $1; }
1365         range_or_multirange { delete $3; };
1366
1367 /**********************************************************************/
1368
1369 param_signed:
1370         TOK_SIGNED {
1371                 astbuf1->is_signed = true;
1372         } | TOK_UNSIGNED {
1373                 astbuf1->is_signed = false;
1374         } | %empty;
1375
1376 param_integer:
1377         TOK_INTEGER {
1378                 astbuf1->children.push_back(new AstNode(AST_RANGE));
1379                 astbuf1->children.back()->children.push_back(AstNode::mkconst_int(31, true));
1380                 astbuf1->children.back()->children.push_back(AstNode::mkconst_int(0, true));
1381                 astbuf1->is_signed = true;
1382         };
1383
1384 param_real:
1385         TOK_REAL {
1386                 astbuf1->children.push_back(new AstNode(AST_REALVALUE));
1387         };
1388
1389 param_range:
1390         range {
1391                 if ($1 != NULL) {
1392                         astbuf1->children.push_back($1);
1393                 }
1394         };
1395
1396 param_integer_type: param_integer param_signed;
1397 param_range_type: type_vec param_signed param_range;
1398 param_implicit_type: param_signed param_range;
1399
1400 param_type:
1401         param_integer_type | param_real | param_range_type | param_implicit_type |
1402         hierarchical_type_id {
1403                 astbuf1->is_custom_type = true;
1404                 astbuf1->children.push_back(new AstNode(AST_WIRETYPE));
1405                 astbuf1->children.back()->str = *$1;
1406         };
1407
1408 param_decl:
1409         attr TOK_PARAMETER {
1410                 astbuf1 = new AstNode(AST_PARAMETER);
1411                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
1412                 append_attr(astbuf1, $1);
1413         } param_type param_decl_list ';' {
1414                 delete astbuf1;
1415         };
1416
1417 localparam_decl:
1418         attr TOK_LOCALPARAM {
1419                 astbuf1 = new AstNode(AST_LOCALPARAM);
1420                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
1421                 append_attr(astbuf1, $1);
1422         } param_type param_decl_list ';' {
1423                 delete astbuf1;
1424         };
1425
1426 param_decl_list:
1427         single_param_decl | param_decl_list ',' single_param_decl;
1428
1429 single_param_decl:
1430         TOK_ID '=' expr {
1431                 AstNode *node;
1432                 if (astbuf1 == nullptr) {
1433                         if (!sv_mode)
1434                                 frontend_verilog_yyerror("In pure Verilog (not SystemVerilog), parameter/localparam with an initializer must use the parameter/localparam keyword");
1435                         node = new AstNode(AST_PARAMETER);
1436                         node->children.push_back(AstNode::mkconst_int(0, true));
1437                 } else {
1438                         node = astbuf1->clone();
1439                 }
1440                 node->str = *$1;
1441                 delete node->children[0];
1442                 node->children[0] = $3;
1443                 ast_stack.back()->children.push_back(node);
1444                 delete $1;
1445         };
1446
1447 defparam_decl:
1448         TOK_DEFPARAM defparam_decl_list ';';
1449
1450 defparam_decl_list:
1451         single_defparam_decl | defparam_decl_list ',' single_defparam_decl;
1452
1453 single_defparam_decl:
1454         range rvalue '=' expr {
1455                 AstNode *node = new AstNode(AST_DEFPARAM);
1456                 node->children.push_back($2);
1457                 node->children.push_back($4);
1458                 if ($1 != NULL)
1459                         node->children.push_back($1);
1460                 ast_stack.back()->children.push_back(node);
1461         };
1462
1463 /////////
1464 // enum
1465 /////////
1466
1467 enum_type: TOK_ENUM {
1468                 static int enum_count;
1469                 // create parent node for the enum
1470                 astbuf2 = new AstNode(AST_ENUM);
1471                 ast_stack.back()->children.push_back(astbuf2);
1472                 astbuf2->str = std::string("$enum");
1473                 astbuf2->str += std::to_string(enum_count++);
1474                 // create the template for the names
1475                 astbuf1 = new AstNode(AST_ENUM_ITEM);
1476                 astbuf1->children.push_back(AstNode::mkconst_int(0, true));
1477          } enum_base_type '{' enum_name_list '}' {      // create template for the enum vars
1478                                                         auto tnode = astbuf1->clone();
1479                                                         delete astbuf1;
1480                                                         astbuf1 = tnode;
1481                                                         tnode->type = AST_WIRE;
1482                                                         tnode->attributes[ID::enum_type] = AstNode::mkconst_str(astbuf2->str);
1483                                                         // drop constant but keep any range
1484                                                         delete tnode->children[0];
1485                                                         tnode->children.erase(tnode->children.begin());
1486                                                         $$ = astbuf1; }
1487          ;
1488
1489 enum_base_type: type_atom type_signing
1490         | type_vec type_signing range   { if ($3) astbuf1->children.push_back($3); }
1491         | %empty                        { astbuf1->is_reg = true; addRange(astbuf1); }
1492         ;
1493
1494 type_atom: TOK_INTEGER          { astbuf1->is_reg = true; addRange(astbuf1); }          // 4-state signed
1495         |  TOK_INT              { astbuf1->is_reg = true; addRange(astbuf1); }          // 2-state signed
1496         |  TOK_SHORTINT         { astbuf1->is_reg = true; addRange(astbuf1, 15, 0); }   // 2-state signed
1497         |  TOK_BYTE             { astbuf1->is_reg = true; addRange(astbuf1,  7, 0); }   // 2-state signed
1498         ;
1499
1500 type_vec: TOK_REG               { astbuf1->is_reg   = true; }           // unsigned
1501         | TOK_LOGIC             { astbuf1->is_logic = true; }           // unsigned
1502         ;
1503
1504 type_signing:
1505           TOK_SIGNED            { astbuf1->is_signed = true; }
1506         | TOK_UNSIGNED          { astbuf1->is_signed = false; }
1507         | %empty
1508         ;
1509
1510 enum_name_list: enum_name_decl
1511         | enum_name_list ',' enum_name_decl
1512         ;
1513
1514 enum_name_decl:
1515         TOK_ID opt_enum_init {
1516                 // put in fn
1517                 log_assert(astbuf1);
1518                 log_assert(astbuf2);
1519                 auto node = astbuf1->clone();
1520                 node->str = *$1;
1521                 delete $1;
1522                 SET_AST_NODE_LOC(node, @1, @1);
1523                 delete node->children[0];
1524                 node->children[0] = $2 ? $2 : new AstNode(AST_NONE);
1525                 astbuf2->children.push_back(node);
1526         }
1527         ;
1528
1529 opt_enum_init:
1530         '=' basic_expr          { $$ = $2; }    // TODO: restrict this
1531         | %empty                { $$ = NULL; }
1532         ;
1533
1534 enum_var_list:
1535         enum_var
1536         | enum_var_list ',' enum_var
1537         ;
1538
1539 enum_var: TOK_ID {
1540                 log_assert(astbuf1);
1541                 log_assert(astbuf2);
1542                 auto node = astbuf1->clone();
1543                 ast_stack.back()->children.push_back(node);
1544                 node->str = *$1;
1545                 delete $1;
1546                 SET_AST_NODE_LOC(node, @1, @1);
1547                 node->is_enum = true;
1548         }
1549         ;
1550
1551 enum_decl: enum_type enum_var_list ';'          { delete $1; }
1552         ;
1553
1554 //////////////////
1555 // struct or union
1556 //////////////////
1557
1558 struct_decl: struct_type struct_var_list ';'    { delete astbuf2; }
1559         ;
1560
1561 struct_type: struct_union { astbuf2 = $1; } struct_body { $$ = astbuf2; }
1562         ;
1563
1564 struct_union:
1565           TOK_STRUCT            { $$ = new AstNode(AST_STRUCT); }
1566         | TOK_UNION             { $$ = new AstNode(AST_UNION); }
1567         ;
1568
1569 struct_body: opt_packed '{' struct_member_list '}'
1570         ;
1571
1572 opt_packed:
1573         TOK_PACKED opt_signed_struct |
1574         %empty { frontend_verilog_yyerror("Only PACKED supported at this time"); };
1575
1576 opt_signed_struct:
1577           TOK_SIGNED            { astbuf2->is_signed = true; }
1578         | TOK_UNSIGNED          { astbuf2->is_signed = false; }
1579         | %empty // default is unsigned
1580         ;
1581
1582 struct_member_list: struct_member
1583         | struct_member_list struct_member
1584         ;
1585
1586 struct_member: struct_member_type member_name_list ';'          { delete astbuf1; }
1587         ;
1588
1589 member_name_list:
1590           member_name
1591         | member_name_list ',' member_name
1592         ;
1593
1594 member_name: TOK_ID {
1595                         astbuf1->str = $1->substr(1);
1596                         delete $1;
1597                         astbuf3 = astbuf1->clone();
1598                         SET_AST_NODE_LOC(astbuf3, @1, @1);
1599                         astbuf2->children.push_back(astbuf3);
1600                 } range { if ($3) astbuf3->children.push_back($3); }
1601         ;
1602
1603 struct_member_type: { astbuf1 = new AstNode(AST_STRUCT_ITEM); } member_type_token
1604         ;
1605
1606 member_type_token:
1607           member_type
1608         | hierarchical_type_id {
1609                         // use a clone of the typedef definition nodes
1610                         auto template_node = copyTypeDefinition(*$1);
1611                         delete $1;
1612                         switch (template_node->type) {
1613                         case AST_WIRE:
1614                                 template_node->type = AST_STRUCT_ITEM;
1615                                 break;
1616                         case AST_STRUCT:
1617                         case AST_UNION:
1618                                 break;
1619                         default:
1620                                 frontend_verilog_yyerror("Invalid type for struct member: %s", type2str(template_node->type).c_str());
1621                         }
1622                         delete astbuf1;
1623                         astbuf1 = template_node;
1624                 }
1625         | struct_union {
1626                         // stash state on ast_stack
1627                         ast_stack.push_back(astbuf2);
1628                         astbuf2 = $1;
1629                 } struct_body  {
1630                         astbuf1 = astbuf2;
1631                         // recover state
1632                         astbuf2 = ast_stack.back();
1633                         ast_stack.pop_back();
1634                 }
1635         ;
1636
1637 member_type: type_atom type_signing
1638         | type_vec type_signing range_or_multirange     { if ($3) astbuf1->children.push_back($3); }
1639         ;
1640
1641 struct_var_list: struct_var
1642         | struct_var_list ',' struct_var
1643         ;
1644
1645 struct_var: TOK_ID      {       auto *var_node = astbuf2->clone();
1646                                 var_node->str = *$1;
1647                                 delete $1;
1648                                 SET_AST_NODE_LOC(var_node, @1, @1);
1649                                 ast_stack.back()->children.push_back(var_node);
1650                         }
1651         ;
1652
1653 /////////
1654 // wire
1655 /////////
1656
1657 wire_decl:
1658         attr wire_type range {
1659                 albuf = $1;
1660                 astbuf1 = $2;
1661                 astbuf2 = checkRange(astbuf1, $3);
1662         } delay wire_name_list {
1663                 delete astbuf1;
1664                 if (astbuf2 != NULL)
1665                         delete astbuf2;
1666                 free_attr(albuf);
1667         } ';' |
1668         attr TOK_SUPPLY0 TOK_ID {
1669                 ast_stack.back()->children.push_back(new AstNode(AST_WIRE));
1670                 ast_stack.back()->children.back()->str = *$3;
1671                 append_attr(ast_stack.back()->children.back(), $1);
1672                 ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, new AstNode(AST_IDENTIFIER), AstNode::mkconst_int(0, false, 1)));
1673                 ast_stack.back()->children.back()->children[0]->str = *$3;
1674                 delete $3;
1675         } opt_supply_wires ';' |
1676         attr TOK_SUPPLY1 TOK_ID {
1677                 ast_stack.back()->children.push_back(new AstNode(AST_WIRE));
1678                 ast_stack.back()->children.back()->str = *$3;
1679                 append_attr(ast_stack.back()->children.back(), $1);
1680                 ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, new AstNode(AST_IDENTIFIER), AstNode::mkconst_int(1, false, 1)));
1681                 ast_stack.back()->children.back()->children[0]->str = *$3;
1682                 delete $3;
1683         } opt_supply_wires ';';
1684
1685 opt_supply_wires:
1686         %empty |
1687         opt_supply_wires ',' TOK_ID {
1688                 AstNode *wire_node = ast_stack.back()->children.at(GetSize(ast_stack.back()->children)-2)->clone();
1689                 AstNode *assign_node = ast_stack.back()->children.at(GetSize(ast_stack.back()->children)-1)->clone();
1690                 wire_node->str = *$3;
1691                 assign_node->children[0]->str = *$3;
1692                 ast_stack.back()->children.push_back(wire_node);
1693                 ast_stack.back()->children.push_back(assign_node);
1694                 delete $3;
1695         };
1696
1697 wire_name_list:
1698         wire_name_and_opt_assign | wire_name_list ',' wire_name_and_opt_assign;
1699
1700 wire_name_and_opt_assign:
1701         wire_name {
1702                 bool attr_anyconst = false;
1703                 bool attr_anyseq = false;
1704                 bool attr_allconst = false;
1705                 bool attr_allseq = false;
1706                 if (ast_stack.back()->children.back()->get_bool_attribute(ID::anyconst)) {
1707                         delete ast_stack.back()->children.back()->attributes.at(ID::anyconst);
1708                         ast_stack.back()->children.back()->attributes.erase(ID::anyconst);
1709                         attr_anyconst = true;
1710                 }
1711                 if (ast_stack.back()->children.back()->get_bool_attribute(ID::anyseq)) {
1712                         delete ast_stack.back()->children.back()->attributes.at(ID::anyseq);
1713                         ast_stack.back()->children.back()->attributes.erase(ID::anyseq);
1714                         attr_anyseq = true;
1715                 }
1716                 if (ast_stack.back()->children.back()->get_bool_attribute(ID::allconst)) {
1717                         delete ast_stack.back()->children.back()->attributes.at(ID::allconst);
1718                         ast_stack.back()->children.back()->attributes.erase(ID::allconst);
1719                         attr_allconst = true;
1720                 }
1721                 if (ast_stack.back()->children.back()->get_bool_attribute(ID::allseq)) {
1722                         delete ast_stack.back()->children.back()->attributes.at(ID::allseq);
1723                         ast_stack.back()->children.back()->attributes.erase(ID::allseq);
1724                         attr_allseq = true;
1725                 }
1726                 if (current_wire_rand || attr_anyconst || attr_anyseq || attr_allconst || attr_allseq) {
1727                         AstNode *wire = new AstNode(AST_IDENTIFIER);
1728                         AstNode *fcall = new AstNode(AST_FCALL);
1729                         wire->str = ast_stack.back()->children.back()->str;
1730                         fcall->str = current_wire_const ? "\\$anyconst" : "\\$anyseq";
1731                         if (attr_anyconst)
1732                                 fcall->str = "\\$anyconst";
1733                         if (attr_anyseq)
1734                                 fcall->str = "\\$anyseq";
1735                         if (attr_allconst)
1736                                 fcall->str = "\\$allconst";
1737                         if (attr_allseq)
1738                                 fcall->str = "\\$allseq";
1739                         fcall->attributes[ID::reg] = AstNode::mkconst_str(RTLIL::unescape_id(wire->str));
1740                         ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, wire, fcall));
1741                 }
1742         } |
1743         wire_name '=' expr {
1744                 AstNode *wire = new AstNode(AST_IDENTIFIER);
1745                 wire->str = ast_stack.back()->children.back()->str;
1746                 if (astbuf1->is_input) {
1747                         if (astbuf1->attributes.count(ID::defaultvalue))
1748                                 delete astbuf1->attributes.at(ID::defaultvalue);
1749                         astbuf1->attributes[ID::defaultvalue] = $3;
1750                 }
1751                 else if (astbuf1->is_reg || astbuf1->is_logic){
1752                         AstNode *assign = new AstNode(AST_ASSIGN_LE, wire, $3);
1753                         AstNode *block = new AstNode(AST_BLOCK, assign);
1754                         AstNode *init = new AstNode(AST_INITIAL, block);
1755
1756                         SET_AST_NODE_LOC(assign, @1, @3);
1757                         SET_AST_NODE_LOC(block, @1, @3);
1758                         SET_AST_NODE_LOC(init, @1, @3);
1759
1760                         ast_stack.back()->children.push_back(init);
1761                 }
1762                 else {
1763                         AstNode *assign = new AstNode(AST_ASSIGN, wire, $3);
1764                         SET_AST_NODE_LOC(assign, @1, @3);
1765                         ast_stack.back()->children.push_back(assign);
1766                 }
1767
1768         };
1769
1770 wire_name:
1771         TOK_ID range_or_multirange {
1772                 if (astbuf1 == nullptr)
1773                         frontend_verilog_yyerror("Internal error - should not happen - no AST_WIRE node.");
1774                 AstNode *node = astbuf1->clone();
1775                 node->str = *$1;
1776                 append_attr_clone(node, albuf);
1777                 if (astbuf2 != NULL)
1778                         node->children.push_back(astbuf2->clone());
1779                 if ($2 != NULL) {
1780                         if (node->is_input || node->is_output)
1781                                 frontend_verilog_yyerror("input/output/inout ports cannot have unpacked dimensions.");
1782                         if (!astbuf2 && !node->is_custom_type) {
1783                                 addRange(node, 0, 0, false);
1784                         }
1785                         rewriteAsMemoryNode(node, $2);
1786                 }
1787                 if (current_function_or_task == NULL) {
1788                         if (do_not_require_port_stubs && (node->is_input || node->is_output) && port_stubs.count(*$1) == 0) {
1789                                 port_stubs[*$1] = ++port_counter;
1790                         }
1791                         if (port_stubs.count(*$1) != 0) {
1792                                 if (!node->is_input && !node->is_output)
1793                                         frontend_verilog_yyerror("Module port `%s' is neither input nor output.", $1->c_str());
1794                                 if (node->is_reg && node->is_input && !node->is_output && !sv_mode)
1795                                         frontend_verilog_yyerror("Input port `%s' is declared as register.", $1->c_str());
1796                                 node->port_id = port_stubs[*$1];
1797                                 port_stubs.erase(*$1);
1798                         } else {
1799                                 if (node->is_input || node->is_output)
1800                                         frontend_verilog_yyerror("Module port `%s' is not declared in module header.", $1->c_str());
1801                         }
1802                 } else {
1803                         if (node->is_input || node->is_output)
1804                                 node->port_id = current_function_or_task_port_id++;
1805                 }
1806                 //FIXME: for some reason, TOK_ID has a location which always points to one column *after* the real last column...
1807                 SET_AST_NODE_LOC(node, @1, @1);
1808                 ast_stack.back()->children.push_back(node);
1809
1810                 delete $1;
1811         };
1812
1813 assign_stmt:
1814         TOK_ASSIGN delay assign_expr_list ';';
1815
1816 assign_expr_list:
1817         assign_expr | assign_expr_list ',' assign_expr;
1818
1819 assign_expr:
1820         lvalue '=' expr {
1821                 AstNode *node = new AstNode(AST_ASSIGN, $1, $3);
1822                 SET_AST_NODE_LOC(node, @$, @$);
1823                 ast_stack.back()->children.push_back(node);
1824         };
1825
1826 type_name: TOK_ID               // first time seen
1827          | TOK_USER_TYPE        { if (isInLocalScope($1)) frontend_verilog_yyerror("Duplicate declaration of TYPEDEF '%s'", $1->c_str()+1); }
1828          ;
1829
1830 typedef_decl:
1831         TOK_TYPEDEF non_io_wire_type range type_name range_or_multirange ';' {
1832                 astbuf1 = $2;
1833                 astbuf2 = checkRange(astbuf1, $3);
1834                 if (astbuf2)
1835                         astbuf1->children.push_back(astbuf2);
1836
1837                 if ($5 != NULL) {
1838                         if (!astbuf2) {
1839                                 addRange(astbuf1, 0, 0, false);
1840                         }
1841                         rewriteAsMemoryNode(astbuf1, $5);
1842                 }
1843                 addTypedefNode($4, astbuf1); }
1844         | TOK_TYPEDEF non_wire_data_type type_name ';'   { addTypedefNode($3, $2); }
1845         ;
1846
1847 non_wire_data_type:
1848           enum_type
1849         | struct_type
1850         ;
1851
1852 cell_stmt:
1853         attr TOK_ID {
1854                 astbuf1 = new AstNode(AST_CELL);
1855                 append_attr(astbuf1, $1);
1856                 astbuf1->children.push_back(new AstNode(AST_CELLTYPE));
1857                 astbuf1->children[0]->str = *$2;
1858                 delete $2;
1859         } cell_parameter_list_opt cell_list ';' {
1860                 delete astbuf1;
1861         } |
1862         attr tok_prim_wrapper delay {
1863                 astbuf1 = new AstNode(AST_PRIMITIVE);
1864                 astbuf1->str = *$2;
1865                 append_attr(astbuf1, $1);
1866                 delete $2;
1867         } prim_list ';' {
1868                 delete astbuf1;
1869         };
1870
1871 tok_prim_wrapper:
1872         TOK_PRIMITIVE {
1873                 $$ = $1;
1874         } |
1875         TOK_OR {
1876                 $$ = new std::string("or");
1877         };
1878
1879 cell_list:
1880         single_cell |
1881         cell_list ',' single_cell;
1882
1883 single_cell:
1884         TOK_ID {
1885                 astbuf2 = astbuf1->clone();
1886                 if (astbuf2->type != AST_PRIMITIVE)
1887                         astbuf2->str = *$1;
1888                 delete $1;
1889                 ast_stack.back()->children.push_back(astbuf2);
1890         } '(' cell_port_list ')' {
1891                 SET_AST_NODE_LOC(astbuf2, @1, @$);
1892         } |
1893         TOK_ID non_opt_range {
1894                 astbuf2 = astbuf1->clone();
1895                 if (astbuf2->type != AST_PRIMITIVE)
1896                         astbuf2->str = *$1;
1897                 delete $1;
1898                 ast_stack.back()->children.push_back(new AstNode(AST_CELLARRAY, $2, astbuf2));
1899         } '(' cell_port_list ')'{
1900                 SET_AST_NODE_LOC(astbuf2, @1, @$);
1901         };
1902
1903 prim_list:
1904         single_prim |
1905         prim_list ',' single_prim;
1906
1907 single_prim:
1908         single_cell |
1909         /* no name */ {
1910                 astbuf2 = astbuf1->clone();
1911                 ast_stack.back()->children.push_back(astbuf2);
1912         } '(' cell_port_list ')' {
1913                 SET_AST_NODE_LOC(astbuf2, @1, @$);
1914         }
1915
1916 cell_parameter_list_opt:
1917         '#' '(' cell_parameter_list ')' | %empty;
1918
1919 cell_parameter_list:
1920         cell_parameter | cell_parameter_list ',' cell_parameter;
1921
1922 cell_parameter:
1923         %empty |
1924         expr {
1925                 AstNode *node = new AstNode(AST_PARASET);
1926                 astbuf1->children.push_back(node);
1927                 node->children.push_back($1);
1928         } |
1929         '.' TOK_ID '(' ')' {
1930                 // just ignore empty parameters
1931         } |
1932         '.' TOK_ID '(' expr ')' {
1933                 AstNode *node = new AstNode(AST_PARASET);
1934                 node->str = *$2;
1935                 astbuf1->children.push_back(node);
1936                 node->children.push_back($4);
1937                 delete $2;
1938         };
1939
1940 cell_port_list:
1941         cell_port_list_rules {
1942                 // remove empty args from end of list
1943                 while (!astbuf2->children.empty()) {
1944                         AstNode *node = astbuf2->children.back();
1945                         if (node->type != AST_ARGUMENT) break;
1946                         if (!node->children.empty()) break;
1947                         if (!node->str.empty()) break;
1948                         astbuf2->children.pop_back();
1949                         delete node;
1950                 }
1951
1952                 // check port types
1953                 bool has_positional_args = false;
1954                 bool has_named_args = false;
1955                 for (auto node : astbuf2->children) {
1956                         if (node->type != AST_ARGUMENT) continue;
1957                         if (node->str.empty())
1958                                 has_positional_args = true;
1959                         else
1960                                 has_named_args = true;
1961                 }
1962
1963                 if (has_positional_args && has_named_args)
1964                         frontend_verilog_yyerror("Mix of positional and named cell ports.");
1965         };
1966
1967 cell_port_list_rules:
1968         cell_port | cell_port_list_rules ',' cell_port;
1969
1970 cell_port:
1971         attr {
1972                 AstNode *node = new AstNode(AST_ARGUMENT);
1973                 astbuf2->children.push_back(node);
1974                 free_attr($1);
1975         } |
1976         attr expr {
1977                 AstNode *node = new AstNode(AST_ARGUMENT);
1978                 astbuf2->children.push_back(node);
1979                 node->children.push_back($2);
1980                 free_attr($1);
1981         } |
1982         attr '.' TOK_ID '(' expr ')' {
1983                 AstNode *node = new AstNode(AST_ARGUMENT);
1984                 node->str = *$3;
1985                 astbuf2->children.push_back(node);
1986                 node->children.push_back($5);
1987                 delete $3;
1988                 free_attr($1);
1989         } |
1990         attr '.' TOK_ID '(' ')' {
1991                 AstNode *node = new AstNode(AST_ARGUMENT);
1992                 node->str = *$3;
1993                 astbuf2->children.push_back(node);
1994                 delete $3;
1995                 free_attr($1);
1996         } |
1997         attr '.' TOK_ID {
1998                 AstNode *node = new AstNode(AST_ARGUMENT);
1999                 node->str = *$3;
2000                 astbuf2->children.push_back(node);
2001                 node->children.push_back(new AstNode(AST_IDENTIFIER));
2002                 node->children.back()->str = *$3;
2003                 delete $3;
2004                 free_attr($1);
2005         } |
2006         attr TOK_WILDCARD_CONNECT {
2007                 if (!sv_mode)
2008                         frontend_verilog_yyerror("Wildcard port connections are only supported in SystemVerilog mode.");
2009                 astbuf2->attributes[ID::wildcard_port_conns] = AstNode::mkconst_int(1, false);
2010         };
2011
2012 always_comb_or_latch:
2013         TOK_ALWAYS_COMB {
2014                 $$ = false;
2015         } |
2016         TOK_ALWAYS_LATCH {
2017                 $$ = true;
2018         };
2019
2020 always_or_always_ff:
2021         TOK_ALWAYS {
2022                 $$ = false;
2023         } |
2024         TOK_ALWAYS_FF {
2025                 $$ = true;
2026         };
2027
2028 always_stmt:
2029         attr always_or_always_ff {
2030                 AstNode *node = new AstNode(AST_ALWAYS);
2031                 append_attr(node, $1);
2032                 if ($2)
2033                         node->attributes[ID::always_ff] = AstNode::mkconst_int(1, false);
2034                 ast_stack.back()->children.push_back(node);
2035                 ast_stack.push_back(node);
2036         } always_cond {
2037                 AstNode *block = new AstNode(AST_BLOCK);
2038                 ast_stack.back()->children.push_back(block);
2039                 ast_stack.push_back(block);
2040         } behavioral_stmt {
2041                 SET_AST_NODE_LOC(ast_stack.back(), @6, @6);
2042                 ast_stack.pop_back();
2043
2044                 SET_AST_NODE_LOC(ast_stack.back(), @2, @$);
2045                 ast_stack.pop_back();
2046
2047                 SET_RULE_LOC(@$, @2, @$);
2048         } |
2049         attr always_comb_or_latch {
2050                 AstNode *node = new AstNode(AST_ALWAYS);
2051                 append_attr(node, $1);
2052                 if ($2)
2053                         node->attributes[ID::always_latch] = AstNode::mkconst_int(1, false);
2054                 else
2055                         node->attributes[ID::always_comb] = AstNode::mkconst_int(1, false);
2056                 ast_stack.back()->children.push_back(node);
2057                 ast_stack.push_back(node);
2058                 AstNode *block = new AstNode(AST_BLOCK);
2059                 ast_stack.back()->children.push_back(block);
2060                 ast_stack.push_back(block);
2061         } behavioral_stmt {
2062                 ast_stack.pop_back();
2063                 ast_stack.pop_back();
2064         } |
2065         attr TOK_INITIAL {
2066                 AstNode *node = new AstNode(AST_INITIAL);
2067                 append_attr(node, $1);
2068                 ast_stack.back()->children.push_back(node);
2069                 ast_stack.push_back(node);
2070                 AstNode *block = new AstNode(AST_BLOCK);
2071                 ast_stack.back()->children.push_back(block);
2072                 ast_stack.push_back(block);
2073         } behavioral_stmt {
2074                 ast_stack.pop_back();
2075                 ast_stack.pop_back();
2076         };
2077
2078 always_cond:
2079         '@' '(' always_events ')' |
2080         '@' '(' '*' ')' |
2081         '@' ATTR_BEGIN ')' |
2082         '@' '(' ATTR_END |
2083         '@' '*' |
2084         %empty;
2085
2086 always_events:
2087         always_event |
2088         always_events TOK_OR always_event |
2089         always_events ',' always_event;
2090
2091 always_event:
2092         TOK_POSEDGE expr {
2093                 AstNode *node = new AstNode(AST_POSEDGE);
2094                 SET_AST_NODE_LOC(node, @1, @1);
2095                 ast_stack.back()->children.push_back(node);
2096                 node->children.push_back($2);
2097         } |
2098         TOK_NEGEDGE expr {
2099                 AstNode *node = new AstNode(AST_NEGEDGE);
2100                 SET_AST_NODE_LOC(node, @1, @1);
2101                 ast_stack.back()->children.push_back(node);
2102                 node->children.push_back($2);
2103         } |
2104         expr {
2105                 AstNode *node = new AstNode(AST_EDGE);
2106                 ast_stack.back()->children.push_back(node);
2107                 node->children.push_back($1);
2108         };
2109
2110 opt_label:
2111         ':' TOK_ID {
2112                 $$ = $2;
2113         } |
2114         %empty {
2115                 $$ = NULL;
2116         };
2117
2118 opt_sva_label:
2119         TOK_SVA_LABEL ':' {
2120                 $$ = $1;
2121         } |
2122         %empty {
2123                 $$ = NULL;
2124         };
2125
2126 opt_property:
2127         TOK_PROPERTY {
2128                 $$ = true;
2129         } |
2130         TOK_FINAL {
2131                 $$ = false;
2132         } |
2133         %empty {
2134                 $$ = false;
2135         };
2136
2137 modport_stmt:
2138     TOK_MODPORT TOK_ID {
2139         AstNode *modport = new AstNode(AST_MODPORT);
2140         ast_stack.back()->children.push_back(modport);
2141         ast_stack.push_back(modport);
2142         modport->str = *$2;
2143         delete $2;
2144     }  modport_args_opt {
2145         ast_stack.pop_back();
2146         log_assert(ast_stack.size() == 2);
2147     } ';'
2148
2149 modport_args_opt:
2150     '(' ')' | '(' modport_args optional_comma ')';
2151
2152 modport_args:
2153     modport_arg | modport_args ',' modport_arg;
2154
2155 modport_arg:
2156     modport_type_token modport_member |
2157     modport_member
2158
2159 modport_member:
2160     TOK_ID {
2161         AstNode *modport_member = new AstNode(AST_MODPORTMEMBER);
2162         ast_stack.back()->children.push_back(modport_member);
2163         modport_member->str = *$1;
2164         modport_member->is_input = current_modport_input;
2165         modport_member->is_output = current_modport_output;
2166         delete $1;
2167     }
2168
2169 modport_type_token:
2170     TOK_INPUT {current_modport_input = 1; current_modport_output = 0;} | TOK_OUTPUT {current_modport_input = 0; current_modport_output = 1;}
2171
2172 assert:
2173         opt_sva_label TOK_ASSERT opt_property '(' expr ')' ';' {
2174                 if (noassert_mode) {
2175                         delete $5;
2176                 } else {
2177                         AstNode *node = new AstNode(assume_asserts_mode ? AST_ASSUME : AST_ASSERT, $5);
2178                         SET_AST_NODE_LOC(node, @1, @6);
2179                         if ($1 != nullptr)
2180                                 node->str = *$1;
2181                         ast_stack.back()->children.push_back(node);
2182                 }
2183                 if ($1 != nullptr)
2184                         delete $1;
2185         } |
2186         opt_sva_label TOK_ASSUME opt_property '(' expr ')' ';' {
2187                 if (noassume_mode) {
2188                         delete $5;
2189                 } else {
2190                         AstNode *node = new AstNode(assert_assumes_mode ? AST_ASSERT : AST_ASSUME, $5);
2191                         SET_AST_NODE_LOC(node, @1, @6);
2192                         if ($1 != nullptr)
2193                                 node->str = *$1;
2194                         ast_stack.back()->children.push_back(node);
2195                 }
2196                 if ($1 != nullptr)
2197                         delete $1;
2198         } |
2199         opt_sva_label TOK_ASSERT opt_property '(' TOK_EVENTUALLY expr ')' ';' {
2200                 if (noassert_mode) {
2201                         delete $6;
2202                 } else {
2203                         AstNode *node = new AstNode(assume_asserts_mode ? AST_FAIR : AST_LIVE, $6);
2204                         SET_AST_NODE_LOC(node, @1, @7);
2205                         if ($1 != nullptr)
2206                                 node->str = *$1;
2207                         ast_stack.back()->children.push_back(node);
2208                 }
2209                 if ($1 != nullptr)
2210                         delete $1;
2211         } |
2212         opt_sva_label TOK_ASSUME opt_property '(' TOK_EVENTUALLY expr ')' ';' {
2213                 if (noassume_mode) {
2214                         delete $6;
2215                 } else {
2216                         AstNode *node = new AstNode(assert_assumes_mode ? AST_LIVE : AST_FAIR, $6);
2217                         SET_AST_NODE_LOC(node, @1, @7);
2218                         if ($1 != nullptr)
2219                                 node->str = *$1;
2220                         ast_stack.back()->children.push_back(node);
2221                 }
2222                 if ($1 != nullptr)
2223                         delete $1;
2224         } |
2225         opt_sva_label TOK_COVER opt_property '(' expr ')' ';' {
2226                 AstNode *node = new AstNode(AST_COVER, $5);
2227                 SET_AST_NODE_LOC(node, @1, @6);
2228                 if ($1 != nullptr) {
2229                         node->str = *$1;
2230                         delete $1;
2231                 }
2232                 ast_stack.back()->children.push_back(node);
2233         } |
2234         opt_sva_label TOK_COVER opt_property '(' ')' ';' {
2235                 AstNode *node = new AstNode(AST_COVER, AstNode::mkconst_int(1, false));
2236                 SET_AST_NODE_LOC(node, @1, @5);
2237                 if ($1 != nullptr) {
2238                         node->str = *$1;
2239                         delete $1;
2240                 }
2241                 ast_stack.back()->children.push_back(node);
2242         } |
2243         opt_sva_label TOK_COVER ';' {
2244                 AstNode *node = new AstNode(AST_COVER, AstNode::mkconst_int(1, false));
2245                 SET_AST_NODE_LOC(node, @1, @2);
2246                 if ($1 != nullptr) {
2247                         node->str = *$1;
2248                         delete $1;
2249                 }
2250                 ast_stack.back()->children.push_back(node);
2251         } |
2252         opt_sva_label TOK_RESTRICT opt_property '(' expr ')' ';' {
2253                 if (norestrict_mode) {
2254                         delete $5;
2255                 } else {
2256                         AstNode *node = new AstNode(AST_ASSUME, $5);
2257                         SET_AST_NODE_LOC(node, @1, @6);
2258                         if ($1 != nullptr)
2259                                 node->str = *$1;
2260                         ast_stack.back()->children.push_back(node);
2261                 }
2262                 if (!$3)
2263                         log_file_warning(current_filename, get_line_num(), "SystemVerilog does not allow \"restrict\" without \"property\".\n");
2264                 if ($1 != nullptr)
2265                         delete $1;
2266         } |
2267         opt_sva_label TOK_RESTRICT opt_property '(' TOK_EVENTUALLY expr ')' ';' {
2268                 if (norestrict_mode) {
2269                         delete $6;
2270                 } else {
2271                         AstNode *node = new AstNode(AST_FAIR, $6);
2272                         SET_AST_NODE_LOC(node, @1, @7);
2273                         if ($1 != nullptr)
2274                                 node->str = *$1;
2275                         ast_stack.back()->children.push_back(node);
2276                 }
2277                 if (!$3)
2278                         log_file_warning(current_filename, get_line_num(), "SystemVerilog does not allow \"restrict\" without \"property\".\n");
2279                 if ($1 != nullptr)
2280                         delete $1;
2281         };
2282
2283 assert_property:
2284         opt_sva_label TOK_ASSERT TOK_PROPERTY '(' expr ')' ';' {
2285                 AstNode *node = new AstNode(assume_asserts_mode ? AST_ASSUME : AST_ASSERT, $5);
2286                 SET_AST_NODE_LOC(node, @1, @6);
2287                 ast_stack.back()->children.push_back(node);
2288                 if ($1 != nullptr) {
2289                         ast_stack.back()->children.back()->str = *$1;
2290                         delete $1;
2291                 }
2292         } |
2293         opt_sva_label TOK_ASSUME TOK_PROPERTY '(' expr ')' ';' {
2294                 AstNode *node = new AstNode(AST_ASSUME, $5);
2295                 SET_AST_NODE_LOC(node, @1, @6);
2296                 ast_stack.back()->children.push_back(node);
2297                 if ($1 != nullptr) {
2298                         ast_stack.back()->children.back()->str = *$1;
2299                         delete $1;
2300                 }
2301         } |
2302         opt_sva_label TOK_ASSERT TOK_PROPERTY '(' TOK_EVENTUALLY expr ')' ';' {
2303                 AstNode *node = new AstNode(assume_asserts_mode ? AST_FAIR : AST_LIVE, $6);
2304                 SET_AST_NODE_LOC(node, @1, @7);
2305                 ast_stack.back()->children.push_back(node);
2306                 if ($1 != nullptr) {
2307                         ast_stack.back()->children.back()->str = *$1;
2308                         delete $1;
2309                 }
2310         } |
2311         opt_sva_label TOK_ASSUME TOK_PROPERTY '(' TOK_EVENTUALLY expr ')' ';' {
2312                 AstNode *node = new AstNode(AST_FAIR, $6);
2313                 SET_AST_NODE_LOC(node, @1, @7);
2314                 ast_stack.back()->children.push_back(node);
2315                 if ($1 != nullptr) {
2316                         ast_stack.back()->children.back()->str = *$1;
2317                         delete $1;
2318                 }
2319         } |
2320         opt_sva_label TOK_COVER TOK_PROPERTY '(' expr ')' ';' {
2321                 AstNode *node = new AstNode(AST_COVER, $5);
2322                 SET_AST_NODE_LOC(node, @1, @6);
2323                 ast_stack.back()->children.push_back(node);
2324                 if ($1 != nullptr) {
2325                         ast_stack.back()->children.back()->str = *$1;
2326                         delete $1;
2327                 }
2328         } |
2329         opt_sva_label TOK_RESTRICT TOK_PROPERTY '(' expr ')' ';' {
2330                 if (norestrict_mode) {
2331                         delete $5;
2332                 } else {
2333                         AstNode *node = new AstNode(AST_ASSUME, $5);
2334                         SET_AST_NODE_LOC(node, @1, @6);
2335                         ast_stack.back()->children.push_back(node);
2336                         if ($1 != nullptr) {
2337                                 ast_stack.back()->children.back()->str = *$1;
2338                                 delete $1;
2339                         }
2340                 }
2341         } |
2342         opt_sva_label TOK_RESTRICT TOK_PROPERTY '(' TOK_EVENTUALLY expr ')' ';' {
2343                 if (norestrict_mode) {
2344                         delete $6;
2345                 } else {
2346                         AstNode *node = new AstNode(AST_FAIR, $6);
2347                         SET_AST_NODE_LOC(node, @1, @7);
2348                         ast_stack.back()->children.push_back(node);
2349                         if ($1 != nullptr) {
2350                                 ast_stack.back()->children.back()->str = *$1;
2351                                 delete $1;
2352                         }
2353                 }
2354         };
2355
2356 simple_behavioral_stmt:
2357         attr lvalue '=' delay expr {
2358                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, $5);
2359                 ast_stack.back()->children.push_back(node);
2360                 SET_AST_NODE_LOC(node, @2, @5);
2361                 append_attr(node, $1);
2362         } |
2363         attr lvalue TOK_INCREMENT {
2364                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, new AstNode(AST_ADD, $2->clone(), AstNode::mkconst_int(1, true)));
2365                 ast_stack.back()->children.push_back(node);
2366                 SET_AST_NODE_LOC(node, @2, @3);
2367                 append_attr(node, $1);
2368         } |
2369         attr lvalue TOK_DECREMENT {
2370                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, new AstNode(AST_SUB, $2->clone(), AstNode::mkconst_int(1, true)));
2371                 ast_stack.back()->children.push_back(node);
2372                 SET_AST_NODE_LOC(node, @2, @3);
2373                 append_attr(node, $1);
2374         } |
2375         attr lvalue OP_LE delay expr {
2376                 AstNode *node = new AstNode(AST_ASSIGN_LE, $2, $5);
2377                 ast_stack.back()->children.push_back(node);
2378                 SET_AST_NODE_LOC(node, @2, @5);
2379                 append_attr(node, $1);
2380         } |
2381         attr lvalue TOK_XOR_ASSIGN delay expr {
2382                 AstNode *xor_node = new AstNode(AST_BIT_XOR, $2->clone(), $5);
2383                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, xor_node);
2384                 SET_AST_NODE_LOC(xor_node, @2, @5);
2385                 SET_AST_NODE_LOC(node, @2, @5);
2386                 ast_stack.back()->children.push_back(node);
2387                 append_attr(node, $1);
2388         } |
2389         attr lvalue TOK_OR_ASSIGN delay expr {
2390                 AstNode *or_node = new AstNode(AST_BIT_OR, $2->clone(), $5);
2391                 SET_AST_NODE_LOC(or_node, @2, @5);
2392                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, or_node);
2393                 SET_AST_NODE_LOC(node, @2, @5);
2394                 ast_stack.back()->children.push_back(node);
2395                 append_attr(node, $1);
2396         } |
2397         attr lvalue TOK_PLUS_ASSIGN delay expr {
2398                 AstNode *add_node = new AstNode(AST_ADD, $2->clone(), $5);
2399                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, add_node);
2400                 SET_AST_NODE_LOC(node, @2, @5);
2401                 SET_AST_NODE_LOC(add_node, @2, @5);
2402                 ast_stack.back()->children.push_back(node);
2403                 append_attr(node, $1);
2404         } |
2405         attr lvalue TOK_SUB_ASSIGN delay expr {
2406                 AstNode *sub_node = new AstNode(AST_SUB, $2->clone(), $5);
2407                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, sub_node);
2408                 SET_AST_NODE_LOC(node, @2, @5);
2409                 SET_AST_NODE_LOC(sub_node, @2, @5);
2410                 ast_stack.back()->children.push_back(node);
2411                 append_attr(node, $1);
2412         } |
2413         attr lvalue TOK_AND_ASSIGN delay expr {
2414                 AstNode *and_node = new AstNode(AST_BIT_AND, $2->clone(), $5);
2415                 AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, and_node);
2416                 SET_AST_NODE_LOC(node, @2, @5);
2417                 SET_AST_NODE_LOC(and_node, @2, @5);
2418                 ast_stack.back()->children.push_back(node);
2419                 append_attr(node, $1);
2420         };
2421
2422 // this production creates the obligatory if-else shift/reduce conflict
2423 behavioral_stmt:
2424         defattr | assert | wire_decl | param_decl | localparam_decl | typedef_decl |
2425         non_opt_delay behavioral_stmt |
2426         simple_behavioral_stmt ';' |
2427         attr ';' {
2428                 free_attr($1);
2429         } |
2430         attr hierarchical_id {
2431                 AstNode *node = new AstNode(AST_TCALL);
2432                 node->str = *$2;
2433                 delete $2;
2434                 ast_stack.back()->children.push_back(node);
2435                 ast_stack.push_back(node);
2436                 append_attr(node, $1);
2437         } opt_arg_list ';'{
2438                 ast_stack.pop_back();
2439         } |
2440         attr TOK_MSG_TASKS {
2441                 AstNode *node = new AstNode(AST_TCALL);
2442                 node->str = *$2;
2443                 delete $2;
2444                 ast_stack.back()->children.push_back(node);
2445                 ast_stack.push_back(node);
2446                 append_attr(node, $1);
2447         } opt_arg_list ';'{
2448                 ast_stack.pop_back();
2449         } |
2450         attr TOK_BEGIN {
2451                 enterTypeScope();
2452         } opt_label {
2453                 AstNode *node = new AstNode(AST_BLOCK);
2454                 ast_stack.back()->children.push_back(node);
2455                 ast_stack.push_back(node);
2456                 append_attr(node, $1);
2457                 if ($4 != NULL)
2458                         node->str = *$4;
2459         } behavioral_stmt_list TOK_END opt_label {
2460                 exitTypeScope();
2461                 if ($4 != NULL && $8 != NULL && *$4 != *$8)
2462                         frontend_verilog_yyerror("Begin label (%s) and end label (%s) don't match.", $4->c_str()+1, $8->c_str()+1);
2463                 AstNode *node = ast_stack.back();
2464                 // In SystemVerilog, unnamed blocks with block item declarations
2465                 // create an implicit hierarchy scope
2466                 if (sv_mode && node->str.empty())
2467                     for (const AstNode* child : node->children)
2468                         if (child->type == AST_WIRE || child->type == AST_MEMORY || child->type == AST_PARAMETER
2469                                 || child->type == AST_LOCALPARAM || child->type == AST_TYPEDEF) {
2470                             node->str = "$unnamed_block$" + std::to_string(autoidx++);
2471                             break;
2472                         }
2473                 SET_AST_NODE_LOC(ast_stack.back(), @2, @8);
2474                 delete $4;
2475                 delete $8;
2476                 ast_stack.pop_back();
2477         } |
2478         attr TOK_FOR '(' {
2479                 AstNode *node = new AstNode(AST_FOR);
2480                 ast_stack.back()->children.push_back(node);
2481                 ast_stack.push_back(node);
2482                 append_attr(node, $1);
2483         } simple_behavioral_stmt ';' expr {
2484                 ast_stack.back()->children.push_back($7);
2485         } ';' simple_behavioral_stmt ')' {
2486                 AstNode *block = new AstNode(AST_BLOCK);
2487                 block->str = "$for_loop$" + std::to_string(autoidx++);
2488                 ast_stack.back()->children.push_back(block);
2489                 ast_stack.push_back(block);
2490         } behavioral_stmt {
2491                 SET_AST_NODE_LOC(ast_stack.back(), @13, @13);
2492                 ast_stack.pop_back();
2493                 SET_AST_NODE_LOC(ast_stack.back(), @2, @13);
2494                 ast_stack.pop_back();
2495         } |
2496         attr TOK_WHILE '(' expr ')' {
2497                 AstNode *node = new AstNode(AST_WHILE);
2498                 ast_stack.back()->children.push_back(node);
2499                 ast_stack.push_back(node);
2500                 append_attr(node, $1);
2501                 AstNode *block = new AstNode(AST_BLOCK);
2502                 ast_stack.back()->children.push_back($4);
2503                 ast_stack.back()->children.push_back(block);
2504                 ast_stack.push_back(block);
2505         } behavioral_stmt {
2506                 SET_AST_NODE_LOC(ast_stack.back(), @7, @7);
2507                 ast_stack.pop_back();
2508                 ast_stack.pop_back();
2509         } |
2510         attr TOK_REPEAT '(' expr ')' {
2511                 AstNode *node = new AstNode(AST_REPEAT);
2512                 ast_stack.back()->children.push_back(node);
2513                 ast_stack.push_back(node);
2514                 append_attr(node, $1);
2515                 AstNode *block = new AstNode(AST_BLOCK);
2516                 ast_stack.back()->children.push_back($4);
2517                 ast_stack.back()->children.push_back(block);
2518                 ast_stack.push_back(block);
2519         } behavioral_stmt {
2520                 SET_AST_NODE_LOC(ast_stack.back(), @7, @7);
2521                 ast_stack.pop_back();
2522                 ast_stack.pop_back();
2523         } |
2524         attr TOK_IF '(' expr ')' {
2525                 AstNode *node = new AstNode(AST_CASE);
2526                 AstNode *block = new AstNode(AST_BLOCK);
2527                 AstNode *cond = new AstNode(AST_COND, AstNode::mkconst_int(1, false, 1), block);
2528                 SET_AST_NODE_LOC(cond, @4, @4);
2529                 ast_stack.back()->children.push_back(node);
2530                 node->children.push_back(new AstNode(AST_REDUCE_BOOL, $4));
2531                 node->children.push_back(cond);
2532                 ast_stack.push_back(node);
2533                 ast_stack.push_back(block);
2534                 append_attr(node, $1);
2535         } behavioral_stmt {
2536                 SET_AST_NODE_LOC(ast_stack.back(), @7, @7);
2537         } optional_else {
2538                 ast_stack.pop_back();
2539                 SET_AST_NODE_LOC(ast_stack.back(), @2, @9);
2540                 ast_stack.pop_back();
2541         } |
2542         case_attr case_type '(' expr ')' {
2543                 AstNode *node = new AstNode(AST_CASE, $4);
2544                 ast_stack.back()->children.push_back(node);
2545                 ast_stack.push_back(node);
2546                 append_attr(node, $1);
2547                 SET_AST_NODE_LOC(ast_stack.back(), @4, @4);
2548         } opt_synopsys_attr case_body TOK_ENDCASE {
2549                 SET_AST_NODE_LOC(ast_stack.back(), @2, @9);
2550                 case_type_stack.pop_back();
2551                 ast_stack.pop_back();
2552         };
2553
2554 unique_case_attr:
2555         %empty {
2556                 $$ = false;
2557         } |
2558         TOK_PRIORITY case_attr {
2559                 $$ = $2;
2560         } |
2561         TOK_UNIQUE case_attr {
2562                 $$ = true;
2563         };
2564
2565 case_attr:
2566         attr unique_case_attr {
2567                 if ($2) (*$1)[ID::parallel_case] = AstNode::mkconst_int(1, false);
2568                 $$ = $1;
2569         };
2570
2571 case_type:
2572         TOK_CASE {
2573                 case_type_stack.push_back(0);
2574         } |
2575         TOK_CASEX {
2576                 case_type_stack.push_back('x');
2577         } |
2578         TOK_CASEZ {
2579                 case_type_stack.push_back('z');
2580         };
2581
2582 opt_synopsys_attr:
2583         opt_synopsys_attr TOK_SYNOPSYS_FULL_CASE {
2584                 if (ast_stack.back()->attributes.count(ID::full_case) == 0)
2585                         ast_stack.back()->attributes[ID::full_case] = AstNode::mkconst_int(1, false);
2586         } |
2587         opt_synopsys_attr TOK_SYNOPSYS_PARALLEL_CASE {
2588                 if (ast_stack.back()->attributes.count(ID::parallel_case) == 0)
2589                         ast_stack.back()->attributes[ID::parallel_case] = AstNode::mkconst_int(1, false);
2590         } |
2591         %empty;
2592
2593 behavioral_stmt_list:
2594         behavioral_stmt_list behavioral_stmt |
2595         %empty;
2596
2597 optional_else:
2598         TOK_ELSE {
2599                 AstNode *block = new AstNode(AST_BLOCK);
2600                 AstNode *cond = new AstNode(AST_COND, new AstNode(AST_DEFAULT), block);
2601                 SET_AST_NODE_LOC(cond, @1, @1);
2602
2603                 ast_stack.pop_back();
2604                 ast_stack.back()->children.push_back(cond);
2605                 ast_stack.push_back(block);
2606         } behavioral_stmt {
2607                 SET_AST_NODE_LOC(ast_stack.back(), @3, @3);
2608         } |
2609         %empty %prec FAKE_THEN;
2610
2611 case_body:
2612         case_body case_item |
2613         %empty;
2614
2615 case_item:
2616         {
2617                 AstNode *node = new AstNode(
2618                                 case_type_stack.size() && case_type_stack.back() == 'x' ? AST_CONDX :
2619                                 case_type_stack.size() && case_type_stack.back() == 'z' ? AST_CONDZ : AST_COND);
2620                 ast_stack.back()->children.push_back(node);
2621                 ast_stack.push_back(node);
2622         } case_select {
2623                 AstNode *block = new AstNode(AST_BLOCK);
2624                 ast_stack.back()->children.push_back(block);
2625                 ast_stack.push_back(block);
2626                 case_type_stack.push_back(0);
2627         } behavioral_stmt {
2628                 case_type_stack.pop_back();
2629                 SET_AST_NODE_LOC(ast_stack.back(), @4, @4);
2630                 ast_stack.pop_back();
2631                 ast_stack.pop_back();
2632         };
2633
2634 gen_case_body:
2635         gen_case_body gen_case_item |
2636         %empty;
2637
2638 gen_case_item:
2639         {
2640                 AstNode *node = new AstNode(
2641                                 case_type_stack.size() && case_type_stack.back() == 'x' ? AST_CONDX :
2642                                 case_type_stack.size() && case_type_stack.back() == 'z' ? AST_CONDZ : AST_COND);
2643                 ast_stack.back()->children.push_back(node);
2644                 ast_stack.push_back(node);
2645         } case_select {
2646                 case_type_stack.push_back(0);
2647                 SET_AST_NODE_LOC(ast_stack.back(), @2, @2);
2648         } gen_stmt_block {
2649                 case_type_stack.pop_back();
2650                 ast_stack.pop_back();
2651         };
2652
2653 case_select:
2654         case_expr_list ':' |
2655         TOK_DEFAULT;
2656
2657 case_expr_list:
2658         TOK_DEFAULT {
2659                 AstNode *node = new AstNode(AST_DEFAULT);
2660                 SET_AST_NODE_LOC(node, @1, @1);
2661                 ast_stack.back()->children.push_back(node);
2662         } |
2663         TOK_SVA_LABEL {
2664                 AstNode *node = new AstNode(AST_IDENTIFIER);
2665                 SET_AST_NODE_LOC(node, @1, @1);
2666                 ast_stack.back()->children.push_back(node);
2667                 ast_stack.back()->children.back()->str = *$1;
2668                 delete $1;
2669         } |
2670         expr {
2671                 ast_stack.back()->children.push_back($1);
2672         } |
2673         case_expr_list ',' expr {
2674                 ast_stack.back()->children.push_back($3);
2675         };
2676
2677 rvalue:
2678         hierarchical_id '[' expr ']' '.' rvalue {
2679                 $$ = new AstNode(AST_PREFIX, $3, $6);
2680                 $$->str = *$1;
2681                 delete $1;
2682         } |
2683         hierarchical_id range {
2684                 $$ = new AstNode(AST_IDENTIFIER, $2);
2685                 $$->str = *$1;
2686                 SET_AST_NODE_LOC($$, @1, @1);
2687                 delete $1;
2688                 if ($2 == nullptr && ($$->str == "\\$initstate" ||
2689                                 $$->str == "\\$anyconst" || $$->str == "\\$anyseq" ||
2690                                 $$->str == "\\$allconst" || $$->str == "\\$allseq"))
2691                         $$->type = AST_FCALL;
2692         } |
2693         hierarchical_id non_opt_multirange {
2694                 $$ = new AstNode(AST_IDENTIFIER, $2);
2695                 $$->str = *$1;
2696                 SET_AST_NODE_LOC($$, @1, @1);
2697                 delete $1;
2698         };
2699
2700 lvalue:
2701         rvalue {
2702                 $$ = $1;
2703         } |
2704         '{' lvalue_concat_list '}' {
2705                 $$ = $2;
2706         };
2707
2708 lvalue_concat_list:
2709         expr {
2710                 $$ = new AstNode(AST_CONCAT);
2711                 $$->children.push_back($1);
2712         } |
2713         expr ',' lvalue_concat_list {
2714                 $$ = $3;
2715                 $$->children.push_back($1);
2716         };
2717
2718 opt_arg_list:
2719         '(' arg_list optional_comma ')' |
2720         %empty;
2721
2722 arg_list:
2723         arg_list2 |
2724         %empty;
2725
2726 arg_list2:
2727         single_arg |
2728         arg_list ',' single_arg;
2729
2730 single_arg:
2731         expr {
2732                 ast_stack.back()->children.push_back($1);
2733         };
2734
2735 module_gen_body:
2736         module_gen_body gen_stmt_or_module_body_stmt |
2737         module_gen_body gen_block |
2738         %empty;
2739
2740 gen_stmt_or_module_body_stmt:
2741         gen_stmt | module_body_stmt |
2742         attr ';' {
2743                 free_attr($1);
2744         };
2745
2746 // this production creates the obligatory if-else shift/reduce conflict
2747 gen_stmt:
2748         TOK_FOR '(' {
2749                 AstNode *node = new AstNode(AST_GENFOR);
2750                 ast_stack.back()->children.push_back(node);
2751                 ast_stack.push_back(node);
2752         } simple_behavioral_stmt ';' expr {
2753                 ast_stack.back()->children.push_back($6);
2754         } ';' simple_behavioral_stmt ')' gen_stmt_block {
2755                 SET_AST_NODE_LOC(ast_stack.back(), @1, @11);
2756                 ast_stack.pop_back();
2757         } |
2758         TOK_IF '(' expr ')' {
2759                 AstNode *node = new AstNode(AST_GENIF);
2760                 ast_stack.back()->children.push_back(node);
2761                 ast_stack.push_back(node);
2762                 ast_stack.back()->children.push_back($3);
2763         } gen_stmt_block opt_gen_else {
2764                 SET_AST_NODE_LOC(ast_stack.back(), @1, @7);
2765                 ast_stack.pop_back();
2766         } |
2767         case_type '(' expr ')' {
2768                 AstNode *node = new AstNode(AST_GENCASE, $3);
2769                 ast_stack.back()->children.push_back(node);
2770                 ast_stack.push_back(node);
2771         } gen_case_body TOK_ENDCASE {
2772                 case_type_stack.pop_back();
2773                 SET_AST_NODE_LOC(ast_stack.back(), @1, @7);
2774                 ast_stack.pop_back();
2775         } |
2776         TOK_MSG_TASKS {
2777                 AstNode *node = new AstNode(AST_TECALL);
2778                 node->str = *$1;
2779                 delete $1;
2780                 ast_stack.back()->children.push_back(node);
2781                 ast_stack.push_back(node);
2782         } opt_arg_list ';'{
2783                 SET_AST_NODE_LOC(ast_stack.back(), @1, @3);
2784                 ast_stack.pop_back();
2785         };
2786
2787 gen_block:
2788         TOK_BEGIN {
2789                 enterTypeScope();
2790         } opt_label {
2791                 AstNode *node = new AstNode(AST_GENBLOCK);
2792                 node->str = $3 ? *$3 : std::string();
2793                 ast_stack.back()->children.push_back(node);
2794                 ast_stack.push_back(node);
2795         } module_gen_body TOK_END opt_label {
2796                 exitTypeScope();
2797                 if ($3 != NULL && $7 != NULL && *$3 != *$7)
2798                         frontend_verilog_yyerror("Begin label (%s) and end label (%s) don't match.", $3->c_str()+1, $7->c_str()+1);
2799                 delete $3;
2800                 delete $7;
2801                 SET_AST_NODE_LOC(ast_stack.back(), @1, @7);
2802                 ast_stack.pop_back();
2803         };
2804
2805 // result is wrapped in a genblock only if necessary
2806 gen_stmt_block:
2807         {
2808                 AstNode *node = new AstNode(AST_GENBLOCK);
2809                 ast_stack.back()->children.push_back(node);
2810                 ast_stack.push_back(node);
2811         } gen_stmt_or_module_body_stmt {
2812                 SET_AST_NODE_LOC(ast_stack.back(), @2, @2);
2813                 ast_stack.pop_back();
2814         } | gen_block;
2815
2816 opt_gen_else:
2817         TOK_ELSE gen_stmt_block | %empty %prec FAKE_THEN;
2818
2819 expr:
2820         basic_expr {
2821                 $$ = $1;
2822         } |
2823         basic_expr '?' attr expr ':' expr {
2824                 $$ = new AstNode(AST_TERNARY);
2825                 $$->children.push_back($1);
2826                 $$->children.push_back($4);
2827                 $$->children.push_back($6);
2828                 SET_AST_NODE_LOC($$, @1, @$);
2829                 append_attr($$, $3);
2830         };
2831
2832 basic_expr:
2833         rvalue {
2834                 $$ = $1;
2835         } |
2836         '(' expr ')' integral_number {
2837                 if ($4->compare(0, 1, "'") != 0)
2838                         frontend_verilog_yyerror("Cast operation must be applied on sized constants e.g. (<expr>)<constval> , while %s is not a sized constant.", $4->c_str());
2839                 AstNode *bits = $2;
2840                 AstNode *val = const2ast(*$4, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
2841                 if (val == NULL)
2842                         log_error("Value conversion failed: `%s'\n", $4->c_str());
2843                 $$ = new AstNode(AST_TO_BITS, bits, val);
2844                 delete $4;
2845         } |
2846         hierarchical_id integral_number {
2847                 if ($2->compare(0, 1, "'") != 0)
2848                         frontend_verilog_yyerror("Cast operation must be applied on sized constants, e.g. <ID>\'d0, while %s is not a sized constant.", $2->c_str());
2849                 AstNode *bits = new AstNode(AST_IDENTIFIER);
2850                 bits->str = *$1;
2851                 SET_AST_NODE_LOC(bits, @1, @1);
2852                 AstNode *val = const2ast(*$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
2853                 SET_AST_NODE_LOC(val, @2, @2);
2854                 if (val == NULL)
2855                         log_error("Value conversion failed: `%s'\n", $2->c_str());
2856                 $$ = new AstNode(AST_TO_BITS, bits, val);
2857                 delete $1;
2858                 delete $2;
2859         } |
2860         integral_number {
2861                 $$ = const2ast(*$1, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
2862                 SET_AST_NODE_LOC($$, @1, @1);
2863                 if ($$ == NULL)
2864                         log_error("Value conversion failed: `%s'\n", $1->c_str());
2865                 delete $1;
2866         } |
2867         TOK_REALVAL {
2868                 $$ = new AstNode(AST_REALVALUE);
2869                 char *p = (char*)malloc(GetSize(*$1) + 1), *q;
2870                 for (int i = 0, j = 0; j < GetSize(*$1); j++)
2871                         if ((*$1)[j] != '_')
2872                                 p[i++] = (*$1)[j], p[i] = 0;
2873                 $$->realvalue = strtod(p, &q);
2874                 SET_AST_NODE_LOC($$, @1, @1);
2875                 log_assert(*q == 0);
2876                 delete $1;
2877                 free(p);
2878         } |
2879         TOK_STRING {
2880                 $$ = AstNode::mkconst_str(*$1);
2881                 SET_AST_NODE_LOC($$, @1, @1);
2882                 delete $1;
2883         } |
2884         hierarchical_id attr {
2885                 AstNode *node = new AstNode(AST_FCALL);
2886                 node->str = *$1;
2887                 delete $1;
2888                 ast_stack.push_back(node);
2889                 SET_AST_NODE_LOC(node, @1, @1);
2890                 append_attr(node, $2);
2891         } '(' arg_list optional_comma ')' {
2892                 $$ = ast_stack.back();
2893                 ast_stack.pop_back();
2894         } |
2895         TOK_TO_SIGNED attr '(' expr ')' {
2896                 $$ = new AstNode(AST_TO_SIGNED, $4);
2897                 append_attr($$, $2);
2898         } |
2899         TOK_TO_UNSIGNED attr '(' expr ')' {
2900                 $$ = new AstNode(AST_TO_UNSIGNED, $4);
2901                 append_attr($$, $2);
2902         } |
2903         '(' expr ')' {
2904                 $$ = $2;
2905         } |
2906         '(' expr ':' expr ':' expr ')' {
2907                 delete $2;
2908                 $$ = $4;
2909                 delete $6;
2910         } |
2911         '{' concat_list '}' {
2912                 $$ = $2;
2913         } |
2914         '{' expr '{' concat_list '}' '}' {
2915                 $$ = new AstNode(AST_REPLICATE, $2, $4);
2916         } |
2917         '~' attr basic_expr %prec UNARY_OPS {
2918                 $$ = new AstNode(AST_BIT_NOT, $3);
2919                 SET_AST_NODE_LOC($$, @1, @3);
2920                 append_attr($$, $2);
2921         } |
2922         basic_expr '&' attr basic_expr {
2923                 $$ = new AstNode(AST_BIT_AND, $1, $4);
2924                 SET_AST_NODE_LOC($$, @1, @4);
2925                 append_attr($$, $3);
2926         } |
2927         basic_expr OP_NAND attr basic_expr {
2928                 $$ = new AstNode(AST_BIT_NOT, new AstNode(AST_BIT_AND, $1, $4));
2929                 SET_AST_NODE_LOC($$, @1, @4);
2930                 append_attr($$, $3);
2931         } |
2932         basic_expr '|' attr basic_expr {
2933                 $$ = new AstNode(AST_BIT_OR, $1, $4);
2934                 SET_AST_NODE_LOC($$, @1, @4);
2935                 append_attr($$, $3);
2936         } |
2937         basic_expr OP_NOR attr basic_expr {
2938                 $$ = new AstNode(AST_BIT_NOT, new AstNode(AST_BIT_OR, $1, $4));
2939                 SET_AST_NODE_LOC($$, @1, @4);
2940                 append_attr($$, $3);
2941         } |
2942         basic_expr '^' attr basic_expr {
2943                 $$ = new AstNode(AST_BIT_XOR, $1, $4);
2944                 SET_AST_NODE_LOC($$, @1, @4);
2945                 append_attr($$, $3);
2946         } |
2947         basic_expr OP_XNOR attr basic_expr {
2948                 $$ = new AstNode(AST_BIT_XNOR, $1, $4);
2949                 SET_AST_NODE_LOC($$, @1, @4);
2950                 append_attr($$, $3);
2951         } |
2952         '&' attr basic_expr %prec UNARY_OPS {
2953                 $$ = new AstNode(AST_REDUCE_AND, $3);
2954                 SET_AST_NODE_LOC($$, @1, @3);
2955                 append_attr($$, $2);
2956         } |
2957         OP_NAND attr basic_expr %prec UNARY_OPS {
2958                 $$ = new AstNode(AST_REDUCE_AND, $3);
2959                 SET_AST_NODE_LOC($$, @1, @3);
2960                 append_attr($$, $2);
2961                 $$ = new AstNode(AST_LOGIC_NOT, $$);
2962         } |
2963         '|' attr basic_expr %prec UNARY_OPS {
2964                 $$ = new AstNode(AST_REDUCE_OR, $3);
2965                 SET_AST_NODE_LOC($$, @1, @3);
2966                 append_attr($$, $2);
2967         } |
2968         OP_NOR attr basic_expr %prec UNARY_OPS {
2969                 $$ = new AstNode(AST_REDUCE_OR, $3);
2970                 SET_AST_NODE_LOC($$, @1, @3);
2971                 append_attr($$, $2);
2972                 $$ = new AstNode(AST_LOGIC_NOT, $$);
2973                 SET_AST_NODE_LOC($$, @1, @3);
2974         } |
2975         '^' attr basic_expr %prec UNARY_OPS {
2976                 $$ = new AstNode(AST_REDUCE_XOR, $3);
2977                 SET_AST_NODE_LOC($$, @1, @3);
2978                 append_attr($$, $2);
2979         } |
2980         OP_XNOR attr basic_expr %prec UNARY_OPS {
2981                 $$ = new AstNode(AST_REDUCE_XNOR, $3);
2982                 SET_AST_NODE_LOC($$, @1, @3);
2983                 append_attr($$, $2);
2984         } |
2985         basic_expr OP_SHL attr basic_expr {
2986                 $$ = new AstNode(AST_SHIFT_LEFT, $1, new AstNode(AST_TO_UNSIGNED, $4));
2987                 SET_AST_NODE_LOC($$, @1, @4);
2988                 append_attr($$, $3);
2989         } |
2990         basic_expr OP_SHR attr basic_expr {
2991                 $$ = new AstNode(AST_SHIFT_RIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4));
2992                 SET_AST_NODE_LOC($$, @1, @4);
2993                 append_attr($$, $3);
2994         } |
2995         basic_expr OP_SSHL attr basic_expr {
2996                 $$ = new AstNode(AST_SHIFT_SLEFT, $1, new AstNode(AST_TO_UNSIGNED, $4));
2997                 SET_AST_NODE_LOC($$, @1, @4);
2998                 append_attr($$, $3);
2999         } |
3000         basic_expr OP_SSHR attr basic_expr {
3001                 $$ = new AstNode(AST_SHIFT_SRIGHT, $1, new AstNode(AST_TO_UNSIGNED, $4));
3002                 SET_AST_NODE_LOC($$, @1, @4);
3003                 append_attr($$, $3);
3004         } |
3005         basic_expr '<' attr basic_expr {
3006                 $$ = new AstNode(AST_LT, $1, $4);
3007                 SET_AST_NODE_LOC($$, @1, @4);
3008                 append_attr($$, $3);
3009         } |
3010         basic_expr OP_LE attr basic_expr {
3011                 $$ = new AstNode(AST_LE, $1, $4);
3012                 SET_AST_NODE_LOC($$, @1, @4);
3013                 append_attr($$, $3);
3014         } |
3015         basic_expr OP_EQ attr basic_expr {
3016                 $$ = new AstNode(AST_EQ, $1, $4);
3017                 SET_AST_NODE_LOC($$, @1, @4);
3018                 append_attr($$, $3);
3019         } |
3020         basic_expr OP_NE attr basic_expr {
3021                 $$ = new AstNode(AST_NE, $1, $4);
3022                 SET_AST_NODE_LOC($$, @1, @4);
3023                 append_attr($$, $3);
3024         } |
3025         basic_expr OP_EQX attr basic_expr {
3026                 $$ = new AstNode(AST_EQX, $1, $4);
3027                 SET_AST_NODE_LOC($$, @1, @4);
3028                 append_attr($$, $3);
3029         } |
3030         basic_expr OP_NEX attr basic_expr {
3031                 $$ = new AstNode(AST_NEX, $1, $4);
3032                 SET_AST_NODE_LOC($$, @1, @4);
3033                 append_attr($$, $3);
3034         } |
3035         basic_expr OP_GE attr basic_expr {
3036                 $$ = new AstNode(AST_GE, $1, $4);
3037                 SET_AST_NODE_LOC($$, @1, @4);
3038                 append_attr($$, $3);
3039         } |
3040         basic_expr '>' attr basic_expr {
3041                 $$ = new AstNode(AST_GT, $1, $4);
3042                 SET_AST_NODE_LOC($$, @1, @4);
3043                 append_attr($$, $3);
3044         } |
3045         basic_expr '+' attr basic_expr {
3046                 $$ = new AstNode(AST_ADD, $1, $4);
3047                 SET_AST_NODE_LOC($$, @1, @4);
3048                 append_attr($$, $3);
3049         } |
3050         basic_expr '-' attr basic_expr {
3051                 $$ = new AstNode(AST_SUB, $1, $4);
3052                 SET_AST_NODE_LOC($$, @1, @4);
3053                 append_attr($$, $3);
3054         } |
3055         basic_expr '*' attr basic_expr {
3056                 $$ = new AstNode(AST_MUL, $1, $4);
3057                 SET_AST_NODE_LOC($$, @1, @4);
3058                 append_attr($$, $3);
3059         } |
3060         basic_expr '/' attr basic_expr {
3061                 $$ = new AstNode(AST_DIV, $1, $4);
3062                 SET_AST_NODE_LOC($$, @1, @4);
3063                 append_attr($$, $3);
3064         } |
3065         basic_expr '%' attr basic_expr {
3066                 $$ = new AstNode(AST_MOD, $1, $4);
3067                 SET_AST_NODE_LOC($$, @1, @4);
3068                 append_attr($$, $3);
3069         } |
3070         basic_expr OP_POW attr basic_expr {
3071                 $$ = new AstNode(AST_POW, $1, $4);
3072                 SET_AST_NODE_LOC($$, @1, @4);
3073                 append_attr($$, $3);
3074         } |
3075         '+' attr basic_expr %prec UNARY_OPS {
3076                 $$ = new AstNode(AST_POS, $3);
3077                 SET_AST_NODE_LOC($$, @1, @3);
3078                 append_attr($$, $2);
3079         } |
3080         '-' attr basic_expr %prec UNARY_OPS {
3081                 $$ = new AstNode(AST_NEG, $3);
3082                 SET_AST_NODE_LOC($$, @1, @3);
3083                 append_attr($$, $2);
3084         } |
3085         basic_expr OP_LAND attr basic_expr {
3086                 $$ = new AstNode(AST_LOGIC_AND, $1, $4);
3087                 SET_AST_NODE_LOC($$, @1, @4);
3088                 append_attr($$, $3);
3089         } |
3090         basic_expr OP_LOR attr basic_expr {
3091                 $$ = new AstNode(AST_LOGIC_OR, $1, $4);
3092                 SET_AST_NODE_LOC($$, @1, @4);
3093                 append_attr($$, $3);
3094         } |
3095         '!' attr basic_expr %prec UNARY_OPS {
3096                 $$ = new AstNode(AST_LOGIC_NOT, $3);
3097                 SET_AST_NODE_LOC($$, @1, @3);
3098                 append_attr($$, $2);
3099         } |
3100         TOK_SIGNED OP_CAST '(' expr ')' {
3101                 if (!sv_mode)
3102                         frontend_verilog_yyerror("Static cast is only supported in SystemVerilog mode.");
3103                 $$ = new AstNode(AST_TO_SIGNED, $4);
3104                 SET_AST_NODE_LOC($$, @1, @4);
3105         } |
3106         TOK_UNSIGNED OP_CAST '(' expr ')' {
3107                 if (!sv_mode)
3108                         frontend_verilog_yyerror("Static cast is only supported in SystemVerilog mode.");
3109                 $$ = new AstNode(AST_TO_UNSIGNED, $4);
3110                 SET_AST_NODE_LOC($$, @1, @4);
3111         } |
3112         basic_expr OP_CAST '(' expr ')' {
3113                 if (!sv_mode)
3114                         frontend_verilog_yyerror("Static cast is only supported in SystemVerilog mode.");
3115                 $$ = new AstNode(AST_CAST_SIZE, $1, $4);
3116                 SET_AST_NODE_LOC($$, @1, @4);
3117         };
3118
3119 concat_list:
3120         expr {
3121                 $$ = new AstNode(AST_CONCAT, $1);
3122         } |
3123         expr ',' concat_list {
3124                 $$ = $3;
3125                 $$->children.push_back($1);
3126         };
3127
3128 integral_number:
3129         TOK_CONSTVAL { $$ = $1; } |
3130         TOK_UNBASED_UNSIZED_CONSTVAL { $$ = $1; } |
3131         TOK_BASE TOK_BASED_CONSTVAL {
3132                 $1->append(*$2);
3133                 $$ = $1;
3134                 delete $2;
3135         } |
3136         TOK_CONSTVAL TOK_BASE TOK_BASED_CONSTVAL {
3137                 $1->append(*$2).append(*$3);
3138                 $$ = $1;
3139                 delete $2;
3140                 delete $3;
3141         };