1 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
3 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
5 (pe_directive_secrel) [TE_PE]: New function.
6 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
8 [TE_PE]: Handle secrel32.
9 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
11 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
12 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
13 (md_section_align): Only round section sizes here for AOUT
15 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
16 (tc_pe_dwarf2_emit_offset): New function.
17 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
18 (cons_fix_new_arm): Handle O_secrel.
19 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
20 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
21 of OBJ_ELF only block.
22 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
23 tc_pe_dwarf2_emit_offset.
25 2006-08-04 Richard Sandiford <richard@codesourcery.com>
27 * config/tc-sh.c (apply_full_field_fix): New function.
28 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
29 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
30 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
31 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
33 2006-08-03 Nick Clifton <nickc@redhat.com>
36 * config.in: Regenerate.
38 2006-08-03 Joseph Myers <joseph@codesourcery.com>
40 * config/tc-arm.c (parse_operands): Handle invalid register name
43 2006-08-03 Joseph Myers <joseph@codesourcery.com>
45 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
46 (parse_operands): Handle it.
47 (insns): Use it for tmcr and tmrc.
49 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
52 * config/tc-i386.c (md_parse_option): Treat any target starting
53 with elf64_x86_64 as a viable target for the -64 switch.
54 (i386_target_format): For 64-bit ELF flavoured output use
56 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
58 2006-08-02 Nick Clifton <nickc@redhat.com>
61 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
63 * configure.in: Run BFD_BINARY_FOPEN.
64 * configure: Regenerate.
65 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
68 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
70 * config/tc-i386.c (md_assemble): Don't update
73 2006-08-01 Thiemo Seufer <ths@mips.com>
75 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
77 2006-08-01 Thiemo Seufer <ths@mips.com>
79 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
80 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
81 BFD_RELOC_32 and BFD_RELOC_16.
82 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
83 md_convert_frag, md_obj_end): Fix comment formatting.
85 2006-07-31 Thiemo Seufer <ths@mips.com>
87 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
88 handling for BFD_RELOC_MIPS16_JMP.
90 2006-07-24 Andreas Schwab <schwab@suse.de>
93 * read.c (read_a_source_file): Ignore unknown text after line
94 comment character. Fix misleading comment.
96 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
98 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
99 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
100 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
101 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
102 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
103 doc/c-z80.texi, doc/internals.texi: Fix some typos.
105 2006-07-21 Nick Clifton <nickc@redhat.com>
107 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
110 2006-07-20 Thiemo Seufer <ths@mips.com>
111 Nigel Stephens <nigel@mips.com>
113 * config/tc-mips.c (md_parse_option): Don't infer optimisation
114 options from debug options.
116 2006-07-20 Thiemo Seufer <ths@mips.com>
118 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
119 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
121 2006-07-19 Paul Brook <paul@codesourcery.com>
123 * config/tc-arm.c (insns): Fix rbit Arm opcode.
125 2006-07-18 Paul Brook <paul@codesourcery.com>
127 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
128 (md_convert_frag): Use correct reloc for add_pc. Use
129 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
130 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
131 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
133 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
135 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
136 when file and line unknown.
138 2006-07-17 Thiemo Seufer <ths@mips.com>
140 * read.c (s_struct): Use IS_ELF.
141 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
142 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
143 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
144 s_mips_mask): Likewise.
146 2006-07-16 Thiemo Seufer <ths@mips.com>
147 David Ung <davidu@mips.com>
149 * read.c (s_struct): Handle ELF section changing.
150 * config/tc-mips.c (s_align): Leave enabling auto-align to the
152 (s_change_sec): Try section changing only if we output ELF.
154 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
156 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
158 (smallest_imm_type): Remove Cpu086.
159 (i386_target_format): Likewise.
161 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
164 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
165 Michael Meissner <michael.meissner@amd.com>
167 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
168 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
169 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
171 (i386_align_code): Ditto.
172 (md_assemble_code): Add support for insertq/extrq instructions,
173 swapping as needed for intel syntax.
174 (swap_imm_operands): New function to swap immediate operands.
175 (swap_operands): Deal with 4 operand instructions.
176 (build_modrm_byte): Add support for insertq instruction.
178 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
180 * config/tc-i386.h (Size64): Fix a typo in comment.
182 2006-07-12 Nick Clifton <nickc@redhat.com>
184 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
185 fixup_segment() to repeat a range check on a value that has
186 already been checked here.
188 2006-07-07 James E Wilson <wilson@specifix.com>
190 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
192 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
193 Nick Clifton <nickc@redhat.com>
196 * doc/as.texi: Fix spelling typo: branchs => branches.
197 * doc/c-m68hc11.texi: Likewise.
198 * config/tc-m68hc11.c: Likewise.
199 Support old spelling of command line switch for backwards
202 2006-07-04 Thiemo Seufer <ths@mips.com>
203 David Ung <davidu@mips.com>
205 * config/tc-mips.c (s_is_linkonce): New function.
206 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
207 weak, external, and linkonce symbols.
208 (pic_need_relax): Use s_is_linkonce.
210 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
212 * doc/as.texinfo (Org): Remove space.
213 (P2align): Add "@var{abs-expr},".
215 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
217 * config/tc-i386.c (cpu_arch_tune_set): New.
218 (cpu_arch_isa): Likewise.
219 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
220 nops with short or long nop sequences based on -march=/.arch
222 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
223 set cpu_arch_tune and cpu_arch_tune_flags.
224 (md_parse_option): For -march=, set cpu_arch_isa and set
225 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
226 0. Set cpu_arch_tune_set to 1 for -mtune=.
227 (i386_target_format): Don't set cpu_arch_tune.
229 2006-06-23 Nigel Stephens <nigel@mips.com>
231 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
232 generated .sbss.* and .gnu.linkonce.sb.*.
234 2006-06-23 Thiemo Seufer <ths@mips.com>
235 David Ung <davidu@mips.com>
237 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
239 * config/tc-mips.c (label_list): Define per-segment label_list.
240 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
241 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
242 mips_from_file_after_relocs, mips_define_label): Use per-segment
245 2006-06-22 Thiemo Seufer <ths@mips.com>
247 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
248 (append_insn): Use it.
249 (md_apply_fix): Whitespace formatting.
250 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
251 mips16_extended_frag): Remove register specifier.
252 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
255 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
257 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
258 a directive saving VFP registers for ARMv6 or later.
259 (s_arm_unwind_save): Add parameter arch_v6 and call
260 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
262 (md_pseudo_table): Add entry for new "vsave" directive.
263 * doc/c-arm.texi: Correct error in example for "save"
264 directive (fstmdf -> fstmdx). Also document "vsave" directive.
266 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
267 Anatoly Sokolov <aesok@post.ru>
269 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
270 and atmega644p devices. Rename atmega164/atmega324 devices to
271 atmega164p/atmega324p.
272 * doc/c-avr.texi: Document new mcu and arch options.
274 2006-06-17 Nick Clifton <nickc@redhat.com>
276 * config/tc-arm.c (enum parse_operand_result): Move outside of
277 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
279 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
281 * config/tc-i386.h (processor_type): New.
282 (arch_entry): Add type.
284 * config/tc-i386.c (cpu_arch_tune): New.
285 (cpu_arch_tune_flags): Likewise.
286 (cpu_arch_isa_flags): Likewise.
288 (set_cpu_arch): Also update cpu_arch_isa_flags.
289 (md_assemble): Update cpu_arch_isa_flags.
291 (OPTION_MTUNE): Likewise.
292 (md_longopts): Add -march= and -mtune=.
293 (md_parse_option): Support -march= and -mtune=.
294 (md_show_usage): Add -march=CPU/-mtune=CPU.
295 (i386_target_format): Also update cpu_arch_isa_flags,
296 cpu_arch_tune and cpu_arch_tune_flags.
298 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
300 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
302 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
304 * config/tc-arm.c (enum parse_operand_result): New.
305 (struct group_reloc_table_entry): New.
306 (enum group_reloc_type): New.
307 (group_reloc_table): New array.
308 (find_group_reloc_table_entry): New function.
309 (parse_shifter_operand_group_reloc): New function.
310 (parse_address_main): New function, incorporating code
311 from the old parse_address function. To be used via...
312 (parse_address): wrapper for parse_address_main; and
313 (parse_address_group_reloc): new function, likewise.
314 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
315 OP_ADDRGLDRS, OP_ADDRGLDC.
316 (parse_operands): Support for these new operand codes.
317 New macro po_misc_or_fail_no_backtrack.
318 (encode_arm_cp_address): Preserve group relocations.
319 (insns): Modify to use the above operand codes where group
320 relocations are permitted.
321 (md_apply_fix): Handle the group relocations
322 ALU_PC_G0_NC through LDC_SB_G2.
323 (tc_gen_reloc): Likewise.
324 (arm_force_relocation): Leave group relocations for the linker.
325 (arm_fix_adjustable): Likewise.
327 2006-06-15 Julian Brown <julian@codesourcery.com>
329 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
330 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
333 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
335 * config/tc-i386.c (process_suffix): Don't add rex64 for
338 2006-06-09 Thiemo Seufer <ths@mips.com>
340 * config/tc-mips.c (mips_ip): Maintain argument count.
342 2006-06-09 Alan Modra <amodra@bigpond.net.au>
344 * config/tc-iq2000.c: Include sb.h.
346 2006-06-08 Nigel Stephens <nigel@mips.com>
348 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
349 aliases for better compatibility with SGI tools.
351 2006-06-08 Alan Modra <amodra@bigpond.net.au>
353 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
354 * Makefile.am (GASLIBS): Expand @BFDLIB@.
356 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
357 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
358 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
360 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
361 * Makefile.in: Regenerate.
362 * doc/Makefile.in: Regenerate.
363 * configure: Regenerate.
365 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
367 * po/Make-in (pdf, ps): New dummy targets.
369 2006-06-07 Julian Brown <julian@codesourcery.com>
371 * config/tc-arm.c (stdarg.h): include.
372 (arm_it): Add uncond_value field. Add isvec and issingle to operand
374 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
375 REG_TYPE_NSDQ (single, double or quad vector reg).
376 (reg_expected_msgs): Update.
377 (BAD_FPU): Add macro for unsupported FPU instruction error.
378 (parse_neon_type): Support 'd' as an alias for .f64.
379 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
381 (parse_vfp_reg_list): Don't update first arg on error.
382 (parse_neon_mov): Support extra syntax for VFP moves.
383 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
384 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
385 (parse_operands): Support isvec, issingle operands fields, new parse
387 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
389 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
390 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
391 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
392 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
394 (neon_shape): Redefine in terms of above.
395 (neon_shape_class): New enumeration, table of shape classes.
396 (neon_shape_el): New enumeration. One element of a shape.
397 (neon_shape_el_size): Register widths of above, where appropriate.
398 (neon_shape_info): New struct. Info for shape table.
399 (neon_shape_tab): New array.
400 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
401 (neon_check_shape): Rewrite as...
402 (neon_select_shape): New function to classify instruction shapes,
403 driven by new table neon_shape_tab array.
404 (neon_quad): New function. Return 1 if shape should set Q flag in
405 instructions (or equivalent), 0 otherwise.
406 (type_chk_of_el_type): Support F64.
407 (el_type_of_type_chk): Likewise.
408 (neon_check_type): Add support for VFP type checking (VFP data
409 elements fill their containing registers).
410 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
411 in thumb mode for VFP instructions.
412 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
413 and encode the current instruction as if it were that opcode.
414 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
415 arguments, call function in PFN.
416 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
417 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
418 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
419 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
420 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
421 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
422 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
423 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
424 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
425 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
426 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
427 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
428 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
429 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
430 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
432 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
433 between VFP and Neon turns out to belong to Neon. Perform
434 architecture check and fill in condition field if appropriate.
435 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
436 (do_neon_cvt): Add support for VFP variants of instructions.
437 (neon_cvt_flavour): Extend to cover VFP conversions.
438 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
440 (do_neon_ldr_str): Handle single-precision VFP load/store.
441 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
442 NS_NULL not NS_IGNORE.
443 (opcode_tag): Add OT_csuffixF for operands which either take a
444 conditional suffix, or have 0xF in the condition field.
445 (md_assemble): Add support for OT_csuffixF.
446 (NCE): Replace macro with...
447 (NCE_tag, NCE, NCEF): New macros.
448 (nCE): Replace macro with...
449 (nCE_tag, nCE, nCEF): New macros.
450 (insns): Add support for VFP insns or VFP versions of insns msr,
451 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
452 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
453 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
454 VFP/Neon insns together.
456 2006-06-07 Alan Modra <amodra@bigpond.net.au>
457 Ladislav Michl <ladis@linux-mips.org>
459 * app.c: Don't include headers already included by as.h.
461 * atof-generic.c: Likewise.
463 * dwarf2dbg.c: Likewise.
465 * input-file.c: Likewise.
466 * input-scrub.c: Likewise.
468 * output-file.c: Likewise.
471 * config/bfin-lex.l: Likewise.
472 * config/obj-coff.h: Likewise.
473 * config/obj-elf.h: Likewise.
474 * config/obj-som.h: Likewise.
475 * config/tc-arc.c: Likewise.
476 * config/tc-arm.c: Likewise.
477 * config/tc-avr.c: Likewise.
478 * config/tc-bfin.c: Likewise.
479 * config/tc-cris.c: Likewise.
480 * config/tc-d10v.c: Likewise.
481 * config/tc-d30v.c: Likewise.
482 * config/tc-dlx.h: Likewise.
483 * config/tc-fr30.c: Likewise.
484 * config/tc-frv.c: Likewise.
485 * config/tc-h8300.c: Likewise.
486 * config/tc-hppa.c: Likewise.
487 * config/tc-i370.c: Likewise.
488 * config/tc-i860.c: Likewise.
489 * config/tc-i960.c: Likewise.
490 * config/tc-ip2k.c: Likewise.
491 * config/tc-iq2000.c: Likewise.
492 * config/tc-m32c.c: Likewise.
493 * config/tc-m32r.c: Likewise.
494 * config/tc-maxq.c: Likewise.
495 * config/tc-mcore.c: Likewise.
496 * config/tc-mips.c: Likewise.
497 * config/tc-mmix.c: Likewise.
498 * config/tc-mn10200.c: Likewise.
499 * config/tc-mn10300.c: Likewise.
500 * config/tc-msp430.c: Likewise.
501 * config/tc-mt.c: Likewise.
502 * config/tc-ns32k.c: Likewise.
503 * config/tc-openrisc.c: Likewise.
504 * config/tc-ppc.c: Likewise.
505 * config/tc-s390.c: Likewise.
506 * config/tc-sh.c: Likewise.
507 * config/tc-sh64.c: Likewise.
508 * config/tc-sparc.c: Likewise.
509 * config/tc-tic30.c: Likewise.
510 * config/tc-tic4x.c: Likewise.
511 * config/tc-tic54x.c: Likewise.
512 * config/tc-v850.c: Likewise.
513 * config/tc-vax.c: Likewise.
514 * config/tc-xc16x.c: Likewise.
515 * config/tc-xstormy16.c: Likewise.
516 * config/tc-xtensa.c: Likewise.
517 * config/tc-z80.c: Likewise.
518 * config/tc-z8k.c: Likewise.
519 * macro.h: Don't include sb.h or ansidecl.h.
520 * sb.h: Don't include stdio.h or ansidecl.h.
521 * cond.c: Include sb.h.
522 * itbl-lex.l: Include as.h instead of other system headers.
523 * itbl-parse.y: Likewise.
524 * itbl-ops.c: Similarly.
525 * itbl-ops.h: Don't include as.h or ansidecl.h.
526 * config/bfin-defs.h: Don't include bfd.h or as.h.
527 * config/bfin-parse.y: Include as.h instead of other system headers.
529 2006-06-06 Ben Elliston <bje@au.ibm.com>
530 Anton Blanchard <anton@samba.org>
532 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
533 (md_show_usage): Document it.
534 (ppc_setup_opcodes): Test power6 opcode flag bits.
535 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
537 2006-06-06 Thiemo Seufer <ths@mips.com>
538 Chao-ying Fu <fu@mips.com>
540 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
541 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
542 (macro_build): Update comment.
543 (mips_ip): Allow DSP64 instructions for MIPS64R2.
544 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
546 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
547 MIPS_CPU_ASE_MDMX flags for sb1.
549 2006-06-05 Thiemo Seufer <ths@mips.com>
551 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
553 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
554 (mips_ip): Make overflowed/underflowed constant arguments in DSP
555 and MT instructions a fatal error. Use INSERT_OPERAND where
556 appropriate. Improve warnings for break and wait code overflows.
557 Use symbolic constant of OP_MASK_COPZ.
558 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
560 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
562 * po/Make-in (top_builddir): Define.
564 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
566 * doc/Makefile.am (TEXI2DVI): Define.
567 * doc/Makefile.in: Regenerate.
568 * doc/c-arc.texi: Fix typo.
570 2006-06-01 Alan Modra <amodra@bigpond.net.au>
572 * config/obj-ieee.c: Delete.
573 * config/obj-ieee.h: Delete.
574 * Makefile.am (OBJ_FORMATS): Remove ieee.
575 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
576 (obj-ieee.o): Remove rule.
577 * Makefile.in: Regenerate.
578 * configure.in (atof): Remove tahoe.
579 (OBJ_MAYBE_IEEE): Don't define.
580 * configure: Regenerate.
581 * config.in: Regenerate.
582 * doc/Makefile.in: Regenerate.
583 * po/POTFILES.in: Regenerate.
585 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
587 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
588 and LIBINTL_DEP everywhere.
590 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
591 * acinclude.m4: Include new gettext macros.
592 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
593 Remove local code for po/Makefile.
594 * Makefile.in, configure, doc/Makefile.in: Regenerated.
596 2006-05-30 Nick Clifton <nickc@redhat.com>
598 * po/es.po: Updated Spanish translation.
600 2006-05-06 Denis Chertykov <denisc@overta.ru>
602 * doc/c-avr.texi: New file.
603 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
604 * doc/all.texi: Set AVR
605 * doc/as.texinfo: Include c-avr.texi
607 2006-05-28 Jie Zhang <jie.zhang@analog.com>
609 * config/bfin-parse.y (check_macfunc): Loose the condition of
610 calling check_multiply_halfregs ().
612 2006-05-25 Jie Zhang <jie.zhang@analog.com>
614 * config/bfin-parse.y (asm_1): Better check and deal with
615 vector and scalar Multiply 16-Bit Operands instructions.
617 2006-05-24 Nick Clifton <nickc@redhat.com>
619 * config/tc-hppa.c: Convert to ISO C90 format.
620 * config/tc-hppa.h: Likewise.
622 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
623 Randolph Chung <randolph@tausq.org>
625 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
626 is_tls_ieoff, is_tls_leoff): Define.
627 (fix_new_hppa): Handle TLS.
628 (cons_fix_new_hppa): Likewise.
630 (md_apply_fix): Handle TLS relocs.
631 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
633 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
635 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
637 2006-05-23 Thiemo Seufer <ths@mips.com>
638 David Ung <davidu@mips.com>
639 Nigel Stephens <nigel@mips.com>
642 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
643 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
644 ISA_HAS_MXHC1): New macros.
645 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
646 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
647 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
648 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
649 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
650 (mips_after_parse_args): Change default handling of float register
651 size to account for 32bit code with 64bit FP. Better sanity checking
652 of ISA/ASE/ABI option combinations.
653 (s_mipsset): Support switching of GPR and FPR sizes via
654 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
656 (mips_elf_final_processing): We should record the use of 64bit FP
657 registers in 32bit code but we don't, because ELF header flags are
659 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
660 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
661 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
662 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
663 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
664 missing -march options. Document .set arch=CPU. Move .set smartmips
665 to ASE page. Use @code for .set FOO examples.
667 2006-05-23 Jie Zhang <jie.zhang@analog.com>
669 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
672 2006-05-23 Jie Zhang <jie.zhang@analog.com>
674 * config/bfin-defs.h (bfin_equals): Remove declaration.
675 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
676 * config/tc-bfin.c (bfin_name_is_register): Remove.
677 (bfin_equals): Remove.
678 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
679 (bfin_name_is_register): Remove declaration.
681 2006-05-19 Thiemo Seufer <ths@mips.com>
682 Nigel Stephens <nigel@mips.com>
684 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
685 (mips_oddfpreg_ok): New function.
688 2006-05-19 Thiemo Seufer <ths@mips.com>
689 David Ung <davidu@mips.com>
691 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
692 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
693 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
694 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
695 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
696 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
697 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
698 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
699 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
700 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
701 reg_names_o32, reg_names_n32n64): Define register classes.
702 (reg_lookup): New function, use register classes.
703 (md_begin): Reserve register names in the symbol table. Simplify
705 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
707 (mips16_ip): Use reg_lookup.
708 (tc_get_register): Likewise.
709 (tc_mips_regname_to_dw2regnum): New function.
711 2006-05-19 Thiemo Seufer <ths@mips.com>
713 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
714 Un-constify string argument.
715 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
717 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
719 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
721 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
723 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
725 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
728 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
730 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
731 cfloat/m68881 to correct architecture before using it.
733 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
735 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
738 2006-05-15 Paul Brook <paul@codesourcery.com>
740 * config/tc-arm.c (arm_adjust_symtab): Use
741 bfd_is_arm_special_symbol_name.
743 2006-05-15 Bob Wilson <bob.wilson@acm.org>
745 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
746 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
747 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
748 Handle errors from calls to xtensa_opcode_is_* functions.
750 2006-05-14 Thiemo Seufer <ths@mips.com>
752 * config/tc-mips.c (macro_build): Test for currently active
754 (mips16_ip): Reject invalid opcodes.
756 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
758 * doc/as.texinfo: Rename "Index" to "AS Index",
759 and "ABORT" to "ABORT (COFF)".
761 2006-05-11 Paul Brook <paul@codesourcery.com>
763 * config/tc-arm.c (parse_half): New function.
764 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
765 (parse_operands): Ditto.
766 (do_mov16): Reject invalid relocations.
767 (do_t_mov16): Ditto. Use Thumb reloc numbers.
768 (insns): Replace Iffff with HALF.
769 (md_apply_fix): Add MOVW and MOVT relocs.
770 (tc_gen_reloc): Ditto.
771 * doc/c-arm.texi: Document relocation operators
773 2006-05-11 Paul Brook <paul@codesourcery.com>
775 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
777 2006-05-11 Thiemo Seufer <ths@mips.com>
779 * config/tc-mips.c (append_insn): Don't check the range of j or
782 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
784 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
785 relocs against external symbols for WinCE targets.
786 (md_apply_fix): Likewise.
788 2006-05-09 David Ung <davidu@mips.com>
790 * config/tc-mips.c (append_insn): Only warn about an out-of-range
793 2006-05-09 Nick Clifton <nickc@redhat.com>
795 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
796 against symbols which are not going to be placed into the symbol
799 2006-05-09 Ben Elliston <bje@au.ibm.com>
801 * expr.c (operand): Remove `if (0 && ..)' statement and
802 subsequently unused target_op label. Collapse `if (1 || ..)'
804 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
805 separately above the switch.
807 2006-05-08 Nick Clifton <nickc@redhat.com>
810 * config/tc-msp430.c (line_separator_character): Define as |.
812 2006-05-08 Thiemo Seufer <ths@mips.com>
813 Nigel Stephens <nigel@mips.com>
814 David Ung <davidu@mips.com>
816 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
817 (mips_opts): Likewise.
818 (file_ase_smartmips): New variable.
819 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
820 (macro_build): Handle SmartMIPS instructions.
822 (md_longopts): Add argument handling for smartmips.
823 (md_parse_options, mips_after_parse_args): Likewise.
824 (s_mipsset): Add .set smartmips support.
825 (md_show_usage): Document -msmartmips/-mno-smartmips.
826 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
828 * doc/c-mips.texi: Likewise.
830 2006-05-08 Alan Modra <amodra@bigpond.net.au>
832 * write.c (relax_segment): Add pass count arg. Don't error on
833 negative org/space on first two passes.
834 (relax_seg_info): New struct.
835 (relax_seg, write_object_file): Adjust.
836 * write.h (relax_segment): Update prototype.
838 2006-05-05 Julian Brown <julian@codesourcery.com>
840 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
842 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
843 architecture version checks.
844 (insns): Allow overlapping instructions to be used in VFP mode.
846 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
849 * config/obj-elf.c (obj_elf_change_section): Allow user
850 specified SHF_ALPHA_GPREL.
852 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
854 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
855 for PMEM related expressions.
857 2006-05-05 Nick Clifton <nickc@redhat.com>
860 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
861 insertion of a directory separator character into a string at a
862 given offset. Uses heuristics to decide when to use a backslash
863 character rather than a forward-slash character.
864 (dwarf2_directive_loc): Use the macro.
865 (out_debug_info): Likewise.
867 2006-05-05 Thiemo Seufer <ths@mips.com>
868 David Ung <davidu@mips.com>
870 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
872 (macro): Add new case M_CACHE_AB.
874 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
876 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
877 (opcode_lookup): Issue a warning for opcode with
878 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
879 identical to OT_cinfix3.
880 (TxC3w, TC3w, tC3w): New.
881 (insns): Use tC3w and TC3w for comparison instructions with
884 2006-05-04 Alan Modra <amodra@bigpond.net.au>
886 * subsegs.h (struct frchain): Delete frch_seg.
887 (frchain_root): Delete.
888 (seg_info): Define as macro.
889 * subsegs.c (frchain_root): Delete.
890 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
891 (subsegs_begin, subseg_change): Adjust for above.
892 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
893 rather than to one big list.
894 (subseg_get): Don't special case abs, und sections.
895 (subseg_new, subseg_force_new): Don't set frchainP here.
897 (subsegs_print_statistics): Adjust frag chain control list traversal.
898 * debug.c (dmp_frags): Likewise.
899 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
900 at frchain_root. Make use of known frchain ordering.
901 (last_frag_for_seg): Likewise.
902 (get_frag_fix): Likewise. Add seg param.
903 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
904 * write.c (chain_frchains_together_1): Adjust for struct frchain.
905 (SUB_SEGMENT_ALIGN): Likewise.
906 (subsegs_finish): Adjust frchain list traversal.
907 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
908 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
909 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
910 (xtensa_fix_b_j_loop_end_frags): Likewise.
911 (xtensa_fix_close_loop_end_frags): Likewise.
912 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
913 (retrieve_segment_info): Delete frch_seg initialisation.
915 2006-05-03 Alan Modra <amodra@bigpond.net.au>
917 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
918 * config/obj-elf.h (obj_sec_set_private_data): Delete.
919 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
920 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
922 2006-05-02 Joseph Myers <joseph@codesourcery.com>
924 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
926 (md_apply_fix3): Multiply offset by 4 here for
927 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
929 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
930 Jan Beulich <jbeulich@novell.com>
932 * config/tc-i386.c (output_invalid_buf): Change size for
934 * config/tc-tic30.c (output_invalid_buf): Likewise.
936 * config/tc-i386.c (output_invalid): Cast none-ascii char to
938 * config/tc-tic30.c (output_invalid): Likewise.
940 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
942 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
943 (TEXI2POD): Use AM_MAKEINFOFLAGS.
944 (asconfig.texi): Don't set top_srcdir.
945 * doc/as.texinfo: Don't use top_srcdir.
946 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
948 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
950 * config/tc-i386.c (output_invalid_buf): Change size to 16.
951 * config/tc-tic30.c (output_invalid_buf): Likewise.
953 * config/tc-i386.c (output_invalid): Use snprintf instead of
955 * config/tc-ia64.c (declare_register_set): Likewise.
956 (emit_one_bundle): Likewise.
957 (check_dependencies): Likewise.
958 * config/tc-tic30.c (output_invalid): Likewise.
960 2006-05-02 Paul Brook <paul@codesourcery.com>
962 * config/tc-arm.c (arm_optimize_expr): New function.
963 * config/tc-arm.h (md_optimize_expr): Define
964 (arm_optimize_expr): Add prototype.
965 (TC_FORCE_RELOCATION_SUB_SAME): Define.
967 2006-05-02 Ben Elliston <bje@au.ibm.com>
969 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
972 * sb.h (sb_list_vector): Move to sb.c.
973 * sb.c (free_list): Use type of sb_list_vector directly.
974 (sb_build): Fix off-by-one error in assertion about `size'.
976 2006-05-01 Ben Elliston <bje@au.ibm.com>
978 * listing.c (listing_listing): Remove useless loop.
979 * macro.c (macro_expand): Remove is_positional local variable.
980 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
981 and simplify surrounding expressions, where possible.
982 (assign_symbol): Likewise.
983 (s_weakref): Likewise.
984 * symbols.c (colon): Likewise.
986 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
988 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
990 2006-04-30 Thiemo Seufer <ths@mips.com>
991 David Ung <davidu@mips.com>
993 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
994 (mips_immed): New table that records various handling of udi
995 instruction patterns.
996 (mips_ip): Adds udi handling.
998 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1000 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1001 of list rather than beginning.
1003 2006-04-26 Julian Brown <julian@codesourcery.com>
1005 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1006 (is_quarter_float): Rename from above. Simplify slightly.
1007 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1009 (parse_neon_mov): Parse floating-point constants.
1010 (neon_qfloat_bits): Fix encoding.
1011 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1012 preference to integer encoding when using the F32 type.
1014 2006-04-26 Julian Brown <julian@codesourcery.com>
1016 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1017 zero-initialising structures containing it will lead to invalid types).
1018 (arm_it): Add vectype to each operand.
1019 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1021 (neon_typed_alias): New structure. Extra information for typed
1023 (reg_entry): Add neon type info field.
1024 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1025 Break out alternative syntax for coprocessor registers, etc. into...
1026 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1027 out from arm_reg_parse.
1028 (parse_neon_type): Move. Return SUCCESS/FAIL.
1029 (first_error): New function. Call to ensure first error which occurs is
1031 (parse_neon_operand_type): Parse exactly one type.
1032 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1033 (parse_typed_reg_or_scalar): New function. Handle core of both
1034 arm_typed_reg_parse and parse_scalar.
1035 (arm_typed_reg_parse): Parse a register with an optional type.
1036 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1038 (parse_scalar): Parse a Neon scalar with optional type.
1039 (parse_reg_list): Use first_error.
1040 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1041 (neon_alias_types_same): New function. Return true if two (alias) types
1043 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1045 (insert_reg_alias): Return new reg_entry not void.
1046 (insert_neon_reg_alias): New function. Insert type/index information as
1047 well as register for alias.
1048 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1049 make typed register aliases accordingly.
1050 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1052 (s_unreq): Delete type information if present.
1053 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1054 (s_arm_unwind_save_mmxwcg): Likewise.
1055 (s_arm_unwind_movsp): Likewise.
1056 (s_arm_unwind_setfp): Likewise.
1057 (parse_shift): Likewise.
1058 (parse_shifter_operand): Likewise.
1059 (parse_address): Likewise.
1060 (parse_tb): Likewise.
1061 (tc_arm_regname_to_dw2regnum): Likewise.
1062 (md_pseudo_table): Add dn, qn.
1063 (parse_neon_mov): Handle typed operands.
1064 (parse_operands): Likewise.
1065 (neon_type_mask): Add N_SIZ.
1066 (N_ALLMODS): New macro.
1067 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1068 (el_type_of_type_chk): Add some safeguards.
1069 (modify_types_allowed): Fix logic bug.
1070 (neon_check_type): Handle operands with types.
1071 (neon_three_same): Remove redundant optional arg handling.
1072 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1073 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1074 (do_neon_step): Adjust accordingly.
1075 (neon_cmode_for_logic_imm): Use first_error.
1076 (do_neon_bitfield): Call neon_check_type.
1077 (neon_dyadic): Rename to...
1078 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1079 to allow modification of type of the destination.
1080 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1081 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1082 (do_neon_compare): Make destination be an untyped bitfield.
1083 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1084 (neon_mul_mac): Return early in case of errors.
1085 (neon_move_immediate): Use first_error.
1086 (neon_mac_reg_scalar_long): Fix type to include scalar.
1087 (do_neon_dup): Likewise.
1088 (do_neon_mov): Likewise (in several places).
1089 (do_neon_tbl_tbx): Fix type.
1090 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1091 (do_neon_ld_dup): Exit early in case of errors and/or use
1093 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1094 Handle .dn/.qn directives.
1095 (REGDEF): Add zero for reg_entry neon field.
1097 2006-04-26 Julian Brown <julian@codesourcery.com>
1099 * config/tc-arm.c (limits.h): Include.
1100 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1101 (fpu_vfp_v3_or_neon_ext): Declare constants.
1102 (neon_el_type): New enumeration of types for Neon vector elements.
1103 (neon_type_el): New struct. Define type and size of a vector element.
1104 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1106 (neon_type): Define struct. The type of an instruction.
1107 (arm_it): Add 'vectype' for the current instruction.
1108 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1109 (vfp_sp_reg_pos): Rename to...
1110 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1112 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1113 (Neon D or Q register).
1114 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1116 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1117 (my_get_expression): Allow above constant as argument to accept
1118 64-bit constants with optional prefix.
1119 (arm_reg_parse): Add extra argument to return the specific type of
1120 register in when either a D or Q register (REG_TYPE_NDQ) is
1121 requested. Can be NULL.
1122 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1123 (parse_reg_list): Update for new arm_reg_parse args.
1124 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1125 (parse_neon_el_struct_list): New function. Parse element/structure
1126 register lists for VLD<n>/VST<n> instructions.
1127 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1128 (s_arm_unwind_save_mmxwr): Likewise.
1129 (s_arm_unwind_save_mmxwcg): Likewise.
1130 (s_arm_unwind_movsp): Likewise.
1131 (s_arm_unwind_setfp): Likewise.
1132 (parse_big_immediate): New function. Parse an immediate, which may be
1133 64 bits wide. Put results in inst.operands[i].
1134 (parse_shift): Update for new arm_reg_parse args.
1135 (parse_address): Likewise. Add parsing of alignment specifiers.
1136 (parse_neon_mov): Parse the operands of a VMOV instruction.
1137 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1138 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1139 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1140 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1141 (parse_operands): Handle new codes above.
1142 (encode_arm_vfp_sp_reg): Rename to...
1143 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1144 selected VFP version only supports D0-D15.
1145 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1146 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1147 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1148 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1149 encode_arm_vfp_reg name, and allow 32 D regs.
1150 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1151 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1153 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1154 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1155 constant-load and conversion insns introduced with VFPv3.
1156 (neon_tab_entry): New struct.
1157 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1158 those which are the targets of pseudo-instructions.
1159 (neon_opc): Enumerate opcodes, use as indices into...
1160 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1161 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1162 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1163 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1165 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1167 (neon_type_mask): New. Compact type representation for type checking.
1168 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1169 permitted type combinations.
1170 (N_IGNORE_TYPE): New macro.
1171 (neon_check_shape): New function. Check an instruction shape for
1172 multiple alternatives. Return the specific shape for the current
1174 (neon_modify_type_size): New function. Modify a vector type and size,
1175 depending on the bit mask in argument 1.
1176 (neon_type_promote): New function. Convert a given "key" type (of an
1177 operand) into the correct type for a different operand, based on a bit
1179 (type_chk_of_el_type): New function. Convert a type and size into the
1180 compact representation used for type checking.
1181 (el_type_of_type_ckh): New function. Reverse of above (only when a
1182 single bit is set in the bit mask).
1183 (modify_types_allowed): New function. Alter a mask of allowed types
1184 based on a bit mask of modifications.
1185 (neon_check_type): New function. Check the type of the current
1186 instruction against the variable argument list. The "key" type of the
1187 instruction is returned.
1188 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1189 a Neon data-processing instruction depending on whether we're in ARM
1190 mode or Thumb-2 mode.
1191 (neon_logbits): New function.
1192 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1193 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1194 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1195 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1196 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1197 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1198 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1199 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1200 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1201 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1202 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1203 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1204 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1205 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1206 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1207 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1208 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1209 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1210 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1211 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1212 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1213 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1214 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1215 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1216 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1218 (parse_neon_type): New function. Parse Neon type specifier.
1219 (opcode_lookup): Allow parsing of Neon type specifiers.
1220 (REGNUM2, REGSETH, REGSET2): New macros.
1221 (reg_names): Add new VFPv3 and Neon registers.
1222 (NUF, nUF, NCE, nCE): New macros for opcode table.
1223 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1224 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1225 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1226 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1227 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1228 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1229 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1230 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1231 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1232 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1233 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1234 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1235 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1236 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1238 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1239 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1240 (arm_option_cpu_value): Add vfp3 and neon.
1241 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1244 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1246 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1247 syntax instead of hardcoded opcodes with ".w18" suffixes.
1248 (wide_branch_opcode): New.
1249 (build_transition): Use it to check for wide branch opcodes with
1250 either ".w18" or ".w15" suffixes.
1252 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1254 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1255 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1256 frag's is_literal flag.
1258 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1260 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1262 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1264 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1265 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1266 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1267 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1268 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1270 2005-04-20 Paul Brook <paul@codesourcery.com>
1272 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1274 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1276 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1278 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1279 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1280 Make some cpus unsupported on ELF. Run "make dep-am".
1281 * Makefile.in: Regenerate.
1283 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1285 * configure.in (--enable-targets): Indent help message.
1286 * configure: Regenerate.
1288 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1291 * config/tc-i386.c (i386_immediate): Check illegal immediate
1294 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1296 * config/tc-i386.c: Formatting.
1297 (output_disp, output_imm): ISO C90 params.
1299 * frags.c (frag_offset_fixed_p): Constify args.
1300 * frags.h (frag_offset_fixed_p): Ditto.
1302 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1303 (COFF_MAGIC): Delete.
1305 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1307 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1309 * po/POTFILES.in: Regenerated.
1311 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1313 * doc/as.texinfo: Mention that some .type syntaxes are not
1314 supported on all architectures.
1316 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1318 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1319 instructions when such transformations have been disabled.
1321 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1323 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1324 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1325 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1326 decoding the loop instructions. Remove current_offset variable.
1327 (xtensa_fix_short_loop_frags): Likewise.
1328 (min_bytes_to_other_loop_end): Remove current_offset argument.
1330 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1332 * config/tc-z80.c (z80_optimize_expr): Removed.
1333 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1335 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1337 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1338 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1339 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1340 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1341 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1342 at90can64, at90usb646, at90usb647, at90usb1286 and
1344 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1346 2006-04-07 Paul Brook <paul@codesourcery.com>
1348 * config/tc-arm.c (parse_operands): Set default error message.
1350 2006-04-07 Paul Brook <paul@codesourcery.com>
1352 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1354 2006-04-07 Paul Brook <paul@codesourcery.com>
1356 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1358 2006-04-07 Paul Brook <paul@codesourcery.com>
1360 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1361 (move_or_literal_pool): Handle Thumb-2 instructions.
1362 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1364 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1367 * config/tc-i386.c (match_template): Move 64-bit operand tests
1370 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1372 * po/Make-in: Add install-html target.
1373 * Makefile.am: Add install-html and install-html-recursive targets.
1374 * Makefile.in: Regenerate.
1375 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1376 * configure: Regenerate.
1377 * doc/Makefile.am: Add install-html and install-html-am targets.
1378 * doc/Makefile.in: Regenerate.
1380 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1382 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1385 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1386 Daniel Jacobowitz <dan@codesourcery.com>
1388 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1389 (GOTT_BASE, GOTT_INDEX): New.
1390 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1391 GOTT_INDEX when generating VxWorks PIC.
1392 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1393 use the generic *-*-vxworks* stanza instead.
1395 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1398 * frags.c (frag_offset_fixed_p): New function.
1399 * frags.h (frag_offset_fixed_p): Declare.
1400 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1401 (resolve_expression): Likewise.
1403 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1405 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1406 of the same length but different numbers of slots.
1408 2006-03-30 Andreas Schwab <schwab@suse.de>
1410 * configure.in: Fix help string for --enable-targets option.
1411 * configure: Regenerate.
1413 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1415 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1416 (m68k_ip): ... here. Use for all chips. Protect against buffer
1417 overrun and avoid excessive copying.
1419 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1420 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1421 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1422 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1423 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1424 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1425 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1426 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1427 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1428 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1429 (struct m68k_cpu): Change chip field to control_regs.
1430 (current_chip): Remove.
1431 (control_regs): New.
1432 (m68k_archs, m68k_extensions): Adjust.
1433 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1434 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1435 (find_cf_chip): Reimplement for new organization of cpu table.
1436 (select_control_regs): Remove.
1438 (struct save_opts): Save control regs, not chip.
1439 (s_save, s_restore): Adjust.
1440 (m68k_lookup_cpu): Give deprecated warning when necessary.
1441 (m68k_init_arch): Adjust.
1442 (md_show_usage): Adjust for new cpu table organization.
1444 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1446 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1447 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1448 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1450 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1451 (any_gotrel): New rule.
1452 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1453 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1455 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1456 (bfin_pic_ptr): New function.
1457 (md_pseudo_table): Add it for ".picptr".
1458 (OPTION_FDPIC): New macro.
1459 (md_longopts): Add -mfdpic.
1460 (md_parse_option): Handle it.
1461 (md_begin): Set BFD flags.
1462 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1463 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1465 * Makefile.am (bfin-parse.o): Update dependencies.
1466 (DEPTC_bfin_elf): Likewise.
1467 * Makefile.in: Regenerate.
1469 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1471 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1472 mcfemac instead of mcfmac.
1474 2006-03-23 Michael Matz <matz@suse.de>
1476 * config/tc-i386.c (type_names): Correct placement of 'static'.
1477 (reloc): Map some more relocs to their 64 bit counterpart when
1479 (output_insn): Work around breakage if DEBUG386 is defined.
1480 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1481 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1482 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1483 different from i386.
1484 (output_imm): Ditto.
1485 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1487 (md_convert_frag): Jumps can now be larger than 2GB away, error
1489 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1490 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1492 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1493 Daniel Jacobowitz <dan@codesourcery.com>
1494 Phil Edwards <phil@codesourcery.com>
1495 Zack Weinberg <zack@codesourcery.com>
1496 Mark Mitchell <mark@codesourcery.com>
1497 Nathan Sidwell <nathan@codesourcery.com>
1499 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1500 (md_begin): Complain about -G being used for PIC. Don't change
1501 the text, data and bss alignments on VxWorks.
1502 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1503 generating VxWorks PIC.
1504 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1505 (macro): Likewise, but do not treat la $25 specially for
1506 VxWorks PIC, and do not handle jal.
1507 (OPTION_MVXWORKS_PIC): New macro.
1508 (md_longopts): Add -mvxworks-pic.
1509 (md_parse_option): Don't complain about using PIC and -G together here.
1510 Handle OPTION_MVXWORKS_PIC.
1511 (md_estimate_size_before_relax): Always use the first relaxation
1512 sequence on VxWorks.
1513 * config/tc-mips.h (VXWORKS_PIC): New.
1515 2006-03-21 Paul Brook <paul@codesourcery.com>
1517 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1519 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1521 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1522 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1523 (get_loop_align_size): New.
1524 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1525 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1526 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1527 (get_noop_aligned_address): Use get_loop_align_size.
1528 (get_aligned_diff): Likewise.
1530 2006-03-21 Paul Brook <paul@codesourcery.com>
1532 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1534 2006-03-20 Paul Brook <paul@codesourcery.com>
1536 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1537 (do_t_branch): Encode branches inside IT blocks as unconditional.
1538 (do_t_cps): New function.
1539 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1540 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1541 (opcode_lookup): Allow conditional suffixes on all instructions in
1543 (md_assemble): Advance condexec state before checking for errors.
1544 (insns): Use do_t_cps.
1546 2006-03-20 Paul Brook <paul@codesourcery.com>
1548 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1549 outputting the insn.
1551 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1553 * config/tc-vax.c: Update copyright year.
1554 * config/tc-vax.h: Likewise.
1556 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1558 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1560 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1562 2006-03-17 Paul Brook <paul@codesourcery.com>
1564 * config/tc-arm.c (insns): Add ldm and stm.
1566 2006-03-17 Ben Elliston <bje@au.ibm.com>
1569 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1571 2006-03-16 Paul Brook <paul@codesourcery.com>
1573 * config/tc-arm.c (insns): Add "svc".
1575 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1577 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1578 flag and avoid double underscore prefixes.
1580 2006-03-10 Paul Brook <paul@codesourcery.com>
1582 * config/tc-arm.c (md_begin): Handle EABIv5.
1583 (arm_eabis): Add EF_ARM_EABI_VER5.
1584 * doc/c-arm.texi: Document -meabi=5.
1586 2006-03-10 Ben Elliston <bje@au.ibm.com>
1588 * app.c (do_scrub_chars): Simplify string handling.
1590 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1591 Daniel Jacobowitz <dan@codesourcery.com>
1592 Zack Weinberg <zack@codesourcery.com>
1593 Nathan Sidwell <nathan@codesourcery.com>
1594 Paul Brook <paul@codesourcery.com>
1595 Ricardo Anguiano <anguiano@codesourcery.com>
1596 Phil Edwards <phil@codesourcery.com>
1598 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1599 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1601 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1602 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1603 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1605 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1607 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1608 even when using the text-section-literals option.
1610 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1612 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1614 (m68k_ip): <case 'J'> Check we have some control regs.
1615 (md_parse_option): Allow raw arch switch.
1616 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1617 whether 68881 or cfloat was meant by -mfloat.
1618 (md_show_usage): Adjust extension display.
1619 (m68k_elf_final_processing): Adjust.
1621 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1623 * config/tc-avr.c (avr_mod_hash_value): New function.
1624 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1625 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1626 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1627 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1629 (tc_gen_reloc): Handle substractions of symbols, if possible do
1630 fixups, abort otherwise.
1631 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1632 tc_fix_adjustable): Define.
1634 2006-03-02 James E Wilson <wilson@specifix.com>
1636 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1637 change the template, then clear md.slot[curr].end_of_insn_group.
1639 2006-02-28 Jan Beulich <jbeulich@novell.com>
1641 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1643 2006-02-28 Jan Beulich <jbeulich@novell.com>
1646 * macro.c (getstring): Don't treat parentheses special anymore.
1647 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1648 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1651 2006-02-28 Mat <mat@csail.mit.edu>
1653 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1655 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1657 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1659 (CFI_signal_frame): Define.
1660 (cfi_pseudo_table): Add .cfi_signal_frame.
1661 (dot_cfi): Handle CFI_signal_frame.
1662 (output_cie): Handle cie->signal_frame.
1663 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1664 different. Copy signal_frame from FDE to newly created CIE.
1665 * doc/as.texinfo: Document .cfi_signal_frame.
1667 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1669 * doc/Makefile.am: Add html target.
1670 * doc/Makefile.in: Regenerate.
1671 * po/Make-in: Add html target.
1673 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1675 * config/tc-i386.c (output_insn): Support Intel Merom New
1678 * config/tc-i386.h (CpuMNI): New.
1679 (CpuUnknownFlags): Add CpuMNI.
1681 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1683 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1684 (hpriv_reg_table): New table for hyperprivileged registers.
1685 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1688 2006-02-24 DJ Delorie <dj@redhat.com>
1690 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1691 (tc_gen_reloc): Don't define.
1692 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1693 (OPTION_LINKRELAX): New.
1694 (md_longopts): Add it.
1696 (md_parse_options): Set it.
1697 (md_assemble): Emit relaxation relocs as needed.
1698 (md_convert_frag): Emit relaxation relocs as needed.
1699 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1700 (m32c_apply_fix): New.
1701 (tc_gen_reloc): New.
1702 (m32c_force_relocation): Force out jump relocs when relaxing.
1703 (m32c_fix_adjustable): Return false if relaxing.
1705 2006-02-24 Paul Brook <paul@codesourcery.com>
1707 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1708 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1709 (struct asm_barrier_opt): Define.
1710 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1711 (parse_psr): Accept V7M psr names.
1712 (parse_barrier): New function.
1713 (enum operand_parse_code): Add OP_oBARRIER.
1714 (parse_operands): Implement OP_oBARRIER.
1715 (do_barrier): New function.
1716 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1717 (do_t_cpsi): Add V7M restrictions.
1718 (do_t_mrs, do_t_msr): Validate V7M variants.
1719 (md_assemble): Check for NULL variants.
1720 (v7m_psrs, barrier_opt_names): New tables.
1721 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1722 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1723 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1724 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1725 (struct cpu_arch_ver_table): Define.
1726 (cpu_arch_ver): New.
1727 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1728 Tag_CPU_arch_profile.
1729 * doc/c-arm.texi: Document new cpu and arch options.
1731 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1733 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1735 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1737 * config/tc-ia64.c: Update copyright years.
1739 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1741 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1744 2005-02-22 Paul Brook <paul@codesourcery.com>
1746 * config/tc-arm.c (do_pld): Remove incorrect write to
1748 (encode_thumb32_addr_mode): Use correct operand.
1750 2006-02-21 Paul Brook <paul@codesourcery.com>
1752 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1754 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1755 Anil Paranjape <anilp1@kpitcummins.com>
1756 Shilin Shakti <shilins@kpitcummins.com>
1758 * Makefile.am: Add xc16x related entry.
1759 * Makefile.in: Regenerate.
1760 * configure.in: Added xc16x related entry.
1761 * configure: Regenerate.
1762 * config/tc-xc16x.h: New file
1763 * config/tc-xc16x.c: New file
1764 * doc/c-xc16x.texi: New file for xc16x
1765 * doc/all.texi: Entry for xc16x
1766 * doc/Makefile.texi: Added c-xc16x.texi
1767 * NEWS: Announce the support for the new target.
1769 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1771 * configure.tgt: set emulation for mips-*-netbsd*
1773 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1775 * config.in: Rebuilt.
1777 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1779 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1780 from 1, not 0, in error messages.
1781 (md_assemble): Simplify special-case check for ENTRY instructions.
1782 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1783 operand in error message.
1785 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1787 * configure.tgt (arm-*-linux-gnueabi*): Change to
1790 2006-02-10 Nick Clifton <nickc@redhat.com>
1792 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1793 32-bit value is propagated into the upper bits of a 64-bit long.
1795 * config/tc-arc.c (init_opcode_tables): Fix cast.
1796 (arc_extoper, md_operand): Likewise.
1798 2006-02-09 David Heine <dlheine@tensilica.com>
1800 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1801 each relaxation step.
1803 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1805 * configure.in (CHECK_DECLS): Add vsnprintf.
1806 * configure: Regenerate.
1807 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1808 include/declare here, but...
1809 * as.h: Move code detecting VARARGS idiom to the top.
1810 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1811 (vsnprintf): Declare if not already declared.
1813 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1815 * as.c (close_output_file): New.
1816 (main): Register close_output_file with xatexit before
1817 dump_statistics. Don't call output_file_close.
1819 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1821 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1822 mcf5329_control_regs): New.
1823 (not_current_architecture, selected_arch, selected_cpu): New.
1824 (m68k_archs, m68k_extensions): New.
1825 (archs): Renamed to ...
1826 (m68k_cpus): ... here. Adjust.
1828 (md_pseudo_table): Add arch and cpu directives.
1829 (find_cf_chip, m68k_ip): Adjust table scanning.
1830 (no_68851, no_68881): Remove.
1831 (md_assemble): Lazily initialize.
1832 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1833 (md_init_after_args): Move functionality to m68k_init_arch.
1834 (mri_chip): Adjust table scanning.
1835 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1836 options with saner parsing.
1837 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1838 m68k_init_arch): New.
1839 (s_m68k_cpu, s_m68k_arch): New.
1840 (md_show_usage): Adjust.
1841 (m68k_elf_final_processing): Set CF EF flags.
1842 * config/tc-m68k.h (m68k_init_after_args): Remove.
1843 (tc_init_after_args): Remove.
1844 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1845 (M68k-Directives): Document .arch and .cpu directives.
1847 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1849 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1850 synonyms for equ and defl.
1851 (z80_cons_fix_new): New function.
1852 (emit_byte): Disallow relative jumps to absolute locations.
1853 (emit_data): Only handle defb, prototype changed, because defb is
1854 now handled as pseudo-op rather than an instruction.
1855 (instab): Entries for defb,defw,db,dw moved from here...
1856 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1857 Add entries for def24,def32,d24,d32.
1858 (md_assemble): Improved error handling.
1859 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1860 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1861 (z80_cons_fix_new): Declare.
1862 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1863 (def24,d24,def32,d32): New pseudo-ops.
1865 2006-02-02 Paul Brook <paul@codesourcery.com>
1867 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1869 2005-02-02 Paul Brook <paul@codesourcery.com>
1871 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1872 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1873 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1874 T2_OPCODE_RSB): Define.
1875 (thumb32_negate_data_op): New function.
1876 (md_apply_fix): Use it.
1878 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1880 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1882 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1883 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1885 (relaxation_requirements): Add pfinish_frag argument and use it to
1886 replace setting tinsn->record_fix fields.
1887 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1888 and vinsn_to_insnbuf. Remove references to record_fix and
1889 slot_sub_symbols fields.
1890 (xtensa_mark_narrow_branches): Delete unused code.
1891 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1893 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1895 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1896 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1897 of the record_fix field. Simplify error messages for unexpected
1899 (set_expr_symbol_offset_diff): Delete.
1901 2006-01-31 Paul Brook <paul@codesourcery.com>
1903 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1905 2006-01-31 Paul Brook <paul@codesourcery.com>
1906 Richard Earnshaw <rearnsha@arm.com>
1908 * config/tc-arm.c: Use arm_feature_set.
1909 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1910 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1911 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1914 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1915 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1916 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1917 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1919 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1920 (arm_opts): Move old cpu/arch options from here...
1921 (arm_legacy_opts): ... to here.
1922 (md_parse_option): Search arm_legacy_opts.
1923 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1924 (arm_float_abis, arm_eabis): Make const.
1926 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1928 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1930 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1932 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1933 in load immediate intruction.
1935 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1937 * config/bfin-parse.y (value_match): Use correct conversion
1938 specifications in template string for __FILE__ and __LINE__.
1942 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1944 Introduce TLS descriptors for i386 and x86_64.
1945 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1946 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1947 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1948 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1949 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1951 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1952 (lex_got): Handle @tlsdesc and @tlscall.
1953 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1955 2006-01-11 Nick Clifton <nickc@redhat.com>
1957 Fixes for building on 64-bit hosts:
1958 * config/tc-avr.c (mod_index): New union to allow conversion
1959 between pointers and integers.
1960 (md_begin, avr_ldi_expression): Use it.
1961 * config/tc-i370.c (md_assemble): Add cast for argument to print
1963 * config/tc-tic54x.c (subsym_substitute): Likewise.
1964 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1965 opindex field of fr_cgen structure into a pointer so that it can
1966 be stored in a frag.
1967 * config/tc-mn10300.c (md_assemble): Likewise.
1968 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1970 * config/tc-v850.c: Replace uses of (int) casts with correct
1973 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1976 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1978 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1981 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1982 a local-label reference.
1984 For older changes see ChangeLog-2005
1990 version-control: never