1 2006-18-06 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
2 Anatoly Sokolov <aesok@post.ru>
4 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
5 and atmega644p devices. Rename atmega164/atmega324 devices to
7 * doc/c-avr.texi: Document new mcu and arch options.
9 2006-06-17 Nick Clifton <nickc@redhat.com>
11 * config/tc-arm.c (enum parse_operand_result): Move outside of
12 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
14 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
16 * config/tc-i386.h (processor_type): New.
17 (arch_entry): Add type.
19 * config/tc-i386.c (cpu_arch_tune): New.
20 (cpu_arch_tune_flags): Likewise.
21 (cpu_arch_isa_flags): Likewise.
23 (set_cpu_arch): Also update cpu_arch_isa_flags.
24 (md_assemble): Update cpu_arch_isa_flags.
26 (OPTION_MTUNE): Likewise.
27 (md_longopts): Add -march= and -mtune=.
28 (md_parse_option): Support -march= and -mtune=.
29 (md_show_usage): Add -march=CPU/-mtune=CPU.
30 (i386_target_format): Also update cpu_arch_isa_flags,
31 cpu_arch_tune and cpu_arch_tune_flags.
33 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
35 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
37 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
39 * config/tc-arm.c (enum parse_operand_result): New.
40 (struct group_reloc_table_entry): New.
41 (enum group_reloc_type): New.
42 (group_reloc_table): New array.
43 (find_group_reloc_table_entry): New function.
44 (parse_shifter_operand_group_reloc): New function.
45 (parse_address_main): New function, incorporating code
46 from the old parse_address function. To be used via...
47 (parse_address): wrapper for parse_address_main; and
48 (parse_address_group_reloc): new function, likewise.
49 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
50 OP_ADDRGLDRS, OP_ADDRGLDC.
51 (parse_operands): Support for these new operand codes.
52 New macro po_misc_or_fail_no_backtrack.
53 (encode_arm_cp_address): Preserve group relocations.
54 (insns): Modify to use the above operand codes where group
55 relocations are permitted.
56 (md_apply_fix): Handle the group relocations
57 ALU_PC_G0_NC through LDC_SB_G2.
58 (tc_gen_reloc): Likewise.
59 (arm_force_relocation): Leave group relocations for the linker.
60 (arm_fix_adjustable): Likewise.
62 2006-06-15 Julian Brown <julian@codesourcery.com>
64 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
65 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
68 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
70 * config/tc-i386.c (process_suffix): Don't add rex64 for
73 2006-06-09 Thiemo Seufer <ths@mips.com>
75 * config/tc-mips.c (mips_ip): Maintain argument count.
77 2006-06-09 Alan Modra <amodra@bigpond.net.au>
79 * config/tc-iq2000.c: Include sb.h.
81 2006-06-08 Nigel Stephens <nigel@mips.com>
83 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
84 aliases for better compatibility with SGI tools.
86 2006-06-08 Alan Modra <amodra@bigpond.net.au>
88 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
89 * Makefile.am (GASLIBS): Expand @BFDLIB@.
91 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
92 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
93 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
95 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
96 * Makefile.in: Regenerate.
97 * doc/Makefile.in: Regenerate.
98 * configure: Regenerate.
100 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
102 * po/Make-in (pdf, ps): New dummy targets.
104 2006-06-07 Julian Brown <julian@codesourcery.com>
106 * config/tc-arm.c (stdarg.h): include.
107 (arm_it): Add uncond_value field. Add isvec and issingle to operand
109 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
110 REG_TYPE_NSDQ (single, double or quad vector reg).
111 (reg_expected_msgs): Update.
112 (BAD_FPU): Add macro for unsupported FPU instruction error.
113 (parse_neon_type): Support 'd' as an alias for .f64.
114 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
116 (parse_vfp_reg_list): Don't update first arg on error.
117 (parse_neon_mov): Support extra syntax for VFP moves.
118 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
119 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
120 (parse_operands): Support isvec, issingle operands fields, new parse
122 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
124 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
125 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
126 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
127 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
129 (neon_shape): Redefine in terms of above.
130 (neon_shape_class): New enumeration, table of shape classes.
131 (neon_shape_el): New enumeration. One element of a shape.
132 (neon_shape_el_size): Register widths of above, where appropriate.
133 (neon_shape_info): New struct. Info for shape table.
134 (neon_shape_tab): New array.
135 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
136 (neon_check_shape): Rewrite as...
137 (neon_select_shape): New function to classify instruction shapes,
138 driven by new table neon_shape_tab array.
139 (neon_quad): New function. Return 1 if shape should set Q flag in
140 instructions (or equivalent), 0 otherwise.
141 (type_chk_of_el_type): Support F64.
142 (el_type_of_type_chk): Likewise.
143 (neon_check_type): Add support for VFP type checking (VFP data
144 elements fill their containing registers).
145 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
146 in thumb mode for VFP instructions.
147 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
148 and encode the current instruction as if it were that opcode.
149 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
150 arguments, call function in PFN.
151 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
152 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
153 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
154 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
155 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
156 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
157 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
158 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
159 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
160 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
161 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
162 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
163 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
164 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
165 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
167 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
168 between VFP and Neon turns out to belong to Neon. Perform
169 architecture check and fill in condition field if appropriate.
170 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
171 (do_neon_cvt): Add support for VFP variants of instructions.
172 (neon_cvt_flavour): Extend to cover VFP conversions.
173 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
175 (do_neon_ldr_str): Handle single-precision VFP load/store.
176 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
177 NS_NULL not NS_IGNORE.
178 (opcode_tag): Add OT_csuffixF for operands which either take a
179 conditional suffix, or have 0xF in the condition field.
180 (md_assemble): Add support for OT_csuffixF.
181 (NCE): Replace macro with...
182 (NCE_tag, NCE, NCEF): New macros.
183 (nCE): Replace macro with...
184 (nCE_tag, nCE, nCEF): New macros.
185 (insns): Add support for VFP insns or VFP versions of insns msr,
186 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
187 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
188 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
189 VFP/Neon insns together.
191 2006-06-07 Alan Modra <amodra@bigpond.net.au>
192 Ladislav Michl <ladis@linux-mips.org>
194 * app.c: Don't include headers already included by as.h.
196 * atof-generic.c: Likewise.
198 * dwarf2dbg.c: Likewise.
200 * input-file.c: Likewise.
201 * input-scrub.c: Likewise.
203 * output-file.c: Likewise.
206 * config/bfin-lex.l: Likewise.
207 * config/obj-coff.h: Likewise.
208 * config/obj-elf.h: Likewise.
209 * config/obj-som.h: Likewise.
210 * config/tc-arc.c: Likewise.
211 * config/tc-arm.c: Likewise.
212 * config/tc-avr.c: Likewise.
213 * config/tc-bfin.c: Likewise.
214 * config/tc-cris.c: Likewise.
215 * config/tc-d10v.c: Likewise.
216 * config/tc-d30v.c: Likewise.
217 * config/tc-dlx.h: Likewise.
218 * config/tc-fr30.c: Likewise.
219 * config/tc-frv.c: Likewise.
220 * config/tc-h8300.c: Likewise.
221 * config/tc-hppa.c: Likewise.
222 * config/tc-i370.c: Likewise.
223 * config/tc-i860.c: Likewise.
224 * config/tc-i960.c: Likewise.
225 * config/tc-ip2k.c: Likewise.
226 * config/tc-iq2000.c: Likewise.
227 * config/tc-m32c.c: Likewise.
228 * config/tc-m32r.c: Likewise.
229 * config/tc-maxq.c: Likewise.
230 * config/tc-mcore.c: Likewise.
231 * config/tc-mips.c: Likewise.
232 * config/tc-mmix.c: Likewise.
233 * config/tc-mn10200.c: Likewise.
234 * config/tc-mn10300.c: Likewise.
235 * config/tc-msp430.c: Likewise.
236 * config/tc-mt.c: Likewise.
237 * config/tc-ns32k.c: Likewise.
238 * config/tc-openrisc.c: Likewise.
239 * config/tc-ppc.c: Likewise.
240 * config/tc-s390.c: Likewise.
241 * config/tc-sh.c: Likewise.
242 * config/tc-sh64.c: Likewise.
243 * config/tc-sparc.c: Likewise.
244 * config/tc-tic30.c: Likewise.
245 * config/tc-tic4x.c: Likewise.
246 * config/tc-tic54x.c: Likewise.
247 * config/tc-v850.c: Likewise.
248 * config/tc-vax.c: Likewise.
249 * config/tc-xc16x.c: Likewise.
250 * config/tc-xstormy16.c: Likewise.
251 * config/tc-xtensa.c: Likewise.
252 * config/tc-z80.c: Likewise.
253 * config/tc-z8k.c: Likewise.
254 * macro.h: Don't include sb.h or ansidecl.h.
255 * sb.h: Don't include stdio.h or ansidecl.h.
256 * cond.c: Include sb.h.
257 * itbl-lex.l: Include as.h instead of other system headers.
258 * itbl-parse.y: Likewise.
259 * itbl-ops.c: Similarly.
260 * itbl-ops.h: Don't include as.h or ansidecl.h.
261 * config/bfin-defs.h: Don't include bfd.h or as.h.
262 * config/bfin-parse.y: Include as.h instead of other system headers.
264 2006-06-06 Ben Elliston <bje@au.ibm.com>
265 Anton Blanchard <anton@samba.org>
267 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
268 (md_show_usage): Document it.
269 (ppc_setup_opcodes): Test power6 opcode flag bits.
270 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
272 2006-06-06 Thiemo Seufer <ths@mips.com>
273 Chao-ying Fu <fu@mips.com>
275 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
276 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
277 (macro_build): Update comment.
278 (mips_ip): Allow DSP64 instructions for MIPS64R2.
279 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
281 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
282 MIPS_CPU_ASE_MDMX flags for sb1.
284 2006-06-05 Thiemo Seufer <ths@mips.com>
286 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
288 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
289 (mips_ip): Make overflowed/underflowed constant arguments in DSP
290 and MT instructions a fatal error. Use INSERT_OPERAND where
291 appropriate. Improve warnings for break and wait code overflows.
292 Use symbolic constant of OP_MASK_COPZ.
293 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
295 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
297 * po/Make-in (top_builddir): Define.
299 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
301 * doc/Makefile.am (TEXI2DVI): Define.
302 * doc/Makefile.in: Regenerate.
303 * doc/c-arc.texi: Fix typo.
305 2006-06-01 Alan Modra <amodra@bigpond.net.au>
307 * config/obj-ieee.c: Delete.
308 * config/obj-ieee.h: Delete.
309 * Makefile.am (OBJ_FORMATS): Remove ieee.
310 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
311 (obj-ieee.o): Remove rule.
312 * Makefile.in: Regenerate.
313 * configure.in (atof): Remove tahoe.
314 (OBJ_MAYBE_IEEE): Don't define.
315 * configure: Regenerate.
316 * config.in: Regenerate.
317 * doc/Makefile.in: Regenerate.
318 * po/POTFILES.in: Regenerate.
320 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
322 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
323 and LIBINTL_DEP everywhere.
325 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
326 * acinclude.m4: Include new gettext macros.
327 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
328 Remove local code for po/Makefile.
329 * Makefile.in, configure, doc/Makefile.in: Regenerated.
331 2006-05-30 Nick Clifton <nickc@redhat.com>
333 * po/es.po: Updated Spanish translation.
335 2006-05-06 Denis Chertykov <denisc@overta.ru>
337 * doc/c-avr.texi: New file.
338 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
339 * doc/all.texi: Set AVR
340 * doc/as.texinfo: Include c-avr.texi
342 2006-05-28 Jie Zhang <jie.zhang@analog.com>
344 * config/bfin-parse.y (check_macfunc): Loose the condition of
345 calling check_multiply_halfregs ().
347 2006-05-25 Jie Zhang <jie.zhang@analog.com>
349 * config/bfin-parse.y (asm_1): Better check and deal with
350 vector and scalar Multiply 16-Bit Operands instructions.
352 2006-05-24 Nick Clifton <nickc@redhat.com>
354 * config/tc-hppa.c: Convert to ISO C90 format.
355 * config/tc-hppa.h: Likewise.
357 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
358 Randolph Chung <randolph@tausq.org>
360 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
361 is_tls_ieoff, is_tls_leoff): Define.
362 (fix_new_hppa): Handle TLS.
363 (cons_fix_new_hppa): Likewise.
365 (md_apply_fix): Handle TLS relocs.
366 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
368 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
370 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
372 2006-05-23 Thiemo Seufer <ths@mips.com>
373 David Ung <davidu@mips.com>
374 Nigel Stephens <nigel@mips.com>
377 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
378 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
379 ISA_HAS_MXHC1): New macros.
380 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
381 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
382 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
383 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
384 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
385 (mips_after_parse_args): Change default handling of float register
386 size to account for 32bit code with 64bit FP. Better sanity checking
387 of ISA/ASE/ABI option combinations.
388 (s_mipsset): Support switching of GPR and FPR sizes via
389 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
391 (mips_elf_final_processing): We should record the use of 64bit FP
392 registers in 32bit code but we don't, because ELF header flags are
394 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
395 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
396 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
397 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
398 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
399 missing -march options. Document .set arch=CPU. Move .set smartmips
400 to ASE page. Use @code for .set FOO examples.
402 2006-05-23 Jie Zhang <jie.zhang@analog.com>
404 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
407 2006-05-23 Jie Zhang <jie.zhang@analog.com>
409 * config/bfin-defs.h (bfin_equals): Remove declaration.
410 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
411 * config/tc-bfin.c (bfin_name_is_register): Remove.
412 (bfin_equals): Remove.
413 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
414 (bfin_name_is_register): Remove declaration.
416 2006-05-19 Thiemo Seufer <ths@mips.com>
417 Nigel Stephens <nigel@mips.com>
419 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
420 (mips_oddfpreg_ok): New function.
423 2006-05-19 Thiemo Seufer <ths@mips.com>
424 David Ung <davidu@mips.com>
426 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
427 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
428 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
429 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
430 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
431 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
432 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
433 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
434 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
435 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
436 reg_names_o32, reg_names_n32n64): Define register classes.
437 (reg_lookup): New function, use register classes.
438 (md_begin): Reserve register names in the symbol table. Simplify
440 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
442 (mips16_ip): Use reg_lookup.
443 (tc_get_register): Likewise.
444 (tc_mips_regname_to_dw2regnum): New function.
446 2006-05-19 Thiemo Seufer <ths@mips.com>
448 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
449 Un-constify string argument.
450 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
452 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
454 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
456 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
458 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
460 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
463 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
465 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
466 cfloat/m68881 to correct architecture before using it.
468 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
470 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
473 2006-05-15 Paul Brook <paul@codesourcery.com>
475 * config/tc-arm.c (arm_adjust_symtab): Use
476 bfd_is_arm_special_symbol_name.
478 2006-05-15 Bob Wilson <bob.wilson@acm.org>
480 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
481 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
482 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
483 Handle errors from calls to xtensa_opcode_is_* functions.
485 2006-05-14 Thiemo Seufer <ths@mips.com>
487 * config/tc-mips.c (macro_build): Test for currently active
489 (mips16_ip): Reject invalid opcodes.
491 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
493 * doc/as.texinfo: Rename "Index" to "AS Index",
494 and "ABORT" to "ABORT (COFF)".
496 2006-05-11 Paul Brook <paul@codesourcery.com>
498 * config/tc-arm.c (parse_half): New function.
499 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
500 (parse_operands): Ditto.
501 (do_mov16): Reject invalid relocations.
502 (do_t_mov16): Ditto. Use Thumb reloc numbers.
503 (insns): Replace Iffff with HALF.
504 (md_apply_fix): Add MOVW and MOVT relocs.
505 (tc_gen_reloc): Ditto.
506 * doc/c-arm.texi: Document relocation operators
508 2006-05-11 Paul Brook <paul@codesourcery.com>
510 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
512 2006-05-11 Thiemo Seufer <ths@mips.com>
514 * config/tc-mips.c (append_insn): Don't check the range of j or
517 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
519 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
520 relocs against external symbols for WinCE targets.
521 (md_apply_fix): Likewise.
523 2006-05-09 David Ung <davidu@mips.com>
525 * config/tc-mips.c (append_insn): Only warn about an out-of-range
528 2006-05-09 Nick Clifton <nickc@redhat.com>
530 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
531 against symbols which are not going to be placed into the symbol
534 2006-05-09 Ben Elliston <bje@au.ibm.com>
536 * expr.c (operand): Remove `if (0 && ..)' statement and
537 subsequently unused target_op label. Collapse `if (1 || ..)'
539 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
540 separately above the switch.
542 2006-05-08 Nick Clifton <nickc@redhat.com>
545 * config/tc-msp430.c (line_separator_character): Define as |.
547 2006-05-08 Thiemo Seufer <ths@mips.com>
548 Nigel Stephens <nigel@mips.com>
549 David Ung <davidu@mips.com>
551 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
552 (mips_opts): Likewise.
553 (file_ase_smartmips): New variable.
554 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
555 (macro_build): Handle SmartMIPS instructions.
557 (md_longopts): Add argument handling for smartmips.
558 (md_parse_options, mips_after_parse_args): Likewise.
559 (s_mipsset): Add .set smartmips support.
560 (md_show_usage): Document -msmartmips/-mno-smartmips.
561 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
563 * doc/c-mips.texi: Likewise.
565 2006-05-08 Alan Modra <amodra@bigpond.net.au>
567 * write.c (relax_segment): Add pass count arg. Don't error on
568 negative org/space on first two passes.
569 (relax_seg_info): New struct.
570 (relax_seg, write_object_file): Adjust.
571 * write.h (relax_segment): Update prototype.
573 2006-05-05 Julian Brown <julian@codesourcery.com>
575 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
577 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
578 architecture version checks.
579 (insns): Allow overlapping instructions to be used in VFP mode.
581 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
584 * config/obj-elf.c (obj_elf_change_section): Allow user
585 specified SHF_ALPHA_GPREL.
587 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
589 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
590 for PMEM related expressions.
592 2006-05-05 Nick Clifton <nickc@redhat.com>
595 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
596 insertion of a directory separator character into a string at a
597 given offset. Uses heuristics to decide when to use a backslash
598 character rather than a forward-slash character.
599 (dwarf2_directive_loc): Use the macro.
600 (out_debug_info): Likewise.
602 2006-05-05 Thiemo Seufer <ths@mips.com>
603 David Ung <davidu@mips.com>
605 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
607 (macro): Add new case M_CACHE_AB.
609 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
611 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
612 (opcode_lookup): Issue a warning for opcode with
613 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
614 identical to OT_cinfix3.
615 (TxC3w, TC3w, tC3w): New.
616 (insns): Use tC3w and TC3w for comparison instructions with
619 2006-05-04 Alan Modra <amodra@bigpond.net.au>
621 * subsegs.h (struct frchain): Delete frch_seg.
622 (frchain_root): Delete.
623 (seg_info): Define as macro.
624 * subsegs.c (frchain_root): Delete.
625 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
626 (subsegs_begin, subseg_change): Adjust for above.
627 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
628 rather than to one big list.
629 (subseg_get): Don't special case abs, und sections.
630 (subseg_new, subseg_force_new): Don't set frchainP here.
632 (subsegs_print_statistics): Adjust frag chain control list traversal.
633 * debug.c (dmp_frags): Likewise.
634 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
635 at frchain_root. Make use of known frchain ordering.
636 (last_frag_for_seg): Likewise.
637 (get_frag_fix): Likewise. Add seg param.
638 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
639 * write.c (chain_frchains_together_1): Adjust for struct frchain.
640 (SUB_SEGMENT_ALIGN): Likewise.
641 (subsegs_finish): Adjust frchain list traversal.
642 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
643 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
644 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
645 (xtensa_fix_b_j_loop_end_frags): Likewise.
646 (xtensa_fix_close_loop_end_frags): Likewise.
647 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
648 (retrieve_segment_info): Delete frch_seg initialisation.
650 2006-05-03 Alan Modra <amodra@bigpond.net.au>
652 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
653 * config/obj-elf.h (obj_sec_set_private_data): Delete.
654 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
655 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
657 2006-05-02 Joseph Myers <joseph@codesourcery.com>
659 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
661 (md_apply_fix3): Multiply offset by 4 here for
662 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
664 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
665 Jan Beulich <jbeulich@novell.com>
667 * config/tc-i386.c (output_invalid_buf): Change size for
669 * config/tc-tic30.c (output_invalid_buf): Likewise.
671 * config/tc-i386.c (output_invalid): Cast none-ascii char to
673 * config/tc-tic30.c (output_invalid): Likewise.
675 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
677 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
678 (TEXI2POD): Use AM_MAKEINFOFLAGS.
679 (asconfig.texi): Don't set top_srcdir.
680 * doc/as.texinfo: Don't use top_srcdir.
681 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
683 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
685 * config/tc-i386.c (output_invalid_buf): Change size to 16.
686 * config/tc-tic30.c (output_invalid_buf): Likewise.
688 * config/tc-i386.c (output_invalid): Use snprintf instead of
690 * config/tc-ia64.c (declare_register_set): Likewise.
691 (emit_one_bundle): Likewise.
692 (check_dependencies): Likewise.
693 * config/tc-tic30.c (output_invalid): Likewise.
695 2006-05-02 Paul Brook <paul@codesourcery.com>
697 * config/tc-arm.c (arm_optimize_expr): New function.
698 * config/tc-arm.h (md_optimize_expr): Define
699 (arm_optimize_expr): Add prototype.
700 (TC_FORCE_RELOCATION_SUB_SAME): Define.
702 2006-05-02 Ben Elliston <bje@au.ibm.com>
704 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
707 * sb.h (sb_list_vector): Move to sb.c.
708 * sb.c (free_list): Use type of sb_list_vector directly.
709 (sb_build): Fix off-by-one error in assertion about `size'.
711 2006-05-01 Ben Elliston <bje@au.ibm.com>
713 * listing.c (listing_listing): Remove useless loop.
714 * macro.c (macro_expand): Remove is_positional local variable.
715 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
716 and simplify surrounding expressions, where possible.
717 (assign_symbol): Likewise.
718 (s_weakref): Likewise.
719 * symbols.c (colon): Likewise.
721 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
723 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
725 2006-04-30 Thiemo Seufer <ths@mips.com>
726 David Ung <davidu@mips.com>
728 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
729 (mips_immed): New table that records various handling of udi
730 instruction patterns.
731 (mips_ip): Adds udi handling.
733 2006-04-28 Alan Modra <amodra@bigpond.net.au>
735 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
736 of list rather than beginning.
738 2006-04-26 Julian Brown <julian@codesourcery.com>
740 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
741 (is_quarter_float): Rename from above. Simplify slightly.
742 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
744 (parse_neon_mov): Parse floating-point constants.
745 (neon_qfloat_bits): Fix encoding.
746 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
747 preference to integer encoding when using the F32 type.
749 2006-04-26 Julian Brown <julian@codesourcery.com>
751 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
752 zero-initialising structures containing it will lead to invalid types).
753 (arm_it): Add vectype to each operand.
754 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
756 (neon_typed_alias): New structure. Extra information for typed
758 (reg_entry): Add neon type info field.
759 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
760 Break out alternative syntax for coprocessor registers, etc. into...
761 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
762 out from arm_reg_parse.
763 (parse_neon_type): Move. Return SUCCESS/FAIL.
764 (first_error): New function. Call to ensure first error which occurs is
766 (parse_neon_operand_type): Parse exactly one type.
767 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
768 (parse_typed_reg_or_scalar): New function. Handle core of both
769 arm_typed_reg_parse and parse_scalar.
770 (arm_typed_reg_parse): Parse a register with an optional type.
771 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
773 (parse_scalar): Parse a Neon scalar with optional type.
774 (parse_reg_list): Use first_error.
775 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
776 (neon_alias_types_same): New function. Return true if two (alias) types
778 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
780 (insert_reg_alias): Return new reg_entry not void.
781 (insert_neon_reg_alias): New function. Insert type/index information as
782 well as register for alias.
783 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
784 make typed register aliases accordingly.
785 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
787 (s_unreq): Delete type information if present.
788 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
789 (s_arm_unwind_save_mmxwcg): Likewise.
790 (s_arm_unwind_movsp): Likewise.
791 (s_arm_unwind_setfp): Likewise.
792 (parse_shift): Likewise.
793 (parse_shifter_operand): Likewise.
794 (parse_address): Likewise.
795 (parse_tb): Likewise.
796 (tc_arm_regname_to_dw2regnum): Likewise.
797 (md_pseudo_table): Add dn, qn.
798 (parse_neon_mov): Handle typed operands.
799 (parse_operands): Likewise.
800 (neon_type_mask): Add N_SIZ.
801 (N_ALLMODS): New macro.
802 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
803 (el_type_of_type_chk): Add some safeguards.
804 (modify_types_allowed): Fix logic bug.
805 (neon_check_type): Handle operands with types.
806 (neon_three_same): Remove redundant optional arg handling.
807 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
808 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
809 (do_neon_step): Adjust accordingly.
810 (neon_cmode_for_logic_imm): Use first_error.
811 (do_neon_bitfield): Call neon_check_type.
812 (neon_dyadic): Rename to...
813 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
814 to allow modification of type of the destination.
815 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
816 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
817 (do_neon_compare): Make destination be an untyped bitfield.
818 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
819 (neon_mul_mac): Return early in case of errors.
820 (neon_move_immediate): Use first_error.
821 (neon_mac_reg_scalar_long): Fix type to include scalar.
822 (do_neon_dup): Likewise.
823 (do_neon_mov): Likewise (in several places).
824 (do_neon_tbl_tbx): Fix type.
825 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
826 (do_neon_ld_dup): Exit early in case of errors and/or use
828 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
829 Handle .dn/.qn directives.
830 (REGDEF): Add zero for reg_entry neon field.
832 2006-04-26 Julian Brown <julian@codesourcery.com>
834 * config/tc-arm.c (limits.h): Include.
835 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
836 (fpu_vfp_v3_or_neon_ext): Declare constants.
837 (neon_el_type): New enumeration of types for Neon vector elements.
838 (neon_type_el): New struct. Define type and size of a vector element.
839 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
841 (neon_type): Define struct. The type of an instruction.
842 (arm_it): Add 'vectype' for the current instruction.
843 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
844 (vfp_sp_reg_pos): Rename to...
845 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
847 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
848 (Neon D or Q register).
849 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
851 (GE_OPT_PREFIX_BIG): Define constant, for use in...
852 (my_get_expression): Allow above constant as argument to accept
853 64-bit constants with optional prefix.
854 (arm_reg_parse): Add extra argument to return the specific type of
855 register in when either a D or Q register (REG_TYPE_NDQ) is
856 requested. Can be NULL.
857 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
858 (parse_reg_list): Update for new arm_reg_parse args.
859 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
860 (parse_neon_el_struct_list): New function. Parse element/structure
861 register lists for VLD<n>/VST<n> instructions.
862 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
863 (s_arm_unwind_save_mmxwr): Likewise.
864 (s_arm_unwind_save_mmxwcg): Likewise.
865 (s_arm_unwind_movsp): Likewise.
866 (s_arm_unwind_setfp): Likewise.
867 (parse_big_immediate): New function. Parse an immediate, which may be
868 64 bits wide. Put results in inst.operands[i].
869 (parse_shift): Update for new arm_reg_parse args.
870 (parse_address): Likewise. Add parsing of alignment specifiers.
871 (parse_neon_mov): Parse the operands of a VMOV instruction.
872 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
873 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
874 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
875 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
876 (parse_operands): Handle new codes above.
877 (encode_arm_vfp_sp_reg): Rename to...
878 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
879 selected VFP version only supports D0-D15.
880 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
881 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
882 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
883 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
884 encode_arm_vfp_reg name, and allow 32 D regs.
885 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
886 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
888 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
889 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
890 constant-load and conversion insns introduced with VFPv3.
891 (neon_tab_entry): New struct.
892 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
893 those which are the targets of pseudo-instructions.
894 (neon_opc): Enumerate opcodes, use as indices into...
895 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
896 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
897 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
898 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
900 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
902 (neon_type_mask): New. Compact type representation for type checking.
903 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
904 permitted type combinations.
905 (N_IGNORE_TYPE): New macro.
906 (neon_check_shape): New function. Check an instruction shape for
907 multiple alternatives. Return the specific shape for the current
909 (neon_modify_type_size): New function. Modify a vector type and size,
910 depending on the bit mask in argument 1.
911 (neon_type_promote): New function. Convert a given "key" type (of an
912 operand) into the correct type for a different operand, based on a bit
914 (type_chk_of_el_type): New function. Convert a type and size into the
915 compact representation used for type checking.
916 (el_type_of_type_ckh): New function. Reverse of above (only when a
917 single bit is set in the bit mask).
918 (modify_types_allowed): New function. Alter a mask of allowed types
919 based on a bit mask of modifications.
920 (neon_check_type): New function. Check the type of the current
921 instruction against the variable argument list. The "key" type of the
922 instruction is returned.
923 (neon_dp_fixup): New function. Fill in and modify instruction bits for
924 a Neon data-processing instruction depending on whether we're in ARM
925 mode or Thumb-2 mode.
926 (neon_logbits): New function.
927 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
928 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
929 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
930 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
931 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
932 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
933 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
934 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
935 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
936 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
937 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
938 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
939 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
940 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
941 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
942 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
943 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
944 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
945 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
946 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
947 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
948 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
949 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
950 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
951 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
953 (parse_neon_type): New function. Parse Neon type specifier.
954 (opcode_lookup): Allow parsing of Neon type specifiers.
955 (REGNUM2, REGSETH, REGSET2): New macros.
956 (reg_names): Add new VFPv3 and Neon registers.
957 (NUF, nUF, NCE, nCE): New macros for opcode table.
958 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
959 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
960 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
961 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
962 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
963 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
964 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
965 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
966 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
967 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
968 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
969 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
970 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
971 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
973 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
974 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
975 (arm_option_cpu_value): Add vfp3 and neon.
976 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
979 2006-04-25 Bob Wilson <bob.wilson@acm.org>
981 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
982 syntax instead of hardcoded opcodes with ".w18" suffixes.
983 (wide_branch_opcode): New.
984 (build_transition): Use it to check for wide branch opcodes with
985 either ".w18" or ".w15" suffixes.
987 2006-04-25 Bob Wilson <bob.wilson@acm.org>
989 * config/tc-xtensa.c (xtensa_create_literal_symbol,
990 xg_assemble_literal, xg_assemble_literal_space): Do not set the
991 frag's is_literal flag.
993 2006-04-25 Bob Wilson <bob.wilson@acm.org>
995 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
997 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
999 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1000 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1001 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1002 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1003 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1005 2005-04-20 Paul Brook <paul@codesourcery.com>
1007 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1009 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1011 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1013 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1014 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1015 Make some cpus unsupported on ELF. Run "make dep-am".
1016 * Makefile.in: Regenerate.
1018 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1020 * configure.in (--enable-targets): Indent help message.
1021 * configure: Regenerate.
1023 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1026 * config/tc-i386.c (i386_immediate): Check illegal immediate
1029 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1031 * config/tc-i386.c: Formatting.
1032 (output_disp, output_imm): ISO C90 params.
1034 * frags.c (frag_offset_fixed_p): Constify args.
1035 * frags.h (frag_offset_fixed_p): Ditto.
1037 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1038 (COFF_MAGIC): Delete.
1040 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1042 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1044 * po/POTFILES.in: Regenerated.
1046 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1048 * doc/as.texinfo: Mention that some .type syntaxes are not
1049 supported on all architectures.
1051 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1053 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1054 instructions when such transformations have been disabled.
1056 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1058 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1059 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1060 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1061 decoding the loop instructions. Remove current_offset variable.
1062 (xtensa_fix_short_loop_frags): Likewise.
1063 (min_bytes_to_other_loop_end): Remove current_offset argument.
1065 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1067 * config/tc-z80.c (z80_optimize_expr): Removed.
1068 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1070 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1072 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1073 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1074 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1075 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1076 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1077 at90can64, at90usb646, at90usb647, at90usb1286 and
1079 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1081 2006-04-07 Paul Brook <paul@codesourcery.com>
1083 * config/tc-arm.c (parse_operands): Set default error message.
1085 2006-04-07 Paul Brook <paul@codesourcery.com>
1087 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1089 2006-04-07 Paul Brook <paul@codesourcery.com>
1091 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1093 2006-04-07 Paul Brook <paul@codesourcery.com>
1095 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1096 (move_or_literal_pool): Handle Thumb-2 instructions.
1097 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1099 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1102 * config/tc-i386.c (match_template): Move 64-bit operand tests
1105 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1107 * po/Make-in: Add install-html target.
1108 * Makefile.am: Add install-html and install-html-recursive targets.
1109 * Makefile.in: Regenerate.
1110 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1111 * configure: Regenerate.
1112 * doc/Makefile.am: Add install-html and install-html-am targets.
1113 * doc/Makefile.in: Regenerate.
1115 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1117 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1120 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1121 Daniel Jacobowitz <dan@codesourcery.com>
1123 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1124 (GOTT_BASE, GOTT_INDEX): New.
1125 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1126 GOTT_INDEX when generating VxWorks PIC.
1127 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1128 use the generic *-*-vxworks* stanza instead.
1130 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1133 * frags.c (frag_offset_fixed_p): New function.
1134 * frags.h (frag_offset_fixed_p): Declare.
1135 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1136 (resolve_expression): Likewise.
1138 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1140 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1141 of the same length but different numbers of slots.
1143 2006-03-30 Andreas Schwab <schwab@suse.de>
1145 * configure.in: Fix help string for --enable-targets option.
1146 * configure: Regenerate.
1148 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1150 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1151 (m68k_ip): ... here. Use for all chips. Protect against buffer
1152 overrun and avoid excessive copying.
1154 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1155 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1156 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1157 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1158 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1159 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1160 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1161 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1162 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1163 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1164 (struct m68k_cpu): Change chip field to control_regs.
1165 (current_chip): Remove.
1166 (control_regs): New.
1167 (m68k_archs, m68k_extensions): Adjust.
1168 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1169 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1170 (find_cf_chip): Reimplement for new organization of cpu table.
1171 (select_control_regs): Remove.
1173 (struct save_opts): Save control regs, not chip.
1174 (s_save, s_restore): Adjust.
1175 (m68k_lookup_cpu): Give deprecated warning when necessary.
1176 (m68k_init_arch): Adjust.
1177 (md_show_usage): Adjust for new cpu table organization.
1179 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1181 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1182 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1183 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1185 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1186 (any_gotrel): New rule.
1187 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1188 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1190 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1191 (bfin_pic_ptr): New function.
1192 (md_pseudo_table): Add it for ".picptr".
1193 (OPTION_FDPIC): New macro.
1194 (md_longopts): Add -mfdpic.
1195 (md_parse_option): Handle it.
1196 (md_begin): Set BFD flags.
1197 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1198 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1200 * Makefile.am (bfin-parse.o): Update dependencies.
1201 (DEPTC_bfin_elf): Likewise.
1202 * Makefile.in: Regenerate.
1204 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1206 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1207 mcfemac instead of mcfmac.
1209 2006-03-23 Michael Matz <matz@suse.de>
1211 * config/tc-i386.c (type_names): Correct placement of 'static'.
1212 (reloc): Map some more relocs to their 64 bit counterpart when
1214 (output_insn): Work around breakage if DEBUG386 is defined.
1215 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1216 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1217 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1218 different from i386.
1219 (output_imm): Ditto.
1220 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1222 (md_convert_frag): Jumps can now be larger than 2GB away, error
1224 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1225 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1227 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1228 Daniel Jacobowitz <dan@codesourcery.com>
1229 Phil Edwards <phil@codesourcery.com>
1230 Zack Weinberg <zack@codesourcery.com>
1231 Mark Mitchell <mark@codesourcery.com>
1232 Nathan Sidwell <nathan@codesourcery.com>
1234 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1235 (md_begin): Complain about -G being used for PIC. Don't change
1236 the text, data and bss alignments on VxWorks.
1237 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1238 generating VxWorks PIC.
1239 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1240 (macro): Likewise, but do not treat la $25 specially for
1241 VxWorks PIC, and do not handle jal.
1242 (OPTION_MVXWORKS_PIC): New macro.
1243 (md_longopts): Add -mvxworks-pic.
1244 (md_parse_option): Don't complain about using PIC and -G together here.
1245 Handle OPTION_MVXWORKS_PIC.
1246 (md_estimate_size_before_relax): Always use the first relaxation
1247 sequence on VxWorks.
1248 * config/tc-mips.h (VXWORKS_PIC): New.
1250 2006-03-21 Paul Brook <paul@codesourcery.com>
1252 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1254 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1256 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1257 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1258 (get_loop_align_size): New.
1259 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1260 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1261 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1262 (get_noop_aligned_address): Use get_loop_align_size.
1263 (get_aligned_diff): Likewise.
1265 2006-03-21 Paul Brook <paul@codesourcery.com>
1267 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1269 2006-03-20 Paul Brook <paul@codesourcery.com>
1271 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1272 (do_t_branch): Encode branches inside IT blocks as unconditional.
1273 (do_t_cps): New function.
1274 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1275 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1276 (opcode_lookup): Allow conditional suffixes on all instructions in
1278 (md_assemble): Advance condexec state before checking for errors.
1279 (insns): Use do_t_cps.
1281 2006-03-20 Paul Brook <paul@codesourcery.com>
1283 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1284 outputting the insn.
1286 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1288 * config/tc-vax.c: Update copyright year.
1289 * config/tc-vax.h: Likewise.
1291 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1293 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1295 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1297 2006-03-17 Paul Brook <paul@codesourcery.com>
1299 * config/tc-arm.c (insns): Add ldm and stm.
1301 2006-03-17 Ben Elliston <bje@au.ibm.com>
1304 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1306 2006-03-16 Paul Brook <paul@codesourcery.com>
1308 * config/tc-arm.c (insns): Add "svc".
1310 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1312 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1313 flag and avoid double underscore prefixes.
1315 2006-03-10 Paul Brook <paul@codesourcery.com>
1317 * config/tc-arm.c (md_begin): Handle EABIv5.
1318 (arm_eabis): Add EF_ARM_EABI_VER5.
1319 * doc/c-arm.texi: Document -meabi=5.
1321 2006-03-10 Ben Elliston <bje@au.ibm.com>
1323 * app.c (do_scrub_chars): Simplify string handling.
1325 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1326 Daniel Jacobowitz <dan@codesourcery.com>
1327 Zack Weinberg <zack@codesourcery.com>
1328 Nathan Sidwell <nathan@codesourcery.com>
1329 Paul Brook <paul@codesourcery.com>
1330 Ricardo Anguiano <anguiano@codesourcery.com>
1331 Phil Edwards <phil@codesourcery.com>
1333 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1334 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1336 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1337 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1338 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1340 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1342 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1343 even when using the text-section-literals option.
1345 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1347 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1349 (m68k_ip): <case 'J'> Check we have some control regs.
1350 (md_parse_option): Allow raw arch switch.
1351 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1352 whether 68881 or cfloat was meant by -mfloat.
1353 (md_show_usage): Adjust extension display.
1354 (m68k_elf_final_processing): Adjust.
1356 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1358 * config/tc-avr.c (avr_mod_hash_value): New function.
1359 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1360 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1361 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1362 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1364 (tc_gen_reloc): Handle substractions of symbols, if possible do
1365 fixups, abort otherwise.
1366 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1367 tc_fix_adjustable): Define.
1369 2006-03-02 James E Wilson <wilson@specifix.com>
1371 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1372 change the template, then clear md.slot[curr].end_of_insn_group.
1374 2006-02-28 Jan Beulich <jbeulich@novell.com>
1376 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1378 2006-02-28 Jan Beulich <jbeulich@novell.com>
1381 * macro.c (getstring): Don't treat parentheses special anymore.
1382 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1383 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1386 2006-02-28 Mat <mat@csail.mit.edu>
1388 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1390 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1392 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1394 (CFI_signal_frame): Define.
1395 (cfi_pseudo_table): Add .cfi_signal_frame.
1396 (dot_cfi): Handle CFI_signal_frame.
1397 (output_cie): Handle cie->signal_frame.
1398 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1399 different. Copy signal_frame from FDE to newly created CIE.
1400 * doc/as.texinfo: Document .cfi_signal_frame.
1402 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1404 * doc/Makefile.am: Add html target.
1405 * doc/Makefile.in: Regenerate.
1406 * po/Make-in: Add html target.
1408 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1410 * config/tc-i386.c (output_insn): Support Intel Merom New
1413 * config/tc-i386.h (CpuMNI): New.
1414 (CpuUnknownFlags): Add CpuMNI.
1416 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1418 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1419 (hpriv_reg_table): New table for hyperprivileged registers.
1420 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1423 2006-02-24 DJ Delorie <dj@redhat.com>
1425 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1426 (tc_gen_reloc): Don't define.
1427 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1428 (OPTION_LINKRELAX): New.
1429 (md_longopts): Add it.
1431 (md_parse_options): Set it.
1432 (md_assemble): Emit relaxation relocs as needed.
1433 (md_convert_frag): Emit relaxation relocs as needed.
1434 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1435 (m32c_apply_fix): New.
1436 (tc_gen_reloc): New.
1437 (m32c_force_relocation): Force out jump relocs when relaxing.
1438 (m32c_fix_adjustable): Return false if relaxing.
1440 2006-02-24 Paul Brook <paul@codesourcery.com>
1442 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1443 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1444 (struct asm_barrier_opt): Define.
1445 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1446 (parse_psr): Accept V7M psr names.
1447 (parse_barrier): New function.
1448 (enum operand_parse_code): Add OP_oBARRIER.
1449 (parse_operands): Implement OP_oBARRIER.
1450 (do_barrier): New function.
1451 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1452 (do_t_cpsi): Add V7M restrictions.
1453 (do_t_mrs, do_t_msr): Validate V7M variants.
1454 (md_assemble): Check for NULL variants.
1455 (v7m_psrs, barrier_opt_names): New tables.
1456 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1457 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1458 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1459 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1460 (struct cpu_arch_ver_table): Define.
1461 (cpu_arch_ver): New.
1462 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1463 Tag_CPU_arch_profile.
1464 * doc/c-arm.texi: Document new cpu and arch options.
1466 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1468 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1470 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1472 * config/tc-ia64.c: Update copyright years.
1474 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1476 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1479 2005-02-22 Paul Brook <paul@codesourcery.com>
1481 * config/tc-arm.c (do_pld): Remove incorrect write to
1483 (encode_thumb32_addr_mode): Use correct operand.
1485 2006-02-21 Paul Brook <paul@codesourcery.com>
1487 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1489 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1490 Anil Paranjape <anilp1@kpitcummins.com>
1491 Shilin Shakti <shilins@kpitcummins.com>
1493 * Makefile.am: Add xc16x related entry.
1494 * Makefile.in: Regenerate.
1495 * configure.in: Added xc16x related entry.
1496 * configure: Regenerate.
1497 * config/tc-xc16x.h: New file
1498 * config/tc-xc16x.c: New file
1499 * doc/c-xc16x.texi: New file for xc16x
1500 * doc/all.texi: Entry for xc16x
1501 * doc/Makefile.texi: Added c-xc16x.texi
1502 * NEWS: Announce the support for the new target.
1504 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1506 * configure.tgt: set emulation for mips-*-netbsd*
1508 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1510 * config.in: Rebuilt.
1512 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1514 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1515 from 1, not 0, in error messages.
1516 (md_assemble): Simplify special-case check for ENTRY instructions.
1517 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1518 operand in error message.
1520 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1522 * configure.tgt (arm-*-linux-gnueabi*): Change to
1525 2006-02-10 Nick Clifton <nickc@redhat.com>
1527 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1528 32-bit value is propagated into the upper bits of a 64-bit long.
1530 * config/tc-arc.c (init_opcode_tables): Fix cast.
1531 (arc_extoper, md_operand): Likewise.
1533 2006-02-09 David Heine <dlheine@tensilica.com>
1535 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1536 each relaxation step.
1538 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1540 * configure.in (CHECK_DECLS): Add vsnprintf.
1541 * configure: Regenerate.
1542 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1543 include/declare here, but...
1544 * as.h: Move code detecting VARARGS idiom to the top.
1545 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1546 (vsnprintf): Declare if not already declared.
1548 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1550 * as.c (close_output_file): New.
1551 (main): Register close_output_file with xatexit before
1552 dump_statistics. Don't call output_file_close.
1554 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1556 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1557 mcf5329_control_regs): New.
1558 (not_current_architecture, selected_arch, selected_cpu): New.
1559 (m68k_archs, m68k_extensions): New.
1560 (archs): Renamed to ...
1561 (m68k_cpus): ... here. Adjust.
1563 (md_pseudo_table): Add arch and cpu directives.
1564 (find_cf_chip, m68k_ip): Adjust table scanning.
1565 (no_68851, no_68881): Remove.
1566 (md_assemble): Lazily initialize.
1567 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1568 (md_init_after_args): Move functionality to m68k_init_arch.
1569 (mri_chip): Adjust table scanning.
1570 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1571 options with saner parsing.
1572 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1573 m68k_init_arch): New.
1574 (s_m68k_cpu, s_m68k_arch): New.
1575 (md_show_usage): Adjust.
1576 (m68k_elf_final_processing): Set CF EF flags.
1577 * config/tc-m68k.h (m68k_init_after_args): Remove.
1578 (tc_init_after_args): Remove.
1579 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1580 (M68k-Directives): Document .arch and .cpu directives.
1582 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1584 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1585 synonyms for equ and defl.
1586 (z80_cons_fix_new): New function.
1587 (emit_byte): Disallow relative jumps to absolute locations.
1588 (emit_data): Only handle defb, prototype changed, because defb is
1589 now handled as pseudo-op rather than an instruction.
1590 (instab): Entries for defb,defw,db,dw moved from here...
1591 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1592 Add entries for def24,def32,d24,d32.
1593 (md_assemble): Improved error handling.
1594 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1595 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1596 (z80_cons_fix_new): Declare.
1597 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1598 (def24,d24,def32,d32): New pseudo-ops.
1600 2006-02-02 Paul Brook <paul@codesourcery.com>
1602 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1604 2005-02-02 Paul Brook <paul@codesourcery.com>
1606 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1607 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1608 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1609 T2_OPCODE_RSB): Define.
1610 (thumb32_negate_data_op): New function.
1611 (md_apply_fix): Use it.
1613 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1615 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1617 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1618 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1620 (relaxation_requirements): Add pfinish_frag argument and use it to
1621 replace setting tinsn->record_fix fields.
1622 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1623 and vinsn_to_insnbuf. Remove references to record_fix and
1624 slot_sub_symbols fields.
1625 (xtensa_mark_narrow_branches): Delete unused code.
1626 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1628 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1630 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1631 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1632 of the record_fix field. Simplify error messages for unexpected
1634 (set_expr_symbol_offset_diff): Delete.
1636 2006-01-31 Paul Brook <paul@codesourcery.com>
1638 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1640 2006-01-31 Paul Brook <paul@codesourcery.com>
1641 Richard Earnshaw <rearnsha@arm.com>
1643 * config/tc-arm.c: Use arm_feature_set.
1644 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1645 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1646 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1649 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1650 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1651 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1652 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1654 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1655 (arm_opts): Move old cpu/arch options from here...
1656 (arm_legacy_opts): ... to here.
1657 (md_parse_option): Search arm_legacy_opts.
1658 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1659 (arm_float_abis, arm_eabis): Make const.
1661 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1663 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1665 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1667 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1668 in load immediate intruction.
1670 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1672 * config/bfin-parse.y (value_match): Use correct conversion
1673 specifications in template string for __FILE__ and __LINE__.
1677 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1679 Introduce TLS descriptors for i386 and x86_64.
1680 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1681 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1682 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1683 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1684 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1686 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1687 (lex_got): Handle @tlsdesc and @tlscall.
1688 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1690 2006-01-11 Nick Clifton <nickc@redhat.com>
1692 Fixes for building on 64-bit hosts:
1693 * config/tc-avr.c (mod_index): New union to allow conversion
1694 between pointers and integers.
1695 (md_begin, avr_ldi_expression): Use it.
1696 * config/tc-i370.c (md_assemble): Add cast for argument to print
1698 * config/tc-tic54x.c (subsym_substitute): Likewise.
1699 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1700 opindex field of fr_cgen structure into a pointer so that it can
1701 be stored in a frag.
1702 * config/tc-mn10300.c (md_assemble): Likewise.
1703 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1705 * config/tc-v850.c: Replace uses of (int) casts with correct
1708 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1711 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1713 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1716 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1717 a local-label reference.
1719 For older changes see ChangeLog-2005
1725 version-control: never