gas/ChangeLog

   1 2006-07-13 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
   2            Michael Meissner             <michael.meissner@amd.com>
   3
   4         * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
   5         (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
   6         * config/tc-i386.c (cpu_arch): Add support for AmdFam10
   7         architecture.
   8         (i386_align_code): Ditto.
   9         (md_assemble_code): Add support for insertq/extrq instructions,
  10         swapping as needed for intel syntax.
  11         (swap_imm_operands): New function to swap immediate operands.
  12         (swap_operands): Deal with 4 operand instructions.
  13         (build_modrm_byte): Add support for insertq instruction.
  14
  15 2006-07-13  H.J. Lu  <hongjiu.lu@intel.com>
  16
  17         * config/tc-i386.h (Size64): Fix a typo in comment.
  18
  19 2006-07-12  Nick Clifton  <nickc@redhat.com>
  20
  21         * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
  22         fixup_segment() to repeat a range check on a value that has
  23         already been checked here.
  24
  25 2006-07-07  James E Wilson  <wilson@specifix.com>
  26
  27         * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
  28
  29 2006-07-06  Mohammed Adnène Trojette  <adn@diwi.org>
  30             Nick Clifton  <nickc@redhat.com>
  31
  32         PR binutils/2877
  33         * doc/as.texi: Fix spelling typo: branchs => branches.
  34         * doc/c-m68hc11.texi: Likewise.
  35         * config/tc-m68hc11.c: Likewise.
  36         Support old spelling of command line switch for backwards
  37         compatibility.
  38
  39 2006-07-04  Thiemo Seufer  <ths@mips.com>
  40             David Ung  <davidu@mips.com>
  41
  42         * config/tc-mips.c (s_is_linkonce): New function.
  43         (mips16_mark_labels): Don't adjust mips16 symbol addresses for
  44         weak, external, and linkonce symbols.
  45         (pic_need_relax): Use s_is_linkonce.
  46
  47 2006-06-24  H.J. Lu  <hongjiu.lu@intel.com>
  48
  49         * doc/as.texinfo (Org): Remove space.
  50         (P2align): Add "@var{abs-expr},".
  51
  52 2006-06-23  H.J. Lu  <hongjiu.lu@intel.com>
  53
  54         * config/tc-i386.c (cpu_arch_tune_set): New.
  55         (cpu_arch_isa): Likewise.
  56         (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
  57         nops with short or long nop sequences based on -march=/.arch
  58         and -mtune=.
  59         (set_cpu_arch): Set cpu_arch_isa.  If cpu_arch_tune_set is 0,
  60         set cpu_arch_tune and cpu_arch_tune_flags.
  61         (md_parse_option): For -march=, set cpu_arch_isa and set
  62         cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
  63         0.  Set cpu_arch_tune_set to 1 for -mtune=.
  64         (i386_target_format): Don't set cpu_arch_tune.
  65
  66 2006-06-23  Nigel Stephens  <nigel@mips.com>
  67
  68         * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
  69         generated .sbss.* and .gnu.linkonce.sb.*.
  70
  71 2006-06-23  Thiemo Seufer  <ths@mips.com>
  72             David Ung  <davidu@mips.com>
  73
  74         * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
  75         label_list.
  76         * config/tc-mips.c (label_list): Define per-segment label_list.
  77         (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
  78         append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
  79         mips_from_file_after_relocs, mips_define_label): Use per-segment
  80         label_list.
  81
  82 2006-06-22  Thiemo Seufer  <ths@mips.com>
  83
  84         * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
  85         (append_insn): Use it.
  86         (md_apply_fix): Whitespace formatting.
  87         (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
  88         mips16_extended_frag): Remove register specifier.
  89         (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
  90         constants.
  91
  92 2006-06-21  Mark Shinwell  <shinwell@codesourcery.com>
  93
  94         * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New.  Parse
  95         a directive saving VFP registers for ARMv6 or later.
  96         (s_arm_unwind_save): Add parameter arch_v6 and call
  97         s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
  98         appropriate.
  99         (md_pseudo_table): Add entry for new "vsave" directive.
 100         * doc/c-arm.texi: Correct error in example for "save"
 101         directive (fstmdf -> fstmdx).  Also document "vsave" directive.
 102
 103 2006-06-18  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 104             Anatoly Sokolov <aesok@post.ru>
 105
 106         * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
 107         and atmega644p devices. Rename atmega164/atmega324 devices to
 108         atmega164p/atmega324p.
 109         * doc/c-avr.texi: Document new mcu and arch options.
 110
 111 2006-06-17  Nick Clifton  <nickc@redhat.com>
 112
 113         * config/tc-arm.c (enum parse_operand_result): Move outside of
 114         #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
 115
 116 2006-06-16  H.J. Lu  <hongjiu.lu@intel.com>
 117
 118         * config/tc-i386.h (processor_type): New.
 119         (arch_entry): Add type.
 120
 121         * config/tc-i386.c (cpu_arch_tune): New.
 122         (cpu_arch_tune_flags): Likewise.
 123         (cpu_arch_isa_flags): Likewise.
 124         (cpu_arch): Updated.
 125         (set_cpu_arch): Also update cpu_arch_isa_flags.
 126         (md_assemble): Update cpu_arch_isa_flags.
 127         (OPTION_MARCH): New.
 128         (OPTION_MTUNE): Likewise.
 129         (md_longopts): Add -march= and -mtune=.
 130         (md_parse_option): Support -march= and -mtune=.
 131         (md_show_usage): Add -march=CPU/-mtune=CPU.
 132         (i386_target_format): Also update cpu_arch_isa_flags,
 133         cpu_arch_tune and cpu_arch_tune_flags.
 134
 135         * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
 136
 137         * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
 138
 139 2006-06-15  Mark Shinwell  <shinwell@codesourcery.com>
 140
 141         * config/tc-arm.c (enum parse_operand_result): New.
 142         (struct group_reloc_table_entry): New.
 143         (enum group_reloc_type): New.
 144         (group_reloc_table): New array.
 145         (find_group_reloc_table_entry): New function.
 146         (parse_shifter_operand_group_reloc): New function.
 147         (parse_address_main): New function, incorporating code
 148         from the old parse_address function.  To be used via...
 149         (parse_address): wrapper for parse_address_main; and
 150         (parse_address_group_reloc): new function, likewise.
 151         (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
 152         OP_ADDRGLDRS, OP_ADDRGLDC.
 153         (parse_operands): Support for these new operand codes.
 154         New macro po_misc_or_fail_no_backtrack.
 155         (encode_arm_cp_address): Preserve group relocations.
 156         (insns): Modify to use the above operand codes where group
 157         relocations are permitted.
 158         (md_apply_fix): Handle the group relocations
 159         ALU_PC_G0_NC through LDC_SB_G2.
 160         (tc_gen_reloc): Likewise.
 161         (arm_force_relocation): Leave group relocations for the linker.
 162         (arm_fix_adjustable): Likewise.
 163
 164 2006-06-15  Julian Brown  <julian@codesourcery.com>
 165
 166         * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
 167         (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
 168         relocs properly.
 169
 170 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 171
 172         * config/tc-i386.c (process_suffix): Don't add rex64 for
 173         "xchg %rax,%rax".
 174
 175 2006-06-09  Thiemo Seufer  <ths@mips.com>
 176
 177         * config/tc-mips.c (mips_ip): Maintain argument count.
 178
 179 2006-06-09  Alan Modra  <amodra@bigpond.net.au>
 180
 181         * config/tc-iq2000.c: Include sb.h.
 182
 183 2006-06-08  Nigel Stephens  <nigel@mips.com>
 184
 185         * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
 186         aliases for better compatibility with SGI tools.
 187
 188 2006-06-08  Alan Modra  <amodra@bigpond.net.au>
 189
 190         * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
 191         * Makefile.am (GASLIBS): Expand @BFDLIB@.
 192         (BFDVER_H): Delete.
 193         (OBJS): Expand @ALL_OBJ_DEPS@.  Depend on all fopen-*.h variants.
 194         (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
 195         (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
 196         Run "make dep-am".
 197         * dep-in.sed: Don't substitute bfdver.h.  Do remove symcat.h.
 198         * Makefile.in: Regenerate.
 199         * doc/Makefile.in: Regenerate.
 200         * configure: Regenerate.
 201
 202 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 203
 204         * po/Make-in (pdf, ps): New dummy targets.
 205
 206 2006-06-07  Julian Brown  <julian@codesourcery.com>
 207
 208         * config/tc-arm.c (stdarg.h): include.
 209         (arm_it): Add uncond_value field. Add isvec and issingle to operand
 210         array.
 211         (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
 212         REG_TYPE_NSDQ (single, double or quad vector reg).
 213         (reg_expected_msgs): Update.
 214         (BAD_FPU): Add macro for unsupported FPU instruction error.
 215         (parse_neon_type): Support 'd' as an alias for .f64.
 216         (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
 217         sets of registers.
 218         (parse_vfp_reg_list): Don't update first arg on error.
 219         (parse_neon_mov): Support extra syntax for VFP moves.
 220         (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
 221         OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
 222         (parse_operands): Support isvec, issingle operands fields, new parse
 223         codes above.
 224         (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
 225         msr variants.
 226         (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
 227         (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
 228         (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
 229         (NEON_SHAPE_DEF): New macro. Define table of possible instruction
 230         shapes.
 231         (neon_shape): Redefine in terms of above.
 232         (neon_shape_class): New enumeration, table of shape classes.
 233         (neon_shape_el): New enumeration. One element of a shape.
 234         (neon_shape_el_size): Register widths of above, where appropriate.
 235         (neon_shape_info): New struct. Info for shape table.
 236         (neon_shape_tab): New array.
 237         (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
 238         (neon_check_shape): Rewrite as...
 239         (neon_select_shape): New function to classify instruction shapes,
 240         driven by new table neon_shape_tab array.
 241         (neon_quad): New function. Return 1 if shape should set Q flag in
 242         instructions (or equivalent), 0 otherwise.
 243         (type_chk_of_el_type): Support F64.
 244         (el_type_of_type_chk): Likewise.
 245         (neon_check_type): Add support for VFP type checking (VFP data
 246         elements fill their containing registers).
 247         (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
 248         in thumb mode for VFP instructions.
 249         (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
 250         and encode the current instruction as if it were that opcode.
 251         (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
 252         arguments, call function in PFN.
 253         (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
 254         (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
 255         (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
 256         (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
 257         (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
 258         Redirect Neon-syntax VFP instructions to VFP instruction handlers.
 259         (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
 260         (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
 261         (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
 262         (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
 263         (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
 264         (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
 265         (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
 266         (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
 267         (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
 268         neon_quad.
 269         (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
 270         between VFP and Neon turns out to belong to Neon. Perform
 271         architecture check and fill in condition field if appropriate.
 272         (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
 273         (do_neon_cvt): Add support for VFP variants of instructions.
 274         (neon_cvt_flavour): Extend to cover VFP conversions.
 275         (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
 276         vmov variants.
 277         (do_neon_ldr_str): Handle single-precision VFP load/store.
 278         (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
 279         NS_NULL not NS_IGNORE.
 280         (opcode_tag): Add OT_csuffixF for operands which either take a
 281         conditional suffix, or have 0xF in the condition field.
 282         (md_assemble): Add support for OT_csuffixF.
 283         (NCE): Replace macro with...
 284         (NCE_tag, NCE, NCEF): New macros.
 285         (nCE): Replace macro with...
 286         (nCE_tag, nCE, nCEF): New macros.
 287         (insns): Add support for VFP insns or VFP versions of insns msr,
 288         mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
 289         vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
 290         vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
 291         VFP/Neon insns together.
 292
 293 2006-06-07  Alan Modra  <amodra@bigpond.net.au>
 294             Ladislav Michl  <ladis@linux-mips.org>
 295
 296         * app.c: Don't include headers already included by as.h.
 297         * as.c: Likewise.
 298         * atof-generic.c: Likewise.
 299         * cgen.c: Likewise.
 300         * dwarf2dbg.c: Likewise.
 301         * expr.c: Likewise.
 302         * input-file.c: Likewise.
 303         * input-scrub.c: Likewise.
 304         * macro.c: Likewise.
 305         * output-file.c: Likewise.
 306         * read.c: Likewise.
 307         * sb.c: Likewise.
 308         * config/bfin-lex.l: Likewise.
 309         * config/obj-coff.h: Likewise.
 310         * config/obj-elf.h: Likewise.
 311         * config/obj-som.h: Likewise.
 312         * config/tc-arc.c: Likewise.
 313         * config/tc-arm.c: Likewise.
 314         * config/tc-avr.c: Likewise.
 315         * config/tc-bfin.c: Likewise.
 316         * config/tc-cris.c: Likewise.
 317         * config/tc-d10v.c: Likewise.
 318         * config/tc-d30v.c: Likewise.
 319         * config/tc-dlx.h: Likewise.
 320         * config/tc-fr30.c: Likewise.
 321         * config/tc-frv.c: Likewise.
 322         * config/tc-h8300.c: Likewise.
 323         * config/tc-hppa.c: Likewise.
 324         * config/tc-i370.c: Likewise.
 325         * config/tc-i860.c: Likewise.
 326         * config/tc-i960.c: Likewise.
 327         * config/tc-ip2k.c: Likewise.
 328         * config/tc-iq2000.c: Likewise.
 329         * config/tc-m32c.c: Likewise.
 330         * config/tc-m32r.c: Likewise.
 331         * config/tc-maxq.c: Likewise.
 332         * config/tc-mcore.c: Likewise.
 333         * config/tc-mips.c: Likewise.
 334         * config/tc-mmix.c: Likewise.
 335         * config/tc-mn10200.c: Likewise.
 336         * config/tc-mn10300.c: Likewise.
 337         * config/tc-msp430.c: Likewise.
 338         * config/tc-mt.c: Likewise.
 339         * config/tc-ns32k.c: Likewise.
 340         * config/tc-openrisc.c: Likewise.
 341         * config/tc-ppc.c: Likewise.
 342         * config/tc-s390.c: Likewise.
 343         * config/tc-sh.c: Likewise.
 344         * config/tc-sh64.c: Likewise.
 345         * config/tc-sparc.c: Likewise.
 346         * config/tc-tic30.c: Likewise.
 347         * config/tc-tic4x.c: Likewise.
 348         * config/tc-tic54x.c: Likewise.
 349         * config/tc-v850.c: Likewise.
 350         * config/tc-vax.c: Likewise.
 351         * config/tc-xc16x.c: Likewise.
 352         * config/tc-xstormy16.c: Likewise.
 353         * config/tc-xtensa.c: Likewise.
 354         * config/tc-z80.c: Likewise.
 355         * config/tc-z8k.c: Likewise.
 356         * macro.h: Don't include sb.h or ansidecl.h.
 357         * sb.h: Don't include stdio.h or ansidecl.h.
 358         * cond.c: Include sb.h.
 359         * itbl-lex.l: Include as.h instead of other system headers.
 360         * itbl-parse.y: Likewise.
 361         * itbl-ops.c: Similarly.
 362         * itbl-ops.h: Don't include as.h or ansidecl.h.
 363         * config/bfin-defs.h: Don't include bfd.h or as.h.
 364         * config/bfin-parse.y: Include as.h instead of other system headers.
 365
 366 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 367             Anton Blanchard  <anton@samba.org>
 368
 369         * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
 370         (md_show_usage): Document it.
 371         (ppc_setup_opcodes): Test power6 opcode flag bits.
 372         * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
 373
 374 2006-06-06  Thiemo Seufer  <ths@mips.com>
 375             Chao-ying Fu  <fu@mips.com>
 376
 377         * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
 378         (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
 379         (macro_build): Update comment.
 380         (mips_ip): Allow DSP64 instructions for MIPS64R2.
 381         (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
 382         CPU_HAS_MDMX.
 383         (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
 384         MIPS_CPU_ASE_MDMX flags for sb1.
 385
 386 2006-06-05  Thiemo Seufer  <ths@mips.com>
 387
 388         * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
 389         appropriate.
 390         (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
 391         (mips_ip): Make overflowed/underflowed constant arguments in DSP
 392         and MT instructions a fatal error. Use INSERT_OPERAND where
 393         appropriate. Improve warnings for break and wait code overflows.
 394         Use symbolic constant of OP_MASK_COPZ.
 395         (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
 396
 397 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 398
 399         * po/Make-in (top_builddir): Define.
 400
 401 2006-06-02  Joseph S. Myers  <joseph@codesourcery.com>
 402
 403         * doc/Makefile.am (TEXI2DVI): Define.
 404         * doc/Makefile.in: Regenerate.
 405         * doc/c-arc.texi: Fix typo.
 406
 407 2006-06-01  Alan Modra  <amodra@bigpond.net.au>
 408
 409         * config/obj-ieee.c: Delete.
 410         * config/obj-ieee.h: Delete.
 411         * Makefile.am (OBJ_FORMATS): Remove ieee.
 412         (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
 413         (obj-ieee.o): Remove rule.
 414         * Makefile.in: Regenerate.
 415         * configure.in (atof): Remove tahoe.
 416         (OBJ_MAYBE_IEEE): Don't define.
 417         * configure: Regenerate.
 418         * config.in: Regenerate.
 419         * doc/Makefile.in: Regenerate.
 420         * po/POTFILES.in: Regenerate.
 421
 422 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 423
 424         * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
 425         and LIBINTL_DEP everywhere.
 426         (INTLLIBS): Remove.
 427         (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
 428         * acinclude.m4: Include new gettext macros.
 429         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 430         Remove local code for po/Makefile.
 431         * Makefile.in, configure, doc/Makefile.in: Regenerated.
 432
 433 2006-05-30  Nick Clifton  <nickc@redhat.com>
 434
 435         * po/es.po: Updated Spanish translation.
 436
 437 2006-05-06  Denis Chertykov  <denisc@overta.ru>
 438
 439         * doc/c-avr.texi: New file.
 440         * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
 441         * doc/all.texi: Set AVR
 442         * doc/as.texinfo: Include c-avr.texi
 443
 444 2006-05-28  Jie Zhang  <jie.zhang@analog.com>
 445
 446         * config/bfin-parse.y (check_macfunc): Loose the condition of
 447         calling check_multiply_halfregs ().
 448
 449 2006-05-25  Jie Zhang  <jie.zhang@analog.com>
 450
 451         * config/bfin-parse.y (asm_1): Better check and deal with
 452         vector and scalar Multiply 16-Bit Operands instructions.
 453
 454 2006-05-24  Nick Clifton  <nickc@redhat.com>
 455
 456         * config/tc-hppa.c: Convert to ISO C90 format.
 457         * config/tc-hppa.h: Likewise.
 458
 459 2006-05-24  Carlos O'Donell  <carlos@systemhalted.org>
 460             Randolph Chung  <randolph@tausq.org>
 461
 462         * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
 463         is_tls_ieoff, is_tls_leoff): Define.
 464         (fix_new_hppa): Handle TLS.
 465         (cons_fix_new_hppa): Likewise.
 466         (pa_ip): Likewise.
 467         (md_apply_fix): Handle TLS relocs.
 468         * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
 469
 470 2006-05-24  Bjoern Haase  <bjoern.m.haase@web.de>
 471
 472         * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
 473
 474 2006-05-23  Thiemo Seufer  <ths@mips.com>
 475             David Ung  <davidu@mips.com>
 476             Nigel Stephens  <nigel@mips.com>
 477
 478         [ gas/ChangeLog ]
 479         * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
 480         (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
 481         ISA_HAS_MXHC1): New macros.
 482         (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
 483         ISA_HAS_64BIT_REGS.  Formatting fixes.  Improved comments.
 484         (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
 485         (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
 486         MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
 487         (mips_after_parse_args): Change default handling of float register
 488         size to account for 32bit code with 64bit FP. Better sanity checking
 489         of ISA/ASE/ABI option combinations.
 490         (s_mipsset): Support switching of GPR and FPR sizes via
 491         .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
 492         options.
 493         (mips_elf_final_processing): We should record the use of 64bit FP
 494         registers in 32bit code but we don't, because ELF header flags are
 495         a scarce ressource.
 496         (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
 497         extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
 498         24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
 499         (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
 500         * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
 501         missing -march options. Document .set arch=CPU. Move .set smartmips
 502         to ASE page. Use @code for .set FOO examples.
 503
 504 2006-05-23  Jie Zhang  <jie.zhang@analog.com>
 505
 506         * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
 507         if needed.
 508
 509 2006-05-23  Jie Zhang  <jie.zhang@analog.com>
 510
 511         * config/bfin-defs.h (bfin_equals): Remove declaration.
 512         * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
 513         * config/tc-bfin.c (bfin_name_is_register): Remove.
 514         (bfin_equals): Remove.
 515         * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
 516         (bfin_name_is_register): Remove declaration.
 517
 518 2006-05-19  Thiemo Seufer  <ths@mips.com>
 519             Nigel Stephens  <nigel@mips.com>
 520
 521         * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
 522         (mips_oddfpreg_ok): New function.
 523         (mips_ip): Use it.
 524
 525 2006-05-19  Thiemo Seufer  <ths@mips.com>
 526             David Ung  <davidu@mips.com>
 527
 528         * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
 529         * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
 530         ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
 531         (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
 532         RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
 533         RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
 534         FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
 535         N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
 536         SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
 537         MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
 538         reg_names_o32, reg_names_n32n64): Define register classes.
 539         (reg_lookup): New function, use register classes.
 540         (md_begin): Reserve register names in the symbol table. Simplify
 541         OBJ_ELF defines.
 542         (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
 543         Use reg_lookup.
 544         (mips16_ip): Use reg_lookup.
 545         (tc_get_register): Likewise.
 546         (tc_mips_regname_to_dw2regnum): New function.
 547
 548 2006-05-19  Thiemo Seufer  <ths@mips.com>
 549
 550         * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
 551         Un-constify string argument.
 552         * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
 553         Likewise.
 554         * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
 555         Likewise.
 556         * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
 557         Likewise.
 558         * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
 559         Likewise.
 560         * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
 561         Likewise.
 562         * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
 563         Likewise.
 564
 565 2006-05-19  Nathan Sidwell  <nathan@codesourcery.com>
 566
 567         * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
 568         cfloat/m68881 to correct architecture before using it.
 569
 570 2006-05-16  Bjoern Haase  <bjoern.m.haase@web.de>
 571
 572         * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
 573         constant values.
 574
 575 2006-05-15  Paul Brook  <paul@codesourcery.com>
 576
 577         * config/tc-arm.c (arm_adjust_symtab): Use
 578         bfd_is_arm_special_symbol_name.
 579
 580 2006-05-15  Bob Wilson  <bob.wilson@acm.org>
 581
 582         * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
 583         xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
 584         xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
 585         Handle errors from calls to xtensa_opcode_is_* functions.
 586
 587 2006-05-14  Thiemo Seufer  <ths@mips.com>
 588
 589         * config/tc-mips.c (macro_build): Test for currently active
 590         mips16 option.
 591         (mips16_ip): Reject invalid opcodes.
 592
 593 2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>
 594
 595         * doc/as.texinfo: Rename "Index" to "AS Index",
 596         and "ABORT" to "ABORT (COFF)".
 597
 598 2006-05-11  Paul Brook  <paul@codesourcery.com>
 599
 600         * config/tc-arm.c (parse_half): New function.
 601         (operand_parse_code): Remove OP_Iffff.  Add OP_HALF.
 602         (parse_operands): Ditto.
 603         (do_mov16): Reject invalid relocations.
 604         (do_t_mov16): Ditto.  Use Thumb reloc numbers.
 605         (insns): Replace Iffff with HALF.
 606         (md_apply_fix): Add MOVW and MOVT relocs.
 607         (tc_gen_reloc): Ditto.
 608         * doc/c-arm.texi: Document relocation operators
 609
 610 2006-05-11  Paul Brook  <paul@codesourcery.com>
 611
 612         * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
 613
 614 2006-05-11  Thiemo Seufer  <ths@mips.com>
 615
 616         * config/tc-mips.c (append_insn): Don't check the range of j or
 617         jal addresses.
 618
 619 2006-05-11  Pedro Alves  <pedro_alves@portugalmail.pt>
 620
 621         * config/tc-arm.c (md_pcrel_from_section): Force a bias for
 622         relocs against external symbols for WinCE targets.
 623         (md_apply_fix): Likewise.
 624
 625 2006-05-09  David Ung  <davidu@mips.com>
 626
 627         * config/tc-mips.c (append_insn): Only warn about an out-of-range
 628         j or jal address.
 629
 630 2006-05-09  Nick Clifton  <nickc@redhat.com>
 631
 632         * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
 633         against symbols which are not going to be placed into the symbol
 634         table.
 635
 636 2006-05-09  Ben Elliston  <bje@au.ibm.com>
 637
 638         * expr.c (operand): Remove `if (0 && ..)' statement and
 639         subsequently unused target_op label.  Collapse `if (1 || ..)'
 640         statement.
 641         * app.c (do_scrub_chars): Remove unused case 0, as it is handled
 642         separately above the switch.
 643
 644 2006-05-08  Nick Clifton  <nickc@redhat.com>
 645
 646         PR gas/2623
 647         * config/tc-msp430.c (line_separator_character): Define as |.
 648
 649 2006-05-08  Thiemo Seufer  <ths@mips.com>
 650             Nigel Stephens  <nigel@mips.com>
 651             David Ung  <davidu@mips.com>
 652
 653         * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
 654         (mips_opts): Likewise.
 655         (file_ase_smartmips): New variable.
 656         (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
 657         (macro_build): Handle SmartMIPS instructions.
 658         (mips_ip): Likewise.
 659         (md_longopts): Add argument handling for smartmips.
 660         (md_parse_options, mips_after_parse_args): Likewise.
 661         (s_mipsset): Add .set smartmips support.
 662         (md_show_usage): Document -msmartmips/-mno-smartmips.
 663         * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
 664         .set smartmips.
 665         * doc/c-mips.texi: Likewise.
 666
 667 2006-05-08  Alan Modra  <amodra@bigpond.net.au>
 668
 669         * write.c (relax_segment): Add pass count arg.  Don't error on
 670         negative org/space on first two passes.
 671         (relax_seg_info): New struct.
 672         (relax_seg, write_object_file): Adjust.
 673         * write.h (relax_segment): Update prototype.
 674
 675 2006-05-05  Julian Brown  <julian@codesourcery.com>
 676
 677         * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
 678         checking.
 679         (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
 680         architecture version checks.
 681         (insns): Allow overlapping instructions to be used in VFP mode.
 682
 683 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 684
 685         PR gas/2598
 686         * config/obj-elf.c (obj_elf_change_section): Allow user
 687         specified SHF_ALPHA_GPREL.
 688
 689 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
 690
 691         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
 692         for PMEM related expressions.
 693
 694 2006-05-05  Nick Clifton  <nickc@redhat.com>
 695
 696         PR gas/2582
 697         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
 698         insertion of a directory separator character into a string at a
 699         given offset.  Uses heuristics to decide when to use a backslash
 700         character rather than a forward-slash character.
 701         (dwarf2_directive_loc): Use the macro.
 702         (out_debug_info): Likewise.
 703
 704 2006-05-05  Thiemo Seufer  <ths@mips.com>
 705             David Ung  <davidu@mips.com>
 706
 707         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
 708         instruction.
 709         (macro): Add new case M_CACHE_AB.
 710
 711 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
 712
 713         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
 714         (opcode_lookup): Issue a warning for opcode with
 715         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
 716         identical to OT_cinfix3.
 717         (TxC3w, TC3w, tC3w): New.
 718         (insns): Use tC3w and TC3w for comparison instructions with
 719         's' suffix.
 720
 721 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
 722
 723         * subsegs.h (struct frchain): Delete frch_seg.
 724         (frchain_root): Delete.
 725         (seg_info): Define as macro.
 726         * subsegs.c (frchain_root): Delete.
 727         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
 728         (subsegs_begin, subseg_change): Adjust for above.
 729         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
 730         rather than to one big list.
 731         (subseg_get): Don't special case abs, und sections.
 732         (subseg_new, subseg_force_new): Don't set frchainP here.
 733         (seg_info): Delete.
 734         (subsegs_print_statistics): Adjust frag chain control list traversal.
 735         * debug.c (dmp_frags):  Likewise.
 736         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
 737         at frchain_root.  Make use of known frchain ordering.
 738         (last_frag_for_seg): Likewise.
 739         (get_frag_fix): Likewise.  Add seg param.
 740         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
 741         * write.c (chain_frchains_together_1): Adjust for struct frchain.
 742         (SUB_SEGMENT_ALIGN): Likewise.
 743         (subsegs_finish): Adjust frchain list traversal.
 744         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
 745         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
 746         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
 747         (xtensa_fix_b_j_loop_end_frags): Likewise.
 748         (xtensa_fix_close_loop_end_frags): Likewise.
 749         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
 750         (retrieve_segment_info): Delete frch_seg initialisation.
 751
 752 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
 753
 754         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
 755         * config/obj-elf.h (obj_sec_set_private_data): Delete.
 756         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
 757         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
 758
 759 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
 760
 761         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
 762         here.
 763         (md_apply_fix3): Multiply offset by 4 here for
 764         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
 765
 766 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 767             Jan Beulich  <jbeulich@novell.com>
 768
 769         * config/tc-i386.c (output_invalid_buf): Change size for
 770         unsigned char.
 771         * config/tc-tic30.c (output_invalid_buf): Likewise.
 772
 773         * config/tc-i386.c (output_invalid): Cast none-ascii char to
 774         unsigned char.
 775         * config/tc-tic30.c (output_invalid): Likewise.
 776
 777 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
 778
 779         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
 780         (TEXI2POD): Use AM_MAKEINFOFLAGS.
 781         (asconfig.texi): Don't set top_srcdir.
 782         * doc/as.texinfo: Don't use top_srcdir.
 783         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 784
 785 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 786
 787         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 788         * config/tc-tic30.c (output_invalid_buf): Likewise.
 789
 790         * config/tc-i386.c (output_invalid): Use snprintf instead of
 791         sprintf.
 792         * config/tc-ia64.c (declare_register_set): Likewise.
 793         (emit_one_bundle): Likewise.
 794         (check_dependencies): Likewise.
 795         * config/tc-tic30.c (output_invalid): Likewise.
 796
 797 2006-05-02  Paul Brook  <paul@codesourcery.com>
 798
 799         * config/tc-arm.c (arm_optimize_expr): New function.
 800         * config/tc-arm.h (md_optimize_expr): Define
 801         (arm_optimize_expr): Add prototype.
 802         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 803
 804 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 805
 806         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 807         field unsigned.
 808
 809         * sb.h (sb_list_vector): Move to sb.c.
 810         * sb.c (free_list): Use type of sb_list_vector directly.
 811         (sb_build): Fix off-by-one error in assertion about `size'.
 812
 813 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 814
 815         * listing.c (listing_listing): Remove useless loop.
 816         * macro.c (macro_expand): Remove is_positional local variable.
 817         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 818         and simplify surrounding expressions, where possible.
 819         (assign_symbol): Likewise.
 820         (s_weakref): Likewise.
 821         * symbols.c (colon): Likewise.
 822
 823 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 824
 825         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 826
 827 2006-04-30  Thiemo Seufer  <ths@mips.com>
 828             David Ung  <davidu@mips.com>
 829
 830         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 831         (mips_immed): New table that records various handling of udi
 832         instruction patterns.
 833         (mips_ip): Adds udi handling.
 834
 835 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 836
 837         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 838         of list rather than beginning.
 839
 840 2006-04-26  Julian Brown  <julian@codesourcery.com>
 841
 842         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 843         (is_quarter_float): Rename from above. Simplify slightly.
 844         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 845         number.
 846         (parse_neon_mov): Parse floating-point constants.
 847         (neon_qfloat_bits): Fix encoding.
 848         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 849         preference to integer encoding when using the F32 type.
 850
 851 2006-04-26  Julian Brown  <julian@codesourcery.com>
 852
 853         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 854         zero-initialising structures containing it will lead to invalid types).
 855         (arm_it): Add vectype to each operand.
 856         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 857         defined field.
 858         (neon_typed_alias): New structure. Extra information for typed
 859         register aliases.
 860         (reg_entry): Add neon type info field.
 861         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 862         Break out alternative syntax for coprocessor registers, etc. into...
 863         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 864         out from arm_reg_parse.
 865         (parse_neon_type): Move. Return SUCCESS/FAIL.
 866         (first_error): New function. Call to ensure first error which occurs is
 867         reported.
 868         (parse_neon_operand_type): Parse exactly one type.
 869         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 870         (parse_typed_reg_or_scalar): New function. Handle core of both
 871         arm_typed_reg_parse and parse_scalar.
 872         (arm_typed_reg_parse): Parse a register with an optional type.
 873         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 874         result.
 875         (parse_scalar): Parse a Neon scalar with optional type.
 876         (parse_reg_list): Use first_error.
 877         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 878         (neon_alias_types_same): New function. Return true if two (alias) types
 879         are the same.
 880         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 881         of elements.
 882         (insert_reg_alias): Return new reg_entry not void.
 883         (insert_neon_reg_alias): New function. Insert type/index information as
 884         well as register for alias.
 885         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 886         make typed register aliases accordingly.
 887         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 888         of line.
 889         (s_unreq): Delete type information if present.
 890         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 891         (s_arm_unwind_save_mmxwcg): Likewise.
 892         (s_arm_unwind_movsp): Likewise.
 893         (s_arm_unwind_setfp): Likewise.
 894         (parse_shift): Likewise.
 895         (parse_shifter_operand): Likewise.
 896         (parse_address): Likewise.
 897         (parse_tb): Likewise.
 898         (tc_arm_regname_to_dw2regnum): Likewise.
 899         (md_pseudo_table): Add dn, qn.
 900         (parse_neon_mov): Handle typed operands.
 901         (parse_operands): Likewise.
 902         (neon_type_mask): Add N_SIZ.
 903         (N_ALLMODS): New macro.
 904         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 905         (el_type_of_type_chk): Add some safeguards.
 906         (modify_types_allowed): Fix logic bug.
 907         (neon_check_type): Handle operands with types.
 908         (neon_three_same): Remove redundant optional arg handling.
 909         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 910         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 911         (do_neon_step): Adjust accordingly.
 912         (neon_cmode_for_logic_imm): Use first_error.
 913         (do_neon_bitfield): Call neon_check_type.
 914         (neon_dyadic): Rename to...
 915         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 916         to allow modification of type of the destination.
 917         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 918         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 919         (do_neon_compare): Make destination be an untyped bitfield.
 920         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 921         (neon_mul_mac): Return early in case of errors.
 922         (neon_move_immediate): Use first_error.
 923         (neon_mac_reg_scalar_long): Fix type to include scalar.
 924         (do_neon_dup): Likewise.
 925         (do_neon_mov): Likewise (in several places).
 926         (do_neon_tbl_tbx): Fix type.
 927         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 928         (do_neon_ld_dup): Exit early in case of errors and/or use
 929         first_error.
 930         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 931         Handle .dn/.qn directives.
 932         (REGDEF): Add zero for reg_entry neon field.
 933
 934 2006-04-26  Julian Brown  <julian@codesourcery.com>
 935
 936         * config/tc-arm.c (limits.h): Include.
 937         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 938         (fpu_vfp_v3_or_neon_ext): Declare constants.
 939         (neon_el_type): New enumeration of types for Neon vector elements.
 940         (neon_type_el): New struct. Define type and size of a vector element.
 941         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 942         instruction.
 943         (neon_type): Define struct. The type of an instruction.
 944         (arm_it): Add 'vectype' for the current instruction.
 945         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 946         (vfp_sp_reg_pos): Rename to...
 947         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 948         tags.
 949         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 950         (Neon D or Q register).
 951         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 952         register.
 953         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 954         (my_get_expression): Allow above constant as argument to accept
 955         64-bit constants with optional prefix.
 956         (arm_reg_parse): Add extra argument to return the specific type of
 957         register in when either a D or Q register (REG_TYPE_NDQ) is
 958         requested. Can be NULL.
 959         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 960         (parse_reg_list): Update for new arm_reg_parse args.
 961         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 962         (parse_neon_el_struct_list): New function. Parse element/structure
 963         register lists for VLD<n>/VST<n> instructions.
 964         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 965         (s_arm_unwind_save_mmxwr): Likewise.
 966         (s_arm_unwind_save_mmxwcg): Likewise.
 967         (s_arm_unwind_movsp): Likewise.
 968         (s_arm_unwind_setfp): Likewise.
 969         (parse_big_immediate): New function. Parse an immediate, which may be
 970         64 bits wide. Put results in inst.operands[i].
 971         (parse_shift): Update for new arm_reg_parse args.
 972         (parse_address): Likewise. Add parsing of alignment specifiers.
 973         (parse_neon_mov): Parse the operands of a VMOV instruction.
 974         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 975         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 976         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 977         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 978         (parse_operands): Handle new codes above.
 979         (encode_arm_vfp_sp_reg): Rename to...
 980         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 981         selected VFP version only supports D0-D15.
 982         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 983         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 984         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 985         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 986         encode_arm_vfp_reg name, and allow 32 D regs.
 987         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 988         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 989         regs.
 990         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 991         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 992         constant-load and conversion insns introduced with VFPv3.
 993         (neon_tab_entry): New struct.
 994         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 995         those which are the targets of pseudo-instructions.
 996         (neon_opc): Enumerate opcodes, use as indices into...
 997         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 998         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 999         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1000         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1001         neon_enc_tab.
1002         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1003         Neon instructions.
1004         (neon_type_mask): New. Compact type representation for type checking.
1005         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1006         permitted type combinations.
1007         (N_IGNORE_TYPE): New macro.
1008         (neon_check_shape): New function. Check an instruction shape for
1009         multiple alternatives. Return the specific shape for the current
1010         instruction.
1011         (neon_modify_type_size): New function. Modify a vector type and size,
1012         depending on the bit mask in argument 1.
1013         (neon_type_promote): New function. Convert a given "key" type (of an
1014         operand) into the correct type for a different operand, based on a bit
1015         mask.
1016         (type_chk_of_el_type): New function. Convert a type and size into the
1017         compact representation used for type checking.
1018         (el_type_of_type_ckh): New function. Reverse of above (only when a
1019         single bit is set in the bit mask).
1020         (modify_types_allowed): New function. Alter a mask of allowed types
1021         based on a bit mask of modifications.
1022         (neon_check_type): New function. Check the type of the current
1023         instruction against the variable argument list. The "key" type of the
1024         instruction is returned.
1025         (neon_dp_fixup): New function. Fill in and modify instruction bits for
1026         a Neon data-processing instruction depending on whether we're in ARM
1027         mode or Thumb-2 mode.
1028         (neon_logbits): New function.
1029         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1030         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1031         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1032         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1033         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1034         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1035         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1036         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1037         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1038         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1039         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1040         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1041         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1042         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1043         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1044         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1045         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1046         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1047         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1048         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1049         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1050         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1051         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1052         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1053         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1054         helpers.
1055         (parse_neon_type): New function. Parse Neon type specifier.
1056         (opcode_lookup): Allow parsing of Neon type specifiers.
1057         (REGNUM2, REGSETH, REGSET2): New macros.
1058         (reg_names): Add new VFPv3 and Neon registers.
1059         (NUF, nUF, NCE, nCE): New macros for opcode table.
1060         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1061         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1062         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1063         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1064         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1065         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1066         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1067         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
1068         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1069         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1070         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1071         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1072         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1073         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1074         fto[us][lh][sd].
1075         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1076         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1077         (arm_option_cpu_value): Add vfp3 and neon.
1078         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1079         VFPv1 attribute.
1080
1081 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
1082
1083         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1084         syntax instead of hardcoded opcodes with ".w18" suffixes.
1085         (wide_branch_opcode): New.
1086         (build_transition): Use it to check for wide branch opcodes with
1087         either ".w18" or ".w15" suffixes.
1088
1089 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
1090
1091         * config/tc-xtensa.c (xtensa_create_literal_symbol,
1092         xg_assemble_literal, xg_assemble_literal_space): Do not set the
1093         frag's is_literal flag.
1094
1095 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
1096
1097         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1098
1099 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
1100
1101         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1102         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1103         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1104         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1105         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1106
1107 2005-04-20  Paul Brook  <paul@codesourcery.com>
1108
1109         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1110         all targets.
1111         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1112
1113 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
1114
1115         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
1116         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1117         Make some cpus unsupported on ELF.  Run "make dep-am".
1118         * Makefile.in: Regenerate.
1119
1120 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
1121
1122         * configure.in (--enable-targets): Indent help message.
1123         * configure: Regenerate.
1124
1125 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
1126
1127         PR gas/2533
1128         * config/tc-i386.c (i386_immediate): Check illegal immediate
1129         register operand.
1130
1131 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
1132
1133         * config/tc-i386.c: Formatting.
1134         (output_disp, output_imm): ISO C90 params.
1135
1136         * frags.c (frag_offset_fixed_p): Constify args.
1137         * frags.h (frag_offset_fixed_p): Ditto.
1138
1139         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1140         (COFF_MAGIC): Delete.
1141
1142         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1143
1144 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
1145
1146         * po/POTFILES.in: Regenerated.
1147
1148 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
1149
1150         * doc/as.texinfo: Mention that some .type syntaxes are not
1151         supported on all architectures.
1152
1153 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
1154
1155         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1156         instructions when such transformations have been disabled.
1157
1158 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
1159
1160         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1161         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1162         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1163         decoding the loop instructions.  Remove current_offset variable.
1164         (xtensa_fix_short_loop_frags): Likewise.
1165         (min_bytes_to_other_loop_end): Remove current_offset argument.
1166
1167 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
1168
1169         * config/tc-z80.c (z80_optimize_expr): Removed.
1170         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1171
1172 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1173
1174         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1175         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1176         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1177         atmega644, atmega329, atmega3290, atmega649, atmega6490,
1178         atmega406, atmega640, atmega1280, atmega1281, at90can32,
1179         at90can64, at90usb646, at90usb647, at90usb1286 and
1180         at90usb1287.
1181         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1182
1183 2006-04-07  Paul Brook  <paul@codesourcery.com>
1184
1185         * config/tc-arm.c (parse_operands): Set default error message.
1186
1187 2006-04-07  Paul Brook  <paul@codesourcery.com>
1188
1189         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1190
1191 2006-04-07  Paul Brook  <paul@codesourcery.com>
1192
1193         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1194
1195 2006-04-07  Paul Brook  <paul@codesourcery.com>
1196
1197         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1198         (move_or_literal_pool): Handle Thumb-2 instructions.
1199         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1200
1201 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
1202
1203         PR 2512.
1204         * config/tc-i386.c (match_template): Move 64-bit operand tests
1205         inside loop.
1206
1207 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
1208
1209         * po/Make-in: Add install-html target.
1210         * Makefile.am: Add install-html and install-html-recursive targets.
1211         * Makefile.in: Regenerate.
1212         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1213         * configure: Regenerate.
1214         * doc/Makefile.am: Add install-html and install-html-am targets.
1215         * doc/Makefile.in: Regenerate.
1216
1217 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
1218
1219         * frags.c (frag_offset_fixed_p): Reinitialise offset before
1220         second scan.
1221
1222 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
1223             Daniel Jacobowitz  <dan@codesourcery.com>
1224
1225         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1226         (GOTT_BASE, GOTT_INDEX): New.
1227         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1228         GOTT_INDEX when generating VxWorks PIC.
1229         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1230         use the generic *-*-vxworks* stanza instead.
1231
1232 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
1233
1234         PR 997
1235         * frags.c (frag_offset_fixed_p): New function.
1236         * frags.h (frag_offset_fixed_p): Declare.
1237         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1238         (resolve_expression): Likewise.
1239
1240 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
1241
1242         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1243         of the same length but different numbers of slots.
1244
1245 2006-03-30  Andreas Schwab  <schwab@suse.de>
1246
1247         * configure.in: Fix help string for --enable-targets option.
1248         * configure: Regenerate.
1249
1250 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
1251
1252         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1253         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
1254         overrun and avoid excessive copying.
1255
1256         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1257         m68020_control_regs, m68040_control_regs, m68060_control_regs,
1258         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1259         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1260         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1261         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1262         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1263         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1264         mcf5282_ctrl, mcfv4e_ctrl): ... these.
1265         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1266         (struct m68k_cpu): Change chip field to control_regs.
1267         (current_chip): Remove.
1268         (control_regs): New.
1269         (m68k_archs, m68k_extensions): Adjust.
1270         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
1271         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1272         (find_cf_chip): Reimplement for new organization of cpu table.
1273         (select_control_regs): Remove.
1274         (mri_chip): Adjust.
1275         (struct save_opts): Save control regs, not chip.
1276         (s_save, s_restore): Adjust.
1277         (m68k_lookup_cpu): Give deprecated warning when necessary.
1278         (m68k_init_arch): Adjust.
1279         (md_show_usage): Adjust for new cpu table organization.
1280
1281 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
1282
1283         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1284         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1285         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1286         "elf/bfin.h".
1287         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1288         (any_gotrel): New rule.
1289         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1290         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1291         "elf/bfin.h".
1292         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1293         (bfin_pic_ptr): New function.
1294         (md_pseudo_table): Add it for ".picptr".
1295         (OPTION_FDPIC): New macro.
1296         (md_longopts): Add -mfdpic.
1297         (md_parse_option): Handle it.
1298         (md_begin): Set BFD flags.
1299         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1300         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1301         us for GOT relocs.
1302         * Makefile.am (bfin-parse.o): Update dependencies.
1303         (DEPTC_bfin_elf): Likewise.
1304         * Makefile.in: Regenerate.
1305
1306 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
1307
1308         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1309         mcfemac instead of mcfmac.
1310
1311 2006-03-23  Michael Matz  <matz@suse.de>
1312
1313         * config/tc-i386.c (type_names): Correct placement of 'static'.
1314         (reloc): Map some more relocs to their 64 bit counterpart when
1315         size is 8.
1316         (output_insn): Work around breakage if DEBUG386 is defined.
1317         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1318         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1319         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
1320         different from i386.
1321         (output_imm): Ditto.
1322         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
1323         Imm64.
1324         (md_convert_frag): Jumps can now be larger than 2GB away, error
1325         out in that case.
1326         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
1327         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1328
1329 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
1330             Daniel Jacobowitz  <dan@codesourcery.com>
1331             Phil Edwards  <phil@codesourcery.com>
1332             Zack Weinberg  <zack@codesourcery.com>
1333             Mark Mitchell  <mark@codesourcery.com>
1334             Nathan Sidwell  <nathan@codesourcery.com>
1335
1336         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1337         (md_begin): Complain about -G being used for PIC.  Don't change
1338         the text, data and bss alignments on VxWorks.
1339         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1340         generating VxWorks PIC.
1341         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1342         (macro): Likewise, but do not treat la $25 specially for
1343         VxWorks PIC, and do not handle jal.
1344         (OPTION_MVXWORKS_PIC): New macro.
1345         (md_longopts): Add -mvxworks-pic.
1346         (md_parse_option): Don't complain about using PIC and -G together here.
1347         Handle OPTION_MVXWORKS_PIC.
1348         (md_estimate_size_before_relax): Always use the first relaxation
1349         sequence on VxWorks.
1350         * config/tc-mips.h (VXWORKS_PIC): New.
1351
1352 2006-03-21  Paul Brook  <paul@codesourcery.com>
1353
1354         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1355
1356 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
1357
1358         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1359         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1360         (get_loop_align_size): New.
1361         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1362         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1363         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1364         (get_noop_aligned_address): Use get_loop_align_size.
1365         (get_aligned_diff): Likewise.
1366
1367 2006-03-21  Paul Brook  <paul@codesourcery.com>
1368
1369         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1370
1371 2006-03-20  Paul Brook  <paul@codesourcery.com>
1372
1373         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1374         (do_t_branch): Encode branches inside IT blocks as unconditional.
1375         (do_t_cps): New function.
1376         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1377         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1378         (opcode_lookup): Allow conditional suffixes on all instructions in
1379         Thumb mode.
1380         (md_assemble): Advance condexec state before checking for errors.
1381         (insns): Use do_t_cps.
1382
1383 2006-03-20  Paul Brook  <paul@codesourcery.com>
1384
1385         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1386         outputting the insn.
1387
1388 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
1389
1390         * config/tc-vax.c: Update copyright year.
1391         * config/tc-vax.h: Likewise.
1392
1393 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
1394
1395         * config/tc-vax.c (md_chars_to_number): Used only locally, so
1396         make it static.
1397         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1398
1399 2006-03-17  Paul Brook  <paul@codesourcery.com>
1400
1401         * config/tc-arm.c (insns): Add ldm and stm.
1402
1403 2006-03-17  Ben Elliston  <bje@au.ibm.com>
1404
1405         PR gas/2446
1406         * doc/as.texinfo (Ident): Document this directive more thoroughly.
1407
1408 2006-03-16  Paul Brook  <paul@codesourcery.com>
1409
1410         * config/tc-arm.c (insns): Add "svc".
1411
1412 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
1413
1414         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1415         flag and avoid double underscore prefixes.
1416
1417 2006-03-10  Paul Brook  <paul@codesourcery.com>
1418
1419         * config/tc-arm.c (md_begin): Handle EABIv5.
1420         (arm_eabis): Add EF_ARM_EABI_VER5.
1421         * doc/c-arm.texi: Document -meabi=5.
1422
1423 2006-03-10  Ben Elliston  <bje@au.ibm.com>
1424
1425         * app.c (do_scrub_chars): Simplify string handling.
1426
1427 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
1428             Daniel Jacobowitz  <dan@codesourcery.com>
1429             Zack Weinberg  <zack@codesourcery.com>
1430             Nathan Sidwell  <nathan@codesourcery.com>
1431             Paul Brook  <paul@codesourcery.com>
1432             Ricardo Anguiano  <anguiano@codesourcery.com>
1433             Phil Edwards  <phil@codesourcery.com>
1434
1435         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1436         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1437         R_ARM_ABS12 reloc.
1438         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1439         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
1440         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1441
1442 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
1443
1444         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1445         even when using the text-section-literals option.
1446
1447 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
1448
1449         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1450         and cf.
1451         (m68k_ip): <case 'J'> Check we have some control regs.
1452         (md_parse_option): Allow raw arch switch.
1453         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
1454         whether 68881 or cfloat was meant by -mfloat.
1455         (md_show_usage): Adjust extension display.
1456         (m68k_elf_final_processing): Adjust.
1457
1458 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
1459
1460         * config/tc-avr.c (avr_mod_hash_value): New function.
1461         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1462         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1463         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1464         instead of int avr_ldi_expression: use avr_mod_hash_value instead
1465         of (int).
1466         (tc_gen_reloc): Handle substractions of symbols, if possible do
1467         fixups, abort otherwise.
1468         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1469         tc_fix_adjustable): Define.
1470
1471 2006-03-02  James E Wilson  <wilson@specifix.com>
1472
1473         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1474         change the template, then clear md.slot[curr].end_of_insn_group.
1475
1476 2006-02-28  Jan Beulich  <jbeulich@novell.com>
1477
1478         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1479
1480 2006-02-28  Jan Beulich  <jbeulich@novell.com>
1481
1482         PR/1070
1483         * macro.c (getstring): Don't treat parentheses special anymore.
1484         (get_any_string): Don't consider '(' and ')' as quoting anymore.
1485         Special-case '(', ')', '[', and ']' when dealing with non-quoting
1486         characters.
1487
1488 2006-02-28  Mat <mat@csail.mit.edu>
1489
1490         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1491
1492 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
1493
1494         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1495         field.
1496         (CFI_signal_frame): Define.
1497         (cfi_pseudo_table): Add .cfi_signal_frame.
1498         (dot_cfi): Handle CFI_signal_frame.
1499         (output_cie): Handle cie->signal_frame.
1500         (select_cie_for_fde): Don't share CIE if signal_frame flag is
1501         different.  Copy signal_frame from FDE to newly created CIE.
1502         * doc/as.texinfo: Document .cfi_signal_frame.
1503
1504 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
1505
1506         * doc/Makefile.am: Add html target.
1507         * doc/Makefile.in: Regenerate.
1508         * po/Make-in: Add html target.
1509
1510 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
1511
1512         * config/tc-i386.c (output_insn): Support Intel Merom New
1513         Instructions.
1514
1515         * config/tc-i386.h (CpuMNI): New.
1516         (CpuUnknownFlags): Add CpuMNI.
1517
1518 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
1519
1520         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1521         (hpriv_reg_table): New table for hyperprivileged registers.
1522         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1523         register encoding.
1524
1525 2006-02-24  DJ Delorie  <dj@redhat.com>
1526
1527         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1528         (tc_gen_reloc): Don't define.
1529         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1530         (OPTION_LINKRELAX): New.
1531         (md_longopts): Add it.
1532         (m32c_relax): New.
1533         (md_parse_options): Set it.
1534         (md_assemble): Emit relaxation relocs as needed.
1535         (md_convert_frag): Emit relaxation relocs as needed.
1536         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1537         (m32c_apply_fix): New.
1538         (tc_gen_reloc): New.
1539         (m32c_force_relocation): Force out jump relocs when relaxing.
1540         (m32c_fix_adjustable): Return false if relaxing.
1541
1542 2006-02-24  Paul Brook  <paul@codesourcery.com>
1543
1544         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1545         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1546         (struct asm_barrier_opt): Define.
1547         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1548         (parse_psr): Accept V7M psr names.
1549         (parse_barrier): New function.
1550         (enum operand_parse_code): Add OP_oBARRIER.
1551         (parse_operands): Implement OP_oBARRIER.
1552         (do_barrier): New function.
1553         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1554         (do_t_cpsi): Add V7M restrictions.
1555         (do_t_mrs, do_t_msr): Validate V7M variants.
1556         (md_assemble): Check for NULL variants.
1557         (v7m_psrs, barrier_opt_names): New tables.
1558         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
1559         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1560         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1561         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1562         (struct cpu_arch_ver_table): Define.
1563         (cpu_arch_ver): New.
1564         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
1565         Tag_CPU_arch_profile.
1566         * doc/c-arm.texi: Document new cpu and arch options.
1567
1568 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
1569
1570         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1571
1572 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
1573
1574         * config/tc-ia64.c: Update copyright years.
1575
1576 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
1577
1578         * config/tc-ia64.c (specify_resource): Add the rule 17 from
1579         SDM 2.2.
1580
1581 2005-02-22  Paul Brook  <paul@codesourcery.com>
1582
1583         * config/tc-arm.c (do_pld): Remove incorrect write to
1584         inst.instruction.
1585         (encode_thumb32_addr_mode): Use correct operand.
1586
1587 2006-02-21  Paul Brook  <paul@codesourcery.com>
1588
1589         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1590
1591 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
1592             Anil Paranjape   <anilp1@kpitcummins.com>
1593             Shilin Shakti    <shilins@kpitcummins.com>
1594
1595         * Makefile.am: Add xc16x related entry.
1596         * Makefile.in: Regenerate.
1597         * configure.in: Added xc16x related entry.
1598         * configure: Regenerate.
1599         * config/tc-xc16x.h: New file
1600         * config/tc-xc16x.c: New file
1601         * doc/c-xc16x.texi: New file for xc16x
1602         * doc/all.texi: Entry for xc16x
1603         * doc/Makefile.texi: Added c-xc16x.texi
1604         * NEWS: Announce the support for the new target.
1605
1606 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
1607
1608         * configure.tgt: set emulation for mips-*-netbsd*
1609
1610 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
1611
1612         * config.in: Rebuilt.
1613
1614 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
1615
1616         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1617         from 1, not 0, in error messages.
1618         (md_assemble): Simplify special-case check for ENTRY instructions.
1619         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1620         operand in error message.
1621
1622 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
1623
1624         * configure.tgt (arm-*-linux-gnueabi*): Change to
1625         arm-*-linux-*eabi*.
1626
1627 2006-02-10  Nick Clifton  <nickc@redhat.com>
1628
1629         * config/tc-crx.c (check_range): Ensure that the sign bit of a
1630         32-bit value is propagated into the upper bits of a 64-bit long.
1631
1632         * config/tc-arc.c (init_opcode_tables): Fix cast.
1633         (arc_extoper, md_operand): Likewise.
1634
1635 2006-02-09  David Heine  <dlheine@tensilica.com>
1636
1637         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1638         each relaxation step.
1639
1640 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
1641
1642         * configure.in (CHECK_DECLS): Add vsnprintf.
1643         * configure: Regenerate.
1644         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1645         include/declare here, but...
1646         * as.h: Move code detecting VARARGS idiom to the top.
1647         (errno.h, stdarg.h, varargs.h, va_list): ...here.
1648         (vsnprintf): Declare if not already declared.
1649
1650 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
1651
1652         * as.c (close_output_file): New.
1653         (main): Register close_output_file with xatexit before
1654         dump_statistics. Don't call output_file_close.
1655
1656 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
1657
1658         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1659         mcf5329_control_regs): New.
1660         (not_current_architecture, selected_arch, selected_cpu): New.
1661         (m68k_archs, m68k_extensions): New.
1662         (archs): Renamed to ...
1663         (m68k_cpus): ... here.  Adjust.
1664         (n_arches): Remove.
1665         (md_pseudo_table): Add arch and cpu directives.
1666         (find_cf_chip, m68k_ip): Adjust table scanning.
1667         (no_68851, no_68881): Remove.
1668         (md_assemble): Lazily initialize.
1669         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1670         (md_init_after_args): Move functionality to m68k_init_arch.
1671         (mri_chip): Adjust table scanning.
1672         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1673         options with saner parsing.
1674         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1675         m68k_init_arch): New.
1676         (s_m68k_cpu, s_m68k_arch): New.
1677         (md_show_usage): Adjust.
1678         (m68k_elf_final_processing): Set CF EF flags.
1679         * config/tc-m68k.h (m68k_init_after_args): Remove.
1680         (tc_init_after_args): Remove.
1681         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1682         (M68k-Directives): Document .arch and .cpu directives.
1683
1684 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1685
1686         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1687         synonyms for equ and defl.
1688         (z80_cons_fix_new): New function.
1689         (emit_byte): Disallow relative jumps to absolute locations.
1690         (emit_data): Only handle defb, prototype changed, because defb is
1691         now handled as pseudo-op rather than an instruction.
1692         (instab): Entries for defb,defw,db,dw moved from here...
1693         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1694         Add entries for def24,def32,d24,d32.
1695         (md_assemble): Improved error handling.
1696         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1697         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1698         (z80_cons_fix_new): Declare.
1699         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1700         (def24,d24,def32,d32): New pseudo-ops.
1701
1702 2006-02-02  Paul Brook  <paul@codesourcery.com>
1703
1704         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1705
1706 2005-02-02  Paul Brook  <paul@codesourcery.com>
1707
1708         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1709         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1710         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1711         T2_OPCODE_RSB): Define.
1712         (thumb32_negate_data_op): New function.
1713         (md_apply_fix): Use it.
1714
1715 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1716
1717         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1718         fields.
1719         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1720         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1721         subtracted symbols.
1722         (relaxation_requirements): Add pfinish_frag argument and use it to
1723         replace setting tinsn->record_fix fields.
1724         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1725         and vinsn_to_insnbuf.  Remove references to record_fix and
1726         slot_sub_symbols fields.
1727         (xtensa_mark_narrow_branches): Delete unused code.
1728         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1729         a symbol.
1730         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1731         record_fix fields.
1732         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1733         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1734         of the record_fix field.  Simplify error messages for unexpected
1735         symbolic operands.
1736         (set_expr_symbol_offset_diff): Delete.
1737
1738 2006-01-31  Paul Brook  <paul@codesourcery.com>
1739
1740         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1741
1742 2006-01-31  Paul Brook  <paul@codesourcery.com>
1743         Richard Earnshaw <rearnsha@arm.com>
1744
1745         * config/tc-arm.c: Use arm_feature_set.
1746         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1747         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1748         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1749         New variables.
1750         (insns): Use them.
1751         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1752         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1753         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1754         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1755         feature flags.
1756         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1757         (arm_opts): Move old cpu/arch options from here...
1758         (arm_legacy_opts): ... to here.
1759         (md_parse_option): Search arm_legacy_opts.
1760         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1761         (arm_float_abis, arm_eabis): Make const.
1762
1763 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1764
1765         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1766
1767 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1768
1769         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1770         in load immediate intruction.
1771
1772 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1773
1774         * config/bfin-parse.y (value_match): Use correct conversion
1775         specifications in template string for __FILE__ and __LINE__.
1776         (binary): Ditto.
1777         (unary): Ditto.
1778
1779 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1780
1781         Introduce TLS descriptors for i386 and x86_64.
1782         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1783         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1784         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1785         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1786         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1787         displacement bits.
1788         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1789         (lex_got): Handle @tlsdesc and @tlscall.
1790         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1791
1792 2006-01-11  Nick Clifton  <nickc@redhat.com>
1793
1794         Fixes for building on 64-bit hosts:
1795         * config/tc-avr.c (mod_index): New union to allow conversion
1796         between pointers and integers.
1797         (md_begin, avr_ldi_expression): Use it.
1798         * config/tc-i370.c (md_assemble): Add cast for argument to print
1799         statement.
1800         * config/tc-tic54x.c (subsym_substitute): Likewise.
1801         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1802         opindex field of fr_cgen structure into a pointer so that it can
1803         be stored in a frag.
1804         * config/tc-mn10300.c (md_assemble): Likewise.
1805         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1806         types.
1807         * config/tc-v850.c: Replace uses of (int) casts with correct
1808         types.
1809
1810 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1811
1812         PR gas/2117
1813         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1814
1815 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1816
1817         PR gas/2101
1818         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1819         a local-label reference.
1820
1821 For older changes see ChangeLog-2005
1822 \f
1823 Local Variables:
1824 mode: change-log
1825 left-margin: 8
1826 fill-column: 74
1827 version-control: never
1828 End: