1 2006-05-08 Thiemo Seufer <ths@mips.com>
2 Nigel Stephens <nigel@mips.com>
3 David Ung <davidu@mips.com>
5 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
7 (file_ase_smartmips): New variable.
8 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
9 (macro_build): Handle SmartMIPS instructions.
11 (md_longopts): Add argument handling for smartmips.
12 (md_parse_options, mips_after_parse_args): Likewise.
13 (s_mipsset): Add .set smartmips support.
14 (md_show_usage): Document -msmartmips/-mno-smartmips.
15 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
17 * doc/c-mips.texi: Likewise.
19 2006-05-08 Alan Modra <amodra@bigpond.net.au>
21 * write.c (relax_segment): Add pass count arg. Don't error on
22 negative org/space on first two passes.
23 (relax_seg_info): New struct.
24 (relax_seg, write_object_file): Adjust.
25 * write.h (relax_segment): Update prototype.
27 2006-05-05 Julian Brown <julian@codesourcery.com>
29 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
31 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
32 architecture version checks.
33 (insns): Allow overlapping instructions to be used in VFP mode.
35 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
38 * config/obj-elf.c (obj_elf_change_section): Allow user
39 specified SHF_ALPHA_GPREL.
41 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
43 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
44 for PMEM related expressions.
46 2006-05-05 Nick Clifton <nickc@redhat.com>
49 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
50 insertion of a directory separator character into a string at a
51 given offset. Uses heuristics to decide when to use a backslash
52 character rather than a forward-slash character.
53 (dwarf2_directive_loc): Use the macro.
54 (out_debug_info): Likewise.
56 2006-05-05 Thiemo Seufer <ths@mips.com>
57 David Ung <davidu@mips.com>
59 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
61 (macro): Add new case M_CACHE_AB.
63 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
65 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
66 (opcode_lookup): Issue a warning for opcode with
67 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
68 identical to OT_cinfix3.
69 (TxC3w, TC3w, tC3w): New.
70 (insns): Use tC3w and TC3w for comparison instructions with
73 2006-05-04 Alan Modra <amodra@bigpond.net.au>
75 * subsegs.h (struct frchain): Delete frch_seg.
76 (frchain_root): Delete.
77 (seg_info): Define as macro.
78 * subsegs.c (frchain_root): Delete.
79 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
80 (subsegs_begin, subseg_change): Adjust for above.
81 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
82 rather than to one big list.
83 (subseg_get): Don't special case abs, und sections.
84 (subseg_new, subseg_force_new): Don't set frchainP here.
86 (subsegs_print_statistics): Adjust frag chain control list traversal.
87 * debug.c (dmp_frags): Likewise.
88 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
89 at frchain_root. Make use of known frchain ordering.
90 (last_frag_for_seg): Likewise.
91 (get_frag_fix): Likewise. Add seg param.
92 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
93 * write.c (chain_frchains_together_1): Adjust for struct frchain.
94 (SUB_SEGMENT_ALIGN): Likewise.
95 (subsegs_finish): Adjust frchain list traversal.
96 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
97 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
98 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
99 (xtensa_fix_b_j_loop_end_frags): Likewise.
100 (xtensa_fix_close_loop_end_frags): Likewise.
101 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
102 (retrieve_segment_info): Delete frch_seg initialisation.
104 2006-05-03 Alan Modra <amodra@bigpond.net.au>
106 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
107 * config/obj-elf.h (obj_sec_set_private_data): Delete.
108 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
109 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
111 2006-05-02 Joseph Myers <joseph@codesourcery.com>
113 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
115 (md_apply_fix3): Multiply offset by 4 here for
116 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
118 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
119 Jan Beulich <jbeulich@novell.com>
121 * config/tc-i386.c (output_invalid_buf): Change size for
123 * config/tc-tic30.c (output_invalid_buf): Likewise.
125 * config/tc-i386.c (output_invalid): Cast none-ascii char to
127 * config/tc-tic30.c (output_invalid): Likewise.
129 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
131 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
132 (TEXI2POD): Use AM_MAKEINFOFLAGS.
133 (asconfig.texi): Don't set top_srcdir.
134 * doc/as.texinfo: Don't use top_srcdir.
135 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
137 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
139 * config/tc-i386.c (output_invalid_buf): Change size to 16.
140 * config/tc-tic30.c (output_invalid_buf): Likewise.
142 * config/tc-i386.c (output_invalid): Use snprintf instead of
144 * config/tc-ia64.c (declare_register_set): Likewise.
145 (emit_one_bundle): Likewise.
146 (check_dependencies): Likewise.
147 * config/tc-tic30.c (output_invalid): Likewise.
149 2006-05-02 Paul Brook <paul@codesourcery.com>
151 * config/tc-arm.c (arm_optimize_expr): New function.
152 * config/tc-arm.h (md_optimize_expr): Define
153 (arm_optimize_expr): Add prototype.
154 (TC_FORCE_RELOCATION_SUB_SAME): Define.
156 2006-05-02 Ben Elliston <bje@au.ibm.com>
158 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
161 * sb.h (sb_list_vector): Move to sb.c.
162 * sb.c (free_list): Use type of sb_list_vector directly.
163 (sb_build): Fix off-by-one error in assertion about `size'.
165 2006-05-01 Ben Elliston <bje@au.ibm.com>
167 * listing.c (listing_listing): Remove useless loop.
168 * macro.c (macro_expand): Remove is_positional local variable.
169 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
170 and simplify surrounding expressions, where possible.
171 (assign_symbol): Likewise.
172 (s_weakref): Likewise.
173 * symbols.c (colon): Likewise.
175 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
177 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
179 2006-04-30 Thiemo Seufer <ths@mips.com>
180 David Ung <davidu@mips.com>
182 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
183 (mips_immed): New table that records various handling of udi
184 instruction patterns.
185 (mips_ip): Adds udi handling.
187 2006-04-28 Alan Modra <amodra@bigpond.net.au>
189 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
190 of list rather than beginning.
192 2006-04-26 Julian Brown <julian@codesourcery.com>
194 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
195 (is_quarter_float): Rename from above. Simplify slightly.
196 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
198 (parse_neon_mov): Parse floating-point constants.
199 (neon_qfloat_bits): Fix encoding.
200 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
201 preference to integer encoding when using the F32 type.
203 2006-04-26 Julian Brown <julian@codesourcery.com>
205 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
206 zero-initialising structures containing it will lead to invalid types).
207 (arm_it): Add vectype to each operand.
208 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
210 (neon_typed_alias): New structure. Extra information for typed
212 (reg_entry): Add neon type info field.
213 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
214 Break out alternative syntax for coprocessor registers, etc. into...
215 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
216 out from arm_reg_parse.
217 (parse_neon_type): Move. Return SUCCESS/FAIL.
218 (first_error): New function. Call to ensure first error which occurs is
220 (parse_neon_operand_type): Parse exactly one type.
221 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
222 (parse_typed_reg_or_scalar): New function. Handle core of both
223 arm_typed_reg_parse and parse_scalar.
224 (arm_typed_reg_parse): Parse a register with an optional type.
225 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
227 (parse_scalar): Parse a Neon scalar with optional type.
228 (parse_reg_list): Use first_error.
229 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
230 (neon_alias_types_same): New function. Return true if two (alias) types
232 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
234 (insert_reg_alias): Return new reg_entry not void.
235 (insert_neon_reg_alias): New function. Insert type/index information as
236 well as register for alias.
237 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
238 make typed register aliases accordingly.
239 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
241 (s_unreq): Delete type information if present.
242 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
243 (s_arm_unwind_save_mmxwcg): Likewise.
244 (s_arm_unwind_movsp): Likewise.
245 (s_arm_unwind_setfp): Likewise.
246 (parse_shift): Likewise.
247 (parse_shifter_operand): Likewise.
248 (parse_address): Likewise.
249 (parse_tb): Likewise.
250 (tc_arm_regname_to_dw2regnum): Likewise.
251 (md_pseudo_table): Add dn, qn.
252 (parse_neon_mov): Handle typed operands.
253 (parse_operands): Likewise.
254 (neon_type_mask): Add N_SIZ.
255 (N_ALLMODS): New macro.
256 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
257 (el_type_of_type_chk): Add some safeguards.
258 (modify_types_allowed): Fix logic bug.
259 (neon_check_type): Handle operands with types.
260 (neon_three_same): Remove redundant optional arg handling.
261 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
262 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
263 (do_neon_step): Adjust accordingly.
264 (neon_cmode_for_logic_imm): Use first_error.
265 (do_neon_bitfield): Call neon_check_type.
266 (neon_dyadic): Rename to...
267 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
268 to allow modification of type of the destination.
269 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
270 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
271 (do_neon_compare): Make destination be an untyped bitfield.
272 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
273 (neon_mul_mac): Return early in case of errors.
274 (neon_move_immediate): Use first_error.
275 (neon_mac_reg_scalar_long): Fix type to include scalar.
276 (do_neon_dup): Likewise.
277 (do_neon_mov): Likewise (in several places).
278 (do_neon_tbl_tbx): Fix type.
279 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
280 (do_neon_ld_dup): Exit early in case of errors and/or use
282 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
283 Handle .dn/.qn directives.
284 (REGDEF): Add zero for reg_entry neon field.
286 2006-04-26 Julian Brown <julian@codesourcery.com>
288 * config/tc-arm.c (limits.h): Include.
289 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
290 (fpu_vfp_v3_or_neon_ext): Declare constants.
291 (neon_el_type): New enumeration of types for Neon vector elements.
292 (neon_type_el): New struct. Define type and size of a vector element.
293 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
295 (neon_type): Define struct. The type of an instruction.
296 (arm_it): Add 'vectype' for the current instruction.
297 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
298 (vfp_sp_reg_pos): Rename to...
299 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
301 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
302 (Neon D or Q register).
303 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
305 (GE_OPT_PREFIX_BIG): Define constant, for use in...
306 (my_get_expression): Allow above constant as argument to accept
307 64-bit constants with optional prefix.
308 (arm_reg_parse): Add extra argument to return the specific type of
309 register in when either a D or Q register (REG_TYPE_NDQ) is
310 requested. Can be NULL.
311 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
312 (parse_reg_list): Update for new arm_reg_parse args.
313 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
314 (parse_neon_el_struct_list): New function. Parse element/structure
315 register lists for VLD<n>/VST<n> instructions.
316 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
317 (s_arm_unwind_save_mmxwr): Likewise.
318 (s_arm_unwind_save_mmxwcg): Likewise.
319 (s_arm_unwind_movsp): Likewise.
320 (s_arm_unwind_setfp): Likewise.
321 (parse_big_immediate): New function. Parse an immediate, which may be
322 64 bits wide. Put results in inst.operands[i].
323 (parse_shift): Update for new arm_reg_parse args.
324 (parse_address): Likewise. Add parsing of alignment specifiers.
325 (parse_neon_mov): Parse the operands of a VMOV instruction.
326 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
327 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
328 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
329 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
330 (parse_operands): Handle new codes above.
331 (encode_arm_vfp_sp_reg): Rename to...
332 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
333 selected VFP version only supports D0-D15.
334 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
335 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
336 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
337 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
338 encode_arm_vfp_reg name, and allow 32 D regs.
339 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
340 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
342 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
343 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
344 constant-load and conversion insns introduced with VFPv3.
345 (neon_tab_entry): New struct.
346 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
347 those which are the targets of pseudo-instructions.
348 (neon_opc): Enumerate opcodes, use as indices into...
349 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
350 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
351 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
352 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
354 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
356 (neon_type_mask): New. Compact type representation for type checking.
357 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
358 permitted type combinations.
359 (N_IGNORE_TYPE): New macro.
360 (neon_check_shape): New function. Check an instruction shape for
361 multiple alternatives. Return the specific shape for the current
363 (neon_modify_type_size): New function. Modify a vector type and size,
364 depending on the bit mask in argument 1.
365 (neon_type_promote): New function. Convert a given "key" type (of an
366 operand) into the correct type for a different operand, based on a bit
368 (type_chk_of_el_type): New function. Convert a type and size into the
369 compact representation used for type checking.
370 (el_type_of_type_ckh): New function. Reverse of above (only when a
371 single bit is set in the bit mask).
372 (modify_types_allowed): New function. Alter a mask of allowed types
373 based on a bit mask of modifications.
374 (neon_check_type): New function. Check the type of the current
375 instruction against the variable argument list. The "key" type of the
376 instruction is returned.
377 (neon_dp_fixup): New function. Fill in and modify instruction bits for
378 a Neon data-processing instruction depending on whether we're in ARM
379 mode or Thumb-2 mode.
380 (neon_logbits): New function.
381 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
382 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
383 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
384 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
385 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
386 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
387 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
388 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
389 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
390 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
391 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
392 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
393 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
394 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
395 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
396 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
397 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
398 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
399 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
400 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
401 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
402 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
403 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
404 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
405 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
407 (parse_neon_type): New function. Parse Neon type specifier.
408 (opcode_lookup): Allow parsing of Neon type specifiers.
409 (REGNUM2, REGSETH, REGSET2): New macros.
410 (reg_names): Add new VFPv3 and Neon registers.
411 (NUF, nUF, NCE, nCE): New macros for opcode table.
412 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
413 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
414 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
415 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
416 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
417 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
418 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
419 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
420 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
421 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
422 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
423 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
424 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
425 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
427 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
428 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
429 (arm_option_cpu_value): Add vfp3 and neon.
430 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
433 2006-04-25 Bob Wilson <bob.wilson@acm.org>
435 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
436 syntax instead of hardcoded opcodes with ".w18" suffixes.
437 (wide_branch_opcode): New.
438 (build_transition): Use it to check for wide branch opcodes with
439 either ".w18" or ".w15" suffixes.
441 2006-04-25 Bob Wilson <bob.wilson@acm.org>
443 * config/tc-xtensa.c (xtensa_create_literal_symbol,
444 xg_assemble_literal, xg_assemble_literal_space): Do not set the
445 frag's is_literal flag.
447 2006-04-25 Bob Wilson <bob.wilson@acm.org>
449 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
451 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
453 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
454 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
455 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
456 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
457 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
459 2005-04-20 Paul Brook <paul@codesourcery.com>
461 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
463 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
465 2006-04-19 Alan Modra <amodra@bigpond.net.au>
467 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
468 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
469 Make some cpus unsupported on ELF. Run "make dep-am".
470 * Makefile.in: Regenerate.
472 2006-04-19 Alan Modra <amodra@bigpond.net.au>
474 * configure.in (--enable-targets): Indent help message.
475 * configure: Regenerate.
477 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
480 * config/tc-i386.c (i386_immediate): Check illegal immediate
483 2006-04-18 Alan Modra <amodra@bigpond.net.au>
485 * config/tc-i386.c: Formatting.
486 (output_disp, output_imm): ISO C90 params.
488 * frags.c (frag_offset_fixed_p): Constify args.
489 * frags.h (frag_offset_fixed_p): Ditto.
491 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
492 (COFF_MAGIC): Delete.
494 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
496 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
498 * po/POTFILES.in: Regenerated.
500 2006-04-16 Mark Mitchell <mark@codesourcery.com>
502 * doc/as.texinfo: Mention that some .type syntaxes are not
503 supported on all architectures.
505 2006-04-14 Sterling Augustine <sterling@tensilica.com>
507 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
508 instructions when such transformations have been disabled.
510 2006-04-10 Sterling Augustine <sterling@tensilica.com>
512 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
513 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
514 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
515 decoding the loop instructions. Remove current_offset variable.
516 (xtensa_fix_short_loop_frags): Likewise.
517 (min_bytes_to_other_loop_end): Remove current_offset argument.
519 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
521 * config/tc-z80.c (z80_optimize_expr): Removed.
522 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
524 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
526 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
527 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
528 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
529 atmega644, atmega329, atmega3290, atmega649, atmega6490,
530 atmega406, atmega640, atmega1280, atmega1281, at90can32,
531 at90can64, at90usb646, at90usb647, at90usb1286 and
533 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
535 2006-04-07 Paul Brook <paul@codesourcery.com>
537 * config/tc-arm.c (parse_operands): Set default error message.
539 2006-04-07 Paul Brook <paul@codesourcery.com>
541 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
543 2006-04-07 Paul Brook <paul@codesourcery.com>
545 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
547 2006-04-07 Paul Brook <paul@codesourcery.com>
549 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
550 (move_or_literal_pool): Handle Thumb-2 instructions.
551 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
553 2006-04-07 Alan Modra <amodra@bigpond.net.au>
556 * config/tc-i386.c (match_template): Move 64-bit operand tests
559 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
561 * po/Make-in: Add install-html target.
562 * Makefile.am: Add install-html and install-html-recursive targets.
563 * Makefile.in: Regenerate.
564 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
565 * configure: Regenerate.
566 * doc/Makefile.am: Add install-html and install-html-am targets.
567 * doc/Makefile.in: Regenerate.
569 2006-04-06 Alan Modra <amodra@bigpond.net.au>
571 * frags.c (frag_offset_fixed_p): Reinitialise offset before
574 2006-04-05 Richard Sandiford <richard@codesourcery.com>
575 Daniel Jacobowitz <dan@codesourcery.com>
577 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
578 (GOTT_BASE, GOTT_INDEX): New.
579 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
580 GOTT_INDEX when generating VxWorks PIC.
581 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
582 use the generic *-*-vxworks* stanza instead.
584 2006-04-04 Alan Modra <amodra@bigpond.net.au>
587 * frags.c (frag_offset_fixed_p): New function.
588 * frags.h (frag_offset_fixed_p): Declare.
589 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
590 (resolve_expression): Likewise.
592 2006-04-03 Sterling Augustine <sterling@tensilica.com>
594 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
595 of the same length but different numbers of slots.
597 2006-03-30 Andreas Schwab <schwab@suse.de>
599 * configure.in: Fix help string for --enable-targets option.
600 * configure: Regenerate.
602 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
604 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
605 (m68k_ip): ... here. Use for all chips. Protect against buffer
606 overrun and avoid excessive copying.
608 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
609 m68020_control_regs, m68040_control_regs, m68060_control_regs,
610 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
611 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
612 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
613 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
614 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
615 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
616 mcf5282_ctrl, mcfv4e_ctrl): ... these.
617 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
618 (struct m68k_cpu): Change chip field to control_regs.
619 (current_chip): Remove.
621 (m68k_archs, m68k_extensions): Adjust.
622 (m68k_cpus): Reorder to be in cpu number order. Adjust.
623 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
624 (find_cf_chip): Reimplement for new organization of cpu table.
625 (select_control_regs): Remove.
627 (struct save_opts): Save control regs, not chip.
628 (s_save, s_restore): Adjust.
629 (m68k_lookup_cpu): Give deprecated warning when necessary.
630 (m68k_init_arch): Adjust.
631 (md_show_usage): Adjust for new cpu table organization.
633 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
635 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
636 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
637 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
639 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
640 (any_gotrel): New rule.
641 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
642 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
644 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
645 (bfin_pic_ptr): New function.
646 (md_pseudo_table): Add it for ".picptr".
647 (OPTION_FDPIC): New macro.
648 (md_longopts): Add -mfdpic.
649 (md_parse_option): Handle it.
650 (md_begin): Set BFD flags.
651 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
652 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
654 * Makefile.am (bfin-parse.o): Update dependencies.
655 (DEPTC_bfin_elf): Likewise.
656 * Makefile.in: Regenerate.
658 2006-03-25 Richard Sandiford <richard@codesourcery.com>
660 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
661 mcfemac instead of mcfmac.
663 2006-03-23 Michael Matz <matz@suse.de>
665 * config/tc-i386.c (type_names): Correct placement of 'static'.
666 (reloc): Map some more relocs to their 64 bit counterpart when
668 (output_insn): Work around breakage if DEBUG386 is defined.
669 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
670 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
671 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
674 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
676 (md_convert_frag): Jumps can now be larger than 2GB away, error
678 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
679 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
681 2006-03-22 Richard Sandiford <richard@codesourcery.com>
682 Daniel Jacobowitz <dan@codesourcery.com>
683 Phil Edwards <phil@codesourcery.com>
684 Zack Weinberg <zack@codesourcery.com>
685 Mark Mitchell <mark@codesourcery.com>
686 Nathan Sidwell <nathan@codesourcery.com>
688 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
689 (md_begin): Complain about -G being used for PIC. Don't change
690 the text, data and bss alignments on VxWorks.
691 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
692 generating VxWorks PIC.
693 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
694 (macro): Likewise, but do not treat la $25 specially for
695 VxWorks PIC, and do not handle jal.
696 (OPTION_MVXWORKS_PIC): New macro.
697 (md_longopts): Add -mvxworks-pic.
698 (md_parse_option): Don't complain about using PIC and -G together here.
699 Handle OPTION_MVXWORKS_PIC.
700 (md_estimate_size_before_relax): Always use the first relaxation
702 * config/tc-mips.h (VXWORKS_PIC): New.
704 2006-03-21 Paul Brook <paul@codesourcery.com>
706 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
708 2006-03-21 Sterling Augustine <sterling@tensilica.com>
710 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
711 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
712 (get_loop_align_size): New.
713 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
714 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
715 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
716 (get_noop_aligned_address): Use get_loop_align_size.
717 (get_aligned_diff): Likewise.
719 2006-03-21 Paul Brook <paul@codesourcery.com>
721 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
723 2006-03-20 Paul Brook <paul@codesourcery.com>
725 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
726 (do_t_branch): Encode branches inside IT blocks as unconditional.
727 (do_t_cps): New function.
728 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
729 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
730 (opcode_lookup): Allow conditional suffixes on all instructions in
732 (md_assemble): Advance condexec state before checking for errors.
733 (insns): Use do_t_cps.
735 2006-03-20 Paul Brook <paul@codesourcery.com>
737 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
740 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
742 * config/tc-vax.c: Update copyright year.
743 * config/tc-vax.h: Likewise.
745 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
747 * config/tc-vax.c (md_chars_to_number): Used only locally, so
749 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
751 2006-03-17 Paul Brook <paul@codesourcery.com>
753 * config/tc-arm.c (insns): Add ldm and stm.
755 2006-03-17 Ben Elliston <bje@au.ibm.com>
758 * doc/as.texinfo (Ident): Document this directive more thoroughly.
760 2006-03-16 Paul Brook <paul@codesourcery.com>
762 * config/tc-arm.c (insns): Add "svc".
764 2006-03-13 Bob Wilson <bob.wilson@acm.org>
766 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
767 flag and avoid double underscore prefixes.
769 2006-03-10 Paul Brook <paul@codesourcery.com>
771 * config/tc-arm.c (md_begin): Handle EABIv5.
772 (arm_eabis): Add EF_ARM_EABI_VER5.
773 * doc/c-arm.texi: Document -meabi=5.
775 2006-03-10 Ben Elliston <bje@au.ibm.com>
777 * app.c (do_scrub_chars): Simplify string handling.
779 2006-03-07 Richard Sandiford <richard@codesourcery.com>
780 Daniel Jacobowitz <dan@codesourcery.com>
781 Zack Weinberg <zack@codesourcery.com>
782 Nathan Sidwell <nathan@codesourcery.com>
783 Paul Brook <paul@codesourcery.com>
784 Ricardo Anguiano <anguiano@codesourcery.com>
785 Phil Edwards <phil@codesourcery.com>
787 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
788 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
790 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
791 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
792 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
794 2006-03-06 Bob Wilson <bob.wilson@acm.org>
796 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
797 even when using the text-section-literals option.
799 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
801 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
803 (m68k_ip): <case 'J'> Check we have some control regs.
804 (md_parse_option): Allow raw arch switch.
805 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
806 whether 68881 or cfloat was meant by -mfloat.
807 (md_show_usage): Adjust extension display.
808 (m68k_elf_final_processing): Adjust.
810 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
812 * config/tc-avr.c (avr_mod_hash_value): New function.
813 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
814 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
815 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
816 instead of int avr_ldi_expression: use avr_mod_hash_value instead
818 (tc_gen_reloc): Handle substractions of symbols, if possible do
819 fixups, abort otherwise.
820 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
821 tc_fix_adjustable): Define.
823 2006-03-02 James E Wilson <wilson@specifix.com>
825 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
826 change the template, then clear md.slot[curr].end_of_insn_group.
828 2006-02-28 Jan Beulich <jbeulich@novell.com>
830 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
832 2006-02-28 Jan Beulich <jbeulich@novell.com>
835 * macro.c (getstring): Don't treat parentheses special anymore.
836 (get_any_string): Don't consider '(' and ')' as quoting anymore.
837 Special-case '(', ')', '[', and ']' when dealing with non-quoting
840 2006-02-28 Mat <mat@csail.mit.edu>
842 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
844 2006-02-27 Jakub Jelinek <jakub@redhat.com>
846 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
848 (CFI_signal_frame): Define.
849 (cfi_pseudo_table): Add .cfi_signal_frame.
850 (dot_cfi): Handle CFI_signal_frame.
851 (output_cie): Handle cie->signal_frame.
852 (select_cie_for_fde): Don't share CIE if signal_frame flag is
853 different. Copy signal_frame from FDE to newly created CIE.
854 * doc/as.texinfo: Document .cfi_signal_frame.
856 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
858 * doc/Makefile.am: Add html target.
859 * doc/Makefile.in: Regenerate.
860 * po/Make-in: Add html target.
862 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
864 * config/tc-i386.c (output_insn): Support Intel Merom New
867 * config/tc-i386.h (CpuMNI): New.
868 (CpuUnknownFlags): Add CpuMNI.
870 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
872 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
873 (hpriv_reg_table): New table for hyperprivileged registers.
874 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
877 2006-02-24 DJ Delorie <dj@redhat.com>
879 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
880 (tc_gen_reloc): Don't define.
881 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
882 (OPTION_LINKRELAX): New.
883 (md_longopts): Add it.
885 (md_parse_options): Set it.
886 (md_assemble): Emit relaxation relocs as needed.
887 (md_convert_frag): Emit relaxation relocs as needed.
888 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
889 (m32c_apply_fix): New.
891 (m32c_force_relocation): Force out jump relocs when relaxing.
892 (m32c_fix_adjustable): Return false if relaxing.
894 2006-02-24 Paul Brook <paul@codesourcery.com>
896 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
897 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
898 (struct asm_barrier_opt): Define.
899 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
900 (parse_psr): Accept V7M psr names.
901 (parse_barrier): New function.
902 (enum operand_parse_code): Add OP_oBARRIER.
903 (parse_operands): Implement OP_oBARRIER.
904 (do_barrier): New function.
905 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
906 (do_t_cpsi): Add V7M restrictions.
907 (do_t_mrs, do_t_msr): Validate V7M variants.
908 (md_assemble): Check for NULL variants.
909 (v7m_psrs, barrier_opt_names): New tables.
910 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
911 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
912 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
913 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
914 (struct cpu_arch_ver_table): Define.
916 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
917 Tag_CPU_arch_profile.
918 * doc/c-arm.texi: Document new cpu and arch options.
920 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
922 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
924 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
926 * config/tc-ia64.c: Update copyright years.
928 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
930 * config/tc-ia64.c (specify_resource): Add the rule 17 from
933 2005-02-22 Paul Brook <paul@codesourcery.com>
935 * config/tc-arm.c (do_pld): Remove incorrect write to
937 (encode_thumb32_addr_mode): Use correct operand.
939 2006-02-21 Paul Brook <paul@codesourcery.com>
941 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
943 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
944 Anil Paranjape <anilp1@kpitcummins.com>
945 Shilin Shakti <shilins@kpitcummins.com>
947 * Makefile.am: Add xc16x related entry.
948 * Makefile.in: Regenerate.
949 * configure.in: Added xc16x related entry.
950 * configure: Regenerate.
951 * config/tc-xc16x.h: New file
952 * config/tc-xc16x.c: New file
953 * doc/c-xc16x.texi: New file for xc16x
954 * doc/all.texi: Entry for xc16x
955 * doc/Makefile.texi: Added c-xc16x.texi
956 * NEWS: Announce the support for the new target.
958 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
960 * configure.tgt: set emulation for mips-*-netbsd*
962 2006-02-14 Jakub Jelinek <jakub@redhat.com>
964 * config.in: Rebuilt.
966 2006-02-13 Bob Wilson <bob.wilson@acm.org>
968 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
969 from 1, not 0, in error messages.
970 (md_assemble): Simplify special-case check for ENTRY instructions.
971 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
972 operand in error message.
974 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
976 * configure.tgt (arm-*-linux-gnueabi*): Change to
979 2006-02-10 Nick Clifton <nickc@redhat.com>
981 * config/tc-crx.c (check_range): Ensure that the sign bit of a
982 32-bit value is propagated into the upper bits of a 64-bit long.
984 * config/tc-arc.c (init_opcode_tables): Fix cast.
985 (arc_extoper, md_operand): Likewise.
987 2006-02-09 David Heine <dlheine@tensilica.com>
989 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
990 each relaxation step.
992 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
994 * configure.in (CHECK_DECLS): Add vsnprintf.
995 * configure: Regenerate.
996 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
997 include/declare here, but...
998 * as.h: Move code detecting VARARGS idiom to the top.
999 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1000 (vsnprintf): Declare if not already declared.
1002 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1004 * as.c (close_output_file): New.
1005 (main): Register close_output_file with xatexit before
1006 dump_statistics. Don't call output_file_close.
1008 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1010 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1011 mcf5329_control_regs): New.
1012 (not_current_architecture, selected_arch, selected_cpu): New.
1013 (m68k_archs, m68k_extensions): New.
1014 (archs): Renamed to ...
1015 (m68k_cpus): ... here. Adjust.
1017 (md_pseudo_table): Add arch and cpu directives.
1018 (find_cf_chip, m68k_ip): Adjust table scanning.
1019 (no_68851, no_68881): Remove.
1020 (md_assemble): Lazily initialize.
1021 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1022 (md_init_after_args): Move functionality to m68k_init_arch.
1023 (mri_chip): Adjust table scanning.
1024 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1025 options with saner parsing.
1026 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1027 m68k_init_arch): New.
1028 (s_m68k_cpu, s_m68k_arch): New.
1029 (md_show_usage): Adjust.
1030 (m68k_elf_final_processing): Set CF EF flags.
1031 * config/tc-m68k.h (m68k_init_after_args): Remove.
1032 (tc_init_after_args): Remove.
1033 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1034 (M68k-Directives): Document .arch and .cpu directives.
1036 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1038 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1039 synonyms for equ and defl.
1040 (z80_cons_fix_new): New function.
1041 (emit_byte): Disallow relative jumps to absolute locations.
1042 (emit_data): Only handle defb, prototype changed, because defb is
1043 now handled as pseudo-op rather than an instruction.
1044 (instab): Entries for defb,defw,db,dw moved from here...
1045 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1046 Add entries for def24,def32,d24,d32.
1047 (md_assemble): Improved error handling.
1048 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1049 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1050 (z80_cons_fix_new): Declare.
1051 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1052 (def24,d24,def32,d32): New pseudo-ops.
1054 2006-02-02 Paul Brook <paul@codesourcery.com>
1056 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1058 2005-02-02 Paul Brook <paul@codesourcery.com>
1060 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1061 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1062 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1063 T2_OPCODE_RSB): Define.
1064 (thumb32_negate_data_op): New function.
1065 (md_apply_fix): Use it.
1067 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1069 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1071 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1072 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1074 (relaxation_requirements): Add pfinish_frag argument and use it to
1075 replace setting tinsn->record_fix fields.
1076 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1077 and vinsn_to_insnbuf. Remove references to record_fix and
1078 slot_sub_symbols fields.
1079 (xtensa_mark_narrow_branches): Delete unused code.
1080 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1082 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1084 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1085 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1086 of the record_fix field. Simplify error messages for unexpected
1088 (set_expr_symbol_offset_diff): Delete.
1090 2006-01-31 Paul Brook <paul@codesourcery.com>
1092 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1094 2006-01-31 Paul Brook <paul@codesourcery.com>
1095 Richard Earnshaw <rearnsha@arm.com>
1097 * config/tc-arm.c: Use arm_feature_set.
1098 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1099 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1100 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1103 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1104 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1105 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1106 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1108 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1109 (arm_opts): Move old cpu/arch options from here...
1110 (arm_legacy_opts): ... to here.
1111 (md_parse_option): Search arm_legacy_opts.
1112 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1113 (arm_float_abis, arm_eabis): Make const.
1115 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1117 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1119 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1121 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1122 in load immediate intruction.
1124 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1126 * config/bfin-parse.y (value_match): Use correct conversion
1127 specifications in template string for __FILE__ and __LINE__.
1131 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1133 Introduce TLS descriptors for i386 and x86_64.
1134 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1135 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1136 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1137 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1138 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1140 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1141 (lex_got): Handle @tlsdesc and @tlscall.
1142 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1144 2006-01-11 Nick Clifton <nickc@redhat.com>
1146 Fixes for building on 64-bit hosts:
1147 * config/tc-avr.c (mod_index): New union to allow conversion
1148 between pointers and integers.
1149 (md_begin, avr_ldi_expression): Use it.
1150 * config/tc-i370.c (md_assemble): Add cast for argument to print
1152 * config/tc-tic54x.c (subsym_substitute): Likewise.
1153 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1154 opindex field of fr_cgen structure into a pointer so that it can
1155 be stored in a frag.
1156 * config/tc-mn10300.c (md_assemble): Likewise.
1157 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1159 * config/tc-v850.c: Replace uses of (int) casts with correct
1162 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1165 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1167 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1170 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1171 a local-label reference.
1173 For older changes see ChangeLog-2005
1179 version-control: never