1 2006-08-02 Nick Clifton <nickc@redhat.com>
4 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
6 * configure.in: Run BFD_BINARY_FOPEN.
7 * configure: Regenerate.
8 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
11 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
13 * config/tc-i386.c (md_assemble): Don't update
16 2006-08-01 Thiemo Seufer <ths@mips.com>
18 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
20 2006-08-01 Thiemo Seufer <ths@mips.com>
22 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
23 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
24 BFD_RELOC_32 and BFD_RELOC_16.
25 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
26 md_convert_frag, md_obj_end): Fix comment formatting.
28 2006-07-31 Thiemo Seufer <ths@mips.com>
30 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
31 handling for BFD_RELOC_MIPS16_JMP.
33 2006-07-24 Andreas Schwab <schwab@suse.de>
36 * read.c (read_a_source_file): Ignore unknown text after line
37 comment character. Fix misleading comment.
39 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
41 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
42 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
43 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
44 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
45 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
46 doc/c-z80.texi, doc/internals.texi: Fix some typos.
48 2006-07-21 Nick Clifton <nickc@redhat.com>
50 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
53 2006-07-20 Thiemo Seufer <ths@mips.com>
54 Nigel Stephens <nigel@mips.com>
56 * config/tc-mips.c (md_parse_option): Don't infer optimisation
57 options from debug options.
59 2006-07-20 Thiemo Seufer <ths@mips.com>
61 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
62 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
64 2006-07-19 Paul Brook <paul@codesourcery.com>
66 * config/tc-arm.c (insns): Fix rbit Arm opcode.
68 2006-07-18 Paul Brook <paul@codesourcery.com>
70 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
71 (md_convert_frag): Use correct reloc for add_pc. Use
72 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
73 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
74 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
76 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
78 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
79 when file and line unknown.
81 2006-07-17 Thiemo Seufer <ths@mips.com>
83 * read.c (s_struct): Use IS_ELF.
84 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
85 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
86 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
87 s_mips_mask): Likewise.
89 2006-07-16 Thiemo Seufer <ths@mips.com>
90 David Ung <davidu@mips.com>
92 * read.c (s_struct): Handle ELF section changing.
93 * config/tc-mips.c (s_align): Leave enabling auto-align to the
95 (s_change_sec): Try section changing only if we output ELF.
97 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
99 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
101 (smallest_imm_type): Remove Cpu086.
102 (i386_target_format): Likewise.
104 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
107 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
108 Michael Meissner <michael.meissner@amd.com>
110 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
111 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
112 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
114 (i386_align_code): Ditto.
115 (md_assemble_code): Add support for insertq/extrq instructions,
116 swapping as needed for intel syntax.
117 (swap_imm_operands): New function to swap immediate operands.
118 (swap_operands): Deal with 4 operand instructions.
119 (build_modrm_byte): Add support for insertq instruction.
121 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
123 * config/tc-i386.h (Size64): Fix a typo in comment.
125 2006-07-12 Nick Clifton <nickc@redhat.com>
127 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
128 fixup_segment() to repeat a range check on a value that has
129 already been checked here.
131 2006-07-07 James E Wilson <wilson@specifix.com>
133 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
135 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
136 Nick Clifton <nickc@redhat.com>
139 * doc/as.texi: Fix spelling typo: branchs => branches.
140 * doc/c-m68hc11.texi: Likewise.
141 * config/tc-m68hc11.c: Likewise.
142 Support old spelling of command line switch for backwards
145 2006-07-04 Thiemo Seufer <ths@mips.com>
146 David Ung <davidu@mips.com>
148 * config/tc-mips.c (s_is_linkonce): New function.
149 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
150 weak, external, and linkonce symbols.
151 (pic_need_relax): Use s_is_linkonce.
153 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
155 * doc/as.texinfo (Org): Remove space.
156 (P2align): Add "@var{abs-expr},".
158 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
160 * config/tc-i386.c (cpu_arch_tune_set): New.
161 (cpu_arch_isa): Likewise.
162 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
163 nops with short or long nop sequences based on -march=/.arch
165 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
166 set cpu_arch_tune and cpu_arch_tune_flags.
167 (md_parse_option): For -march=, set cpu_arch_isa and set
168 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
169 0. Set cpu_arch_tune_set to 1 for -mtune=.
170 (i386_target_format): Don't set cpu_arch_tune.
172 2006-06-23 Nigel Stephens <nigel@mips.com>
174 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
175 generated .sbss.* and .gnu.linkonce.sb.*.
177 2006-06-23 Thiemo Seufer <ths@mips.com>
178 David Ung <davidu@mips.com>
180 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
182 * config/tc-mips.c (label_list): Define per-segment label_list.
183 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
184 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
185 mips_from_file_after_relocs, mips_define_label): Use per-segment
188 2006-06-22 Thiemo Seufer <ths@mips.com>
190 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
191 (append_insn): Use it.
192 (md_apply_fix): Whitespace formatting.
193 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
194 mips16_extended_frag): Remove register specifier.
195 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
198 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
200 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
201 a directive saving VFP registers for ARMv6 or later.
202 (s_arm_unwind_save): Add parameter arch_v6 and call
203 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
205 (md_pseudo_table): Add entry for new "vsave" directive.
206 * doc/c-arm.texi: Correct error in example for "save"
207 directive (fstmdf -> fstmdx). Also document "vsave" directive.
209 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
210 Anatoly Sokolov <aesok@post.ru>
212 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
213 and atmega644p devices. Rename atmega164/atmega324 devices to
214 atmega164p/atmega324p.
215 * doc/c-avr.texi: Document new mcu and arch options.
217 2006-06-17 Nick Clifton <nickc@redhat.com>
219 * config/tc-arm.c (enum parse_operand_result): Move outside of
220 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
222 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
224 * config/tc-i386.h (processor_type): New.
225 (arch_entry): Add type.
227 * config/tc-i386.c (cpu_arch_tune): New.
228 (cpu_arch_tune_flags): Likewise.
229 (cpu_arch_isa_flags): Likewise.
231 (set_cpu_arch): Also update cpu_arch_isa_flags.
232 (md_assemble): Update cpu_arch_isa_flags.
234 (OPTION_MTUNE): Likewise.
235 (md_longopts): Add -march= and -mtune=.
236 (md_parse_option): Support -march= and -mtune=.
237 (md_show_usage): Add -march=CPU/-mtune=CPU.
238 (i386_target_format): Also update cpu_arch_isa_flags,
239 cpu_arch_tune and cpu_arch_tune_flags.
241 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
243 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
245 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
247 * config/tc-arm.c (enum parse_operand_result): New.
248 (struct group_reloc_table_entry): New.
249 (enum group_reloc_type): New.
250 (group_reloc_table): New array.
251 (find_group_reloc_table_entry): New function.
252 (parse_shifter_operand_group_reloc): New function.
253 (parse_address_main): New function, incorporating code
254 from the old parse_address function. To be used via...
255 (parse_address): wrapper for parse_address_main; and
256 (parse_address_group_reloc): new function, likewise.
257 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
258 OP_ADDRGLDRS, OP_ADDRGLDC.
259 (parse_operands): Support for these new operand codes.
260 New macro po_misc_or_fail_no_backtrack.
261 (encode_arm_cp_address): Preserve group relocations.
262 (insns): Modify to use the above operand codes where group
263 relocations are permitted.
264 (md_apply_fix): Handle the group relocations
265 ALU_PC_G0_NC through LDC_SB_G2.
266 (tc_gen_reloc): Likewise.
267 (arm_force_relocation): Leave group relocations for the linker.
268 (arm_fix_adjustable): Likewise.
270 2006-06-15 Julian Brown <julian@codesourcery.com>
272 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
273 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
276 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
278 * config/tc-i386.c (process_suffix): Don't add rex64 for
281 2006-06-09 Thiemo Seufer <ths@mips.com>
283 * config/tc-mips.c (mips_ip): Maintain argument count.
285 2006-06-09 Alan Modra <amodra@bigpond.net.au>
287 * config/tc-iq2000.c: Include sb.h.
289 2006-06-08 Nigel Stephens <nigel@mips.com>
291 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
292 aliases for better compatibility with SGI tools.
294 2006-06-08 Alan Modra <amodra@bigpond.net.au>
296 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
297 * Makefile.am (GASLIBS): Expand @BFDLIB@.
299 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
300 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
301 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
303 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
304 * Makefile.in: Regenerate.
305 * doc/Makefile.in: Regenerate.
306 * configure: Regenerate.
308 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
310 * po/Make-in (pdf, ps): New dummy targets.
312 2006-06-07 Julian Brown <julian@codesourcery.com>
314 * config/tc-arm.c (stdarg.h): include.
315 (arm_it): Add uncond_value field. Add isvec and issingle to operand
317 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
318 REG_TYPE_NSDQ (single, double or quad vector reg).
319 (reg_expected_msgs): Update.
320 (BAD_FPU): Add macro for unsupported FPU instruction error.
321 (parse_neon_type): Support 'd' as an alias for .f64.
322 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
324 (parse_vfp_reg_list): Don't update first arg on error.
325 (parse_neon_mov): Support extra syntax for VFP moves.
326 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
327 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
328 (parse_operands): Support isvec, issingle operands fields, new parse
330 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
332 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
333 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
334 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
335 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
337 (neon_shape): Redefine in terms of above.
338 (neon_shape_class): New enumeration, table of shape classes.
339 (neon_shape_el): New enumeration. One element of a shape.
340 (neon_shape_el_size): Register widths of above, where appropriate.
341 (neon_shape_info): New struct. Info for shape table.
342 (neon_shape_tab): New array.
343 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
344 (neon_check_shape): Rewrite as...
345 (neon_select_shape): New function to classify instruction shapes,
346 driven by new table neon_shape_tab array.
347 (neon_quad): New function. Return 1 if shape should set Q flag in
348 instructions (or equivalent), 0 otherwise.
349 (type_chk_of_el_type): Support F64.
350 (el_type_of_type_chk): Likewise.
351 (neon_check_type): Add support for VFP type checking (VFP data
352 elements fill their containing registers).
353 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
354 in thumb mode for VFP instructions.
355 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
356 and encode the current instruction as if it were that opcode.
357 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
358 arguments, call function in PFN.
359 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
360 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
361 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
362 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
363 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
364 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
365 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
366 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
367 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
368 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
369 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
370 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
371 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
372 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
373 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
375 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
376 between VFP and Neon turns out to belong to Neon. Perform
377 architecture check and fill in condition field if appropriate.
378 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
379 (do_neon_cvt): Add support for VFP variants of instructions.
380 (neon_cvt_flavour): Extend to cover VFP conversions.
381 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
383 (do_neon_ldr_str): Handle single-precision VFP load/store.
384 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
385 NS_NULL not NS_IGNORE.
386 (opcode_tag): Add OT_csuffixF for operands which either take a
387 conditional suffix, or have 0xF in the condition field.
388 (md_assemble): Add support for OT_csuffixF.
389 (NCE): Replace macro with...
390 (NCE_tag, NCE, NCEF): New macros.
391 (nCE): Replace macro with...
392 (nCE_tag, nCE, nCEF): New macros.
393 (insns): Add support for VFP insns or VFP versions of insns msr,
394 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
395 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
396 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
397 VFP/Neon insns together.
399 2006-06-07 Alan Modra <amodra@bigpond.net.au>
400 Ladislav Michl <ladis@linux-mips.org>
402 * app.c: Don't include headers already included by as.h.
404 * atof-generic.c: Likewise.
406 * dwarf2dbg.c: Likewise.
408 * input-file.c: Likewise.
409 * input-scrub.c: Likewise.
411 * output-file.c: Likewise.
414 * config/bfin-lex.l: Likewise.
415 * config/obj-coff.h: Likewise.
416 * config/obj-elf.h: Likewise.
417 * config/obj-som.h: Likewise.
418 * config/tc-arc.c: Likewise.
419 * config/tc-arm.c: Likewise.
420 * config/tc-avr.c: Likewise.
421 * config/tc-bfin.c: Likewise.
422 * config/tc-cris.c: Likewise.
423 * config/tc-d10v.c: Likewise.
424 * config/tc-d30v.c: Likewise.
425 * config/tc-dlx.h: Likewise.
426 * config/tc-fr30.c: Likewise.
427 * config/tc-frv.c: Likewise.
428 * config/tc-h8300.c: Likewise.
429 * config/tc-hppa.c: Likewise.
430 * config/tc-i370.c: Likewise.
431 * config/tc-i860.c: Likewise.
432 * config/tc-i960.c: Likewise.
433 * config/tc-ip2k.c: Likewise.
434 * config/tc-iq2000.c: Likewise.
435 * config/tc-m32c.c: Likewise.
436 * config/tc-m32r.c: Likewise.
437 * config/tc-maxq.c: Likewise.
438 * config/tc-mcore.c: Likewise.
439 * config/tc-mips.c: Likewise.
440 * config/tc-mmix.c: Likewise.
441 * config/tc-mn10200.c: Likewise.
442 * config/tc-mn10300.c: Likewise.
443 * config/tc-msp430.c: Likewise.
444 * config/tc-mt.c: Likewise.
445 * config/tc-ns32k.c: Likewise.
446 * config/tc-openrisc.c: Likewise.
447 * config/tc-ppc.c: Likewise.
448 * config/tc-s390.c: Likewise.
449 * config/tc-sh.c: Likewise.
450 * config/tc-sh64.c: Likewise.
451 * config/tc-sparc.c: Likewise.
452 * config/tc-tic30.c: Likewise.
453 * config/tc-tic4x.c: Likewise.
454 * config/tc-tic54x.c: Likewise.
455 * config/tc-v850.c: Likewise.
456 * config/tc-vax.c: Likewise.
457 * config/tc-xc16x.c: Likewise.
458 * config/tc-xstormy16.c: Likewise.
459 * config/tc-xtensa.c: Likewise.
460 * config/tc-z80.c: Likewise.
461 * config/tc-z8k.c: Likewise.
462 * macro.h: Don't include sb.h or ansidecl.h.
463 * sb.h: Don't include stdio.h or ansidecl.h.
464 * cond.c: Include sb.h.
465 * itbl-lex.l: Include as.h instead of other system headers.
466 * itbl-parse.y: Likewise.
467 * itbl-ops.c: Similarly.
468 * itbl-ops.h: Don't include as.h or ansidecl.h.
469 * config/bfin-defs.h: Don't include bfd.h or as.h.
470 * config/bfin-parse.y: Include as.h instead of other system headers.
472 2006-06-06 Ben Elliston <bje@au.ibm.com>
473 Anton Blanchard <anton@samba.org>
475 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
476 (md_show_usage): Document it.
477 (ppc_setup_opcodes): Test power6 opcode flag bits.
478 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
480 2006-06-06 Thiemo Seufer <ths@mips.com>
481 Chao-ying Fu <fu@mips.com>
483 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
484 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
485 (macro_build): Update comment.
486 (mips_ip): Allow DSP64 instructions for MIPS64R2.
487 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
489 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
490 MIPS_CPU_ASE_MDMX flags for sb1.
492 2006-06-05 Thiemo Seufer <ths@mips.com>
494 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
496 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
497 (mips_ip): Make overflowed/underflowed constant arguments in DSP
498 and MT instructions a fatal error. Use INSERT_OPERAND where
499 appropriate. Improve warnings for break and wait code overflows.
500 Use symbolic constant of OP_MASK_COPZ.
501 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
503 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
505 * po/Make-in (top_builddir): Define.
507 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
509 * doc/Makefile.am (TEXI2DVI): Define.
510 * doc/Makefile.in: Regenerate.
511 * doc/c-arc.texi: Fix typo.
513 2006-06-01 Alan Modra <amodra@bigpond.net.au>
515 * config/obj-ieee.c: Delete.
516 * config/obj-ieee.h: Delete.
517 * Makefile.am (OBJ_FORMATS): Remove ieee.
518 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
519 (obj-ieee.o): Remove rule.
520 * Makefile.in: Regenerate.
521 * configure.in (atof): Remove tahoe.
522 (OBJ_MAYBE_IEEE): Don't define.
523 * configure: Regenerate.
524 * config.in: Regenerate.
525 * doc/Makefile.in: Regenerate.
526 * po/POTFILES.in: Regenerate.
528 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
530 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
531 and LIBINTL_DEP everywhere.
533 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
534 * acinclude.m4: Include new gettext macros.
535 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
536 Remove local code for po/Makefile.
537 * Makefile.in, configure, doc/Makefile.in: Regenerated.
539 2006-05-30 Nick Clifton <nickc@redhat.com>
541 * po/es.po: Updated Spanish translation.
543 2006-05-06 Denis Chertykov <denisc@overta.ru>
545 * doc/c-avr.texi: New file.
546 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
547 * doc/all.texi: Set AVR
548 * doc/as.texinfo: Include c-avr.texi
550 2006-05-28 Jie Zhang <jie.zhang@analog.com>
552 * config/bfin-parse.y (check_macfunc): Loose the condition of
553 calling check_multiply_halfregs ().
555 2006-05-25 Jie Zhang <jie.zhang@analog.com>
557 * config/bfin-parse.y (asm_1): Better check and deal with
558 vector and scalar Multiply 16-Bit Operands instructions.
560 2006-05-24 Nick Clifton <nickc@redhat.com>
562 * config/tc-hppa.c: Convert to ISO C90 format.
563 * config/tc-hppa.h: Likewise.
565 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
566 Randolph Chung <randolph@tausq.org>
568 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
569 is_tls_ieoff, is_tls_leoff): Define.
570 (fix_new_hppa): Handle TLS.
571 (cons_fix_new_hppa): Likewise.
573 (md_apply_fix): Handle TLS relocs.
574 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
576 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
578 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
580 2006-05-23 Thiemo Seufer <ths@mips.com>
581 David Ung <davidu@mips.com>
582 Nigel Stephens <nigel@mips.com>
585 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
586 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
587 ISA_HAS_MXHC1): New macros.
588 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
589 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
590 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
591 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
592 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
593 (mips_after_parse_args): Change default handling of float register
594 size to account for 32bit code with 64bit FP. Better sanity checking
595 of ISA/ASE/ABI option combinations.
596 (s_mipsset): Support switching of GPR and FPR sizes via
597 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
599 (mips_elf_final_processing): We should record the use of 64bit FP
600 registers in 32bit code but we don't, because ELF header flags are
602 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
603 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
604 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
605 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
606 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
607 missing -march options. Document .set arch=CPU. Move .set smartmips
608 to ASE page. Use @code for .set FOO examples.
610 2006-05-23 Jie Zhang <jie.zhang@analog.com>
612 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
615 2006-05-23 Jie Zhang <jie.zhang@analog.com>
617 * config/bfin-defs.h (bfin_equals): Remove declaration.
618 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
619 * config/tc-bfin.c (bfin_name_is_register): Remove.
620 (bfin_equals): Remove.
621 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
622 (bfin_name_is_register): Remove declaration.
624 2006-05-19 Thiemo Seufer <ths@mips.com>
625 Nigel Stephens <nigel@mips.com>
627 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
628 (mips_oddfpreg_ok): New function.
631 2006-05-19 Thiemo Seufer <ths@mips.com>
632 David Ung <davidu@mips.com>
634 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
635 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
636 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
637 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
638 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
639 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
640 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
641 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
642 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
643 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
644 reg_names_o32, reg_names_n32n64): Define register classes.
645 (reg_lookup): New function, use register classes.
646 (md_begin): Reserve register names in the symbol table. Simplify
648 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
650 (mips16_ip): Use reg_lookup.
651 (tc_get_register): Likewise.
652 (tc_mips_regname_to_dw2regnum): New function.
654 2006-05-19 Thiemo Seufer <ths@mips.com>
656 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
657 Un-constify string argument.
658 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
660 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
662 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
664 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
666 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
668 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
671 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
673 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
674 cfloat/m68881 to correct architecture before using it.
676 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
678 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
681 2006-05-15 Paul Brook <paul@codesourcery.com>
683 * config/tc-arm.c (arm_adjust_symtab): Use
684 bfd_is_arm_special_symbol_name.
686 2006-05-15 Bob Wilson <bob.wilson@acm.org>
688 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
689 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
690 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
691 Handle errors from calls to xtensa_opcode_is_* functions.
693 2006-05-14 Thiemo Seufer <ths@mips.com>
695 * config/tc-mips.c (macro_build): Test for currently active
697 (mips16_ip): Reject invalid opcodes.
699 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
701 * doc/as.texinfo: Rename "Index" to "AS Index",
702 and "ABORT" to "ABORT (COFF)".
704 2006-05-11 Paul Brook <paul@codesourcery.com>
706 * config/tc-arm.c (parse_half): New function.
707 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
708 (parse_operands): Ditto.
709 (do_mov16): Reject invalid relocations.
710 (do_t_mov16): Ditto. Use Thumb reloc numbers.
711 (insns): Replace Iffff with HALF.
712 (md_apply_fix): Add MOVW and MOVT relocs.
713 (tc_gen_reloc): Ditto.
714 * doc/c-arm.texi: Document relocation operators
716 2006-05-11 Paul Brook <paul@codesourcery.com>
718 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
720 2006-05-11 Thiemo Seufer <ths@mips.com>
722 * config/tc-mips.c (append_insn): Don't check the range of j or
725 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
727 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
728 relocs against external symbols for WinCE targets.
729 (md_apply_fix): Likewise.
731 2006-05-09 David Ung <davidu@mips.com>
733 * config/tc-mips.c (append_insn): Only warn about an out-of-range
736 2006-05-09 Nick Clifton <nickc@redhat.com>
738 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
739 against symbols which are not going to be placed into the symbol
742 2006-05-09 Ben Elliston <bje@au.ibm.com>
744 * expr.c (operand): Remove `if (0 && ..)' statement and
745 subsequently unused target_op label. Collapse `if (1 || ..)'
747 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
748 separately above the switch.
750 2006-05-08 Nick Clifton <nickc@redhat.com>
753 * config/tc-msp430.c (line_separator_character): Define as |.
755 2006-05-08 Thiemo Seufer <ths@mips.com>
756 Nigel Stephens <nigel@mips.com>
757 David Ung <davidu@mips.com>
759 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
760 (mips_opts): Likewise.
761 (file_ase_smartmips): New variable.
762 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
763 (macro_build): Handle SmartMIPS instructions.
765 (md_longopts): Add argument handling for smartmips.
766 (md_parse_options, mips_after_parse_args): Likewise.
767 (s_mipsset): Add .set smartmips support.
768 (md_show_usage): Document -msmartmips/-mno-smartmips.
769 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
771 * doc/c-mips.texi: Likewise.
773 2006-05-08 Alan Modra <amodra@bigpond.net.au>
775 * write.c (relax_segment): Add pass count arg. Don't error on
776 negative org/space on first two passes.
777 (relax_seg_info): New struct.
778 (relax_seg, write_object_file): Adjust.
779 * write.h (relax_segment): Update prototype.
781 2006-05-05 Julian Brown <julian@codesourcery.com>
783 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
785 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
786 architecture version checks.
787 (insns): Allow overlapping instructions to be used in VFP mode.
789 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
792 * config/obj-elf.c (obj_elf_change_section): Allow user
793 specified SHF_ALPHA_GPREL.
795 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
797 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
798 for PMEM related expressions.
800 2006-05-05 Nick Clifton <nickc@redhat.com>
803 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
804 insertion of a directory separator character into a string at a
805 given offset. Uses heuristics to decide when to use a backslash
806 character rather than a forward-slash character.
807 (dwarf2_directive_loc): Use the macro.
808 (out_debug_info): Likewise.
810 2006-05-05 Thiemo Seufer <ths@mips.com>
811 David Ung <davidu@mips.com>
813 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
815 (macro): Add new case M_CACHE_AB.
817 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
819 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
820 (opcode_lookup): Issue a warning for opcode with
821 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
822 identical to OT_cinfix3.
823 (TxC3w, TC3w, tC3w): New.
824 (insns): Use tC3w and TC3w for comparison instructions with
827 2006-05-04 Alan Modra <amodra@bigpond.net.au>
829 * subsegs.h (struct frchain): Delete frch_seg.
830 (frchain_root): Delete.
831 (seg_info): Define as macro.
832 * subsegs.c (frchain_root): Delete.
833 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
834 (subsegs_begin, subseg_change): Adjust for above.
835 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
836 rather than to one big list.
837 (subseg_get): Don't special case abs, und sections.
838 (subseg_new, subseg_force_new): Don't set frchainP here.
840 (subsegs_print_statistics): Adjust frag chain control list traversal.
841 * debug.c (dmp_frags): Likewise.
842 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
843 at frchain_root. Make use of known frchain ordering.
844 (last_frag_for_seg): Likewise.
845 (get_frag_fix): Likewise. Add seg param.
846 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
847 * write.c (chain_frchains_together_1): Adjust for struct frchain.
848 (SUB_SEGMENT_ALIGN): Likewise.
849 (subsegs_finish): Adjust frchain list traversal.
850 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
851 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
852 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
853 (xtensa_fix_b_j_loop_end_frags): Likewise.
854 (xtensa_fix_close_loop_end_frags): Likewise.
855 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
856 (retrieve_segment_info): Delete frch_seg initialisation.
858 2006-05-03 Alan Modra <amodra@bigpond.net.au>
860 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
861 * config/obj-elf.h (obj_sec_set_private_data): Delete.
862 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
863 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
865 2006-05-02 Joseph Myers <joseph@codesourcery.com>
867 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
869 (md_apply_fix3): Multiply offset by 4 here for
870 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
872 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
873 Jan Beulich <jbeulich@novell.com>
875 * config/tc-i386.c (output_invalid_buf): Change size for
877 * config/tc-tic30.c (output_invalid_buf): Likewise.
879 * config/tc-i386.c (output_invalid): Cast none-ascii char to
881 * config/tc-tic30.c (output_invalid): Likewise.
883 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
885 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
886 (TEXI2POD): Use AM_MAKEINFOFLAGS.
887 (asconfig.texi): Don't set top_srcdir.
888 * doc/as.texinfo: Don't use top_srcdir.
889 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
891 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
893 * config/tc-i386.c (output_invalid_buf): Change size to 16.
894 * config/tc-tic30.c (output_invalid_buf): Likewise.
896 * config/tc-i386.c (output_invalid): Use snprintf instead of
898 * config/tc-ia64.c (declare_register_set): Likewise.
899 (emit_one_bundle): Likewise.
900 (check_dependencies): Likewise.
901 * config/tc-tic30.c (output_invalid): Likewise.
903 2006-05-02 Paul Brook <paul@codesourcery.com>
905 * config/tc-arm.c (arm_optimize_expr): New function.
906 * config/tc-arm.h (md_optimize_expr): Define
907 (arm_optimize_expr): Add prototype.
908 (TC_FORCE_RELOCATION_SUB_SAME): Define.
910 2006-05-02 Ben Elliston <bje@au.ibm.com>
912 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
915 * sb.h (sb_list_vector): Move to sb.c.
916 * sb.c (free_list): Use type of sb_list_vector directly.
917 (sb_build): Fix off-by-one error in assertion about `size'.
919 2006-05-01 Ben Elliston <bje@au.ibm.com>
921 * listing.c (listing_listing): Remove useless loop.
922 * macro.c (macro_expand): Remove is_positional local variable.
923 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
924 and simplify surrounding expressions, where possible.
925 (assign_symbol): Likewise.
926 (s_weakref): Likewise.
927 * symbols.c (colon): Likewise.
929 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
931 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
933 2006-04-30 Thiemo Seufer <ths@mips.com>
934 David Ung <davidu@mips.com>
936 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
937 (mips_immed): New table that records various handling of udi
938 instruction patterns.
939 (mips_ip): Adds udi handling.
941 2006-04-28 Alan Modra <amodra@bigpond.net.au>
943 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
944 of list rather than beginning.
946 2006-04-26 Julian Brown <julian@codesourcery.com>
948 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
949 (is_quarter_float): Rename from above. Simplify slightly.
950 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
952 (parse_neon_mov): Parse floating-point constants.
953 (neon_qfloat_bits): Fix encoding.
954 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
955 preference to integer encoding when using the F32 type.
957 2006-04-26 Julian Brown <julian@codesourcery.com>
959 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
960 zero-initialising structures containing it will lead to invalid types).
961 (arm_it): Add vectype to each operand.
962 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
964 (neon_typed_alias): New structure. Extra information for typed
966 (reg_entry): Add neon type info field.
967 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
968 Break out alternative syntax for coprocessor registers, etc. into...
969 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
970 out from arm_reg_parse.
971 (parse_neon_type): Move. Return SUCCESS/FAIL.
972 (first_error): New function. Call to ensure first error which occurs is
974 (parse_neon_operand_type): Parse exactly one type.
975 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
976 (parse_typed_reg_or_scalar): New function. Handle core of both
977 arm_typed_reg_parse and parse_scalar.
978 (arm_typed_reg_parse): Parse a register with an optional type.
979 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
981 (parse_scalar): Parse a Neon scalar with optional type.
982 (parse_reg_list): Use first_error.
983 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
984 (neon_alias_types_same): New function. Return true if two (alias) types
986 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
988 (insert_reg_alias): Return new reg_entry not void.
989 (insert_neon_reg_alias): New function. Insert type/index information as
990 well as register for alias.
991 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
992 make typed register aliases accordingly.
993 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
995 (s_unreq): Delete type information if present.
996 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
997 (s_arm_unwind_save_mmxwcg): Likewise.
998 (s_arm_unwind_movsp): Likewise.
999 (s_arm_unwind_setfp): Likewise.
1000 (parse_shift): Likewise.
1001 (parse_shifter_operand): Likewise.
1002 (parse_address): Likewise.
1003 (parse_tb): Likewise.
1004 (tc_arm_regname_to_dw2regnum): Likewise.
1005 (md_pseudo_table): Add dn, qn.
1006 (parse_neon_mov): Handle typed operands.
1007 (parse_operands): Likewise.
1008 (neon_type_mask): Add N_SIZ.
1009 (N_ALLMODS): New macro.
1010 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1011 (el_type_of_type_chk): Add some safeguards.
1012 (modify_types_allowed): Fix logic bug.
1013 (neon_check_type): Handle operands with types.
1014 (neon_three_same): Remove redundant optional arg handling.
1015 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1016 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1017 (do_neon_step): Adjust accordingly.
1018 (neon_cmode_for_logic_imm): Use first_error.
1019 (do_neon_bitfield): Call neon_check_type.
1020 (neon_dyadic): Rename to...
1021 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1022 to allow modification of type of the destination.
1023 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1024 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1025 (do_neon_compare): Make destination be an untyped bitfield.
1026 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1027 (neon_mul_mac): Return early in case of errors.
1028 (neon_move_immediate): Use first_error.
1029 (neon_mac_reg_scalar_long): Fix type to include scalar.
1030 (do_neon_dup): Likewise.
1031 (do_neon_mov): Likewise (in several places).
1032 (do_neon_tbl_tbx): Fix type.
1033 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1034 (do_neon_ld_dup): Exit early in case of errors and/or use
1036 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1037 Handle .dn/.qn directives.
1038 (REGDEF): Add zero for reg_entry neon field.
1040 2006-04-26 Julian Brown <julian@codesourcery.com>
1042 * config/tc-arm.c (limits.h): Include.
1043 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1044 (fpu_vfp_v3_or_neon_ext): Declare constants.
1045 (neon_el_type): New enumeration of types for Neon vector elements.
1046 (neon_type_el): New struct. Define type and size of a vector element.
1047 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1049 (neon_type): Define struct. The type of an instruction.
1050 (arm_it): Add 'vectype' for the current instruction.
1051 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1052 (vfp_sp_reg_pos): Rename to...
1053 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1055 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1056 (Neon D or Q register).
1057 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1059 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1060 (my_get_expression): Allow above constant as argument to accept
1061 64-bit constants with optional prefix.
1062 (arm_reg_parse): Add extra argument to return the specific type of
1063 register in when either a D or Q register (REG_TYPE_NDQ) is
1064 requested. Can be NULL.
1065 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1066 (parse_reg_list): Update for new arm_reg_parse args.
1067 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1068 (parse_neon_el_struct_list): New function. Parse element/structure
1069 register lists for VLD<n>/VST<n> instructions.
1070 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1071 (s_arm_unwind_save_mmxwr): Likewise.
1072 (s_arm_unwind_save_mmxwcg): Likewise.
1073 (s_arm_unwind_movsp): Likewise.
1074 (s_arm_unwind_setfp): Likewise.
1075 (parse_big_immediate): New function. Parse an immediate, which may be
1076 64 bits wide. Put results in inst.operands[i].
1077 (parse_shift): Update for new arm_reg_parse args.
1078 (parse_address): Likewise. Add parsing of alignment specifiers.
1079 (parse_neon_mov): Parse the operands of a VMOV instruction.
1080 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1081 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1082 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1083 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1084 (parse_operands): Handle new codes above.
1085 (encode_arm_vfp_sp_reg): Rename to...
1086 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1087 selected VFP version only supports D0-D15.
1088 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1089 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1090 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1091 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1092 encode_arm_vfp_reg name, and allow 32 D regs.
1093 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1094 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1096 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1097 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1098 constant-load and conversion insns introduced with VFPv3.
1099 (neon_tab_entry): New struct.
1100 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1101 those which are the targets of pseudo-instructions.
1102 (neon_opc): Enumerate opcodes, use as indices into...
1103 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1104 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1105 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1106 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1108 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1110 (neon_type_mask): New. Compact type representation for type checking.
1111 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1112 permitted type combinations.
1113 (N_IGNORE_TYPE): New macro.
1114 (neon_check_shape): New function. Check an instruction shape for
1115 multiple alternatives. Return the specific shape for the current
1117 (neon_modify_type_size): New function. Modify a vector type and size,
1118 depending on the bit mask in argument 1.
1119 (neon_type_promote): New function. Convert a given "key" type (of an
1120 operand) into the correct type for a different operand, based on a bit
1122 (type_chk_of_el_type): New function. Convert a type and size into the
1123 compact representation used for type checking.
1124 (el_type_of_type_ckh): New function. Reverse of above (only when a
1125 single bit is set in the bit mask).
1126 (modify_types_allowed): New function. Alter a mask of allowed types
1127 based on a bit mask of modifications.
1128 (neon_check_type): New function. Check the type of the current
1129 instruction against the variable argument list. The "key" type of the
1130 instruction is returned.
1131 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1132 a Neon data-processing instruction depending on whether we're in ARM
1133 mode or Thumb-2 mode.
1134 (neon_logbits): New function.
1135 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1136 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1137 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1138 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1139 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1140 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1141 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1142 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1143 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1144 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1145 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1146 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1147 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1148 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1149 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1150 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1151 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1152 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1153 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1154 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1155 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1156 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1157 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1158 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1159 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1161 (parse_neon_type): New function. Parse Neon type specifier.
1162 (opcode_lookup): Allow parsing of Neon type specifiers.
1163 (REGNUM2, REGSETH, REGSET2): New macros.
1164 (reg_names): Add new VFPv3 and Neon registers.
1165 (NUF, nUF, NCE, nCE): New macros for opcode table.
1166 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1167 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1168 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1169 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1170 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1171 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1172 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1173 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1174 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1175 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1176 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1177 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1178 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1179 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1181 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1182 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1183 (arm_option_cpu_value): Add vfp3 and neon.
1184 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1187 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1189 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1190 syntax instead of hardcoded opcodes with ".w18" suffixes.
1191 (wide_branch_opcode): New.
1192 (build_transition): Use it to check for wide branch opcodes with
1193 either ".w18" or ".w15" suffixes.
1195 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1197 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1198 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1199 frag's is_literal flag.
1201 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1203 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1205 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1207 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1208 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1209 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1210 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1211 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1213 2005-04-20 Paul Brook <paul@codesourcery.com>
1215 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1217 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1219 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1221 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1222 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1223 Make some cpus unsupported on ELF. Run "make dep-am".
1224 * Makefile.in: Regenerate.
1226 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1228 * configure.in (--enable-targets): Indent help message.
1229 * configure: Regenerate.
1231 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1234 * config/tc-i386.c (i386_immediate): Check illegal immediate
1237 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1239 * config/tc-i386.c: Formatting.
1240 (output_disp, output_imm): ISO C90 params.
1242 * frags.c (frag_offset_fixed_p): Constify args.
1243 * frags.h (frag_offset_fixed_p): Ditto.
1245 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1246 (COFF_MAGIC): Delete.
1248 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1250 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1252 * po/POTFILES.in: Regenerated.
1254 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1256 * doc/as.texinfo: Mention that some .type syntaxes are not
1257 supported on all architectures.
1259 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1261 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1262 instructions when such transformations have been disabled.
1264 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1266 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1267 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1268 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1269 decoding the loop instructions. Remove current_offset variable.
1270 (xtensa_fix_short_loop_frags): Likewise.
1271 (min_bytes_to_other_loop_end): Remove current_offset argument.
1273 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1275 * config/tc-z80.c (z80_optimize_expr): Removed.
1276 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1278 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1280 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1281 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1282 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1283 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1284 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1285 at90can64, at90usb646, at90usb647, at90usb1286 and
1287 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1289 2006-04-07 Paul Brook <paul@codesourcery.com>
1291 * config/tc-arm.c (parse_operands): Set default error message.
1293 2006-04-07 Paul Brook <paul@codesourcery.com>
1295 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1297 2006-04-07 Paul Brook <paul@codesourcery.com>
1299 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1301 2006-04-07 Paul Brook <paul@codesourcery.com>
1303 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1304 (move_or_literal_pool): Handle Thumb-2 instructions.
1305 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1307 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1310 * config/tc-i386.c (match_template): Move 64-bit operand tests
1313 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1315 * po/Make-in: Add install-html target.
1316 * Makefile.am: Add install-html and install-html-recursive targets.
1317 * Makefile.in: Regenerate.
1318 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1319 * configure: Regenerate.
1320 * doc/Makefile.am: Add install-html and install-html-am targets.
1321 * doc/Makefile.in: Regenerate.
1323 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1325 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1328 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1329 Daniel Jacobowitz <dan@codesourcery.com>
1331 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1332 (GOTT_BASE, GOTT_INDEX): New.
1333 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1334 GOTT_INDEX when generating VxWorks PIC.
1335 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1336 use the generic *-*-vxworks* stanza instead.
1338 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1341 * frags.c (frag_offset_fixed_p): New function.
1342 * frags.h (frag_offset_fixed_p): Declare.
1343 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1344 (resolve_expression): Likewise.
1346 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1348 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1349 of the same length but different numbers of slots.
1351 2006-03-30 Andreas Schwab <schwab@suse.de>
1353 * configure.in: Fix help string for --enable-targets option.
1354 * configure: Regenerate.
1356 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1358 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1359 (m68k_ip): ... here. Use for all chips. Protect against buffer
1360 overrun and avoid excessive copying.
1362 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1363 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1364 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1365 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1366 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1367 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1368 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1369 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1370 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1371 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1372 (struct m68k_cpu): Change chip field to control_regs.
1373 (current_chip): Remove.
1374 (control_regs): New.
1375 (m68k_archs, m68k_extensions): Adjust.
1376 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1377 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1378 (find_cf_chip): Reimplement for new organization of cpu table.
1379 (select_control_regs): Remove.
1381 (struct save_opts): Save control regs, not chip.
1382 (s_save, s_restore): Adjust.
1383 (m68k_lookup_cpu): Give deprecated warning when necessary.
1384 (m68k_init_arch): Adjust.
1385 (md_show_usage): Adjust for new cpu table organization.
1387 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1389 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1390 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1391 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1393 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1394 (any_gotrel): New rule.
1395 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1396 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1398 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1399 (bfin_pic_ptr): New function.
1400 (md_pseudo_table): Add it for ".picptr".
1401 (OPTION_FDPIC): New macro.
1402 (md_longopts): Add -mfdpic.
1403 (md_parse_option): Handle it.
1404 (md_begin): Set BFD flags.
1405 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1406 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1408 * Makefile.am (bfin-parse.o): Update dependencies.
1409 (DEPTC_bfin_elf): Likewise.
1410 * Makefile.in: Regenerate.
1412 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1414 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1415 mcfemac instead of mcfmac.
1417 2006-03-23 Michael Matz <matz@suse.de>
1419 * config/tc-i386.c (type_names): Correct placement of 'static'.
1420 (reloc): Map some more relocs to their 64 bit counterpart when
1422 (output_insn): Work around breakage if DEBUG386 is defined.
1423 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1424 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1425 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1426 different from i386.
1427 (output_imm): Ditto.
1428 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1430 (md_convert_frag): Jumps can now be larger than 2GB away, error
1432 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1433 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1435 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1436 Daniel Jacobowitz <dan@codesourcery.com>
1437 Phil Edwards <phil@codesourcery.com>
1438 Zack Weinberg <zack@codesourcery.com>
1439 Mark Mitchell <mark@codesourcery.com>
1440 Nathan Sidwell <nathan@codesourcery.com>
1442 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1443 (md_begin): Complain about -G being used for PIC. Don't change
1444 the text, data and bss alignments on VxWorks.
1445 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1446 generating VxWorks PIC.
1447 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1448 (macro): Likewise, but do not treat la $25 specially for
1449 VxWorks PIC, and do not handle jal.
1450 (OPTION_MVXWORKS_PIC): New macro.
1451 (md_longopts): Add -mvxworks-pic.
1452 (md_parse_option): Don't complain about using PIC and -G together here.
1453 Handle OPTION_MVXWORKS_PIC.
1454 (md_estimate_size_before_relax): Always use the first relaxation
1455 sequence on VxWorks.
1456 * config/tc-mips.h (VXWORKS_PIC): New.
1458 2006-03-21 Paul Brook <paul@codesourcery.com>
1460 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1462 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1464 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1465 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1466 (get_loop_align_size): New.
1467 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1468 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1469 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1470 (get_noop_aligned_address): Use get_loop_align_size.
1471 (get_aligned_diff): Likewise.
1473 2006-03-21 Paul Brook <paul@codesourcery.com>
1475 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1477 2006-03-20 Paul Brook <paul@codesourcery.com>
1479 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1480 (do_t_branch): Encode branches inside IT blocks as unconditional.
1481 (do_t_cps): New function.
1482 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1483 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1484 (opcode_lookup): Allow conditional suffixes on all instructions in
1486 (md_assemble): Advance condexec state before checking for errors.
1487 (insns): Use do_t_cps.
1489 2006-03-20 Paul Brook <paul@codesourcery.com>
1491 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1492 outputting the insn.
1494 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1496 * config/tc-vax.c: Update copyright year.
1497 * config/tc-vax.h: Likewise.
1499 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1501 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1503 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1505 2006-03-17 Paul Brook <paul@codesourcery.com>
1507 * config/tc-arm.c (insns): Add ldm and stm.
1509 2006-03-17 Ben Elliston <bje@au.ibm.com>
1512 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1514 2006-03-16 Paul Brook <paul@codesourcery.com>
1516 * config/tc-arm.c (insns): Add "svc".
1518 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1520 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1521 flag and avoid double underscore prefixes.
1523 2006-03-10 Paul Brook <paul@codesourcery.com>
1525 * config/tc-arm.c (md_begin): Handle EABIv5.
1526 (arm_eabis): Add EF_ARM_EABI_VER5.
1527 * doc/c-arm.texi: Document -meabi=5.
1529 2006-03-10 Ben Elliston <bje@au.ibm.com>
1531 * app.c (do_scrub_chars): Simplify string handling.
1533 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1534 Daniel Jacobowitz <dan@codesourcery.com>
1535 Zack Weinberg <zack@codesourcery.com>
1536 Nathan Sidwell <nathan@codesourcery.com>
1537 Paul Brook <paul@codesourcery.com>
1538 Ricardo Anguiano <anguiano@codesourcery.com>
1539 Phil Edwards <phil@codesourcery.com>
1541 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1542 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1544 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1545 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1546 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1548 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1550 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1551 even when using the text-section-literals option.
1553 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1555 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1557 (m68k_ip): <case 'J'> Check we have some control regs.
1558 (md_parse_option): Allow raw arch switch.
1559 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1560 whether 68881 or cfloat was meant by -mfloat.
1561 (md_show_usage): Adjust extension display.
1562 (m68k_elf_final_processing): Adjust.
1564 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1566 * config/tc-avr.c (avr_mod_hash_value): New function.
1567 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1568 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1569 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1570 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1572 (tc_gen_reloc): Handle substractions of symbols, if possible do
1573 fixups, abort otherwise.
1574 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1575 tc_fix_adjustable): Define.
1577 2006-03-02 James E Wilson <wilson@specifix.com>
1579 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1580 change the template, then clear md.slot[curr].end_of_insn_group.
1582 2006-02-28 Jan Beulich <jbeulich@novell.com>
1584 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1586 2006-02-28 Jan Beulich <jbeulich@novell.com>
1589 * macro.c (getstring): Don't treat parentheses special anymore.
1590 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1591 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1594 2006-02-28 Mat <mat@csail.mit.edu>
1596 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1598 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1600 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1602 (CFI_signal_frame): Define.
1603 (cfi_pseudo_table): Add .cfi_signal_frame.
1604 (dot_cfi): Handle CFI_signal_frame.
1605 (output_cie): Handle cie->signal_frame.
1606 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1607 different. Copy signal_frame from FDE to newly created CIE.
1608 * doc/as.texinfo: Document .cfi_signal_frame.
1610 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1612 * doc/Makefile.am: Add html target.
1613 * doc/Makefile.in: Regenerate.
1614 * po/Make-in: Add html target.
1616 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1618 * config/tc-i386.c (output_insn): Support Intel Merom New
1621 * config/tc-i386.h (CpuMNI): New.
1622 (CpuUnknownFlags): Add CpuMNI.
1624 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1626 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1627 (hpriv_reg_table): New table for hyperprivileged registers.
1628 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1631 2006-02-24 DJ Delorie <dj@redhat.com>
1633 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1634 (tc_gen_reloc): Don't define.
1635 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1636 (OPTION_LINKRELAX): New.
1637 (md_longopts): Add it.
1639 (md_parse_options): Set it.
1640 (md_assemble): Emit relaxation relocs as needed.
1641 (md_convert_frag): Emit relaxation relocs as needed.
1642 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1643 (m32c_apply_fix): New.
1644 (tc_gen_reloc): New.
1645 (m32c_force_relocation): Force out jump relocs when relaxing.
1646 (m32c_fix_adjustable): Return false if relaxing.
1648 2006-02-24 Paul Brook <paul@codesourcery.com>
1650 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1651 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1652 (struct asm_barrier_opt): Define.
1653 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1654 (parse_psr): Accept V7M psr names.
1655 (parse_barrier): New function.
1656 (enum operand_parse_code): Add OP_oBARRIER.
1657 (parse_operands): Implement OP_oBARRIER.
1658 (do_barrier): New function.
1659 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1660 (do_t_cpsi): Add V7M restrictions.
1661 (do_t_mrs, do_t_msr): Validate V7M variants.
1662 (md_assemble): Check for NULL variants.
1663 (v7m_psrs, barrier_opt_names): New tables.
1664 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1665 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1666 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1667 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1668 (struct cpu_arch_ver_table): Define.
1669 (cpu_arch_ver): New.
1670 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1671 Tag_CPU_arch_profile.
1672 * doc/c-arm.texi: Document new cpu and arch options.
1674 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1676 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1678 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1680 * config/tc-ia64.c: Update copyright years.
1682 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1684 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1687 2005-02-22 Paul Brook <paul@codesourcery.com>
1689 * config/tc-arm.c (do_pld): Remove incorrect write to
1691 (encode_thumb32_addr_mode): Use correct operand.
1693 2006-02-21 Paul Brook <paul@codesourcery.com>
1695 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1697 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1698 Anil Paranjape <anilp1@kpitcummins.com>
1699 Shilin Shakti <shilins@kpitcummins.com>
1701 * Makefile.am: Add xc16x related entry.
1702 * Makefile.in: Regenerate.
1703 * configure.in: Added xc16x related entry.
1704 * configure: Regenerate.
1705 * config/tc-xc16x.h: New file
1706 * config/tc-xc16x.c: New file
1707 * doc/c-xc16x.texi: New file for xc16x
1708 * doc/all.texi: Entry for xc16x
1709 * doc/Makefile.texi: Added c-xc16x.texi
1710 * NEWS: Announce the support for the new target.
1712 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1714 * configure.tgt: set emulation for mips-*-netbsd*
1716 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1718 * config.in: Rebuilt.
1720 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1722 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1723 from 1, not 0, in error messages.
1724 (md_assemble): Simplify special-case check for ENTRY instructions.
1725 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1726 operand in error message.
1728 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1730 * configure.tgt (arm-*-linux-gnueabi*): Change to
1733 2006-02-10 Nick Clifton <nickc@redhat.com>
1735 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1736 32-bit value is propagated into the upper bits of a 64-bit long.
1738 * config/tc-arc.c (init_opcode_tables): Fix cast.
1739 (arc_extoper, md_operand): Likewise.
1741 2006-02-09 David Heine <dlheine@tensilica.com>
1743 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1744 each relaxation step.
1746 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1748 * configure.in (CHECK_DECLS): Add vsnprintf.
1749 * configure: Regenerate.
1750 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1751 include/declare here, but...
1752 * as.h: Move code detecting VARARGS idiom to the top.
1753 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1754 (vsnprintf): Declare if not already declared.
1756 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1758 * as.c (close_output_file): New.
1759 (main): Register close_output_file with xatexit before
1760 dump_statistics. Don't call output_file_close.
1762 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1764 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1765 mcf5329_control_regs): New.
1766 (not_current_architecture, selected_arch, selected_cpu): New.
1767 (m68k_archs, m68k_extensions): New.
1768 (archs): Renamed to ...
1769 (m68k_cpus): ... here. Adjust.
1771 (md_pseudo_table): Add arch and cpu directives.
1772 (find_cf_chip, m68k_ip): Adjust table scanning.
1773 (no_68851, no_68881): Remove.
1774 (md_assemble): Lazily initialize.
1775 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1776 (md_init_after_args): Move functionality to m68k_init_arch.
1777 (mri_chip): Adjust table scanning.
1778 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1779 options with saner parsing.
1780 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1781 m68k_init_arch): New.
1782 (s_m68k_cpu, s_m68k_arch): New.
1783 (md_show_usage): Adjust.
1784 (m68k_elf_final_processing): Set CF EF flags.
1785 * config/tc-m68k.h (m68k_init_after_args): Remove.
1786 (tc_init_after_args): Remove.
1787 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1788 (M68k-Directives): Document .arch and .cpu directives.
1790 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1792 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1793 synonyms for equ and defl.
1794 (z80_cons_fix_new): New function.
1795 (emit_byte): Disallow relative jumps to absolute locations.
1796 (emit_data): Only handle defb, prototype changed, because defb is
1797 now handled as pseudo-op rather than an instruction.
1798 (instab): Entries for defb,defw,db,dw moved from here...
1799 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1800 Add entries for def24,def32,d24,d32.
1801 (md_assemble): Improved error handling.
1802 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1803 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1804 (z80_cons_fix_new): Declare.
1805 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1806 (def24,d24,def32,d32): New pseudo-ops.
1808 2006-02-02 Paul Brook <paul@codesourcery.com>
1810 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1812 2005-02-02 Paul Brook <paul@codesourcery.com>
1814 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1815 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1816 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1817 T2_OPCODE_RSB): Define.
1818 (thumb32_negate_data_op): New function.
1819 (md_apply_fix): Use it.
1821 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1823 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1825 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1826 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1828 (relaxation_requirements): Add pfinish_frag argument and use it to
1829 replace setting tinsn->record_fix fields.
1830 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1831 and vinsn_to_insnbuf. Remove references to record_fix and
1832 slot_sub_symbols fields.
1833 (xtensa_mark_narrow_branches): Delete unused code.
1834 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1836 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1838 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1839 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1840 of the record_fix field. Simplify error messages for unexpected
1842 (set_expr_symbol_offset_diff): Delete.
1844 2006-01-31 Paul Brook <paul@codesourcery.com>
1846 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1848 2006-01-31 Paul Brook <paul@codesourcery.com>
1849 Richard Earnshaw <rearnsha@arm.com>
1851 * config/tc-arm.c: Use arm_feature_set.
1852 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1853 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1854 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1857 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1858 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1859 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1860 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1862 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1863 (arm_opts): Move old cpu/arch options from here...
1864 (arm_legacy_opts): ... to here.
1865 (md_parse_option): Search arm_legacy_opts.
1866 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1867 (arm_float_abis, arm_eabis): Make const.
1869 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1871 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1873 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1875 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1876 in load immediate intruction.
1878 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1880 * config/bfin-parse.y (value_match): Use correct conversion
1881 specifications in template string for __FILE__ and __LINE__.
1885 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1887 Introduce TLS descriptors for i386 and x86_64.
1888 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1889 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1890 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1891 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1892 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1894 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1895 (lex_got): Handle @tlsdesc and @tlscall.
1896 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1898 2006-01-11 Nick Clifton <nickc@redhat.com>
1900 Fixes for building on 64-bit hosts:
1901 * config/tc-avr.c (mod_index): New union to allow conversion
1902 between pointers and integers.
1903 (md_begin, avr_ldi_expression): Use it.
1904 * config/tc-i370.c (md_assemble): Add cast for argument to print
1906 * config/tc-tic54x.c (subsym_substitute): Likewise.
1907 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1908 opindex field of fr_cgen structure into a pointer so that it can
1909 be stored in a frag.
1910 * config/tc-mn10300.c (md_assemble): Likewise.
1911 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1913 * config/tc-v850.c: Replace uses of (int) casts with correct
1916 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1919 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1921 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1924 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1925 a local-label reference.
1927 For older changes see ChangeLog-2005
1933 version-control: never