PR gas/2623b
[binutils-gdb.git] / gas / ChangeLog
1 2006-05-08 Nick Clifton <nickc@redhat.com>
2
3 PR gas/2623
4 * config/tc-msp430.c (line_separator_character): Define as |.
5
6 2006-05-08 Thiemo Seufer <ths@mips.com>
7 Nigel Stephens <nigel@mips.com>
8 David Ung <davidu@mips.com>
9
10 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
11 (mips_opts): Likewise.
12 (file_ase_smartmips): New variable.
13 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
14 (macro_build): Handle SmartMIPS instructions.
15 (mips_ip): Likewise.
16 (md_longopts): Add argument handling for smartmips.
17 (md_parse_options, mips_after_parse_args): Likewise.
18 (s_mipsset): Add .set smartmips support.
19 (md_show_usage): Document -msmartmips/-mno-smartmips.
20 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
21 .set smartmips.
22 * doc/c-mips.texi: Likewise.
23
24 2006-05-08 Alan Modra <amodra@bigpond.net.au>
25
26 * write.c (relax_segment): Add pass count arg. Don't error on
27 negative org/space on first two passes.
28 (relax_seg_info): New struct.
29 (relax_seg, write_object_file): Adjust.
30 * write.h (relax_segment): Update prototype.
31
32 2006-05-05 Julian Brown <julian@codesourcery.com>
33
34 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
35 checking.
36 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
37 architecture version checks.
38 (insns): Allow overlapping instructions to be used in VFP mode.
39
40 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
41
42 PR gas/2598
43 * config/obj-elf.c (obj_elf_change_section): Allow user
44 specified SHF_ALPHA_GPREL.
45
46 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
47
48 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
49 for PMEM related expressions.
50
51 2006-05-05 Nick Clifton <nickc@redhat.com>
52
53 PR gas/2582
54 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
55 insertion of a directory separator character into a string at a
56 given offset. Uses heuristics to decide when to use a backslash
57 character rather than a forward-slash character.
58 (dwarf2_directive_loc): Use the macro.
59 (out_debug_info): Likewise.
60
61 2006-05-05 Thiemo Seufer <ths@mips.com>
62 David Ung <davidu@mips.com>
63
64 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
65 instruction.
66 (macro): Add new case M_CACHE_AB.
67
68 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
69
70 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
71 (opcode_lookup): Issue a warning for opcode with
72 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
73 identical to OT_cinfix3.
74 (TxC3w, TC3w, tC3w): New.
75 (insns): Use tC3w and TC3w for comparison instructions with
76 's' suffix.
77
78 2006-05-04 Alan Modra <amodra@bigpond.net.au>
79
80 * subsegs.h (struct frchain): Delete frch_seg.
81 (frchain_root): Delete.
82 (seg_info): Define as macro.
83 * subsegs.c (frchain_root): Delete.
84 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
85 (subsegs_begin, subseg_change): Adjust for above.
86 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
87 rather than to one big list.
88 (subseg_get): Don't special case abs, und sections.
89 (subseg_new, subseg_force_new): Don't set frchainP here.
90 (seg_info): Delete.
91 (subsegs_print_statistics): Adjust frag chain control list traversal.
92 * debug.c (dmp_frags): Likewise.
93 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
94 at frchain_root. Make use of known frchain ordering.
95 (last_frag_for_seg): Likewise.
96 (get_frag_fix): Likewise. Add seg param.
97 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
98 * write.c (chain_frchains_together_1): Adjust for struct frchain.
99 (SUB_SEGMENT_ALIGN): Likewise.
100 (subsegs_finish): Adjust frchain list traversal.
101 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
102 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
103 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
104 (xtensa_fix_b_j_loop_end_frags): Likewise.
105 (xtensa_fix_close_loop_end_frags): Likewise.
106 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
107 (retrieve_segment_info): Delete frch_seg initialisation.
108
109 2006-05-03 Alan Modra <amodra@bigpond.net.au>
110
111 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
112 * config/obj-elf.h (obj_sec_set_private_data): Delete.
113 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
114 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
115
116 2006-05-02 Joseph Myers <joseph@codesourcery.com>
117
118 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
119 here.
120 (md_apply_fix3): Multiply offset by 4 here for
121 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
122
123 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
124 Jan Beulich <jbeulich@novell.com>
125
126 * config/tc-i386.c (output_invalid_buf): Change size for
127 unsigned char.
128 * config/tc-tic30.c (output_invalid_buf): Likewise.
129
130 * config/tc-i386.c (output_invalid): Cast none-ascii char to
131 unsigned char.
132 * config/tc-tic30.c (output_invalid): Likewise.
133
134 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
135
136 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
137 (TEXI2POD): Use AM_MAKEINFOFLAGS.
138 (asconfig.texi): Don't set top_srcdir.
139 * doc/as.texinfo: Don't use top_srcdir.
140 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
141
142 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
143
144 * config/tc-i386.c (output_invalid_buf): Change size to 16.
145 * config/tc-tic30.c (output_invalid_buf): Likewise.
146
147 * config/tc-i386.c (output_invalid): Use snprintf instead of
148 sprintf.
149 * config/tc-ia64.c (declare_register_set): Likewise.
150 (emit_one_bundle): Likewise.
151 (check_dependencies): Likewise.
152 * config/tc-tic30.c (output_invalid): Likewise.
153
154 2006-05-02 Paul Brook <paul@codesourcery.com>
155
156 * config/tc-arm.c (arm_optimize_expr): New function.
157 * config/tc-arm.h (md_optimize_expr): Define
158 (arm_optimize_expr): Add prototype.
159 (TC_FORCE_RELOCATION_SUB_SAME): Define.
160
161 2006-05-02 Ben Elliston <bje@au.ibm.com>
162
163 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
164 field unsigned.
165
166 * sb.h (sb_list_vector): Move to sb.c.
167 * sb.c (free_list): Use type of sb_list_vector directly.
168 (sb_build): Fix off-by-one error in assertion about `size'.
169
170 2006-05-01 Ben Elliston <bje@au.ibm.com>
171
172 * listing.c (listing_listing): Remove useless loop.
173 * macro.c (macro_expand): Remove is_positional local variable.
174 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
175 and simplify surrounding expressions, where possible.
176 (assign_symbol): Likewise.
177 (s_weakref): Likewise.
178 * symbols.c (colon): Likewise.
179
180 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
181
182 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
183
184 2006-04-30 Thiemo Seufer <ths@mips.com>
185 David Ung <davidu@mips.com>
186
187 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
188 (mips_immed): New table that records various handling of udi
189 instruction patterns.
190 (mips_ip): Adds udi handling.
191
192 2006-04-28 Alan Modra <amodra@bigpond.net.au>
193
194 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
195 of list rather than beginning.
196
197 2006-04-26 Julian Brown <julian@codesourcery.com>
198
199 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
200 (is_quarter_float): Rename from above. Simplify slightly.
201 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
202 number.
203 (parse_neon_mov): Parse floating-point constants.
204 (neon_qfloat_bits): Fix encoding.
205 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
206 preference to integer encoding when using the F32 type.
207
208 2006-04-26 Julian Brown <julian@codesourcery.com>
209
210 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
211 zero-initialising structures containing it will lead to invalid types).
212 (arm_it): Add vectype to each operand.
213 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
214 defined field.
215 (neon_typed_alias): New structure. Extra information for typed
216 register aliases.
217 (reg_entry): Add neon type info field.
218 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
219 Break out alternative syntax for coprocessor registers, etc. into...
220 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
221 out from arm_reg_parse.
222 (parse_neon_type): Move. Return SUCCESS/FAIL.
223 (first_error): New function. Call to ensure first error which occurs is
224 reported.
225 (parse_neon_operand_type): Parse exactly one type.
226 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
227 (parse_typed_reg_or_scalar): New function. Handle core of both
228 arm_typed_reg_parse and parse_scalar.
229 (arm_typed_reg_parse): Parse a register with an optional type.
230 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
231 result.
232 (parse_scalar): Parse a Neon scalar with optional type.
233 (parse_reg_list): Use first_error.
234 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
235 (neon_alias_types_same): New function. Return true if two (alias) types
236 are the same.
237 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
238 of elements.
239 (insert_reg_alias): Return new reg_entry not void.
240 (insert_neon_reg_alias): New function. Insert type/index information as
241 well as register for alias.
242 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
243 make typed register aliases accordingly.
244 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
245 of line.
246 (s_unreq): Delete type information if present.
247 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
248 (s_arm_unwind_save_mmxwcg): Likewise.
249 (s_arm_unwind_movsp): Likewise.
250 (s_arm_unwind_setfp): Likewise.
251 (parse_shift): Likewise.
252 (parse_shifter_operand): Likewise.
253 (parse_address): Likewise.
254 (parse_tb): Likewise.
255 (tc_arm_regname_to_dw2regnum): Likewise.
256 (md_pseudo_table): Add dn, qn.
257 (parse_neon_mov): Handle typed operands.
258 (parse_operands): Likewise.
259 (neon_type_mask): Add N_SIZ.
260 (N_ALLMODS): New macro.
261 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
262 (el_type_of_type_chk): Add some safeguards.
263 (modify_types_allowed): Fix logic bug.
264 (neon_check_type): Handle operands with types.
265 (neon_three_same): Remove redundant optional arg handling.
266 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
267 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
268 (do_neon_step): Adjust accordingly.
269 (neon_cmode_for_logic_imm): Use first_error.
270 (do_neon_bitfield): Call neon_check_type.
271 (neon_dyadic): Rename to...
272 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
273 to allow modification of type of the destination.
274 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
275 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
276 (do_neon_compare): Make destination be an untyped bitfield.
277 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
278 (neon_mul_mac): Return early in case of errors.
279 (neon_move_immediate): Use first_error.
280 (neon_mac_reg_scalar_long): Fix type to include scalar.
281 (do_neon_dup): Likewise.
282 (do_neon_mov): Likewise (in several places).
283 (do_neon_tbl_tbx): Fix type.
284 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
285 (do_neon_ld_dup): Exit early in case of errors and/or use
286 first_error.
287 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
288 Handle .dn/.qn directives.
289 (REGDEF): Add zero for reg_entry neon field.
290
291 2006-04-26 Julian Brown <julian@codesourcery.com>
292
293 * config/tc-arm.c (limits.h): Include.
294 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
295 (fpu_vfp_v3_or_neon_ext): Declare constants.
296 (neon_el_type): New enumeration of types for Neon vector elements.
297 (neon_type_el): New struct. Define type and size of a vector element.
298 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
299 instruction.
300 (neon_type): Define struct. The type of an instruction.
301 (arm_it): Add 'vectype' for the current instruction.
302 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
303 (vfp_sp_reg_pos): Rename to...
304 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
305 tags.
306 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
307 (Neon D or Q register).
308 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
309 register.
310 (GE_OPT_PREFIX_BIG): Define constant, for use in...
311 (my_get_expression): Allow above constant as argument to accept
312 64-bit constants with optional prefix.
313 (arm_reg_parse): Add extra argument to return the specific type of
314 register in when either a D or Q register (REG_TYPE_NDQ) is
315 requested. Can be NULL.
316 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
317 (parse_reg_list): Update for new arm_reg_parse args.
318 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
319 (parse_neon_el_struct_list): New function. Parse element/structure
320 register lists for VLD<n>/VST<n> instructions.
321 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
322 (s_arm_unwind_save_mmxwr): Likewise.
323 (s_arm_unwind_save_mmxwcg): Likewise.
324 (s_arm_unwind_movsp): Likewise.
325 (s_arm_unwind_setfp): Likewise.
326 (parse_big_immediate): New function. Parse an immediate, which may be
327 64 bits wide. Put results in inst.operands[i].
328 (parse_shift): Update for new arm_reg_parse args.
329 (parse_address): Likewise. Add parsing of alignment specifiers.
330 (parse_neon_mov): Parse the operands of a VMOV instruction.
331 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
332 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
333 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
334 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
335 (parse_operands): Handle new codes above.
336 (encode_arm_vfp_sp_reg): Rename to...
337 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
338 selected VFP version only supports D0-D15.
339 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
340 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
341 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
342 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
343 encode_arm_vfp_reg name, and allow 32 D regs.
344 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
345 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
346 regs.
347 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
348 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
349 constant-load and conversion insns introduced with VFPv3.
350 (neon_tab_entry): New struct.
351 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
352 those which are the targets of pseudo-instructions.
353 (neon_opc): Enumerate opcodes, use as indices into...
354 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
355 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
356 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
357 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
358 neon_enc_tab.
359 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
360 Neon instructions.
361 (neon_type_mask): New. Compact type representation for type checking.
362 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
363 permitted type combinations.
364 (N_IGNORE_TYPE): New macro.
365 (neon_check_shape): New function. Check an instruction shape for
366 multiple alternatives. Return the specific shape for the current
367 instruction.
368 (neon_modify_type_size): New function. Modify a vector type and size,
369 depending on the bit mask in argument 1.
370 (neon_type_promote): New function. Convert a given "key" type (of an
371 operand) into the correct type for a different operand, based on a bit
372 mask.
373 (type_chk_of_el_type): New function. Convert a type and size into the
374 compact representation used for type checking.
375 (el_type_of_type_ckh): New function. Reverse of above (only when a
376 single bit is set in the bit mask).
377 (modify_types_allowed): New function. Alter a mask of allowed types
378 based on a bit mask of modifications.
379 (neon_check_type): New function. Check the type of the current
380 instruction against the variable argument list. The "key" type of the
381 instruction is returned.
382 (neon_dp_fixup): New function. Fill in and modify instruction bits for
383 a Neon data-processing instruction depending on whether we're in ARM
384 mode or Thumb-2 mode.
385 (neon_logbits): New function.
386 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
387 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
388 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
389 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
390 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
391 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
392 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
393 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
394 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
395 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
396 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
397 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
398 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
399 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
400 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
401 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
402 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
403 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
404 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
405 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
406 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
407 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
408 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
409 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
410 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
411 helpers.
412 (parse_neon_type): New function. Parse Neon type specifier.
413 (opcode_lookup): Allow parsing of Neon type specifiers.
414 (REGNUM2, REGSETH, REGSET2): New macros.
415 (reg_names): Add new VFPv3 and Neon registers.
416 (NUF, nUF, NCE, nCE): New macros for opcode table.
417 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
418 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
419 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
420 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
421 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
422 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
423 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
424 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
425 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
426 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
427 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
428 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
429 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
430 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
431 fto[us][lh][sd].
432 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
433 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
434 (arm_option_cpu_value): Add vfp3 and neon.
435 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
436 VFPv1 attribute.
437
438 2006-04-25 Bob Wilson <bob.wilson@acm.org>
439
440 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
441 syntax instead of hardcoded opcodes with ".w18" suffixes.
442 (wide_branch_opcode): New.
443 (build_transition): Use it to check for wide branch opcodes with
444 either ".w18" or ".w15" suffixes.
445
446 2006-04-25 Bob Wilson <bob.wilson@acm.org>
447
448 * config/tc-xtensa.c (xtensa_create_literal_symbol,
449 xg_assemble_literal, xg_assemble_literal_space): Do not set the
450 frag's is_literal flag.
451
452 2006-04-25 Bob Wilson <bob.wilson@acm.org>
453
454 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
455
456 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
457
458 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
459 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
460 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
461 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
462 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
463
464 2005-04-20 Paul Brook <paul@codesourcery.com>
465
466 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
467 all targets.
468 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
469
470 2006-04-19 Alan Modra <amodra@bigpond.net.au>
471
472 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
473 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
474 Make some cpus unsupported on ELF. Run "make dep-am".
475 * Makefile.in: Regenerate.
476
477 2006-04-19 Alan Modra <amodra@bigpond.net.au>
478
479 * configure.in (--enable-targets): Indent help message.
480 * configure: Regenerate.
481
482 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
483
484 PR gas/2533
485 * config/tc-i386.c (i386_immediate): Check illegal immediate
486 register operand.
487
488 2006-04-18 Alan Modra <amodra@bigpond.net.au>
489
490 * config/tc-i386.c: Formatting.
491 (output_disp, output_imm): ISO C90 params.
492
493 * frags.c (frag_offset_fixed_p): Constify args.
494 * frags.h (frag_offset_fixed_p): Ditto.
495
496 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
497 (COFF_MAGIC): Delete.
498
499 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
500
501 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
502
503 * po/POTFILES.in: Regenerated.
504
505 2006-04-16 Mark Mitchell <mark@codesourcery.com>
506
507 * doc/as.texinfo: Mention that some .type syntaxes are not
508 supported on all architectures.
509
510 2006-04-14 Sterling Augustine <sterling@tensilica.com>
511
512 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
513 instructions when such transformations have been disabled.
514
515 2006-04-10 Sterling Augustine <sterling@tensilica.com>
516
517 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
518 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
519 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
520 decoding the loop instructions. Remove current_offset variable.
521 (xtensa_fix_short_loop_frags): Likewise.
522 (min_bytes_to_other_loop_end): Remove current_offset argument.
523
524 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
525
526 * config/tc-z80.c (z80_optimize_expr): Removed.
527 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
528
529 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
530
531 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
532 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
533 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
534 atmega644, atmega329, atmega3290, atmega649, atmega6490,
535 atmega406, atmega640, atmega1280, atmega1281, at90can32,
536 at90can64, at90usb646, at90usb647, at90usb1286 and
537 at90usb1287.
538 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
539
540 2006-04-07 Paul Brook <paul@codesourcery.com>
541
542 * config/tc-arm.c (parse_operands): Set default error message.
543
544 2006-04-07 Paul Brook <paul@codesourcery.com>
545
546 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
547
548 2006-04-07 Paul Brook <paul@codesourcery.com>
549
550 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
551
552 2006-04-07 Paul Brook <paul@codesourcery.com>
553
554 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
555 (move_or_literal_pool): Handle Thumb-2 instructions.
556 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
557
558 2006-04-07 Alan Modra <amodra@bigpond.net.au>
559
560 PR 2512.
561 * config/tc-i386.c (match_template): Move 64-bit operand tests
562 inside loop.
563
564 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
565
566 * po/Make-in: Add install-html target.
567 * Makefile.am: Add install-html and install-html-recursive targets.
568 * Makefile.in: Regenerate.
569 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
570 * configure: Regenerate.
571 * doc/Makefile.am: Add install-html and install-html-am targets.
572 * doc/Makefile.in: Regenerate.
573
574 2006-04-06 Alan Modra <amodra@bigpond.net.au>
575
576 * frags.c (frag_offset_fixed_p): Reinitialise offset before
577 second scan.
578
579 2006-04-05 Richard Sandiford <richard@codesourcery.com>
580 Daniel Jacobowitz <dan@codesourcery.com>
581
582 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
583 (GOTT_BASE, GOTT_INDEX): New.
584 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
585 GOTT_INDEX when generating VxWorks PIC.
586 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
587 use the generic *-*-vxworks* stanza instead.
588
589 2006-04-04 Alan Modra <amodra@bigpond.net.au>
590
591 PR 997
592 * frags.c (frag_offset_fixed_p): New function.
593 * frags.h (frag_offset_fixed_p): Declare.
594 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
595 (resolve_expression): Likewise.
596
597 2006-04-03 Sterling Augustine <sterling@tensilica.com>
598
599 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
600 of the same length but different numbers of slots.
601
602 2006-03-30 Andreas Schwab <schwab@suse.de>
603
604 * configure.in: Fix help string for --enable-targets option.
605 * configure: Regenerate.
606
607 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
608
609 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
610 (m68k_ip): ... here. Use for all chips. Protect against buffer
611 overrun and avoid excessive copying.
612
613 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
614 m68020_control_regs, m68040_control_regs, m68060_control_regs,
615 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
616 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
617 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
618 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
619 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
620 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
621 mcf5282_ctrl, mcfv4e_ctrl): ... these.
622 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
623 (struct m68k_cpu): Change chip field to control_regs.
624 (current_chip): Remove.
625 (control_regs): New.
626 (m68k_archs, m68k_extensions): Adjust.
627 (m68k_cpus): Reorder to be in cpu number order. Adjust.
628 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
629 (find_cf_chip): Reimplement for new organization of cpu table.
630 (select_control_regs): Remove.
631 (mri_chip): Adjust.
632 (struct save_opts): Save control regs, not chip.
633 (s_save, s_restore): Adjust.
634 (m68k_lookup_cpu): Give deprecated warning when necessary.
635 (m68k_init_arch): Adjust.
636 (md_show_usage): Adjust for new cpu table organization.
637
638 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
639
640 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
641 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
642 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
643 "elf/bfin.h".
644 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
645 (any_gotrel): New rule.
646 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
647 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
648 "elf/bfin.h".
649 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
650 (bfin_pic_ptr): New function.
651 (md_pseudo_table): Add it for ".picptr".
652 (OPTION_FDPIC): New macro.
653 (md_longopts): Add -mfdpic.
654 (md_parse_option): Handle it.
655 (md_begin): Set BFD flags.
656 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
657 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
658 us for GOT relocs.
659 * Makefile.am (bfin-parse.o): Update dependencies.
660 (DEPTC_bfin_elf): Likewise.
661 * Makefile.in: Regenerate.
662
663 2006-03-25 Richard Sandiford <richard@codesourcery.com>
664
665 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
666 mcfemac instead of mcfmac.
667
668 2006-03-23 Michael Matz <matz@suse.de>
669
670 * config/tc-i386.c (type_names): Correct placement of 'static'.
671 (reloc): Map some more relocs to their 64 bit counterpart when
672 size is 8.
673 (output_insn): Work around breakage if DEBUG386 is defined.
674 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
675 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
676 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
677 different from i386.
678 (output_imm): Ditto.
679 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
680 Imm64.
681 (md_convert_frag): Jumps can now be larger than 2GB away, error
682 out in that case.
683 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
684 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
685
686 2006-03-22 Richard Sandiford <richard@codesourcery.com>
687 Daniel Jacobowitz <dan@codesourcery.com>
688 Phil Edwards <phil@codesourcery.com>
689 Zack Weinberg <zack@codesourcery.com>
690 Mark Mitchell <mark@codesourcery.com>
691 Nathan Sidwell <nathan@codesourcery.com>
692
693 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
694 (md_begin): Complain about -G being used for PIC. Don't change
695 the text, data and bss alignments on VxWorks.
696 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
697 generating VxWorks PIC.
698 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
699 (macro): Likewise, but do not treat la $25 specially for
700 VxWorks PIC, and do not handle jal.
701 (OPTION_MVXWORKS_PIC): New macro.
702 (md_longopts): Add -mvxworks-pic.
703 (md_parse_option): Don't complain about using PIC and -G together here.
704 Handle OPTION_MVXWORKS_PIC.
705 (md_estimate_size_before_relax): Always use the first relaxation
706 sequence on VxWorks.
707 * config/tc-mips.h (VXWORKS_PIC): New.
708
709 2006-03-21 Paul Brook <paul@codesourcery.com>
710
711 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
712
713 2006-03-21 Sterling Augustine <sterling@tensilica.com>
714
715 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
716 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
717 (get_loop_align_size): New.
718 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
719 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
720 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
721 (get_noop_aligned_address): Use get_loop_align_size.
722 (get_aligned_diff): Likewise.
723
724 2006-03-21 Paul Brook <paul@codesourcery.com>
725
726 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
727
728 2006-03-20 Paul Brook <paul@codesourcery.com>
729
730 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
731 (do_t_branch): Encode branches inside IT blocks as unconditional.
732 (do_t_cps): New function.
733 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
734 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
735 (opcode_lookup): Allow conditional suffixes on all instructions in
736 Thumb mode.
737 (md_assemble): Advance condexec state before checking for errors.
738 (insns): Use do_t_cps.
739
740 2006-03-20 Paul Brook <paul@codesourcery.com>
741
742 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
743 outputting the insn.
744
745 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
746
747 * config/tc-vax.c: Update copyright year.
748 * config/tc-vax.h: Likewise.
749
750 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
751
752 * config/tc-vax.c (md_chars_to_number): Used only locally, so
753 make it static.
754 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
755
756 2006-03-17 Paul Brook <paul@codesourcery.com>
757
758 * config/tc-arm.c (insns): Add ldm and stm.
759
760 2006-03-17 Ben Elliston <bje@au.ibm.com>
761
762 PR gas/2446
763 * doc/as.texinfo (Ident): Document this directive more thoroughly.
764
765 2006-03-16 Paul Brook <paul@codesourcery.com>
766
767 * config/tc-arm.c (insns): Add "svc".
768
769 2006-03-13 Bob Wilson <bob.wilson@acm.org>
770
771 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
772 flag and avoid double underscore prefixes.
773
774 2006-03-10 Paul Brook <paul@codesourcery.com>
775
776 * config/tc-arm.c (md_begin): Handle EABIv5.
777 (arm_eabis): Add EF_ARM_EABI_VER5.
778 * doc/c-arm.texi: Document -meabi=5.
779
780 2006-03-10 Ben Elliston <bje@au.ibm.com>
781
782 * app.c (do_scrub_chars): Simplify string handling.
783
784 2006-03-07 Richard Sandiford <richard@codesourcery.com>
785 Daniel Jacobowitz <dan@codesourcery.com>
786 Zack Weinberg <zack@codesourcery.com>
787 Nathan Sidwell <nathan@codesourcery.com>
788 Paul Brook <paul@codesourcery.com>
789 Ricardo Anguiano <anguiano@codesourcery.com>
790 Phil Edwards <phil@codesourcery.com>
791
792 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
793 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
794 R_ARM_ABS12 reloc.
795 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
796 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
797 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
798
799 2006-03-06 Bob Wilson <bob.wilson@acm.org>
800
801 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
802 even when using the text-section-literals option.
803
804 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
805
806 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
807 and cf.
808 (m68k_ip): <case 'J'> Check we have some control regs.
809 (md_parse_option): Allow raw arch switch.
810 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
811 whether 68881 or cfloat was meant by -mfloat.
812 (md_show_usage): Adjust extension display.
813 (m68k_elf_final_processing): Adjust.
814
815 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
816
817 * config/tc-avr.c (avr_mod_hash_value): New function.
818 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
819 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
820 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
821 instead of int avr_ldi_expression: use avr_mod_hash_value instead
822 of (int).
823 (tc_gen_reloc): Handle substractions of symbols, if possible do
824 fixups, abort otherwise.
825 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
826 tc_fix_adjustable): Define.
827
828 2006-03-02 James E Wilson <wilson@specifix.com>
829
830 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
831 change the template, then clear md.slot[curr].end_of_insn_group.
832
833 2006-02-28 Jan Beulich <jbeulich@novell.com>
834
835 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
836
837 2006-02-28 Jan Beulich <jbeulich@novell.com>
838
839 PR/1070
840 * macro.c (getstring): Don't treat parentheses special anymore.
841 (get_any_string): Don't consider '(' and ')' as quoting anymore.
842 Special-case '(', ')', '[', and ']' when dealing with non-quoting
843 characters.
844
845 2006-02-28 Mat <mat@csail.mit.edu>
846
847 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
848
849 2006-02-27 Jakub Jelinek <jakub@redhat.com>
850
851 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
852 field.
853 (CFI_signal_frame): Define.
854 (cfi_pseudo_table): Add .cfi_signal_frame.
855 (dot_cfi): Handle CFI_signal_frame.
856 (output_cie): Handle cie->signal_frame.
857 (select_cie_for_fde): Don't share CIE if signal_frame flag is
858 different. Copy signal_frame from FDE to newly created CIE.
859 * doc/as.texinfo: Document .cfi_signal_frame.
860
861 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
862
863 * doc/Makefile.am: Add html target.
864 * doc/Makefile.in: Regenerate.
865 * po/Make-in: Add html target.
866
867 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
868
869 * config/tc-i386.c (output_insn): Support Intel Merom New
870 Instructions.
871
872 * config/tc-i386.h (CpuMNI): New.
873 (CpuUnknownFlags): Add CpuMNI.
874
875 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
876
877 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
878 (hpriv_reg_table): New table for hyperprivileged registers.
879 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
880 register encoding.
881
882 2006-02-24 DJ Delorie <dj@redhat.com>
883
884 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
885 (tc_gen_reloc): Don't define.
886 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
887 (OPTION_LINKRELAX): New.
888 (md_longopts): Add it.
889 (m32c_relax): New.
890 (md_parse_options): Set it.
891 (md_assemble): Emit relaxation relocs as needed.
892 (md_convert_frag): Emit relaxation relocs as needed.
893 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
894 (m32c_apply_fix): New.
895 (tc_gen_reloc): New.
896 (m32c_force_relocation): Force out jump relocs when relaxing.
897 (m32c_fix_adjustable): Return false if relaxing.
898
899 2006-02-24 Paul Brook <paul@codesourcery.com>
900
901 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
902 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
903 (struct asm_barrier_opt): Define.
904 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
905 (parse_psr): Accept V7M psr names.
906 (parse_barrier): New function.
907 (enum operand_parse_code): Add OP_oBARRIER.
908 (parse_operands): Implement OP_oBARRIER.
909 (do_barrier): New function.
910 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
911 (do_t_cpsi): Add V7M restrictions.
912 (do_t_mrs, do_t_msr): Validate V7M variants.
913 (md_assemble): Check for NULL variants.
914 (v7m_psrs, barrier_opt_names): New tables.
915 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
916 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
917 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
918 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
919 (struct cpu_arch_ver_table): Define.
920 (cpu_arch_ver): New.
921 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
922 Tag_CPU_arch_profile.
923 * doc/c-arm.texi: Document new cpu and arch options.
924
925 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
926
927 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
928
929 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
930
931 * config/tc-ia64.c: Update copyright years.
932
933 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
934
935 * config/tc-ia64.c (specify_resource): Add the rule 17 from
936 SDM 2.2.
937
938 2005-02-22 Paul Brook <paul@codesourcery.com>
939
940 * config/tc-arm.c (do_pld): Remove incorrect write to
941 inst.instruction.
942 (encode_thumb32_addr_mode): Use correct operand.
943
944 2006-02-21 Paul Brook <paul@codesourcery.com>
945
946 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
947
948 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
949 Anil Paranjape <anilp1@kpitcummins.com>
950 Shilin Shakti <shilins@kpitcummins.com>
951
952 * Makefile.am: Add xc16x related entry.
953 * Makefile.in: Regenerate.
954 * configure.in: Added xc16x related entry.
955 * configure: Regenerate.
956 * config/tc-xc16x.h: New file
957 * config/tc-xc16x.c: New file
958 * doc/c-xc16x.texi: New file for xc16x
959 * doc/all.texi: Entry for xc16x
960 * doc/Makefile.texi: Added c-xc16x.texi
961 * NEWS: Announce the support for the new target.
962
963 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
964
965 * configure.tgt: set emulation for mips-*-netbsd*
966
967 2006-02-14 Jakub Jelinek <jakub@redhat.com>
968
969 * config.in: Rebuilt.
970
971 2006-02-13 Bob Wilson <bob.wilson@acm.org>
972
973 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
974 from 1, not 0, in error messages.
975 (md_assemble): Simplify special-case check for ENTRY instructions.
976 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
977 operand in error message.
978
979 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
980
981 * configure.tgt (arm-*-linux-gnueabi*): Change to
982 arm-*-linux-*eabi*.
983
984 2006-02-10 Nick Clifton <nickc@redhat.com>
985
986 * config/tc-crx.c (check_range): Ensure that the sign bit of a
987 32-bit value is propagated into the upper bits of a 64-bit long.
988
989 * config/tc-arc.c (init_opcode_tables): Fix cast.
990 (arc_extoper, md_operand): Likewise.
991
992 2006-02-09 David Heine <dlheine@tensilica.com>
993
994 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
995 each relaxation step.
996
997 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
998
999 * configure.in (CHECK_DECLS): Add vsnprintf.
1000 * configure: Regenerate.
1001 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1002 include/declare here, but...
1003 * as.h: Move code detecting VARARGS idiom to the top.
1004 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1005 (vsnprintf): Declare if not already declared.
1006
1007 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1008
1009 * as.c (close_output_file): New.
1010 (main): Register close_output_file with xatexit before
1011 dump_statistics. Don't call output_file_close.
1012
1013 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1014
1015 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1016 mcf5329_control_regs): New.
1017 (not_current_architecture, selected_arch, selected_cpu): New.
1018 (m68k_archs, m68k_extensions): New.
1019 (archs): Renamed to ...
1020 (m68k_cpus): ... here. Adjust.
1021 (n_arches): Remove.
1022 (md_pseudo_table): Add arch and cpu directives.
1023 (find_cf_chip, m68k_ip): Adjust table scanning.
1024 (no_68851, no_68881): Remove.
1025 (md_assemble): Lazily initialize.
1026 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1027 (md_init_after_args): Move functionality to m68k_init_arch.
1028 (mri_chip): Adjust table scanning.
1029 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1030 options with saner parsing.
1031 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1032 m68k_init_arch): New.
1033 (s_m68k_cpu, s_m68k_arch): New.
1034 (md_show_usage): Adjust.
1035 (m68k_elf_final_processing): Set CF EF flags.
1036 * config/tc-m68k.h (m68k_init_after_args): Remove.
1037 (tc_init_after_args): Remove.
1038 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1039 (M68k-Directives): Document .arch and .cpu directives.
1040
1041 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1042
1043 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1044 synonyms for equ and defl.
1045 (z80_cons_fix_new): New function.
1046 (emit_byte): Disallow relative jumps to absolute locations.
1047 (emit_data): Only handle defb, prototype changed, because defb is
1048 now handled as pseudo-op rather than an instruction.
1049 (instab): Entries for defb,defw,db,dw moved from here...
1050 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1051 Add entries for def24,def32,d24,d32.
1052 (md_assemble): Improved error handling.
1053 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1054 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1055 (z80_cons_fix_new): Declare.
1056 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1057 (def24,d24,def32,d32): New pseudo-ops.
1058
1059 2006-02-02 Paul Brook <paul@codesourcery.com>
1060
1061 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1062
1063 2005-02-02 Paul Brook <paul@codesourcery.com>
1064
1065 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1066 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1067 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1068 T2_OPCODE_RSB): Define.
1069 (thumb32_negate_data_op): New function.
1070 (md_apply_fix): Use it.
1071
1072 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1073
1074 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1075 fields.
1076 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1077 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1078 subtracted symbols.
1079 (relaxation_requirements): Add pfinish_frag argument and use it to
1080 replace setting tinsn->record_fix fields.
1081 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1082 and vinsn_to_insnbuf. Remove references to record_fix and
1083 slot_sub_symbols fields.
1084 (xtensa_mark_narrow_branches): Delete unused code.
1085 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1086 a symbol.
1087 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1088 record_fix fields.
1089 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1090 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1091 of the record_fix field. Simplify error messages for unexpected
1092 symbolic operands.
1093 (set_expr_symbol_offset_diff): Delete.
1094
1095 2006-01-31 Paul Brook <paul@codesourcery.com>
1096
1097 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1098
1099 2006-01-31 Paul Brook <paul@codesourcery.com>
1100 Richard Earnshaw <rearnsha@arm.com>
1101
1102 * config/tc-arm.c: Use arm_feature_set.
1103 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1104 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1105 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1106 New variables.
1107 (insns): Use them.
1108 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1109 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1110 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1111 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1112 feature flags.
1113 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1114 (arm_opts): Move old cpu/arch options from here...
1115 (arm_legacy_opts): ... to here.
1116 (md_parse_option): Search arm_legacy_opts.
1117 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1118 (arm_float_abis, arm_eabis): Make const.
1119
1120 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1121
1122 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1123
1124 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1125
1126 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1127 in load immediate intruction.
1128
1129 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1130
1131 * config/bfin-parse.y (value_match): Use correct conversion
1132 specifications in template string for __FILE__ and __LINE__.
1133 (binary): Ditto.
1134 (unary): Ditto.
1135
1136 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1137
1138 Introduce TLS descriptors for i386 and x86_64.
1139 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1140 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1141 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1142 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1143 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1144 displacement bits.
1145 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1146 (lex_got): Handle @tlsdesc and @tlscall.
1147 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1148
1149 2006-01-11 Nick Clifton <nickc@redhat.com>
1150
1151 Fixes for building on 64-bit hosts:
1152 * config/tc-avr.c (mod_index): New union to allow conversion
1153 between pointers and integers.
1154 (md_begin, avr_ldi_expression): Use it.
1155 * config/tc-i370.c (md_assemble): Add cast for argument to print
1156 statement.
1157 * config/tc-tic54x.c (subsym_substitute): Likewise.
1158 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1159 opindex field of fr_cgen structure into a pointer so that it can
1160 be stored in a frag.
1161 * config/tc-mn10300.c (md_assemble): Likewise.
1162 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1163 types.
1164 * config/tc-v850.c: Replace uses of (int) casts with correct
1165 types.
1166
1167 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1168
1169 PR gas/2117
1170 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1171
1172 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1173
1174 PR gas/2101
1175 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1176 a local-label reference.
1177
1178 For older changes see ChangeLog-2005
1179 \f
1180 Local Variables:
1181 mode: change-log
1182 left-margin: 8
1183 fill-column: 74
1184 version-control: never
1185 End: