1 2006-08-01 Thiemo Seufer <ths@mips.com>
3 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
5 2006-08-01 Thiemo Seufer <ths@mips.com>
7 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
8 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
9 BFD_RELOC_32 and BFD_RELOC_16.
10 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
11 md_convert_frag, md_obj_end): Fix comment formatting.
13 2006-07-31 Thiemo Seufer <ths@mips.com>
15 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
16 handling for BFD_RELOC_MIPS16_JMP.
18 2006-07-24 Andreas Schwab <schwab@suse.de>
21 * read.c (read_a_source_file): Ignore unknown text after line
22 comment character. Fix misleading comment.
24 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
26 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
27 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
28 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
29 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
30 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
31 doc/c-z80.texi, doc/internals.texi: Fix some typos.
33 2006-07-21 Nick Clifton <nickc@redhat.com>
35 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
38 2006-07-20 Thiemo Seufer <ths@mips.com>
39 Nigel Stephens <nigel@mips.com>
41 * config/tc-mips.c (md_parse_option): Don't infer optimisation
42 options from debug options.
44 2006-07-20 Thiemo Seufer <ths@mips.com>
46 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
47 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
49 2006-07-19 Paul Brook <paul@codesourcery.com>
51 * config/tc-arm.c (insns): Fix rbit Arm opcode.
53 2006-07-18 Paul Brook <paul@codesourcery.com>
55 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
56 (md_convert_frag): Use correct reloc for add_pc. Use
57 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
58 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
59 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
61 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
63 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
64 when file and line unknown.
66 2006-07-17 Thiemo Seufer <ths@mips.com>
68 * read.c (s_struct): Use IS_ELF.
69 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
70 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
71 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
72 s_mips_mask): Likewise.
74 2006-07-16 Thiemo Seufer <ths@mips.com>
75 David Ung <davidu@mips.com>
77 * read.c (s_struct): Handle ELF section changing.
78 * config/tc-mips.c (s_align): Leave enabling auto-align to the
80 (s_change_sec): Try section changing only if we output ELF.
82 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
84 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
86 (smallest_imm_type): Remove Cpu086.
87 (i386_target_format): Likewise.
89 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
92 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
93 Michael Meissner <michael.meissner@amd.com>
95 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
96 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
97 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
99 (i386_align_code): Ditto.
100 (md_assemble_code): Add support for insertq/extrq instructions,
101 swapping as needed for intel syntax.
102 (swap_imm_operands): New function to swap immediate operands.
103 (swap_operands): Deal with 4 operand instructions.
104 (build_modrm_byte): Add support for insertq instruction.
106 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
108 * config/tc-i386.h (Size64): Fix a typo in comment.
110 2006-07-12 Nick Clifton <nickc@redhat.com>
112 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
113 fixup_segment() to repeat a range check on a value that has
114 already been checked here.
116 2006-07-07 James E Wilson <wilson@specifix.com>
118 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
120 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
121 Nick Clifton <nickc@redhat.com>
124 * doc/as.texi: Fix spelling typo: branchs => branches.
125 * doc/c-m68hc11.texi: Likewise.
126 * config/tc-m68hc11.c: Likewise.
127 Support old spelling of command line switch for backwards
130 2006-07-04 Thiemo Seufer <ths@mips.com>
131 David Ung <davidu@mips.com>
133 * config/tc-mips.c (s_is_linkonce): New function.
134 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
135 weak, external, and linkonce symbols.
136 (pic_need_relax): Use s_is_linkonce.
138 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
140 * doc/as.texinfo (Org): Remove space.
141 (P2align): Add "@var{abs-expr},".
143 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
145 * config/tc-i386.c (cpu_arch_tune_set): New.
146 (cpu_arch_isa): Likewise.
147 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
148 nops with short or long nop sequences based on -march=/.arch
150 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
151 set cpu_arch_tune and cpu_arch_tune_flags.
152 (md_parse_option): For -march=, set cpu_arch_isa and set
153 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
154 0. Set cpu_arch_tune_set to 1 for -mtune=.
155 (i386_target_format): Don't set cpu_arch_tune.
157 2006-06-23 Nigel Stephens <nigel@mips.com>
159 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
160 generated .sbss.* and .gnu.linkonce.sb.*.
162 2006-06-23 Thiemo Seufer <ths@mips.com>
163 David Ung <davidu@mips.com>
165 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
167 * config/tc-mips.c (label_list): Define per-segment label_list.
168 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
169 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
170 mips_from_file_after_relocs, mips_define_label): Use per-segment
173 2006-06-22 Thiemo Seufer <ths@mips.com>
175 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
176 (append_insn): Use it.
177 (md_apply_fix): Whitespace formatting.
178 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
179 mips16_extended_frag): Remove register specifier.
180 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
183 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
185 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
186 a directive saving VFP registers for ARMv6 or later.
187 (s_arm_unwind_save): Add parameter arch_v6 and call
188 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
190 (md_pseudo_table): Add entry for new "vsave" directive.
191 * doc/c-arm.texi: Correct error in example for "save"
192 directive (fstmdf -> fstmdx). Also document "vsave" directive.
194 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
195 Anatoly Sokolov <aesok@post.ru>
197 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
198 and atmega644p devices. Rename atmega164/atmega324 devices to
199 atmega164p/atmega324p.
200 * doc/c-avr.texi: Document new mcu and arch options.
202 2006-06-17 Nick Clifton <nickc@redhat.com>
204 * config/tc-arm.c (enum parse_operand_result): Move outside of
205 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
207 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
209 * config/tc-i386.h (processor_type): New.
210 (arch_entry): Add type.
212 * config/tc-i386.c (cpu_arch_tune): New.
213 (cpu_arch_tune_flags): Likewise.
214 (cpu_arch_isa_flags): Likewise.
216 (set_cpu_arch): Also update cpu_arch_isa_flags.
217 (md_assemble): Update cpu_arch_isa_flags.
219 (OPTION_MTUNE): Likewise.
220 (md_longopts): Add -march= and -mtune=.
221 (md_parse_option): Support -march= and -mtune=.
222 (md_show_usage): Add -march=CPU/-mtune=CPU.
223 (i386_target_format): Also update cpu_arch_isa_flags,
224 cpu_arch_tune and cpu_arch_tune_flags.
226 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
228 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
230 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
232 * config/tc-arm.c (enum parse_operand_result): New.
233 (struct group_reloc_table_entry): New.
234 (enum group_reloc_type): New.
235 (group_reloc_table): New array.
236 (find_group_reloc_table_entry): New function.
237 (parse_shifter_operand_group_reloc): New function.
238 (parse_address_main): New function, incorporating code
239 from the old parse_address function. To be used via...
240 (parse_address): wrapper for parse_address_main; and
241 (parse_address_group_reloc): new function, likewise.
242 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
243 OP_ADDRGLDRS, OP_ADDRGLDC.
244 (parse_operands): Support for these new operand codes.
245 New macro po_misc_or_fail_no_backtrack.
246 (encode_arm_cp_address): Preserve group relocations.
247 (insns): Modify to use the above operand codes where group
248 relocations are permitted.
249 (md_apply_fix): Handle the group relocations
250 ALU_PC_G0_NC through LDC_SB_G2.
251 (tc_gen_reloc): Likewise.
252 (arm_force_relocation): Leave group relocations for the linker.
253 (arm_fix_adjustable): Likewise.
255 2006-06-15 Julian Brown <julian@codesourcery.com>
257 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
258 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
261 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
263 * config/tc-i386.c (process_suffix): Don't add rex64 for
266 2006-06-09 Thiemo Seufer <ths@mips.com>
268 * config/tc-mips.c (mips_ip): Maintain argument count.
270 2006-06-09 Alan Modra <amodra@bigpond.net.au>
272 * config/tc-iq2000.c: Include sb.h.
274 2006-06-08 Nigel Stephens <nigel@mips.com>
276 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
277 aliases for better compatibility with SGI tools.
279 2006-06-08 Alan Modra <amodra@bigpond.net.au>
281 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
282 * Makefile.am (GASLIBS): Expand @BFDLIB@.
284 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
285 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
286 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
288 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
289 * Makefile.in: Regenerate.
290 * doc/Makefile.in: Regenerate.
291 * configure: Regenerate.
293 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
295 * po/Make-in (pdf, ps): New dummy targets.
297 2006-06-07 Julian Brown <julian@codesourcery.com>
299 * config/tc-arm.c (stdarg.h): include.
300 (arm_it): Add uncond_value field. Add isvec and issingle to operand
302 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
303 REG_TYPE_NSDQ (single, double or quad vector reg).
304 (reg_expected_msgs): Update.
305 (BAD_FPU): Add macro for unsupported FPU instruction error.
306 (parse_neon_type): Support 'd' as an alias for .f64.
307 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
309 (parse_vfp_reg_list): Don't update first arg on error.
310 (parse_neon_mov): Support extra syntax for VFP moves.
311 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
312 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
313 (parse_operands): Support isvec, issingle operands fields, new parse
315 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
317 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
318 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
319 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
320 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
322 (neon_shape): Redefine in terms of above.
323 (neon_shape_class): New enumeration, table of shape classes.
324 (neon_shape_el): New enumeration. One element of a shape.
325 (neon_shape_el_size): Register widths of above, where appropriate.
326 (neon_shape_info): New struct. Info for shape table.
327 (neon_shape_tab): New array.
328 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
329 (neon_check_shape): Rewrite as...
330 (neon_select_shape): New function to classify instruction shapes,
331 driven by new table neon_shape_tab array.
332 (neon_quad): New function. Return 1 if shape should set Q flag in
333 instructions (or equivalent), 0 otherwise.
334 (type_chk_of_el_type): Support F64.
335 (el_type_of_type_chk): Likewise.
336 (neon_check_type): Add support for VFP type checking (VFP data
337 elements fill their containing registers).
338 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
339 in thumb mode for VFP instructions.
340 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
341 and encode the current instruction as if it were that opcode.
342 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
343 arguments, call function in PFN.
344 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
345 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
346 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
347 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
348 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
349 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
350 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
351 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
352 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
353 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
354 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
355 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
356 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
357 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
358 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
360 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
361 between VFP and Neon turns out to belong to Neon. Perform
362 architecture check and fill in condition field if appropriate.
363 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
364 (do_neon_cvt): Add support for VFP variants of instructions.
365 (neon_cvt_flavour): Extend to cover VFP conversions.
366 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
368 (do_neon_ldr_str): Handle single-precision VFP load/store.
369 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
370 NS_NULL not NS_IGNORE.
371 (opcode_tag): Add OT_csuffixF for operands which either take a
372 conditional suffix, or have 0xF in the condition field.
373 (md_assemble): Add support for OT_csuffixF.
374 (NCE): Replace macro with...
375 (NCE_tag, NCE, NCEF): New macros.
376 (nCE): Replace macro with...
377 (nCE_tag, nCE, nCEF): New macros.
378 (insns): Add support for VFP insns or VFP versions of insns msr,
379 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
380 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
381 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
382 VFP/Neon insns together.
384 2006-06-07 Alan Modra <amodra@bigpond.net.au>
385 Ladislav Michl <ladis@linux-mips.org>
387 * app.c: Don't include headers already included by as.h.
389 * atof-generic.c: Likewise.
391 * dwarf2dbg.c: Likewise.
393 * input-file.c: Likewise.
394 * input-scrub.c: Likewise.
396 * output-file.c: Likewise.
399 * config/bfin-lex.l: Likewise.
400 * config/obj-coff.h: Likewise.
401 * config/obj-elf.h: Likewise.
402 * config/obj-som.h: Likewise.
403 * config/tc-arc.c: Likewise.
404 * config/tc-arm.c: Likewise.
405 * config/tc-avr.c: Likewise.
406 * config/tc-bfin.c: Likewise.
407 * config/tc-cris.c: Likewise.
408 * config/tc-d10v.c: Likewise.
409 * config/tc-d30v.c: Likewise.
410 * config/tc-dlx.h: Likewise.
411 * config/tc-fr30.c: Likewise.
412 * config/tc-frv.c: Likewise.
413 * config/tc-h8300.c: Likewise.
414 * config/tc-hppa.c: Likewise.
415 * config/tc-i370.c: Likewise.
416 * config/tc-i860.c: Likewise.
417 * config/tc-i960.c: Likewise.
418 * config/tc-ip2k.c: Likewise.
419 * config/tc-iq2000.c: Likewise.
420 * config/tc-m32c.c: Likewise.
421 * config/tc-m32r.c: Likewise.
422 * config/tc-maxq.c: Likewise.
423 * config/tc-mcore.c: Likewise.
424 * config/tc-mips.c: Likewise.
425 * config/tc-mmix.c: Likewise.
426 * config/tc-mn10200.c: Likewise.
427 * config/tc-mn10300.c: Likewise.
428 * config/tc-msp430.c: Likewise.
429 * config/tc-mt.c: Likewise.
430 * config/tc-ns32k.c: Likewise.
431 * config/tc-openrisc.c: Likewise.
432 * config/tc-ppc.c: Likewise.
433 * config/tc-s390.c: Likewise.
434 * config/tc-sh.c: Likewise.
435 * config/tc-sh64.c: Likewise.
436 * config/tc-sparc.c: Likewise.
437 * config/tc-tic30.c: Likewise.
438 * config/tc-tic4x.c: Likewise.
439 * config/tc-tic54x.c: Likewise.
440 * config/tc-v850.c: Likewise.
441 * config/tc-vax.c: Likewise.
442 * config/tc-xc16x.c: Likewise.
443 * config/tc-xstormy16.c: Likewise.
444 * config/tc-xtensa.c: Likewise.
445 * config/tc-z80.c: Likewise.
446 * config/tc-z8k.c: Likewise.
447 * macro.h: Don't include sb.h or ansidecl.h.
448 * sb.h: Don't include stdio.h or ansidecl.h.
449 * cond.c: Include sb.h.
450 * itbl-lex.l: Include as.h instead of other system headers.
451 * itbl-parse.y: Likewise.
452 * itbl-ops.c: Similarly.
453 * itbl-ops.h: Don't include as.h or ansidecl.h.
454 * config/bfin-defs.h: Don't include bfd.h or as.h.
455 * config/bfin-parse.y: Include as.h instead of other system headers.
457 2006-06-06 Ben Elliston <bje@au.ibm.com>
458 Anton Blanchard <anton@samba.org>
460 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
461 (md_show_usage): Document it.
462 (ppc_setup_opcodes): Test power6 opcode flag bits.
463 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
465 2006-06-06 Thiemo Seufer <ths@mips.com>
466 Chao-ying Fu <fu@mips.com>
468 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
469 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
470 (macro_build): Update comment.
471 (mips_ip): Allow DSP64 instructions for MIPS64R2.
472 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
474 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
475 MIPS_CPU_ASE_MDMX flags for sb1.
477 2006-06-05 Thiemo Seufer <ths@mips.com>
479 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
481 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
482 (mips_ip): Make overflowed/underflowed constant arguments in DSP
483 and MT instructions a fatal error. Use INSERT_OPERAND where
484 appropriate. Improve warnings for break and wait code overflows.
485 Use symbolic constant of OP_MASK_COPZ.
486 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
488 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
490 * po/Make-in (top_builddir): Define.
492 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
494 * doc/Makefile.am (TEXI2DVI): Define.
495 * doc/Makefile.in: Regenerate.
496 * doc/c-arc.texi: Fix typo.
498 2006-06-01 Alan Modra <amodra@bigpond.net.au>
500 * config/obj-ieee.c: Delete.
501 * config/obj-ieee.h: Delete.
502 * Makefile.am (OBJ_FORMATS): Remove ieee.
503 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
504 (obj-ieee.o): Remove rule.
505 * Makefile.in: Regenerate.
506 * configure.in (atof): Remove tahoe.
507 (OBJ_MAYBE_IEEE): Don't define.
508 * configure: Regenerate.
509 * config.in: Regenerate.
510 * doc/Makefile.in: Regenerate.
511 * po/POTFILES.in: Regenerate.
513 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
515 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
516 and LIBINTL_DEP everywhere.
518 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
519 * acinclude.m4: Include new gettext macros.
520 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
521 Remove local code for po/Makefile.
522 * Makefile.in, configure, doc/Makefile.in: Regenerated.
524 2006-05-30 Nick Clifton <nickc@redhat.com>
526 * po/es.po: Updated Spanish translation.
528 2006-05-06 Denis Chertykov <denisc@overta.ru>
530 * doc/c-avr.texi: New file.
531 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
532 * doc/all.texi: Set AVR
533 * doc/as.texinfo: Include c-avr.texi
535 2006-05-28 Jie Zhang <jie.zhang@analog.com>
537 * config/bfin-parse.y (check_macfunc): Loose the condition of
538 calling check_multiply_halfregs ().
540 2006-05-25 Jie Zhang <jie.zhang@analog.com>
542 * config/bfin-parse.y (asm_1): Better check and deal with
543 vector and scalar Multiply 16-Bit Operands instructions.
545 2006-05-24 Nick Clifton <nickc@redhat.com>
547 * config/tc-hppa.c: Convert to ISO C90 format.
548 * config/tc-hppa.h: Likewise.
550 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
551 Randolph Chung <randolph@tausq.org>
553 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
554 is_tls_ieoff, is_tls_leoff): Define.
555 (fix_new_hppa): Handle TLS.
556 (cons_fix_new_hppa): Likewise.
558 (md_apply_fix): Handle TLS relocs.
559 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
561 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
563 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
565 2006-05-23 Thiemo Seufer <ths@mips.com>
566 David Ung <davidu@mips.com>
567 Nigel Stephens <nigel@mips.com>
570 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
571 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
572 ISA_HAS_MXHC1): New macros.
573 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
574 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
575 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
576 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
577 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
578 (mips_after_parse_args): Change default handling of float register
579 size to account for 32bit code with 64bit FP. Better sanity checking
580 of ISA/ASE/ABI option combinations.
581 (s_mipsset): Support switching of GPR and FPR sizes via
582 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
584 (mips_elf_final_processing): We should record the use of 64bit FP
585 registers in 32bit code but we don't, because ELF header flags are
587 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
588 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
589 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
590 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
591 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
592 missing -march options. Document .set arch=CPU. Move .set smartmips
593 to ASE page. Use @code for .set FOO examples.
595 2006-05-23 Jie Zhang <jie.zhang@analog.com>
597 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
600 2006-05-23 Jie Zhang <jie.zhang@analog.com>
602 * config/bfin-defs.h (bfin_equals): Remove declaration.
603 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
604 * config/tc-bfin.c (bfin_name_is_register): Remove.
605 (bfin_equals): Remove.
606 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
607 (bfin_name_is_register): Remove declaration.
609 2006-05-19 Thiemo Seufer <ths@mips.com>
610 Nigel Stephens <nigel@mips.com>
612 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
613 (mips_oddfpreg_ok): New function.
616 2006-05-19 Thiemo Seufer <ths@mips.com>
617 David Ung <davidu@mips.com>
619 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
620 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
621 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
622 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
623 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
624 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
625 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
626 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
627 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
628 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
629 reg_names_o32, reg_names_n32n64): Define register classes.
630 (reg_lookup): New function, use register classes.
631 (md_begin): Reserve register names in the symbol table. Simplify
633 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
635 (mips16_ip): Use reg_lookup.
636 (tc_get_register): Likewise.
637 (tc_mips_regname_to_dw2regnum): New function.
639 2006-05-19 Thiemo Seufer <ths@mips.com>
641 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
642 Un-constify string argument.
643 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
645 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
647 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
649 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
651 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
653 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
656 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
658 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
659 cfloat/m68881 to correct architecture before using it.
661 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
663 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
666 2006-05-15 Paul Brook <paul@codesourcery.com>
668 * config/tc-arm.c (arm_adjust_symtab): Use
669 bfd_is_arm_special_symbol_name.
671 2006-05-15 Bob Wilson <bob.wilson@acm.org>
673 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
674 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
675 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
676 Handle errors from calls to xtensa_opcode_is_* functions.
678 2006-05-14 Thiemo Seufer <ths@mips.com>
680 * config/tc-mips.c (macro_build): Test for currently active
682 (mips16_ip): Reject invalid opcodes.
684 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
686 * doc/as.texinfo: Rename "Index" to "AS Index",
687 and "ABORT" to "ABORT (COFF)".
689 2006-05-11 Paul Brook <paul@codesourcery.com>
691 * config/tc-arm.c (parse_half): New function.
692 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
693 (parse_operands): Ditto.
694 (do_mov16): Reject invalid relocations.
695 (do_t_mov16): Ditto. Use Thumb reloc numbers.
696 (insns): Replace Iffff with HALF.
697 (md_apply_fix): Add MOVW and MOVT relocs.
698 (tc_gen_reloc): Ditto.
699 * doc/c-arm.texi: Document relocation operators
701 2006-05-11 Paul Brook <paul@codesourcery.com>
703 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
705 2006-05-11 Thiemo Seufer <ths@mips.com>
707 * config/tc-mips.c (append_insn): Don't check the range of j or
710 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
712 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
713 relocs against external symbols for WinCE targets.
714 (md_apply_fix): Likewise.
716 2006-05-09 David Ung <davidu@mips.com>
718 * config/tc-mips.c (append_insn): Only warn about an out-of-range
721 2006-05-09 Nick Clifton <nickc@redhat.com>
723 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
724 against symbols which are not going to be placed into the symbol
727 2006-05-09 Ben Elliston <bje@au.ibm.com>
729 * expr.c (operand): Remove `if (0 && ..)' statement and
730 subsequently unused target_op label. Collapse `if (1 || ..)'
732 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
733 separately above the switch.
735 2006-05-08 Nick Clifton <nickc@redhat.com>
738 * config/tc-msp430.c (line_separator_character): Define as |.
740 2006-05-08 Thiemo Seufer <ths@mips.com>
741 Nigel Stephens <nigel@mips.com>
742 David Ung <davidu@mips.com>
744 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
745 (mips_opts): Likewise.
746 (file_ase_smartmips): New variable.
747 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
748 (macro_build): Handle SmartMIPS instructions.
750 (md_longopts): Add argument handling for smartmips.
751 (md_parse_options, mips_after_parse_args): Likewise.
752 (s_mipsset): Add .set smartmips support.
753 (md_show_usage): Document -msmartmips/-mno-smartmips.
754 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
756 * doc/c-mips.texi: Likewise.
758 2006-05-08 Alan Modra <amodra@bigpond.net.au>
760 * write.c (relax_segment): Add pass count arg. Don't error on
761 negative org/space on first two passes.
762 (relax_seg_info): New struct.
763 (relax_seg, write_object_file): Adjust.
764 * write.h (relax_segment): Update prototype.
766 2006-05-05 Julian Brown <julian@codesourcery.com>
768 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
770 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
771 architecture version checks.
772 (insns): Allow overlapping instructions to be used in VFP mode.
774 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
777 * config/obj-elf.c (obj_elf_change_section): Allow user
778 specified SHF_ALPHA_GPREL.
780 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
782 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
783 for PMEM related expressions.
785 2006-05-05 Nick Clifton <nickc@redhat.com>
788 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
789 insertion of a directory separator character into a string at a
790 given offset. Uses heuristics to decide when to use a backslash
791 character rather than a forward-slash character.
792 (dwarf2_directive_loc): Use the macro.
793 (out_debug_info): Likewise.
795 2006-05-05 Thiemo Seufer <ths@mips.com>
796 David Ung <davidu@mips.com>
798 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
800 (macro): Add new case M_CACHE_AB.
802 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
804 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
805 (opcode_lookup): Issue a warning for opcode with
806 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
807 identical to OT_cinfix3.
808 (TxC3w, TC3w, tC3w): New.
809 (insns): Use tC3w and TC3w for comparison instructions with
812 2006-05-04 Alan Modra <amodra@bigpond.net.au>
814 * subsegs.h (struct frchain): Delete frch_seg.
815 (frchain_root): Delete.
816 (seg_info): Define as macro.
817 * subsegs.c (frchain_root): Delete.
818 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
819 (subsegs_begin, subseg_change): Adjust for above.
820 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
821 rather than to one big list.
822 (subseg_get): Don't special case abs, und sections.
823 (subseg_new, subseg_force_new): Don't set frchainP here.
825 (subsegs_print_statistics): Adjust frag chain control list traversal.
826 * debug.c (dmp_frags): Likewise.
827 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
828 at frchain_root. Make use of known frchain ordering.
829 (last_frag_for_seg): Likewise.
830 (get_frag_fix): Likewise. Add seg param.
831 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
832 * write.c (chain_frchains_together_1): Adjust for struct frchain.
833 (SUB_SEGMENT_ALIGN): Likewise.
834 (subsegs_finish): Adjust frchain list traversal.
835 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
836 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
837 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
838 (xtensa_fix_b_j_loop_end_frags): Likewise.
839 (xtensa_fix_close_loop_end_frags): Likewise.
840 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
841 (retrieve_segment_info): Delete frch_seg initialisation.
843 2006-05-03 Alan Modra <amodra@bigpond.net.au>
845 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
846 * config/obj-elf.h (obj_sec_set_private_data): Delete.
847 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
848 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
850 2006-05-02 Joseph Myers <joseph@codesourcery.com>
852 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
854 (md_apply_fix3): Multiply offset by 4 here for
855 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
857 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
858 Jan Beulich <jbeulich@novell.com>
860 * config/tc-i386.c (output_invalid_buf): Change size for
862 * config/tc-tic30.c (output_invalid_buf): Likewise.
864 * config/tc-i386.c (output_invalid): Cast none-ascii char to
866 * config/tc-tic30.c (output_invalid): Likewise.
868 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
870 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
871 (TEXI2POD): Use AM_MAKEINFOFLAGS.
872 (asconfig.texi): Don't set top_srcdir.
873 * doc/as.texinfo: Don't use top_srcdir.
874 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
876 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
878 * config/tc-i386.c (output_invalid_buf): Change size to 16.
879 * config/tc-tic30.c (output_invalid_buf): Likewise.
881 * config/tc-i386.c (output_invalid): Use snprintf instead of
883 * config/tc-ia64.c (declare_register_set): Likewise.
884 (emit_one_bundle): Likewise.
885 (check_dependencies): Likewise.
886 * config/tc-tic30.c (output_invalid): Likewise.
888 2006-05-02 Paul Brook <paul@codesourcery.com>
890 * config/tc-arm.c (arm_optimize_expr): New function.
891 * config/tc-arm.h (md_optimize_expr): Define
892 (arm_optimize_expr): Add prototype.
893 (TC_FORCE_RELOCATION_SUB_SAME): Define.
895 2006-05-02 Ben Elliston <bje@au.ibm.com>
897 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
900 * sb.h (sb_list_vector): Move to sb.c.
901 * sb.c (free_list): Use type of sb_list_vector directly.
902 (sb_build): Fix off-by-one error in assertion about `size'.
904 2006-05-01 Ben Elliston <bje@au.ibm.com>
906 * listing.c (listing_listing): Remove useless loop.
907 * macro.c (macro_expand): Remove is_positional local variable.
908 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
909 and simplify surrounding expressions, where possible.
910 (assign_symbol): Likewise.
911 (s_weakref): Likewise.
912 * symbols.c (colon): Likewise.
914 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
916 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
918 2006-04-30 Thiemo Seufer <ths@mips.com>
919 David Ung <davidu@mips.com>
921 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
922 (mips_immed): New table that records various handling of udi
923 instruction patterns.
924 (mips_ip): Adds udi handling.
926 2006-04-28 Alan Modra <amodra@bigpond.net.au>
928 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
929 of list rather than beginning.
931 2006-04-26 Julian Brown <julian@codesourcery.com>
933 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
934 (is_quarter_float): Rename from above. Simplify slightly.
935 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
937 (parse_neon_mov): Parse floating-point constants.
938 (neon_qfloat_bits): Fix encoding.
939 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
940 preference to integer encoding when using the F32 type.
942 2006-04-26 Julian Brown <julian@codesourcery.com>
944 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
945 zero-initialising structures containing it will lead to invalid types).
946 (arm_it): Add vectype to each operand.
947 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
949 (neon_typed_alias): New structure. Extra information for typed
951 (reg_entry): Add neon type info field.
952 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
953 Break out alternative syntax for coprocessor registers, etc. into...
954 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
955 out from arm_reg_parse.
956 (parse_neon_type): Move. Return SUCCESS/FAIL.
957 (first_error): New function. Call to ensure first error which occurs is
959 (parse_neon_operand_type): Parse exactly one type.
960 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
961 (parse_typed_reg_or_scalar): New function. Handle core of both
962 arm_typed_reg_parse and parse_scalar.
963 (arm_typed_reg_parse): Parse a register with an optional type.
964 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
966 (parse_scalar): Parse a Neon scalar with optional type.
967 (parse_reg_list): Use first_error.
968 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
969 (neon_alias_types_same): New function. Return true if two (alias) types
971 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
973 (insert_reg_alias): Return new reg_entry not void.
974 (insert_neon_reg_alias): New function. Insert type/index information as
975 well as register for alias.
976 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
977 make typed register aliases accordingly.
978 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
980 (s_unreq): Delete type information if present.
981 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
982 (s_arm_unwind_save_mmxwcg): Likewise.
983 (s_arm_unwind_movsp): Likewise.
984 (s_arm_unwind_setfp): Likewise.
985 (parse_shift): Likewise.
986 (parse_shifter_operand): Likewise.
987 (parse_address): Likewise.
988 (parse_tb): Likewise.
989 (tc_arm_regname_to_dw2regnum): Likewise.
990 (md_pseudo_table): Add dn, qn.
991 (parse_neon_mov): Handle typed operands.
992 (parse_operands): Likewise.
993 (neon_type_mask): Add N_SIZ.
994 (N_ALLMODS): New macro.
995 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
996 (el_type_of_type_chk): Add some safeguards.
997 (modify_types_allowed): Fix logic bug.
998 (neon_check_type): Handle operands with types.
999 (neon_three_same): Remove redundant optional arg handling.
1000 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1001 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1002 (do_neon_step): Adjust accordingly.
1003 (neon_cmode_for_logic_imm): Use first_error.
1004 (do_neon_bitfield): Call neon_check_type.
1005 (neon_dyadic): Rename to...
1006 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1007 to allow modification of type of the destination.
1008 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1009 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1010 (do_neon_compare): Make destination be an untyped bitfield.
1011 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1012 (neon_mul_mac): Return early in case of errors.
1013 (neon_move_immediate): Use first_error.
1014 (neon_mac_reg_scalar_long): Fix type to include scalar.
1015 (do_neon_dup): Likewise.
1016 (do_neon_mov): Likewise (in several places).
1017 (do_neon_tbl_tbx): Fix type.
1018 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1019 (do_neon_ld_dup): Exit early in case of errors and/or use
1021 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1022 Handle .dn/.qn directives.
1023 (REGDEF): Add zero for reg_entry neon field.
1025 2006-04-26 Julian Brown <julian@codesourcery.com>
1027 * config/tc-arm.c (limits.h): Include.
1028 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1029 (fpu_vfp_v3_or_neon_ext): Declare constants.
1030 (neon_el_type): New enumeration of types for Neon vector elements.
1031 (neon_type_el): New struct. Define type and size of a vector element.
1032 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1034 (neon_type): Define struct. The type of an instruction.
1035 (arm_it): Add 'vectype' for the current instruction.
1036 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1037 (vfp_sp_reg_pos): Rename to...
1038 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1040 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1041 (Neon D or Q register).
1042 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1044 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1045 (my_get_expression): Allow above constant as argument to accept
1046 64-bit constants with optional prefix.
1047 (arm_reg_parse): Add extra argument to return the specific type of
1048 register in when either a D or Q register (REG_TYPE_NDQ) is
1049 requested. Can be NULL.
1050 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1051 (parse_reg_list): Update for new arm_reg_parse args.
1052 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1053 (parse_neon_el_struct_list): New function. Parse element/structure
1054 register lists for VLD<n>/VST<n> instructions.
1055 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1056 (s_arm_unwind_save_mmxwr): Likewise.
1057 (s_arm_unwind_save_mmxwcg): Likewise.
1058 (s_arm_unwind_movsp): Likewise.
1059 (s_arm_unwind_setfp): Likewise.
1060 (parse_big_immediate): New function. Parse an immediate, which may be
1061 64 bits wide. Put results in inst.operands[i].
1062 (parse_shift): Update for new arm_reg_parse args.
1063 (parse_address): Likewise. Add parsing of alignment specifiers.
1064 (parse_neon_mov): Parse the operands of a VMOV instruction.
1065 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1066 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1067 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1068 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1069 (parse_operands): Handle new codes above.
1070 (encode_arm_vfp_sp_reg): Rename to...
1071 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1072 selected VFP version only supports D0-D15.
1073 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1074 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1075 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1076 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1077 encode_arm_vfp_reg name, and allow 32 D regs.
1078 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1079 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1081 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1082 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1083 constant-load and conversion insns introduced with VFPv3.
1084 (neon_tab_entry): New struct.
1085 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1086 those which are the targets of pseudo-instructions.
1087 (neon_opc): Enumerate opcodes, use as indices into...
1088 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1089 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1090 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1091 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1093 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1095 (neon_type_mask): New. Compact type representation for type checking.
1096 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1097 permitted type combinations.
1098 (N_IGNORE_TYPE): New macro.
1099 (neon_check_shape): New function. Check an instruction shape for
1100 multiple alternatives. Return the specific shape for the current
1102 (neon_modify_type_size): New function. Modify a vector type and size,
1103 depending on the bit mask in argument 1.
1104 (neon_type_promote): New function. Convert a given "key" type (of an
1105 operand) into the correct type for a different operand, based on a bit
1107 (type_chk_of_el_type): New function. Convert a type and size into the
1108 compact representation used for type checking.
1109 (el_type_of_type_ckh): New function. Reverse of above (only when a
1110 single bit is set in the bit mask).
1111 (modify_types_allowed): New function. Alter a mask of allowed types
1112 based on a bit mask of modifications.
1113 (neon_check_type): New function. Check the type of the current
1114 instruction against the variable argument list. The "key" type of the
1115 instruction is returned.
1116 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1117 a Neon data-processing instruction depending on whether we're in ARM
1118 mode or Thumb-2 mode.
1119 (neon_logbits): New function.
1120 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1121 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1122 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1123 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1124 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1125 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1126 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1127 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1128 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1129 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1130 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1131 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1132 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1133 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1134 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1135 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1136 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1137 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1138 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1139 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1140 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1141 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1142 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1143 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1144 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1146 (parse_neon_type): New function. Parse Neon type specifier.
1147 (opcode_lookup): Allow parsing of Neon type specifiers.
1148 (REGNUM2, REGSETH, REGSET2): New macros.
1149 (reg_names): Add new VFPv3 and Neon registers.
1150 (NUF, nUF, NCE, nCE): New macros for opcode table.
1151 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1152 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1153 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1154 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1155 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1156 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1157 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1158 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1159 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1160 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1161 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1162 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1163 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1164 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1166 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1167 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1168 (arm_option_cpu_value): Add vfp3 and neon.
1169 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1172 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1174 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1175 syntax instead of hardcoded opcodes with ".w18" suffixes.
1176 (wide_branch_opcode): New.
1177 (build_transition): Use it to check for wide branch opcodes with
1178 either ".w18" or ".w15" suffixes.
1180 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1182 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1183 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1184 frag's is_literal flag.
1186 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1188 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1190 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1192 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1193 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1194 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1195 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1196 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1198 2005-04-20 Paul Brook <paul@codesourcery.com>
1200 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1202 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1204 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1206 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1207 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1208 Make some cpus unsupported on ELF. Run "make dep-am".
1209 * Makefile.in: Regenerate.
1211 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1213 * configure.in (--enable-targets): Indent help message.
1214 * configure: Regenerate.
1216 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1219 * config/tc-i386.c (i386_immediate): Check illegal immediate
1222 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1224 * config/tc-i386.c: Formatting.
1225 (output_disp, output_imm): ISO C90 params.
1227 * frags.c (frag_offset_fixed_p): Constify args.
1228 * frags.h (frag_offset_fixed_p): Ditto.
1230 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1231 (COFF_MAGIC): Delete.
1233 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1235 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1237 * po/POTFILES.in: Regenerated.
1239 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1241 * doc/as.texinfo: Mention that some .type syntaxes are not
1242 supported on all architectures.
1244 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1246 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1247 instructions when such transformations have been disabled.
1249 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1251 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1252 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1253 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1254 decoding the loop instructions. Remove current_offset variable.
1255 (xtensa_fix_short_loop_frags): Likewise.
1256 (min_bytes_to_other_loop_end): Remove current_offset argument.
1258 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1260 * config/tc-z80.c (z80_optimize_expr): Removed.
1261 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1263 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1265 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1266 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1267 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1268 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1269 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1270 at90can64, at90usb646, at90usb647, at90usb1286 and
1272 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1274 2006-04-07 Paul Brook <paul@codesourcery.com>
1276 * config/tc-arm.c (parse_operands): Set default error message.
1278 2006-04-07 Paul Brook <paul@codesourcery.com>
1280 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1282 2006-04-07 Paul Brook <paul@codesourcery.com>
1284 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1286 2006-04-07 Paul Brook <paul@codesourcery.com>
1288 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1289 (move_or_literal_pool): Handle Thumb-2 instructions.
1290 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1292 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1295 * config/tc-i386.c (match_template): Move 64-bit operand tests
1298 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1300 * po/Make-in: Add install-html target.
1301 * Makefile.am: Add install-html and install-html-recursive targets.
1302 * Makefile.in: Regenerate.
1303 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1304 * configure: Regenerate.
1305 * doc/Makefile.am: Add install-html and install-html-am targets.
1306 * doc/Makefile.in: Regenerate.
1308 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1310 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1313 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1314 Daniel Jacobowitz <dan@codesourcery.com>
1316 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1317 (GOTT_BASE, GOTT_INDEX): New.
1318 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1319 GOTT_INDEX when generating VxWorks PIC.
1320 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1321 use the generic *-*-vxworks* stanza instead.
1323 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1326 * frags.c (frag_offset_fixed_p): New function.
1327 * frags.h (frag_offset_fixed_p): Declare.
1328 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1329 (resolve_expression): Likewise.
1331 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1333 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1334 of the same length but different numbers of slots.
1336 2006-03-30 Andreas Schwab <schwab@suse.de>
1338 * configure.in: Fix help string for --enable-targets option.
1339 * configure: Regenerate.
1341 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1343 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1344 (m68k_ip): ... here. Use for all chips. Protect against buffer
1345 overrun and avoid excessive copying.
1347 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1348 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1349 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1350 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1351 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1352 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1353 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1354 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1355 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1356 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1357 (struct m68k_cpu): Change chip field to control_regs.
1358 (current_chip): Remove.
1359 (control_regs): New.
1360 (m68k_archs, m68k_extensions): Adjust.
1361 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1362 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1363 (find_cf_chip): Reimplement for new organization of cpu table.
1364 (select_control_regs): Remove.
1366 (struct save_opts): Save control regs, not chip.
1367 (s_save, s_restore): Adjust.
1368 (m68k_lookup_cpu): Give deprecated warning when necessary.
1369 (m68k_init_arch): Adjust.
1370 (md_show_usage): Adjust for new cpu table organization.
1372 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1374 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1375 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1376 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1378 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1379 (any_gotrel): New rule.
1380 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1381 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1383 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1384 (bfin_pic_ptr): New function.
1385 (md_pseudo_table): Add it for ".picptr".
1386 (OPTION_FDPIC): New macro.
1387 (md_longopts): Add -mfdpic.
1388 (md_parse_option): Handle it.
1389 (md_begin): Set BFD flags.
1390 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1391 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1393 * Makefile.am (bfin-parse.o): Update dependencies.
1394 (DEPTC_bfin_elf): Likewise.
1395 * Makefile.in: Regenerate.
1397 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1399 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1400 mcfemac instead of mcfmac.
1402 2006-03-23 Michael Matz <matz@suse.de>
1404 * config/tc-i386.c (type_names): Correct placement of 'static'.
1405 (reloc): Map some more relocs to their 64 bit counterpart when
1407 (output_insn): Work around breakage if DEBUG386 is defined.
1408 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1409 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1410 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1411 different from i386.
1412 (output_imm): Ditto.
1413 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1415 (md_convert_frag): Jumps can now be larger than 2GB away, error
1417 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1418 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1420 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1421 Daniel Jacobowitz <dan@codesourcery.com>
1422 Phil Edwards <phil@codesourcery.com>
1423 Zack Weinberg <zack@codesourcery.com>
1424 Mark Mitchell <mark@codesourcery.com>
1425 Nathan Sidwell <nathan@codesourcery.com>
1427 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1428 (md_begin): Complain about -G being used for PIC. Don't change
1429 the text, data and bss alignments on VxWorks.
1430 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1431 generating VxWorks PIC.
1432 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1433 (macro): Likewise, but do not treat la $25 specially for
1434 VxWorks PIC, and do not handle jal.
1435 (OPTION_MVXWORKS_PIC): New macro.
1436 (md_longopts): Add -mvxworks-pic.
1437 (md_parse_option): Don't complain about using PIC and -G together here.
1438 Handle OPTION_MVXWORKS_PIC.
1439 (md_estimate_size_before_relax): Always use the first relaxation
1440 sequence on VxWorks.
1441 * config/tc-mips.h (VXWORKS_PIC): New.
1443 2006-03-21 Paul Brook <paul@codesourcery.com>
1445 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1447 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1449 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1450 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1451 (get_loop_align_size): New.
1452 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1453 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1454 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1455 (get_noop_aligned_address): Use get_loop_align_size.
1456 (get_aligned_diff): Likewise.
1458 2006-03-21 Paul Brook <paul@codesourcery.com>
1460 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1462 2006-03-20 Paul Brook <paul@codesourcery.com>
1464 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1465 (do_t_branch): Encode branches inside IT blocks as unconditional.
1466 (do_t_cps): New function.
1467 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1468 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1469 (opcode_lookup): Allow conditional suffixes on all instructions in
1471 (md_assemble): Advance condexec state before checking for errors.
1472 (insns): Use do_t_cps.
1474 2006-03-20 Paul Brook <paul@codesourcery.com>
1476 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1477 outputting the insn.
1479 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1481 * config/tc-vax.c: Update copyright year.
1482 * config/tc-vax.h: Likewise.
1484 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1486 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1488 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1490 2006-03-17 Paul Brook <paul@codesourcery.com>
1492 * config/tc-arm.c (insns): Add ldm and stm.
1494 2006-03-17 Ben Elliston <bje@au.ibm.com>
1497 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1499 2006-03-16 Paul Brook <paul@codesourcery.com>
1501 * config/tc-arm.c (insns): Add "svc".
1503 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1505 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1506 flag and avoid double underscore prefixes.
1508 2006-03-10 Paul Brook <paul@codesourcery.com>
1510 * config/tc-arm.c (md_begin): Handle EABIv5.
1511 (arm_eabis): Add EF_ARM_EABI_VER5.
1512 * doc/c-arm.texi: Document -meabi=5.
1514 2006-03-10 Ben Elliston <bje@au.ibm.com>
1516 * app.c (do_scrub_chars): Simplify string handling.
1518 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1519 Daniel Jacobowitz <dan@codesourcery.com>
1520 Zack Weinberg <zack@codesourcery.com>
1521 Nathan Sidwell <nathan@codesourcery.com>
1522 Paul Brook <paul@codesourcery.com>
1523 Ricardo Anguiano <anguiano@codesourcery.com>
1524 Phil Edwards <phil@codesourcery.com>
1526 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1527 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1529 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1530 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1531 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1533 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1535 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1536 even when using the text-section-literals option.
1538 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1540 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1542 (m68k_ip): <case 'J'> Check we have some control regs.
1543 (md_parse_option): Allow raw arch switch.
1544 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1545 whether 68881 or cfloat was meant by -mfloat.
1546 (md_show_usage): Adjust extension display.
1547 (m68k_elf_final_processing): Adjust.
1549 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1551 * config/tc-avr.c (avr_mod_hash_value): New function.
1552 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1553 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1554 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1555 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1557 (tc_gen_reloc): Handle substractions of symbols, if possible do
1558 fixups, abort otherwise.
1559 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1560 tc_fix_adjustable): Define.
1562 2006-03-02 James E Wilson <wilson@specifix.com>
1564 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1565 change the template, then clear md.slot[curr].end_of_insn_group.
1567 2006-02-28 Jan Beulich <jbeulich@novell.com>
1569 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1571 2006-02-28 Jan Beulich <jbeulich@novell.com>
1574 * macro.c (getstring): Don't treat parentheses special anymore.
1575 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1576 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1579 2006-02-28 Mat <mat@csail.mit.edu>
1581 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1583 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1585 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1587 (CFI_signal_frame): Define.
1588 (cfi_pseudo_table): Add .cfi_signal_frame.
1589 (dot_cfi): Handle CFI_signal_frame.
1590 (output_cie): Handle cie->signal_frame.
1591 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1592 different. Copy signal_frame from FDE to newly created CIE.
1593 * doc/as.texinfo: Document .cfi_signal_frame.
1595 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1597 * doc/Makefile.am: Add html target.
1598 * doc/Makefile.in: Regenerate.
1599 * po/Make-in: Add html target.
1601 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1603 * config/tc-i386.c (output_insn): Support Intel Merom New
1606 * config/tc-i386.h (CpuMNI): New.
1607 (CpuUnknownFlags): Add CpuMNI.
1609 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1611 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1612 (hpriv_reg_table): New table for hyperprivileged registers.
1613 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1616 2006-02-24 DJ Delorie <dj@redhat.com>
1618 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1619 (tc_gen_reloc): Don't define.
1620 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1621 (OPTION_LINKRELAX): New.
1622 (md_longopts): Add it.
1624 (md_parse_options): Set it.
1625 (md_assemble): Emit relaxation relocs as needed.
1626 (md_convert_frag): Emit relaxation relocs as needed.
1627 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1628 (m32c_apply_fix): New.
1629 (tc_gen_reloc): New.
1630 (m32c_force_relocation): Force out jump relocs when relaxing.
1631 (m32c_fix_adjustable): Return false if relaxing.
1633 2006-02-24 Paul Brook <paul@codesourcery.com>
1635 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1636 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1637 (struct asm_barrier_opt): Define.
1638 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1639 (parse_psr): Accept V7M psr names.
1640 (parse_barrier): New function.
1641 (enum operand_parse_code): Add OP_oBARRIER.
1642 (parse_operands): Implement OP_oBARRIER.
1643 (do_barrier): New function.
1644 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1645 (do_t_cpsi): Add V7M restrictions.
1646 (do_t_mrs, do_t_msr): Validate V7M variants.
1647 (md_assemble): Check for NULL variants.
1648 (v7m_psrs, barrier_opt_names): New tables.
1649 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1650 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1651 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1652 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1653 (struct cpu_arch_ver_table): Define.
1654 (cpu_arch_ver): New.
1655 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1656 Tag_CPU_arch_profile.
1657 * doc/c-arm.texi: Document new cpu and arch options.
1659 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1661 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1663 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1665 * config/tc-ia64.c: Update copyright years.
1667 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1669 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1672 2005-02-22 Paul Brook <paul@codesourcery.com>
1674 * config/tc-arm.c (do_pld): Remove incorrect write to
1676 (encode_thumb32_addr_mode): Use correct operand.
1678 2006-02-21 Paul Brook <paul@codesourcery.com>
1680 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1682 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1683 Anil Paranjape <anilp1@kpitcummins.com>
1684 Shilin Shakti <shilins@kpitcummins.com>
1686 * Makefile.am: Add xc16x related entry.
1687 * Makefile.in: Regenerate.
1688 * configure.in: Added xc16x related entry.
1689 * configure: Regenerate.
1690 * config/tc-xc16x.h: New file
1691 * config/tc-xc16x.c: New file
1692 * doc/c-xc16x.texi: New file for xc16x
1693 * doc/all.texi: Entry for xc16x
1694 * doc/Makefile.texi: Added c-xc16x.texi
1695 * NEWS: Announce the support for the new target.
1697 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1699 * configure.tgt: set emulation for mips-*-netbsd*
1701 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1703 * config.in: Rebuilt.
1705 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1707 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1708 from 1, not 0, in error messages.
1709 (md_assemble): Simplify special-case check for ENTRY instructions.
1710 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1711 operand in error message.
1713 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1715 * configure.tgt (arm-*-linux-gnueabi*): Change to
1718 2006-02-10 Nick Clifton <nickc@redhat.com>
1720 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1721 32-bit value is propagated into the upper bits of a 64-bit long.
1723 * config/tc-arc.c (init_opcode_tables): Fix cast.
1724 (arc_extoper, md_operand): Likewise.
1726 2006-02-09 David Heine <dlheine@tensilica.com>
1728 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1729 each relaxation step.
1731 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1733 * configure.in (CHECK_DECLS): Add vsnprintf.
1734 * configure: Regenerate.
1735 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1736 include/declare here, but...
1737 * as.h: Move code detecting VARARGS idiom to the top.
1738 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1739 (vsnprintf): Declare if not already declared.
1741 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1743 * as.c (close_output_file): New.
1744 (main): Register close_output_file with xatexit before
1745 dump_statistics. Don't call output_file_close.
1747 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1749 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1750 mcf5329_control_regs): New.
1751 (not_current_architecture, selected_arch, selected_cpu): New.
1752 (m68k_archs, m68k_extensions): New.
1753 (archs): Renamed to ...
1754 (m68k_cpus): ... here. Adjust.
1756 (md_pseudo_table): Add arch and cpu directives.
1757 (find_cf_chip, m68k_ip): Adjust table scanning.
1758 (no_68851, no_68881): Remove.
1759 (md_assemble): Lazily initialize.
1760 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1761 (md_init_after_args): Move functionality to m68k_init_arch.
1762 (mri_chip): Adjust table scanning.
1763 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1764 options with saner parsing.
1765 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1766 m68k_init_arch): New.
1767 (s_m68k_cpu, s_m68k_arch): New.
1768 (md_show_usage): Adjust.
1769 (m68k_elf_final_processing): Set CF EF flags.
1770 * config/tc-m68k.h (m68k_init_after_args): Remove.
1771 (tc_init_after_args): Remove.
1772 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1773 (M68k-Directives): Document .arch and .cpu directives.
1775 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1777 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1778 synonyms for equ and defl.
1779 (z80_cons_fix_new): New function.
1780 (emit_byte): Disallow relative jumps to absolute locations.
1781 (emit_data): Only handle defb, prototype changed, because defb is
1782 now handled as pseudo-op rather than an instruction.
1783 (instab): Entries for defb,defw,db,dw moved from here...
1784 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1785 Add entries for def24,def32,d24,d32.
1786 (md_assemble): Improved error handling.
1787 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1788 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1789 (z80_cons_fix_new): Declare.
1790 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1791 (def24,d24,def32,d32): New pseudo-ops.
1793 2006-02-02 Paul Brook <paul@codesourcery.com>
1795 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1797 2005-02-02 Paul Brook <paul@codesourcery.com>
1799 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1800 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1801 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1802 T2_OPCODE_RSB): Define.
1803 (thumb32_negate_data_op): New function.
1804 (md_apply_fix): Use it.
1806 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1808 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1810 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1811 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1813 (relaxation_requirements): Add pfinish_frag argument and use it to
1814 replace setting tinsn->record_fix fields.
1815 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1816 and vinsn_to_insnbuf. Remove references to record_fix and
1817 slot_sub_symbols fields.
1818 (xtensa_mark_narrow_branches): Delete unused code.
1819 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1821 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1823 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1824 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1825 of the record_fix field. Simplify error messages for unexpected
1827 (set_expr_symbol_offset_diff): Delete.
1829 2006-01-31 Paul Brook <paul@codesourcery.com>
1831 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1833 2006-01-31 Paul Brook <paul@codesourcery.com>
1834 Richard Earnshaw <rearnsha@arm.com>
1836 * config/tc-arm.c: Use arm_feature_set.
1837 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1838 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1839 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1842 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1843 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1844 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1845 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1847 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1848 (arm_opts): Move old cpu/arch options from here...
1849 (arm_legacy_opts): ... to here.
1850 (md_parse_option): Search arm_legacy_opts.
1851 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1852 (arm_float_abis, arm_eabis): Make const.
1854 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1856 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1858 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1860 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1861 in load immediate intruction.
1863 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1865 * config/bfin-parse.y (value_match): Use correct conversion
1866 specifications in template string for __FILE__ and __LINE__.
1870 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1872 Introduce TLS descriptors for i386 and x86_64.
1873 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1874 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1875 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1876 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1877 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1879 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1880 (lex_got): Handle @tlsdesc and @tlscall.
1881 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1883 2006-01-11 Nick Clifton <nickc@redhat.com>
1885 Fixes for building on 64-bit hosts:
1886 * config/tc-avr.c (mod_index): New union to allow conversion
1887 between pointers and integers.
1888 (md_begin, avr_ldi_expression): Use it.
1889 * config/tc-i370.c (md_assemble): Add cast for argument to print
1891 * config/tc-tic54x.c (subsym_substitute): Likewise.
1892 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1893 opindex field of fr_cgen structure into a pointer so that it can
1894 be stored in a frag.
1895 * config/tc-mn10300.c (md_assemble): Likewise.
1896 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1898 * config/tc-v850.c: Replace uses of (int) casts with correct
1901 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1904 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1906 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1909 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1910 a local-label reference.
1912 For older changes see ChangeLog-2005
1918 version-control: never