1 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
3 * config/tc-aarch64.c (parse_sys_reg): Support
4 S2_<op1>_<Cn>_<Cm>_<op2>.
6 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
10 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
12 * config/tc-aarch64.c (set_other_error): New function.
13 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
14 the variable to which it points with 'o'.
15 (parse_operands): Update; check for write to read-only system
16 registers or read from write-only ones.
18 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
20 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
21 indicate if instruction has the BND prefix. Return
22 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
23 bnd_prefix isn't zero.
24 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
26 (output_jump): Update reloc call.
27 (output_interseg_jump): Likewise.
28 (output_disp): Likewise.
29 (output_imm): Likewise.
30 (x86_cons_fix_new): Likewise.
31 (lex_got): Add an argument, bnd_prefix, to indicate if
32 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
34 (x86_cons): Update lex_got call.
35 (i386_immediate): Likewise.
36 (i386_displacement): Likewise.
37 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
38 BFD_RELOC_X86_64_PLT32_BND.
39 (tc_gen_reloc): Likewise.
40 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
42 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
44 * config/tc-aarch64.c (set_other_error): New function.
45 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
46 the variable to which it points with 'o'.
47 (parse_operands): Update; check for write to read-only system
48 registers or read from write-only ones.
50 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
52 * config/tc-i386.c (check_VecOperands): Reorder checks.
54 2013-11-11 Catherine Moore <clm@codesourcery.com>
56 * config/mips/tc-mips.c (convert_reg_type): Use
57 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
58 (reg_needs_delay): Likewise.
59 (insns_between): Likewise.
61 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
63 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
65 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
67 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
68 call aarch64_sys_reg_deprecated_p and warn about the deprecated
71 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
73 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
75 2013-11-05 Will Newton <will.newton@linaro.org>
78 * config/tc-aarch64.c (parse_operands): Avoid trying to
79 parse a vector register as an immediate.
81 2013-11-04 Jan Beulich <jbeulich@suse.com>
83 * config/tc-i386.c (check_long_reg): Correct comment indentation.
84 (check_qword_reg): Correct comment and its indentation.
85 (check_word_reg): Extend comment and correct its indentation. Also
86 check for 64-bit register.
88 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
90 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
91 (ppc_elf_localentry): New function.
92 (ppc_force_relocation): Force relocs on all branches to localenty
94 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
96 2013-10-30 Alan Modra <amodra@gmail.com>
98 * config/tc-ppc.c: Include elf/ppc64.h.
99 (ppc_abiversion): New variable.
100 (md_pseudo_table): Add .abiversion.
101 (ppc_elf_abiversion, ppc_elf_end): New functions.
102 * config/tc-ppc.h (md_end): Define.
104 2013-10-30 Alan Modra <amodra@gmail.com>
106 * config/tc-ppc.c (SEX16): Don't mask.
107 (REPORT_OVERFLOW_HI): Define as zero.
108 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
109 @tprel@high, and @tprel@higha modifiers.
110 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
111 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
113 (md_apply_fix): Similarly.
115 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
117 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
118 (fpr_write_mask): Test MSA registers.
119 (can_swap_branch_p): Check fpr write followed by fpr read.
121 2013-10-18 Nick Clifton <nickc@redhat.com>
123 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
125 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
126 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
128 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
129 (md_longopts): Add mmsa and mno-msa.
130 (mips_ases): Add msa.
131 (RTYPE_MASK): Update.
132 (RTYPE_MSA): New define.
133 (OT_REG_ELEMENT): Replace with...
134 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
135 (mips_operand_token): Replace reg_element with index.
136 (mips_parse_argument_token): Treat vector indices as separate tokens.
137 Handle register indices.
138 (md_begin): Add MSA register names.
139 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
140 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
141 (match_mdmx_imm_reg_operand): Update accordingly.
142 (match_imm_index_operand): New function.
143 (match_reg_index_operand): New function.
144 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
145 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
146 (md_show_usage): Print -mmsa and -mno-msa.
147 * doc/as.texinfo: Document -mmsa and -mno-msa.
148 * doc/c-mips.texi: Document -mmsa and -mno-msa.
149 Document .set msa and .set nomsa.
151 2013-10-14 Nick Clifton <nickc@redhat.com>
153 * read.c (add_include_dir): Use xrealloc.
154 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
155 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
157 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
159 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
160 also test/refer to "sstatus". Reformat the warning message.
162 2013-10-10 Sean Keys <skeys@ipdatasys.com>
164 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
166 2013-10-10 Jan Beulich <jbeulich@suse.com>
168 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
169 swapping for bndmk, bndldx, and bndstx.
171 2013-10-09 Nick Clifton <nickc@redhat.com>
174 * config/tc-epiphany.c (md_convert_frag): Add missing break
178 * config/tc-mn10200.c (md_convert_frag): Add missing break
181 2013-10-08 Jan Beulich <jbeulich@suse.com>
183 * tc-i386.c (check_word_reg): Remove misplaced "else".
184 (check_long_reg): Restore symmetry with check_word_reg.
186 2013-10-08 Jan Beulich <jbeulich@suse.com>
188 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
191 2013-10-08 Nick Clifton <nickc@redhat.com>
193 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
194 for "<foo>a". Issue error messages for unrecognised or corrrupt
197 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
199 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
202 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
204 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
205 * doc/c-i386.texi: Add -march=bdver4 option.
207 2013-09-20 Alan Modra <amodra@gmail.com>
209 * configure: Regenerate.
211 2013-09-18 Tristan Gingold <gingold@adacore.com>
213 * NEWS: Add marker for 2.24.
215 2013-09-18 Nick Clifton <nickc@redhat.com>
217 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
218 (move_data): New variable.
219 (md_parse_option): Parse -md.
220 (msp430_section): New function. Catch references to the .bss or
221 .data sections and generate a special symbol for use by the libcrt
223 (md_pseudo_table): Intercept .section directives.
224 (md_longopt): Add -md
225 (md_show_usage): Likewise.
226 (msp430_operands): Generate a warning message if a NOP is inserted
227 into the instruction stream.
228 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
230 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
232 * config/tc-mips.c (mips_elf_final_processing): Set
233 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
235 2013-09-16 Will Newton <will.newton@linaro.org>
237 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
238 disallowing element size 64 with interleave other than 1.
240 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
242 * config/tc-mips.c (match_insn): Set error when $31 is used for
245 2013-09-04 Tristan Gingold <gingold@adacore.com>
247 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
250 2013-09-04 Roland McGrath <mcgrathr@google.com>
253 * config/tc-arm.c (T16_32_TAB): Add _udf.
254 (do_t_udf): New function.
257 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
259 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
260 assembler errors at correct position.
262 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
265 * config/tc-ia64.c: Fix typos.
266 * config/tc-sparc.c: Likewise.
267 * config/tc-z80.c: Likewise.
268 * doc/c-i386.texi: Likewise.
269 * doc/c-m32r.texi: Likewise.
271 2013-08-23 Will Newton <will.newton@linaro.org>
273 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
274 for pre-indexed addressing modes.
276 2013-08-21 Alan Modra <amodra@gmail.com>
278 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
279 range check label number for use with fb_low_counter array.
281 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
283 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
284 (mips_parse_argument_token, validate_micromips_insn, md_begin)
285 (check_regno, match_float_constant, check_completed_insn, append_insn)
286 (match_insn, match_mips16_insn, match_insns, macro_start)
287 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
288 (mips16_ip, mips_set_option_string, md_parse_option)
289 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
290 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
291 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
292 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
293 Start error messages with a lower-case letter. Do not end error
294 messages with a period. Wrap long messages to 80 character-lines.
295 Use "cannot" instead of "can't" and "can not".
297 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
299 * config/tc-mips.c (imm_expr): Expand comment.
300 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
303 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
305 * config/tc-mips.c (imm2_expr): Delete.
306 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
308 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
310 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
311 (macro): Remove M_DEXT and M_DINS handling.
313 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
315 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
316 lax_max with lax_match.
317 (match_int_operand): Update accordingly. Don't report an error
318 for !lax_match-only cases.
319 (match_insn): Replace more_alts with lax_match and use it to
320 initialize the mips_arg_info field. Add a complete_p parameter.
321 Handle implicit VU0 suffixes here.
322 (match_invalid_for_isa, match_insns, match_mips16_insns): New
324 (mips_ip, mips16_ip): Use them.
326 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
328 * config/tc-mips.c (match_expression): Report uses of registers here.
329 Add a "must be an immediate expression" error. Handle elided offsets
331 (match_int_operand): ...here.
333 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
335 * config/tc-mips.c (mips_arg_info): Remove soft_match.
336 (match_out_of_range, match_not_constant): New functions.
337 (match_const_int): Remove fallback parameter and check for soft_match.
338 Use match_not_constant.
339 (match_mapped_int_operand, match_addiusp_operand)
340 (match_perf_reg_operand, match_save_restore_list_operand)
341 (match_mdmx_imm_reg_operand): Update accordingly. Use
342 match_out_of_range and set_insn_error* instead of as_bad.
343 (match_int_operand): Likewise. Use match_not_constant in the
344 !allows_nonconst case.
345 (match_float_constant): Report invalid float constants.
346 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
347 match_float_constant to check for invalid constants. Fail the
348 match if match_const_int or match_float_constant return false.
349 (mips_ip): Update accordingly.
350 (mips16_ip): Likewise. Undo null termination of instruction name
351 once lookup is complete.
353 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
355 * config/tc-mips.c (mips_insn_error_format): New enum.
356 (mips_insn_error): New struct.
357 (insn_error): Change to a mips_insn_error.
358 (clear_insn_error, set_insn_error_format, set_insn_error)
359 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
361 (mips_parse_argument_token, md_assemble, match_insn)
362 (match_mips16_insn): Use them instead of manipulating insn_error
364 (mips_ip, mips16_ip): Likewise. Simplify control flow.
366 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
368 * config/tc-mips.c (normalize_constant_expr): Move further up file.
369 (normalize_address_expr): Likewise.
370 (match_insn, match_mips16_insn): New functions, split out from...
371 (mips_ip, mips16_ip): ...here.
373 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
375 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
377 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
378 for optional operands.
380 2013-08-16 Alan Modra <amodra@gmail.com>
382 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
385 2013-08-16 Alan Modra <amodra@gmail.com>
387 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
389 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
391 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
392 argument as alignment.
394 2013-08-09 Nick Clifton <nickc@redhat.com>
396 * config/tc-rl78.c (elf_flags): New variable.
397 (enum options): Add OPTION_G10.
398 (md_longopts): Add mg10.
399 (md_parse_option): Parse -mg10.
400 (rl78_elf_final_processing): New function.
401 * config/tc-rl78.c (tc_final_processing): Define.
402 * doc/c-rl78.texi: Document -mg10 option.
404 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
406 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
407 suffixes to be elided too.
408 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
409 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
412 2013-08-05 John Tytgat <john@bass-software.com>
414 * po/POTFILES.in: Regenerate.
416 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
417 Konrad Eisele <konrad@gaisler.com>
419 * config/tc-sparc.c (sparc_arch_types): Add leon.
420 (sparc_arch): Move sparc4 around and add leon.
421 (sparc_target_format): Document -Aleon.
422 * doc/c-sparc.texi: Likewise.
424 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
426 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
428 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
429 Richard Sandiford <rdsandiford@googlemail.com>
431 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
432 (RWARN): Bump to 0x8000000.
433 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
434 (RTYPE_R5900_ACC): New register types.
435 (RTYPE_MASK): Include them.
436 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
438 (reg_names): Include them.
439 (mips_parse_register_1): New function, split out from...
440 (mips_parse_register): ...here. Add a channels_ptr parameter.
441 Look for VU0 channel suffixes when nonnull.
442 (reg_lookup): Update the call to mips_parse_register.
443 (mips_parse_vu0_channels): New function.
444 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
445 (mips_operand_token): Add a "channels" field to the union.
446 Extend the comment above "ch" to OT_DOUBLE_CHAR.
447 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
448 (mips_parse_argument_token): Handle channel suffixes here too.
449 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
450 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
452 (md_begin): Register $vfN and $vfI registers.
453 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
454 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
455 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
456 (match_vu0_suffix_operand): New function.
457 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
458 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
459 (mips_lookup_insn): New function.
460 (mips_ip): Use it. Allow "+K" operands to be elided at the end
461 of an instruction. Handle '#' sequences.
463 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
465 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
466 values and use it instead of sreg, treg, xreg, etc.
468 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
470 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
471 and mips_int_operand_max.
472 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
474 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
475 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
476 instead of mips16_immed_operand.
478 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
480 * config/tc-mips.c (mips16_macro): Don't use move_register.
481 (mips16_ip): Allow macros to use 'p'.
483 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
485 * config/tc-mips.c (MAX_OPERANDS): New macro.
486 (mips_operand_array): New structure.
487 (mips_operands, mips16_operands, micromips_operands): New arrays.
488 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
489 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
490 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
491 (micromips_to_32_reg_q_map): Delete.
492 (insn_operands, insn_opno, insn_extract_operand): New functions.
493 (validate_mips_insn): Take a mips_operand_array as argument and
494 use it to build up a list of operands. Extend to handle INSN_MACRO
496 (validate_mips16_insn): New function.
497 (validate_micromips_insn): Take a mips_operand_array as argument.
499 (md_begin): Initialize mips_operands, mips16_operands and
500 micromips_operands. Call validate_mips_insn and
501 validate_micromips_insn for macro instructions too.
502 Call validate_mips16_insn for MIPS16 instructions.
503 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
505 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
506 them. Handle INSN_UDI.
507 (get_append_method): Use gpr_read_mask.
509 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
511 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
512 flags for MIPS16 and non-MIPS16 instructions.
513 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
514 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
515 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
516 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
517 and non-MIPS16 instructions. Fix formatting.
519 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
521 * config/tc-mips.c (reg_needs_delay): Move later in file.
523 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
525 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
526 Alexander Ivchenko <alexander.ivchenko@intel.com>
527 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
528 Sergey Lega <sergey.s.lega@intel.com>
529 Anna Tikhonova <anna.tikhonova@intel.com>
530 Ilya Tocar <ilya.tocar@intel.com>
531 Andrey Turetskiy <andrey.turetskiy@intel.com>
532 Ilya Verbin <ilya.verbin@intel.com>
533 Kirill Yukhin <kirill.yukhin@intel.com>
534 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
536 * config/tc-i386-intel.c (O_zmmword_ptr): New.
537 (i386_types): Add zmmword.
538 (i386_intel_simplify_register): Allow regzmm.
539 (i386_intel_simplify): Handle zmmwords.
540 (i386_intel_operand): Handle RC/SAE, vector operations and
542 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
543 (struct RC_Operation): New.
544 (struct Mask_Operation): New.
545 (struct Broadcast_Operation): New.
546 (vex_prefix): Size of bytes increased to 4 to support EVEX
548 (enum i386_error): Add new error codes: unsupported_broadcast,
549 broadcast_not_on_src_operand, broadcast_needed,
550 unsupported_masking, mask_not_on_destination, no_default_mask,
551 unsupported_rc_sae, rc_sae_operand_not_last_imm,
552 invalid_register_operand, try_vector_disp8.
553 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
554 rounding, broadcast, memshift.
555 (struct RC_name): New.
556 (RC_NamesTable): New.
559 (extra_symbol_chars): Add '{'.
560 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
561 (i386_operand_type): Add regzmm, regmask and vec_disp8.
562 (match_mem_size): Handle zmmwords.
563 (operand_type_match): Handle zmm-registers.
564 (mode_from_disp_size): Handle vec_disp8.
565 (fits_in_vec_disp8): New.
566 (md_begin): Handle {} properly.
567 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
568 (build_vex_prefix): Handle vrex.
569 (build_evex_prefix): New.
570 (process_immext): Adjust to properly handle EVEX.
571 (md_assemble): Add EVEX encoding support.
572 (swap_2_operands): Correctly handle operands with masking,
573 broadcasting or RC/SAE.
574 (check_VecOperands): Support EVEX features.
575 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
576 (match_template): Support regzmm and handle new error codes.
577 (process_suffix): Handle zmmwords and zmm-registers.
578 (check_byte_reg): Extend to zmm-registers.
579 (process_operands): Extend to zmm-registers.
580 (build_modrm_byte): Handle EVEX.
581 (output_insn): Adjust to properly handle EVEX case.
582 (disp_size): Handle vec_disp8.
583 (output_disp): Support compressed disp8*N evex feature.
584 (output_imm): Handle RC/SAE immediates properly.
585 (check_VecOperations): New.
586 (i386_immediate): Handle EVEX features.
587 (i386_index_check): Handle zmmwords and zmm-registers.
588 (RC_SAE_immediate): New.
589 (i386_att_operand): Handle EVEX features.
590 (parse_real_register): Add a check for ZMM/Mask registers.
591 (OPTION_MEVEXLIG): New.
592 (OPTION_MEVEXWIG): New.
593 (md_longopts): Add mevexlig and mevexwig.
594 (md_parse_option): Handle mevexlig and mevexwig options.
595 (md_show_usage): Add description for mevexlig and mevexwig.
596 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
597 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
599 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
601 * config/tc-i386.c (cpu_arch): Add .sha.
602 * doc/c-i386.texi: Document sha/.sha.
604 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
605 Kirill Yukhin <kirill.yukhin@intel.com>
606 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
608 * config/tc-i386.c (BND_PREFIX): New.
609 (struct _i386_insn): Add new field bnd_prefix.
610 (add_bnd_prefix): New.
612 (i386_operand_type): Add regbnd.
613 (md_assemble): Handle BND prefixes.
614 (parse_insn): Likewise.
615 (output_branch): Likewise.
616 (output_jump): Likewise.
617 (build_modrm_byte): Handle regbnd.
618 (OPTION_MADD_BND_PREFIX): New.
619 (md_longopts): Add entry for 'madd-bnd-prefix'.
620 (md_parse_option): Handle madd-bnd-prefix option.
621 (md_show_usage): Add description for madd-bnd-prefix
623 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
625 2013-07-24 Tristan Gingold <gingold@adacore.com>
627 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
630 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
632 * config/tc-s390.c (s390_machine): Don't force the .machine
633 argument to lower case.
635 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
637 * config/tc-arm.c (s_arm_arch_extension): Improve error message
638 for invalid extension.
640 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
642 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
643 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
644 (aarch64_abi): New variable.
645 (ilp32_p): Change to be a macro.
646 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
647 (struct aarch64_option_abi_value_table): New struct.
648 (aarch64_abis): New table.
649 (aarch64_parse_abi): New function.
650 (aarch64_long_opts): Add entry for -mabi=.
651 * doc/as.texinfo (Target AArch64 options): Document -mabi.
652 * doc/c-aarch64.texi: Likewise.
654 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
656 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
659 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
661 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
663 * config/rx-parse.y: (rx_check_float_support): Add function to
664 check floating point operation support for target RX100 and
666 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
667 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
668 RX200, RX600, and RX610
670 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
672 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
674 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
676 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
677 * doc/c-avr.texi: Likewise.
679 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
681 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
682 error with older GCCs.
683 (mips16_macro_build): Dereference args.
685 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
687 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
688 New functions, split out from...
689 (reg_lookup): ...here. Remove itbl support.
690 (reglist_lookup): Delete.
691 (mips_operand_token_type): New enum.
692 (mips_operand_token): New structure.
693 (mips_operand_tokens): New variable.
694 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
695 (mips_parse_arguments): New functions.
696 (md_begin): Initialize mips_operand_tokens.
697 (mips_arg_info): Add a token field. Remove optional_reg field.
698 (match_char, match_expression): New functions.
699 (match_const_int): Use match_expression. Remove "s" argument
700 and return a boolean result. Remove O_register handling.
701 (match_regno, match_reg, match_reg_range): New functions.
702 (match_int_operand, match_mapped_int_operand, match_msb_operand)
703 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
704 (match_addiusp_operand, match_clo_clz_dest_operand)
705 (match_lwm_swm_list_operand, match_entry_exit_operand)
706 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
707 (match_tied_reg_operand): Remove "s" argument and return a boolean
708 result. Match tokens rather than text. Update calls to
709 match_const_int. Rely on match_regno to call check_regno.
710 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
711 "arg" argument. Return a boolean result.
712 (parse_float_constant): Replace with...
713 (match_float_constant): ...this new function.
714 (match_operand): Remove "s" argument and return a boolean result.
715 Update calls to subfunctions.
716 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
717 rather than string-parsing routines. Update handling of optional
718 registers for token scheme.
720 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
722 * config/tc-mips.c (parse_float_constant): Split out from...
725 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
727 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
730 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
732 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
733 (match_entry_exit_operand): New function.
734 (match_save_restore_list_operand): Likewise.
735 (match_operand): Use them.
736 (check_absolute_expr): Delete.
737 (mips16_ip): Rewrite main parsing loop to use mips_operands.
739 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
741 * config/tc-mips.c: Enable functions commented out in previous patch.
742 (SKIP_SPACE_TABS): Move further up file.
743 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
744 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
745 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
746 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
747 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
748 (micromips_imm_b_map, micromips_imm_c_map): Delete.
749 (mips_lookup_reg_pair): Delete.
750 (macro): Use report_bad_range and report_bad_field.
751 (mips_immed, expr_const_in_range): Delete.
752 (mips_ip): Rewrite main parsing loop to use new functions.
754 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
756 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
757 Change return type to bfd_boolean.
758 (report_bad_range, report_bad_field): New functions.
759 (mips_arg_info): New structure.
760 (match_const_int, convert_reg_type, check_regno, match_int_operand)
761 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
762 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
763 (match_addiusp_operand, match_clo_clz_dest_operand)
764 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
765 (match_pc_operand, match_tied_reg_operand, match_operand)
766 (check_completed_insn): New functions, commented out for now.
768 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
770 * config/tc-mips.c (insn_insert_operand): New function.
771 (macro_build, mips16_macro_build): Put null character check
772 in the for loop and convert continues to breaks. Use operand
773 structures to handle constant operands.
775 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
777 * config/tc-mips.c (validate_mips_insn): Move further up file.
778 Add insn_bits and decode_operand arguments. Use the mips_operand
779 fields to work out which bits an operand occupies. Detect double
781 (validate_micromips_insn): Move further up file. Call into
784 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
786 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
788 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
790 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
792 (macro): Update accordingly.
794 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
796 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
798 (md_assemble): Remove imm_reloc handling.
799 (mips_ip): Update commentary. Use offset_expr and offset_reloc
800 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
801 Use a temporary array rather than imm_reloc when parsing
802 constant expressions. Remove imm_reloc initialization.
803 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
804 for the relaxable field. Use a relax_char variable to track the
805 type of this field. Remove imm_reloc initialization.
807 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
809 * config/tc-mips.c (mips16_ip): Handle "I".
811 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
813 * config/tc-mips.c (mips_flag_nan2008): New variable.
814 (options): Add OPTION_NAN enum value.
815 (md_longopts): Handle it.
816 (md_parse_option): Likewise.
817 (s_nan): New function.
818 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
819 (md_show_usage): Add -mnan.
821 * doc/as.texinfo (Overview): Add -mnan.
822 * doc/c-mips.texi (MIPS Opts): Document -mnan.
823 (MIPS NaN Encodings): New node. Document .nan directive.
824 (MIPS-Dependent): List the new node.
826 2013-07-09 Tristan Gingold <gingold@adacore.com>
828 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
830 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
832 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
833 for 'A' and assume that the constant has been elided if the result
836 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
838 * config/tc-mips.c (gprel16_reloc_p): New function.
839 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
841 (offset_high_part, small_offset_p): New functions.
842 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
843 register load and store macros, handle the 16-bit offset case first.
844 If a 16-bit offset is not suitable for the instruction we're
845 generating, load it into the temporary register using
846 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
847 M_L_DAB code once the address has been constructed. For double load
848 and store macros, again handle the 16-bit offset case first.
849 If the second register cannot be accessed from the same high
850 part as the first, load it into AT using ADDRESS_ADDI_INSN.
851 Fix the handling of LD in cases where the first register is the
852 same as the base. Also handle the case where the offset is
853 not 16 bits and the second register cannot be accessed from the
854 same high part as the first. For unaligned loads and stores,
855 fuse the offbits == 12 and old "ab" handling. Apply this handling
856 whenever the second offset needs a different high part from the first.
857 Construct the offset using ADDRESS_ADDI_INSN where possible,
858 for offbits == 16 as well as offbits == 12. Use offset_reloc
859 when constructing the individual loads and stores.
860 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
861 and offset_reloc before matching against a particular opcode.
862 Handle elided 'A' constants. Allow 'A' constants to use
863 relocation operators.
865 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
867 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
868 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
869 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
871 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
873 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
874 Require the msb to be <= 31 for "+s". Check that the size is <= 31
875 for both "+s" and "+S".
877 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
879 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
880 (mips_ip, mips16_ip): Handle "+i".
882 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
884 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
885 (micromips_to_32_reg_h_map): Rename to...
886 (micromips_to_32_reg_h_map1): ...this.
887 (micromips_to_32_reg_i_map): Rename to...
888 (micromips_to_32_reg_h_map2): ...this.
889 (mips_lookup_reg_pair): New function.
890 (gpr_write_mask, macro): Adjust after above renaming.
891 (validate_micromips_insn): Remove "mi" handling.
892 (mips_ip): Likewise. Parse both registers in a pair for "mh".
894 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
896 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
897 (mips_ip): Remove "+D" and "+T" handling.
899 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
901 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
904 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
906 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
908 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
910 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
911 (aarch64_force_relocation): Likewise.
913 2013-07-02 Alan Modra <amodra@gmail.com>
915 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
917 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
919 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
920 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
921 Replace @sc{mips16} with literal `MIPS16'.
922 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
924 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
926 * config/tc-aarch64.c (reloc_table): Replace
927 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
928 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
929 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
930 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
931 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
932 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
933 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
934 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
935 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
936 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
937 (aarch64_force_relocation): Likewise.
939 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
941 * config/tc-aarch64.c (ilp32_p): New static variable.
942 (elf64_aarch64_target_format): Return the target according to the
944 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
945 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
946 (aarch64_dwarf2_addr_size): New function.
947 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
948 (DWARF2_ADDR_SIZE): New define.
950 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
952 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
954 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
956 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
958 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
960 * config/tc-mips.c (mips_set_options): Add insn32 member.
961 (mips_opts): Initialize it.
962 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
963 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
964 (md_longopts): Add "minsn32" and "mno-insn32" options.
965 (is_size_valid): Handle insn32 mode.
966 (md_assemble): Pass instruction string down to macro.
967 (brk_fmt): Add second dimension and insn32 mode initializers.
968 (mfhl_fmt): Likewise.
969 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
970 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
971 (macro_build_jalr, move_register): Handle insn32 mode.
972 (macro_build_branch_rs): Likewise.
973 (macro): Handle insn32 mode.
974 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
975 (mips_ip): Handle insn32 mode.
976 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
977 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
978 (mips_handle_align): Handle insn32 mode.
979 (md_show_usage): Add -minsn32 and -mno-insn32.
981 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
983 (-minsn32, -mno-insn32): New options.
984 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
986 (MIPS assembly options): New node. Document .set insn32 and
988 (MIPS-Dependent): List the new node.
990 2013-06-25 Nick Clifton <nickc@redhat.com>
992 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
993 the PC in indirect addressing on 430xv2 parts.
994 (msp430_operands): Add version test to hardware bug encoding
997 2013-06-24 Roland McGrath <mcgrathr@google.com>
999 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1000 so it skips whitespace before it.
1001 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1003 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1004 (arm_reg_parse_multi): Skip whitespace first.
1005 (parse_reg_list): Likewise.
1006 (parse_vfp_reg_list): Likewise.
1007 (s_arm_unwind_save_mmxwcg): Likewise.
1009 2013-06-24 Nick Clifton <nickc@redhat.com>
1012 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1014 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1016 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1018 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1020 * config/tc-mips.c: Assert that offsetT and valueT are at least
1022 (GPR_SMIN, GPR_SMAX): New macros.
1023 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1025 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1027 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1028 conditions. Remove any code deselected by them.
1029 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1031 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1033 * NEWS: Note removal of ECOFF support.
1034 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1035 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1036 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1037 * Makefile.in: Regenerate.
1038 * configure.in: Remove MIPS ECOFF references.
1039 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1041 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1042 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1043 (mips-*-*): ...this single case.
1044 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1045 MIPS emulations to be e-mipself*.
1046 * configure: Regenerate.
1047 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1048 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1049 (mips-*-sysv*): Remove coff and ecoff cases.
1050 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1051 * ecoff.c: Remove reference to MIPS ECOFF.
1052 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1053 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1054 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1055 (mips_hi_fixup): Tweak comment.
1056 (append_insn): Require a howto.
1057 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1059 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1061 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1062 Use "CPU" instead of "cpu".
1063 * doc/c-mips.texi: Likewise.
1064 (MIPS Opts): Rename to MIPS Options.
1065 (MIPS option stack): Rename to MIPS Option Stack.
1066 (MIPS ASE instruction generation overrides): Rename to
1067 MIPS ASE Instruction Generation Overrides (for now).
1068 (MIPS floating-point): Rename to MIPS Floating-Point.
1070 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1072 * doc/c-mips.texi (MIPS Macros): New section.
1073 (MIPS Object): Replace with...
1074 (MIPS Small Data): ...this new section.
1076 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1078 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1079 Capitalize name. Use @kindex instead of @cindex for .set entries.
1081 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1083 * doc/c-mips.texi (MIPS Stabs): Remove section.
1085 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1087 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1088 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1089 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1090 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1091 (mips_ase): New structure.
1092 (mips_ases): New table.
1093 (FP64_ASES): New macro.
1094 (mips_ase_groups): New array.
1095 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1096 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1098 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1099 (md_parse_option): Use mips_ases and mips_set_ase instead of
1100 separate case statements for each ASE option.
1101 (mips_after_parse_args): Use FP64_ASES. Use
1102 mips_check_isa_supports_ases to check the ASEs against
1104 (s_mipsset): Use mips_ases and mips_set_ase instead of
1105 separate if statements for each ASE option. Use
1106 mips_check_isa_supports_ases, even when a non-ASE option
1109 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1111 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1113 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1115 * config/tc-mips.c (md_shortopts, options, md_longopts)
1116 (md_longopts_size): Move earlier in file.
1118 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1120 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1121 with a single "ase" bitmask.
1122 (mips_opts): Update accordingly.
1123 (file_ase, file_ase_explicit): New variables.
1124 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1125 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1126 (ISA_HAS_ROR): Adjust for mips_set_options change.
1127 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1128 (mips_ip): Adjust for mips_set_options change.
1129 (md_parse_option): Likewise. Update file_ase_explicit.
1130 (mips_after_parse_args): Adjust for mips_set_options change.
1131 Use bitmask operations to select the default ASEs. Set file_ase
1132 rather than individual per-ASE variables.
1133 (s_mipsset): Adjust for mips_set_options change.
1134 (mips_elf_final_processing): Test file_ase rather than
1135 file_ase_mdmx. Remove commented-out code.
1137 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1139 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1140 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1141 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1142 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1143 (mips_after_parse_args): Use the new "ase" field to choose
1145 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1148 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1150 * config/tc-arm.c (symbol_preemptible): New function.
1151 (relax_branch): Use it.
1153 2013-06-17 Catherine Moore <clm@codesourcery.com>
1154 Maciej W. Rozycki <macro@codesourcery.com>
1155 Chao-Ying Fu <fu@mips.com>
1157 * config/tc-mips.c (mips_set_options): Add ase_eva.
1158 (mips_set_options mips_opts): Add ase_eva.
1159 (file_ase_eva): Declare.
1160 (ISA_SUPPORTS_EVA_ASE): Define.
1161 (IS_SEXT_9BIT_NUM): Define.
1162 (MIPS_CPU_ASE_EVA): Define.
1163 (is_opcode_valid): Add support for ase_eva.
1164 (macro_build): Likewise.
1166 (validate_mips_insn): Likewise.
1167 (validate_micromips_insn): Likewise.
1168 (mips_ip): Likewise.
1169 (options): Add OPTION_EVA and OPTION_NO_EVA.
1170 (md_longopts): Add -meva and -mno-eva.
1171 (md_parse_option): Process new options.
1172 (mips_after_parse_args): Check for valid EVA combinations.
1173 (s_mipsset): Likewise.
1175 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1177 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1178 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1179 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1180 (dwarf2_gen_line_info_1): Update call accordingly.
1181 (dwarf2_move_insn): New function.
1182 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1184 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1188 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1191 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1192 (dwarf2_gen_line_info_1): Delete.
1193 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1194 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1195 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1196 (dwarf2_directive_loc): Push previous .locs instead of generating
1199 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1201 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1202 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1204 2013-06-13 Nick Clifton <nickc@redhat.com>
1207 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1208 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1209 function. Generates an error if the adjusted offset is out of a
1212 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1214 * config/tc-nios2.c (md_apply_fix): Mask constant
1215 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1217 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1219 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1220 MIPS-3D instructions either.
1221 (md_convert_frag): Update the COPx branch mask accordingly.
1223 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1225 * doc/as.texinfo (Overview): Add --relax-branch and
1227 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1230 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1232 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1235 2013-06-08 Catherine Moore <clm@codesourcery.com>
1237 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1238 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1239 (append_insn): Change INSN_xxxx to ASE_xxxx.
1241 2013-06-01 George Thomas <george.thomas@atmel.com>
1243 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1246 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1248 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1251 2013-05-31 Paul Brook <paul@codesourcery.com>
1253 * config/tc-mips.c (s_ehword): New.
1255 2013-05-30 Paul Brook <paul@codesourcery.com>
1257 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1259 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1261 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1262 convert relocs who have no relocatable field either. Rephrase
1263 the conditional so that the PC-relative check is only applied
1266 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1268 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1271 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1273 * config/tc-aarch64.c (reloc_table): Update to use
1274 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1275 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1276 (md_apply_fix): Likewise.
1277 (aarch64_force_relocation): Likewise.
1279 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1281 * config/tc-arm.c (it_fsm_post_encode): Improve
1282 warning messages about deprecated IT block formats.
1284 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1286 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1287 inside fx_done condition.
1289 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1291 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1293 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1295 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1296 and clean up warning when using PRINT_OPCODE_TABLE.
1298 2013-05-20 Alan Modra <amodra@gmail.com>
1300 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1301 and data fixups performing shift/high adjust/sign extension on
1302 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1303 when writing data fixups rather than recalculating size.
1305 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1307 * doc/c-msp430.texi: Fix typo.
1309 2013-05-16 Tristan Gingold <gingold@adacore.com>
1311 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1312 are also TOC symbols.
1314 2013-05-16 Nick Clifton <nickc@redhat.com>
1316 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1317 Add -mcpu command to specify core type.
1318 * doc/c-msp430.texi: Update documentation.
1320 2013-05-09 Andrew Pinski <apinski@cavium.com>
1322 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1323 (mips_opts): Update for the new field.
1324 (file_ase_virt): New variable.
1325 (ISA_SUPPORTS_VIRT_ASE): New macro.
1326 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1327 (MIPS_CPU_ASE_VIRT): New define.
1328 (is_opcode_valid): Handle ase_virt.
1329 (macro_build): Handle "+J".
1330 (validate_mips_insn): Likewise.
1331 (mips_ip): Likewise.
1332 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1333 (md_longopts): Add mvirt and mnovirt
1334 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1335 (mips_after_parse_args): Handle ase_virt field.
1336 (s_mipsset): Handle "virt" and "novirt".
1337 (mips_elf_final_processing): Add a comment about virt ASE might need
1339 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1340 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1341 Document ".set virt" and ".set novirt".
1343 2013-05-09 Alan Modra <amodra@gmail.com>
1345 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1346 control of operand flag bits.
1348 2013-05-07 Alan Modra <amodra@gmail.com>
1350 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1351 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1352 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1353 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1354 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1355 Shift and sign-extend fieldval for use by some VLE reloc
1356 operand->insert functions.
1358 2013-05-06 Paul Brook <paul@codesourcery.com>
1359 Catherine Moore <clm@codesourcery.com>
1361 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1362 (limited_pcrel_reloc_p): Likewise.
1363 (md_apply_fix): Likewise.
1364 (tc_gen_reloc): Likewise.
1366 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1368 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1369 (mips_fix_adjustable): Adjust pc-relative check to use
1372 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1374 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1375 (s_mips_stab): Do not restrict to stabn only.
1377 2013-05-02 Nick Clifton <nickc@redhat.com>
1379 * config/tc-msp430.c: Add support for the MSP430X architecture.
1380 Add code to insert a NOP instruction after any instruction that
1381 might change the interrupt state.
1382 Add support for the LARGE memory model.
1383 Add code to initialise the .MSP430.attributes section.
1384 * config/tc-msp430.h: Add support for the MSP430X architecture.
1385 * doc/c-msp430.texi: Document the new -mL and -mN command line
1387 * NEWS: Mention support for the MSP430X architecture.
1389 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1391 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1392 alpha*-*-linux*ecoff*.
1394 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1396 * config/tc-mips.c (mips_ip): Add sizelo.
1397 For "+C", "+G", and "+H", set sizelo and compare against it.
1399 2013-04-29 Nick Clifton <nickc@redhat.com>
1401 * as.c (Options): Add -gdwarf-sections.
1402 (parse_args): Likewise.
1403 * as.h (flag_dwarf_sections): Declare.
1404 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1405 (process_entries): When -gdwarf-sections is enabled generate
1406 fragmentary .debug_line sections.
1407 (out_debug_line): Set the section for the .debug_line section end
1409 * doc/as.texinfo: Document -gdwarf-sections.
1410 * NEWS: Mention -gdwarf-sections.
1412 2013-04-26 Christian Groessler <chris@groessler.org>
1414 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1415 according to the target parameter. Don't call s_segm since s_segm
1416 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1418 (md_begin): Call s_segm according to target parameter from command
1421 2013-04-25 Alan Modra <amodra@gmail.com>
1423 * configure.in: Allow little-endian linux.
1424 * configure: Regenerate.
1426 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1428 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1429 "fstatus" control register to "eccinj".
1431 2013-04-19 Kai Tietz <ktietz@redhat.com>
1433 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1435 2013-04-15 Julian Brown <julian@codesourcery.com>
1437 * expr.c (add_to_result, subtract_from_result): Make global.
1438 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1439 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1440 subtract_from_result to handle extra bit of precision for .sleb128
1443 2013-04-10 Julian Brown <julian@codesourcery.com>
1445 * read.c (convert_to_bignum): Add sign parameter. Use it
1446 instead of X_unsigned to determine sign of resulting bignum.
1447 (emit_expr): Pass extra argument to convert_to_bignum.
1448 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1449 X_extrabit to convert_to_bignum.
1450 (parse_bitfield_cons): Set X_extrabit.
1451 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1452 Initialise X_extrabit field as appropriate.
1453 (add_to_result): New.
1454 (subtract_from_result): New.
1456 * expr.h (expressionS): Add X_extrabit field.
1458 2013-04-10 Jan Beulich <jbeulich@suse.com>
1460 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1461 register being PC when is_t or writeback, and use distinct
1462 diagnostic for the latter case.
1464 2013-04-10 Jan Beulich <jbeulich@suse.com>
1466 * gas/config/tc-arm.c (parse_operands): Re-write
1467 po_barrier_or_imm().
1468 (do_barrier): Remove bogus constraint().
1469 (do_t_barrier): Remove.
1471 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1473 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1474 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1476 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1478 2013-04-09 Jan Beulich <jbeulich@suse.com>
1480 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1481 Use local variable Rt in more places.
1482 (do_vmsr): Accept all control registers.
1484 2013-04-09 Jan Beulich <jbeulich@suse.com>
1486 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1487 if there was none specified for moves between scalar and core
1490 2013-04-09 Jan Beulich <jbeulich@suse.com>
1492 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1493 NEON_ALL_LANES case.
1495 2013-04-08 Jan Beulich <jbeulich@suse.com>
1497 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1500 2013-04-08 Jan Beulich <jbeulich@suse.com>
1502 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1505 2013-04-03 Alan Modra <amodra@gmail.com>
1507 * doc/as.texinfo: Add support to generate man options for h8300.
1508 * doc/c-h8300.texi: Likewise.
1510 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1512 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1515 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1518 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1520 2013-03-26 Nick Clifton <nickc@redhat.com>
1523 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1524 start of the file each time.
1527 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1530 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1532 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1535 2013-03-21 Will Newton <will.newton@linaro.org>
1537 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1538 pc-relative str instructions in Thumb mode.
1540 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1542 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1543 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1545 * config/tc-h8300.h: Remove duplicated defines.
1547 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1550 * tc-avr.c (mcu_has_3_byte_pc): New function.
1551 (tc_cfi_frame_initial_instructions): Call it to find return
1554 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1557 * config/tc-tic6x.c (tic6x_try_encode): Handle
1558 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1559 encode register pair numbers when required.
1561 2013-03-15 Will Newton <will.newton@linaro.org>
1563 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1564 in vstr in Thumb mode for pre-ARMv7 cores.
1566 2013-03-14 Andreas Schwab <schwab@suse.de>
1568 * doc/c-arc.texi (ARC Directives): Revert last change and use
1569 @itemize instead of @table.
1570 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1572 2013-03-14 Nick Clifton <nickc@redhat.com>
1575 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1576 NULL message, instead just check ARM_CPU_IS_ANY directly.
1578 2013-03-14 Nick Clifton <nickc@redhat.com>
1581 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1583 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1584 to the @item directives.
1585 (ARM-Neon-Alignment): Move to correct place in the document.
1586 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1588 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1591 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1593 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1594 case. Add default BAD_CASE to switch.
1596 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1598 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1599 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1601 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1603 * config/tc-arm.c (crc_ext_armv8): New feature set.
1604 (UNPRED_REG): New macro.
1605 (do_crc32_1): New function.
1606 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1607 do_crc32ch, do_crc32cw): Likewise.
1609 (insns): Add entries for crc32 mnemonics.
1610 (arm_extensions): Add entry for crc.
1612 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1614 * write.h (struct fix): Add fx_dot_frag field.
1615 (dot_frag): Declare.
1616 * write.c (dot_frag): New variable.
1617 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1618 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1619 * expr.c (expr): Save value of frag_now in dot_frag when setting
1621 * read.c (emit_expr): Likewise. Delete comments.
1623 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1625 * config/tc-i386.c (flag_code_names): Removed.
1626 (i386_index_check): Rewrote.
1628 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1630 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1632 (aarch64_double_precision_fmovable): New function.
1633 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1634 function; handle hexadecimal representation of IEEE754 encoding.
1635 (parse_operands): Update the call to parse_aarch64_imm_float.
1637 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1639 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1640 (check_hle): Updated.
1641 (md_assemble): Likewise.
1642 (parse_insn): Likewise.
1644 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1646 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1647 (md_assemble): Check if REP prefix is OK.
1648 (parse_insn): Remove expecting_string_instruction. Set
1651 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1653 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1655 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1657 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1658 for system registers.
1660 2013-02-27 DJ Delorie <dj@redhat.com>
1662 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1663 (rl78_op): Handle %code().
1664 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1665 (tc_gen_reloc): Likwise; convert to a computed reloc.
1666 (md_apply_fix): Likewise.
1668 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1670 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1672 2013-02-25 Terry Guo <terry.guo@arm.com>
1674 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1675 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1676 list of accepted CPUs.
1678 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1681 * config/tc-i386.c (cpu_arch): Add ".smap".
1683 * doc/c-i386.texi: Document smap.
1685 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1687 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1688 mips_assembling_insn appropriately.
1689 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1691 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1693 * config/tc-mips.c (append_insn): Correct indentation, remove
1696 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1698 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1700 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1702 * configure.tgt: Add nios2-*-rtems*.
1704 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1706 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1709 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1711 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1712 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1714 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1716 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1719 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1720 Andrew Jenner <andrew@codesourcery.com>
1722 Based on patches from Altera Corporation.
1724 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1725 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1726 * Makefile.in: Regenerated.
1727 * configure.tgt: Add case for nios2*-linux*.
1728 * config/obj-elf.c: Conditionally include elf/nios2.h.
1729 * config/tc-nios2.c: New file.
1730 * config/tc-nios2.h: New file.
1731 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1732 * doc/Makefile.in: Regenerated.
1733 * doc/all.texi: Set NIOSII.
1734 * doc/as.texinfo (Overview): Add Nios II options.
1735 (Machine Dependencies): Include c-nios2.texi.
1736 * doc/c-nios2.texi: New file.
1737 * NEWS: Note Altera Nios II support.
1739 2013-02-06 Alan Modra <amodra@gmail.com>
1742 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1743 Don't skip fixups with fx_subsy non-NULL.
1744 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1745 with fx_subsy non-NULL.
1747 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1749 * doc/c-metag.texi: Add "@c man" markers.
1751 2013-02-04 Alan Modra <amodra@gmail.com>
1753 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1755 (TC_ADJUST_RELOC_COUNT): Delete.
1756 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1758 2013-02-04 Alan Modra <amodra@gmail.com>
1760 * po/POTFILES.in: Regenerate.
1762 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1764 * config/tc-metag.c: Make SWAP instruction less permissive with
1767 2013-01-29 DJ Delorie <dj@redhat.com>
1769 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1770 relocs in .word/.etc statements.
1772 2013-01-29 Roland McGrath <mcgrathr@google.com>
1774 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1775 immediate value for 8-bit offset" error so it shows line info.
1777 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1779 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1782 2013-01-24 Nick Clifton <nickc@redhat.com>
1784 * config/tc-v850.c: Add support for e3v5 architecture.
1785 * doc/c-v850.texi: Mention new support.
1787 2013-01-23 Nick Clifton <nickc@redhat.com>
1790 * config/tc-avr.c: Include dwarf2dbg.h.
1792 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1794 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1795 (tc_i386_fix_adjustable): Likewise.
1796 (lex_got): Likewise.
1797 (tc_gen_reloc): Likewise.
1799 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1801 * config/tc-aarch64.c (output_operand_error_record): Change to output
1802 the out-of-range error message as value-expected message if there is
1803 only one single value in the expected range.
1804 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1805 LSL #0 as a programmer-friendly feature.
1807 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1809 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1810 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1811 BFD_RELOC_64_SIZE relocations.
1812 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1814 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1815 relocations against local symbols.
1817 2013-01-16 Alan Modra <amodra@gmail.com>
1819 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1820 finding some sort of toc syntax error, and break to avoid
1821 compiler uninit warning.
1823 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1826 * config/tc-i386.c (lex_got): Increment length by 1 if the
1827 relocation token is removed.
1829 2013-01-15 Nick Clifton <nickc@redhat.com>
1831 * config/tc-v850.c (md_assemble): Allow signed values for
1834 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1836 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1839 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1841 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1842 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1843 * config/tc-ppc.c (md_show_usage): Likewise.
1844 (ppc_handle_align): Handle power8's group ending nop.
1846 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1848 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1849 that the assember exits after the opcodes have been printed.
1851 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1853 * app.c: Remove trailing white spaces.
1857 * dw2gencfi.c: Likewise.
1858 * dwarf2dbg.h: Likewise.
1859 * ecoff.c: Likewise.
1860 * input-file.c: Likewise.
1861 * itbl-lex.h: Likewise.
1862 * output-file.c: Likewise.
1865 * subsegs.c: Likewise.
1866 * symbols.c: Likewise.
1867 * write.c: Likewise.
1868 * config/tc-i386.c: Likewise.
1869 * doc/Makefile.am: Likewise.
1870 * doc/Makefile.in: Likewise.
1871 * doc/c-aarch64.texi: Likewise.
1872 * doc/c-alpha.texi: Likewise.
1873 * doc/c-arc.texi: Likewise.
1874 * doc/c-arm.texi: Likewise.
1875 * doc/c-avr.texi: Likewise.
1876 * doc/c-bfin.texi: Likewise.
1877 * doc/c-cr16.texi: Likewise.
1878 * doc/c-d10v.texi: Likewise.
1879 * doc/c-d30v.texi: Likewise.
1880 * doc/c-h8300.texi: Likewise.
1881 * doc/c-hppa.texi: Likewise.
1882 * doc/c-i370.texi: Likewise.
1883 * doc/c-i386.texi: Likewise.
1884 * doc/c-i860.texi: Likewise.
1885 * doc/c-m32c.texi: Likewise.
1886 * doc/c-m32r.texi: Likewise.
1887 * doc/c-m68hc11.texi: Likewise.
1888 * doc/c-m68k.texi: Likewise.
1889 * doc/c-microblaze.texi: Likewise.
1890 * doc/c-mips.texi: Likewise.
1891 * doc/c-msp430.texi: Likewise.
1892 * doc/c-mt.texi: Likewise.
1893 * doc/c-s390.texi: Likewise.
1894 * doc/c-score.texi: Likewise.
1895 * doc/c-sh.texi: Likewise.
1896 * doc/c-sh64.texi: Likewise.
1897 * doc/c-tic54x.texi: Likewise.
1898 * doc/c-tic6x.texi: Likewise.
1899 * doc/c-v850.texi: Likewise.
1900 * doc/c-xc16x.texi: Likewise.
1901 * doc/c-xgate.texi: Likewise.
1902 * doc/c-xtensa.texi: Likewise.
1903 * doc/c-z80.texi: Likewise.
1904 * doc/internals.texi: Likewise.
1906 2013-01-10 Roland McGrath <mcgrathr@google.com>
1908 * hash.c (hash_new_sized): Make it global.
1909 * hash.h: Declare it.
1910 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1913 2013-01-10 Will Newton <will.newton@imgtec.com>
1915 * Makefile.am: Add Meta.
1916 * Makefile.in: Regenerate.
1917 * config/tc-metag.c: New file.
1918 * config/tc-metag.h: New file.
1919 * configure.tgt: Add Meta.
1920 * doc/Makefile.am: Add Meta.
1921 * doc/Makefile.in: Regenerate.
1922 * doc/all.texi: Add Meta.
1923 * doc/as.texiinfo: Document Meta options.
1924 * doc/c-metag.texi: New file.
1926 2013-01-09 Steve Ellcey <sellcey@mips.com>
1928 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1930 * config/tc-mips.c (internalError): Remove, replace with abort.
1932 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1934 * config/tc-aarch64.c (parse_operands): Change to compare the result
1935 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1937 2013-01-07 Nick Clifton <nickc@redhat.com>
1940 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1941 anticipated character.
1942 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1943 here as it is no longer needed.
1945 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1947 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1948 * doc/c-score.texi (SCORE-Opts): Likewise.
1949 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1951 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1953 * config/tc-mips.c: Add support for MIPS r5900.
1954 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1956 (can_swap_branch_p, get_append_method): Detect some conditional
1957 short loops to fix a bug on the r5900 by NOP in the branch delay
1959 (M_MUL): Support 3 operands in multu on r5900.
1960 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1961 (s_mipsset): Force 32 bit floating point on r5900.
1962 (mips_ip): Check parameter range of instructions mfps and mtps on
1964 * configure.in: Detect CPU type when target string contains r5900
1965 (e.g. mips64r5900el-linux-gnu).
1967 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1969 * as.c (parse_args): Update copyright year to 2013.
1971 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1973 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1976 2013-01-02 Nick Clifton <nickc@redhat.com>
1979 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1982 For older changes see ChangeLog-2012
1984 Copyright (C) 2013 Free Software Foundation, Inc.
1986 Copying and distribution of this file, with or without modification,
1987 are permitted in any medium without royalty provided the copyright
1988 notice and this notice are preserved.
1994 version-control: never