daeace07472ab0736f50c886919ee38f37532055
[binutils-gdb.git] / gas / ChangeLog
1 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips_insn_error_format): New enum.
4 (mips_insn_error): New struct.
5 (insn_error): Change to a mips_insn_error.
6 (clear_insn_error, set_insn_error_format, set_insn_error)
7 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
8 functions.
9 (mips_parse_argument_token, md_assemble, match_insn)
10 (match_mips16_insn): Use them instead of manipulating insn_error
11 directly.
12 (mips_ip, mips16_ip): Likewise. Simplify control flow.
13
14 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
15
16 * config/tc-mips.c (normalize_constant_expr): Move further up file.
17 (normalize_address_expr): Likewise.
18 (match_insn, match_mips16_insn): New functions, split out from...
19 (mips_ip, mips16_ip): ...here.
20
21 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
22
23 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
24 OP_OPTIONAL_REG.
25 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
26 for optional operands.
27
28 2013-08-16 Alan Modra <amodra@gmail.com>
29
30 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
31 modifiers generally.
32
33 2013-08-16 Alan Modra <amodra@gmail.com>
34
35 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
36
37 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
38
39 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
40 argument as alignment.
41
42 2013-08-09 Nick Clifton <nickc@redhat.com>
43
44 * config/tc-rl78.c (elf_flags): New variable.
45 (enum options): Add OPTION_G10.
46 (md_longopts): Add mg10.
47 (md_parse_option): Parse -mg10.
48 (rl78_elf_final_processing): New function.
49 * config/tc-rl78.c (tc_final_processing): Define.
50 * doc/c-rl78.texi: Document -mg10 option.
51
52 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
53
54 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
55 suffixes to be elided too.
56 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
57 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
58 to be omitted too.
59
60 2013-08-05 John Tytgat <john@bass-software.com>
61
62 * po/POTFILES.in: Regenerate.
63
64 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
65 Konrad Eisele <konrad@gaisler.com>
66
67 * config/tc-sparc.c (sparc_arch_types): Add leon.
68 (sparc_arch): Move sparc4 around and add leon.
69 (sparc_target_format): Document -Aleon.
70 * doc/c-sparc.texi: Likewise.
71
72 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
73
74 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
75
76 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
77 Richard Sandiford <rdsandiford@googlemail.com>
78
79 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
80 (RWARN): Bump to 0x8000000.
81 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
82 (RTYPE_R5900_ACC): New register types.
83 (RTYPE_MASK): Include them.
84 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
85 macros.
86 (reg_names): Include them.
87 (mips_parse_register_1): New function, split out from...
88 (mips_parse_register): ...here. Add a channels_ptr parameter.
89 Look for VU0 channel suffixes when nonnull.
90 (reg_lookup): Update the call to mips_parse_register.
91 (mips_parse_vu0_channels): New function.
92 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
93 (mips_operand_token): Add a "channels" field to the union.
94 Extend the comment above "ch" to OT_DOUBLE_CHAR.
95 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
96 (mips_parse_argument_token): Handle channel suffixes here too.
97 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
98 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
99 Handle '#' formats.
100 (md_begin): Register $vfN and $vfI registers.
101 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
102 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
103 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
104 (match_vu0_suffix_operand): New function.
105 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
106 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
107 (mips_lookup_insn): New function.
108 (mips_ip): Use it. Allow "+K" operands to be elided at the end
109 of an instruction. Handle '#' sequences.
110
111 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
112
113 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
114 values and use it instead of sreg, treg, xreg, etc.
115
116 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
117
118 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
119 and mips_int_operand_max.
120 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
121 Delete.
122 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
123 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
124 instead of mips16_immed_operand.
125
126 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
127
128 * config/tc-mips.c (mips16_macro): Don't use move_register.
129 (mips16_ip): Allow macros to use 'p'.
130
131 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
132
133 * config/tc-mips.c (MAX_OPERANDS): New macro.
134 (mips_operand_array): New structure.
135 (mips_operands, mips16_operands, micromips_operands): New arrays.
136 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
137 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
138 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
139 (micromips_to_32_reg_q_map): Delete.
140 (insn_operands, insn_opno, insn_extract_operand): New functions.
141 (validate_mips_insn): Take a mips_operand_array as argument and
142 use it to build up a list of operands. Extend to handle INSN_MACRO
143 and MIPS16.
144 (validate_mips16_insn): New function.
145 (validate_micromips_insn): Take a mips_operand_array as argument.
146 Handle INSN_MACRO.
147 (md_begin): Initialize mips_operands, mips16_operands and
148 micromips_operands. Call validate_mips_insn and
149 validate_micromips_insn for macro instructions too.
150 Call validate_mips16_insn for MIPS16 instructions.
151 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
152 New functions.
153 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
154 them. Handle INSN_UDI.
155 (get_append_method): Use gpr_read_mask.
156
157 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
158
159 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
160 flags for MIPS16 and non-MIPS16 instructions.
161 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
162 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
163 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
164 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
165 and non-MIPS16 instructions. Fix formatting.
166
167 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
168
169 * config/tc-mips.c (reg_needs_delay): Move later in file.
170 Use gpr_write_mask.
171 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
172
173 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
174 Alexander Ivchenko <alexander.ivchenko@intel.com>
175 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
176 Sergey Lega <sergey.s.lega@intel.com>
177 Anna Tikhonova <anna.tikhonova@intel.com>
178 Ilya Tocar <ilya.tocar@intel.com>
179 Andrey Turetskiy <andrey.turetskiy@intel.com>
180 Ilya Verbin <ilya.verbin@intel.com>
181 Kirill Yukhin <kirill.yukhin@intel.com>
182 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
183
184 * config/tc-i386-intel.c (O_zmmword_ptr): New.
185 (i386_types): Add zmmword.
186 (i386_intel_simplify_register): Allow regzmm.
187 (i386_intel_simplify): Handle zmmwords.
188 (i386_intel_operand): Handle RC/SAE, vector operations and
189 zmmwords.
190 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
191 (struct RC_Operation): New.
192 (struct Mask_Operation): New.
193 (struct Broadcast_Operation): New.
194 (vex_prefix): Size of bytes increased to 4 to support EVEX
195 encoding.
196 (enum i386_error): Add new error codes: unsupported_broadcast,
197 broadcast_not_on_src_operand, broadcast_needed,
198 unsupported_masking, mask_not_on_destination, no_default_mask,
199 unsupported_rc_sae, rc_sae_operand_not_last_imm,
200 invalid_register_operand, try_vector_disp8.
201 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
202 rounding, broadcast, memshift.
203 (struct RC_name): New.
204 (RC_NamesTable): New.
205 (evexlig): New.
206 (evexwig): New.
207 (extra_symbol_chars): Add '{'.
208 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
209 (i386_operand_type): Add regzmm, regmask and vec_disp8.
210 (match_mem_size): Handle zmmwords.
211 (operand_type_match): Handle zmm-registers.
212 (mode_from_disp_size): Handle vec_disp8.
213 (fits_in_vec_disp8): New.
214 (md_begin): Handle {} properly.
215 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
216 (build_vex_prefix): Handle vrex.
217 (build_evex_prefix): New.
218 (process_immext): Adjust to properly handle EVEX.
219 (md_assemble): Add EVEX encoding support.
220 (swap_2_operands): Correctly handle operands with masking,
221 broadcasting or RC/SAE.
222 (check_VecOperands): Support EVEX features.
223 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
224 (match_template): Support regzmm and handle new error codes.
225 (process_suffix): Handle zmmwords and zmm-registers.
226 (check_byte_reg): Extend to zmm-registers.
227 (process_operands): Extend to zmm-registers.
228 (build_modrm_byte): Handle EVEX.
229 (output_insn): Adjust to properly handle EVEX case.
230 (disp_size): Handle vec_disp8.
231 (output_disp): Support compressed disp8*N evex feature.
232 (output_imm): Handle RC/SAE immediates properly.
233 (check_VecOperations): New.
234 (i386_immediate): Handle EVEX features.
235 (i386_index_check): Handle zmmwords and zmm-registers.
236 (RC_SAE_immediate): New.
237 (i386_att_operand): Handle EVEX features.
238 (parse_real_register): Add a check for ZMM/Mask registers.
239 (OPTION_MEVEXLIG): New.
240 (OPTION_MEVEXWIG): New.
241 (md_longopts): Add mevexlig and mevexwig.
242 (md_parse_option): Handle mevexlig and mevexwig options.
243 (md_show_usage): Add description for mevexlig and mevexwig.
244 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
245 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
246
247 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
248
249 * config/tc-i386.c (cpu_arch): Add .sha.
250 * doc/c-i386.texi: Document sha/.sha.
251
252 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
253 Kirill Yukhin <kirill.yukhin@intel.com>
254 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
255
256 * config/tc-i386.c (BND_PREFIX): New.
257 (struct _i386_insn): Add new field bnd_prefix.
258 (add_bnd_prefix): New.
259 (cpu_arch): Add MPX.
260 (i386_operand_type): Add regbnd.
261 (md_assemble): Handle BND prefixes.
262 (parse_insn): Likewise.
263 (output_branch): Likewise.
264 (output_jump): Likewise.
265 (build_modrm_byte): Handle regbnd.
266 (OPTION_MADD_BND_PREFIX): New.
267 (md_longopts): Add entry for 'madd-bnd-prefix'.
268 (md_parse_option): Handle madd-bnd-prefix option.
269 (md_show_usage): Add description for madd-bnd-prefix
270 option.
271 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
272
273 2013-07-24 Tristan Gingold <gingold@adacore.com>
274
275 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
276 xcoff targets.
277
278 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
279
280 * config/tc-s390.c (s390_machine): Don't force the .machine
281 argument to lower case.
282
283 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
284
285 * config/tc-arm.c (s_arm_arch_extension): Improve error message
286 for invalid extension.
287
288 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
289
290 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
291 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
292 (aarch64_abi): New variable.
293 (ilp32_p): Change to be a macro.
294 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
295 (struct aarch64_option_abi_value_table): New struct.
296 (aarch64_abis): New table.
297 (aarch64_parse_abi): New function.
298 (aarch64_long_opts): Add entry for -mabi=.
299 * doc/as.texinfo (Target AArch64 options): Document -mabi.
300 * doc/c-aarch64.texi: Likewise.
301
302 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
303
304 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
305 unsigned comparison.
306
307 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
308
309 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
310 RX610.
311 * config/rx-parse.y: (rx_check_float_support): Add function to
312 check floating point operation support for target RX100 and
313 RX200.
314 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
315 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
316 RX200, RX600, and RX610
317
318 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
319
320 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
321
322 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
323
324 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
325 * doc/c-avr.texi: Likewise.
326
327 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
328
329 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
330 error with older GCCs.
331 (mips16_macro_build): Dereference args.
332
333 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
334
335 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
336 New functions, split out from...
337 (reg_lookup): ...here. Remove itbl support.
338 (reglist_lookup): Delete.
339 (mips_operand_token_type): New enum.
340 (mips_operand_token): New structure.
341 (mips_operand_tokens): New variable.
342 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
343 (mips_parse_arguments): New functions.
344 (md_begin): Initialize mips_operand_tokens.
345 (mips_arg_info): Add a token field. Remove optional_reg field.
346 (match_char, match_expression): New functions.
347 (match_const_int): Use match_expression. Remove "s" argument
348 and return a boolean result. Remove O_register handling.
349 (match_regno, match_reg, match_reg_range): New functions.
350 (match_int_operand, match_mapped_int_operand, match_msb_operand)
351 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
352 (match_addiusp_operand, match_clo_clz_dest_operand)
353 (match_lwm_swm_list_operand, match_entry_exit_operand)
354 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
355 (match_tied_reg_operand): Remove "s" argument and return a boolean
356 result. Match tokens rather than text. Update calls to
357 match_const_int. Rely on match_regno to call check_regno.
358 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
359 "arg" argument. Return a boolean result.
360 (parse_float_constant): Replace with...
361 (match_float_constant): ...this new function.
362 (match_operand): Remove "s" argument and return a boolean result.
363 Update calls to subfunctions.
364 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
365 rather than string-parsing routines. Update handling of optional
366 registers for token scheme.
367
368 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
369
370 * config/tc-mips.c (parse_float_constant): Split out from...
371 (mips_ip): ...here.
372
373 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
374
375 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
376 Delete.
377
378 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
379
380 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
381 (match_entry_exit_operand): New function.
382 (match_save_restore_list_operand): Likewise.
383 (match_operand): Use them.
384 (check_absolute_expr): Delete.
385 (mips16_ip): Rewrite main parsing loop to use mips_operands.
386
387 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
388
389 * config/tc-mips.c: Enable functions commented out in previous patch.
390 (SKIP_SPACE_TABS): Move further up file.
391 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
392 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
393 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
394 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
395 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
396 (micromips_imm_b_map, micromips_imm_c_map): Delete.
397 (mips_lookup_reg_pair): Delete.
398 (macro): Use report_bad_range and report_bad_field.
399 (mips_immed, expr_const_in_range): Delete.
400 (mips_ip): Rewrite main parsing loop to use new functions.
401
402 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
403
404 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
405 Change return type to bfd_boolean.
406 (report_bad_range, report_bad_field): New functions.
407 (mips_arg_info): New structure.
408 (match_const_int, convert_reg_type, check_regno, match_int_operand)
409 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
410 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
411 (match_addiusp_operand, match_clo_clz_dest_operand)
412 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
413 (match_pc_operand, match_tied_reg_operand, match_operand)
414 (check_completed_insn): New functions, commented out for now.
415
416 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
417
418 * config/tc-mips.c (insn_insert_operand): New function.
419 (macro_build, mips16_macro_build): Put null character check
420 in the for loop and convert continues to breaks. Use operand
421 structures to handle constant operands.
422
423 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
424
425 * config/tc-mips.c (validate_mips_insn): Move further up file.
426 Add insn_bits and decode_operand arguments. Use the mips_operand
427 fields to work out which bits an operand occupies. Detect double
428 definitions.
429 (validate_micromips_insn): Move further up file. Call into
430 validate_mips_insn.
431
432 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
433
434 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
435
436 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
437
438 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
439 and "~".
440 (macro): Update accordingly.
441
442 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
443
444 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
445 (imm_reloc): Delete.
446 (md_assemble): Remove imm_reloc handling.
447 (mips_ip): Update commentary. Use offset_expr and offset_reloc
448 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
449 Use a temporary array rather than imm_reloc when parsing
450 constant expressions. Remove imm_reloc initialization.
451 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
452 for the relaxable field. Use a relax_char variable to track the
453 type of this field. Remove imm_reloc initialization.
454
455 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
456
457 * config/tc-mips.c (mips16_ip): Handle "I".
458
459 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
460
461 * config/tc-mips.c (mips_flag_nan2008): New variable.
462 (options): Add OPTION_NAN enum value.
463 (md_longopts): Handle it.
464 (md_parse_option): Likewise.
465 (s_nan): New function.
466 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
467 (md_show_usage): Add -mnan.
468
469 * doc/as.texinfo (Overview): Add -mnan.
470 * doc/c-mips.texi (MIPS Opts): Document -mnan.
471 (MIPS NaN Encodings): New node. Document .nan directive.
472 (MIPS-Dependent): List the new node.
473
474 2013-07-09 Tristan Gingold <gingold@adacore.com>
475
476 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
477
478 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
479
480 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
481 for 'A' and assume that the constant has been elided if the result
482 is an O_register.
483
484 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
485
486 * config/tc-mips.c (gprel16_reloc_p): New function.
487 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
488 BFD_RELOC_UNUSED.
489 (offset_high_part, small_offset_p): New functions.
490 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
491 register load and store macros, handle the 16-bit offset case first.
492 If a 16-bit offset is not suitable for the instruction we're
493 generating, load it into the temporary register using
494 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
495 M_L_DAB code once the address has been constructed. For double load
496 and store macros, again handle the 16-bit offset case first.
497 If the second register cannot be accessed from the same high
498 part as the first, load it into AT using ADDRESS_ADDI_INSN.
499 Fix the handling of LD in cases where the first register is the
500 same as the base. Also handle the case where the offset is
501 not 16 bits and the second register cannot be accessed from the
502 same high part as the first. For unaligned loads and stores,
503 fuse the offbits == 12 and old "ab" handling. Apply this handling
504 whenever the second offset needs a different high part from the first.
505 Construct the offset using ADDRESS_ADDI_INSN where possible,
506 for offbits == 16 as well as offbits == 12. Use offset_reloc
507 when constructing the individual loads and stores.
508 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
509 and offset_reloc before matching against a particular opcode.
510 Handle elided 'A' constants. Allow 'A' constants to use
511 relocation operators.
512
513 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
514
515 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
516 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
517 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
518
519 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
520
521 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
522 Require the msb to be <= 31 for "+s". Check that the size is <= 31
523 for both "+s" and "+S".
524
525 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
526
527 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
528 (mips_ip, mips16_ip): Handle "+i".
529
530 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
531
532 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
533 (micromips_to_32_reg_h_map): Rename to...
534 (micromips_to_32_reg_h_map1): ...this.
535 (micromips_to_32_reg_i_map): Rename to...
536 (micromips_to_32_reg_h_map2): ...this.
537 (mips_lookup_reg_pair): New function.
538 (gpr_write_mask, macro): Adjust after above renaming.
539 (validate_micromips_insn): Remove "mi" handling.
540 (mips_ip): Likewise. Parse both registers in a pair for "mh".
541
542 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
543
544 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
545 (mips_ip): Remove "+D" and "+T" handling.
546
547 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
548
549 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
550 relocs.
551
552 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
553
554 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
555
556 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
557
558 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
559 (aarch64_force_relocation): Likewise.
560
561 2013-07-02 Alan Modra <amodra@gmail.com>
562
563 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
564
565 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
566
567 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
568 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
569 Replace @sc{mips16} with literal `MIPS16'.
570 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
571
572 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
573
574 * config/tc-aarch64.c (reloc_table): Replace
575 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
576 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
577 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
578 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
579 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
580 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
581 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
582 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
583 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
584 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
585 (aarch64_force_relocation): Likewise.
586
587 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
588
589 * config/tc-aarch64.c (ilp32_p): New static variable.
590 (elf64_aarch64_target_format): Return the target according to the
591 value of 'ilp32_p'.
592 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
593 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
594 (aarch64_dwarf2_addr_size): New function.
595 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
596 (DWARF2_ADDR_SIZE): New define.
597
598 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
599
600 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
601
602 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
603
604 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
605
606 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
607
608 * config/tc-mips.c (mips_set_options): Add insn32 member.
609 (mips_opts): Initialize it.
610 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
611 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
612 (md_longopts): Add "minsn32" and "mno-insn32" options.
613 (is_size_valid): Handle insn32 mode.
614 (md_assemble): Pass instruction string down to macro.
615 (brk_fmt): Add second dimension and insn32 mode initializers.
616 (mfhl_fmt): Likewise.
617 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
618 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
619 (macro_build_jalr, move_register): Handle insn32 mode.
620 (macro_build_branch_rs): Likewise.
621 (macro): Handle insn32 mode.
622 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
623 (mips_ip): Handle insn32 mode.
624 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
625 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
626 (mips_handle_align): Handle insn32 mode.
627 (md_show_usage): Add -minsn32 and -mno-insn32.
628
629 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
630 -mno-insn32 options.
631 (-minsn32, -mno-insn32): New options.
632 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
633 options.
634 (MIPS assembly options): New node. Document .set insn32 and
635 .set noinsn32.
636 (MIPS-Dependent): List the new node.
637
638 2013-06-25 Nick Clifton <nickc@redhat.com>
639
640 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
641 the PC in indirect addressing on 430xv2 parts.
642 (msp430_operands): Add version test to hardware bug encoding
643 restrictions.
644
645 2013-06-24 Roland McGrath <mcgrathr@google.com>
646
647 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
648 so it skips whitespace before it.
649 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
650
651 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
652 (arm_reg_parse_multi): Skip whitespace first.
653 (parse_reg_list): Likewise.
654 (parse_vfp_reg_list): Likewise.
655 (s_arm_unwind_save_mmxwcg): Likewise.
656
657 2013-06-24 Nick Clifton <nickc@redhat.com>
658
659 PR gas/15623
660 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
661
662 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
663
664 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
665
666 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
667
668 * config/tc-mips.c: Assert that offsetT and valueT are at least
669 8 bytes in size.
670 (GPR_SMIN, GPR_SMAX): New macros.
671 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
672
673 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
674
675 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
676 conditions. Remove any code deselected by them.
677 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
678
679 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
680
681 * NEWS: Note removal of ECOFF support.
682 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
683 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
684 (MULTI_CFILES): Remove config/e-mipsecoff.c.
685 * Makefile.in: Regenerate.
686 * configure.in: Remove MIPS ECOFF references.
687 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
688 Delete cases.
689 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
690 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
691 (mips-*-*): ...this single case.
692 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
693 MIPS emulations to be e-mipself*.
694 * configure: Regenerate.
695 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
696 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
697 (mips-*-sysv*): Remove coff and ecoff cases.
698 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
699 * ecoff.c: Remove reference to MIPS ECOFF.
700 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
701 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
702 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
703 (mips_hi_fixup): Tweak comment.
704 (append_insn): Require a howto.
705 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
706
707 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
708
709 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
710 Use "CPU" instead of "cpu".
711 * doc/c-mips.texi: Likewise.
712 (MIPS Opts): Rename to MIPS Options.
713 (MIPS option stack): Rename to MIPS Option Stack.
714 (MIPS ASE instruction generation overrides): Rename to
715 MIPS ASE Instruction Generation Overrides (for now).
716 (MIPS floating-point): Rename to MIPS Floating-Point.
717
718 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
719
720 * doc/c-mips.texi (MIPS Macros): New section.
721 (MIPS Object): Replace with...
722 (MIPS Small Data): ...this new section.
723
724 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
725
726 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
727 Capitalize name. Use @kindex instead of @cindex for .set entries.
728
729 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
730
731 * doc/c-mips.texi (MIPS Stabs): Remove section.
732
733 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
734
735 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
736 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
737 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
738 (ISA_SUPPORTS_VIRT64_ASE): Delete.
739 (mips_ase): New structure.
740 (mips_ases): New table.
741 (FP64_ASES): New macro.
742 (mips_ase_groups): New array.
743 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
744 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
745 functions.
746 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
747 (md_parse_option): Use mips_ases and mips_set_ase instead of
748 separate case statements for each ASE option.
749 (mips_after_parse_args): Use FP64_ASES. Use
750 mips_check_isa_supports_ases to check the ASEs against
751 other options.
752 (s_mipsset): Use mips_ases and mips_set_ase instead of
753 separate if statements for each ASE option. Use
754 mips_check_isa_supports_ases, even when a non-ASE option
755 is specified.
756
757 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
758
759 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
760
761 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
762
763 * config/tc-mips.c (md_shortopts, options, md_longopts)
764 (md_longopts_size): Move earlier in file.
765
766 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
767
768 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
769 with a single "ase" bitmask.
770 (mips_opts): Update accordingly.
771 (file_ase, file_ase_explicit): New variables.
772 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
773 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
774 (ISA_HAS_ROR): Adjust for mips_set_options change.
775 (is_opcode_valid): Take the base ase mask directly from mips_opts.
776 (mips_ip): Adjust for mips_set_options change.
777 (md_parse_option): Likewise. Update file_ase_explicit.
778 (mips_after_parse_args): Adjust for mips_set_options change.
779 Use bitmask operations to select the default ASEs. Set file_ase
780 rather than individual per-ASE variables.
781 (s_mipsset): Adjust for mips_set_options change.
782 (mips_elf_final_processing): Test file_ase rather than
783 file_ase_mdmx. Remove commented-out code.
784
785 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
786
787 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
788 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
789 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
790 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
791 (mips_after_parse_args): Use the new "ase" field to choose
792 the default ASEs.
793 (mips_cpu_info_table): Move ASEs from the "flags" field to the
794 "ase" field.
795
796 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
797
798 * config/tc-arm.c (symbol_preemptible): New function.
799 (relax_branch): Use it.
800
801 2013-06-17 Catherine Moore <clm@codesourcery.com>
802 Maciej W. Rozycki <macro@codesourcery.com>
803 Chao-Ying Fu <fu@mips.com>
804
805 * config/tc-mips.c (mips_set_options): Add ase_eva.
806 (mips_set_options mips_opts): Add ase_eva.
807 (file_ase_eva): Declare.
808 (ISA_SUPPORTS_EVA_ASE): Define.
809 (IS_SEXT_9BIT_NUM): Define.
810 (MIPS_CPU_ASE_EVA): Define.
811 (is_opcode_valid): Add support for ase_eva.
812 (macro_build): Likewise.
813 (macro): Likewise.
814 (validate_mips_insn): Likewise.
815 (validate_micromips_insn): Likewise.
816 (mips_ip): Likewise.
817 (options): Add OPTION_EVA and OPTION_NO_EVA.
818 (md_longopts): Add -meva and -mno-eva.
819 (md_parse_option): Process new options.
820 (mips_after_parse_args): Check for valid EVA combinations.
821 (s_mipsset): Likewise.
822
823 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
824
825 * dwarf2dbg.h (dwarf2_move_insn): Declare.
826 * dwarf2dbg.c (line_subseg): Add pmove_tail.
827 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
828 (dwarf2_gen_line_info_1): Update call accordingly.
829 (dwarf2_move_insn): New function.
830 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
831
832 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
833
834 Revert:
835
836 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
837
838 PR gas/13024
839 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
840 (dwarf2_gen_line_info_1): Delete.
841 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
842 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
843 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
844 (dwarf2_directive_loc): Push previous .locs instead of generating
845 them immediately.
846
847 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
848
849 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
850 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
851
852 2013-06-13 Nick Clifton <nickc@redhat.com>
853
854 PR gas/15602
855 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
856 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
857 function. Generates an error if the adjusted offset is out of a
858 16-bit range.
859
860 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
861
862 * config/tc-nios2.c (md_apply_fix): Mask constant
863 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
864
865 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
866
867 * config/tc-mips.c (append_insn): Don't do branch relaxation for
868 MIPS-3D instructions either.
869 (md_convert_frag): Update the COPx branch mask accordingly.
870
871 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
872 option.
873 * doc/as.texinfo (Overview): Add --relax-branch and
874 --no-relax-branch.
875 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
876 --no-relax-branch.
877
878 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
879
880 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
881 omitted.
882
883 2013-06-08 Catherine Moore <clm@codesourcery.com>
884
885 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
886 (is_opcode_valid_16): Pass ase value to opcode_is_member.
887 (append_insn): Change INSN_xxxx to ASE_xxxx.
888
889 2013-06-01 George Thomas <george.thomas@atmel.com>
890
891 * gas/config/tc-avr.c: Change ISA for devices with USB support to
892 AVR_ISA_XMEGAU
893
894 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
895
896 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
897 for ELF.
898
899 2013-05-31 Paul Brook <paul@codesourcery.com>
900
901 * config/tc-mips.c (s_ehword): New.
902
903 2013-05-30 Paul Brook <paul@codesourcery.com>
904
905 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
906
907 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
908
909 * write.c (resolve_reloc_expr_symbols): On REL targets don't
910 convert relocs who have no relocatable field either. Rephrase
911 the conditional so that the PC-relative check is only applied
912 for REL targets.
913
914 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
915
916 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
917 calculation.
918
919 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
920
921 * config/tc-aarch64.c (reloc_table): Update to use
922 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
923 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
924 (md_apply_fix): Likewise.
925 (aarch64_force_relocation): Likewise.
926
927 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
928
929 * config/tc-arm.c (it_fsm_post_encode): Improve
930 warning messages about deprecated IT block formats.
931
932 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
933
934 * config/tc-aarch64.c (md_apply_fix): Move value range checking
935 inside fx_done condition.
936
937 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
938
939 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
940
941 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
942
943 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
944 and clean up warning when using PRINT_OPCODE_TABLE.
945
946 2013-05-20 Alan Modra <amodra@gmail.com>
947
948 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
949 and data fixups performing shift/high adjust/sign extension on
950 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
951 when writing data fixups rather than recalculating size.
952
953 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
954
955 * doc/c-msp430.texi: Fix typo.
956
957 2013-05-16 Tristan Gingold <gingold@adacore.com>
958
959 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
960 are also TOC symbols.
961
962 2013-05-16 Nick Clifton <nickc@redhat.com>
963
964 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
965 Add -mcpu command to specify core type.
966 * doc/c-msp430.texi: Update documentation.
967
968 2013-05-09 Andrew Pinski <apinski@cavium.com>
969
970 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
971 (mips_opts): Update for the new field.
972 (file_ase_virt): New variable.
973 (ISA_SUPPORTS_VIRT_ASE): New macro.
974 (ISA_SUPPORTS_VIRT64_ASE): New macro.
975 (MIPS_CPU_ASE_VIRT): New define.
976 (is_opcode_valid): Handle ase_virt.
977 (macro_build): Handle "+J".
978 (validate_mips_insn): Likewise.
979 (mips_ip): Likewise.
980 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
981 (md_longopts): Add mvirt and mnovirt
982 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
983 (mips_after_parse_args): Handle ase_virt field.
984 (s_mipsset): Handle "virt" and "novirt".
985 (mips_elf_final_processing): Add a comment about virt ASE might need
986 a new flag.
987 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
988 * doc/c-mips.texi: Document -mvirt and -mno-virt.
989 Document ".set virt" and ".set novirt".
990
991 2013-05-09 Alan Modra <amodra@gmail.com>
992
993 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
994 control of operand flag bits.
995
996 2013-05-07 Alan Modra <amodra@gmail.com>
997
998 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
999 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1000 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1001 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1002 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1003 Shift and sign-extend fieldval for use by some VLE reloc
1004 operand->insert functions.
1005
1006 2013-05-06 Paul Brook <paul@codesourcery.com>
1007 Catherine Moore <clm@codesourcery.com>
1008
1009 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1010 (limited_pcrel_reloc_p): Likewise.
1011 (md_apply_fix): Likewise.
1012 (tc_gen_reloc): Likewise.
1013
1014 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1015
1016 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1017 (mips_fix_adjustable): Adjust pc-relative check to use
1018 limited_pc_reloc_p.
1019
1020 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1021
1022 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1023 (s_mips_stab): Do not restrict to stabn only.
1024
1025 2013-05-02 Nick Clifton <nickc@redhat.com>
1026
1027 * config/tc-msp430.c: Add support for the MSP430X architecture.
1028 Add code to insert a NOP instruction after any instruction that
1029 might change the interrupt state.
1030 Add support for the LARGE memory model.
1031 Add code to initialise the .MSP430.attributes section.
1032 * config/tc-msp430.h: Add support for the MSP430X architecture.
1033 * doc/c-msp430.texi: Document the new -mL and -mN command line
1034 options.
1035 * NEWS: Mention support for the MSP430X architecture.
1036
1037 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1038
1039 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1040 alpha*-*-linux*ecoff*.
1041
1042 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1043
1044 * config/tc-mips.c (mips_ip): Add sizelo.
1045 For "+C", "+G", and "+H", set sizelo and compare against it.
1046
1047 2013-04-29 Nick Clifton <nickc@redhat.com>
1048
1049 * as.c (Options): Add -gdwarf-sections.
1050 (parse_args): Likewise.
1051 * as.h (flag_dwarf_sections): Declare.
1052 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1053 (process_entries): When -gdwarf-sections is enabled generate
1054 fragmentary .debug_line sections.
1055 (out_debug_line): Set the section for the .debug_line section end
1056 symbol.
1057 * doc/as.texinfo: Document -gdwarf-sections.
1058 * NEWS: Mention -gdwarf-sections.
1059
1060 2013-04-26 Christian Groessler <chris@groessler.org>
1061
1062 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1063 according to the target parameter. Don't call s_segm since s_segm
1064 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1065 initialized yet.
1066 (md_begin): Call s_segm according to target parameter from command
1067 line.
1068
1069 2013-04-25 Alan Modra <amodra@gmail.com>
1070
1071 * configure.in: Allow little-endian linux.
1072 * configure: Regenerate.
1073
1074 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1075
1076 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1077 "fstatus" control register to "eccinj".
1078
1079 2013-04-19 Kai Tietz <ktietz@redhat.com>
1080
1081 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1082
1083 2013-04-15 Julian Brown <julian@codesourcery.com>
1084
1085 * expr.c (add_to_result, subtract_from_result): Make global.
1086 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1087 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1088 subtract_from_result to handle extra bit of precision for .sleb128
1089 directive operands.
1090
1091 2013-04-10 Julian Brown <julian@codesourcery.com>
1092
1093 * read.c (convert_to_bignum): Add sign parameter. Use it
1094 instead of X_unsigned to determine sign of resulting bignum.
1095 (emit_expr): Pass extra argument to convert_to_bignum.
1096 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1097 X_extrabit to convert_to_bignum.
1098 (parse_bitfield_cons): Set X_extrabit.
1099 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1100 Initialise X_extrabit field as appropriate.
1101 (add_to_result): New.
1102 (subtract_from_result): New.
1103 (expr): Use above.
1104 * expr.h (expressionS): Add X_extrabit field.
1105
1106 2013-04-10 Jan Beulich <jbeulich@suse.com>
1107
1108 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1109 register being PC when is_t or writeback, and use distinct
1110 diagnostic for the latter case.
1111
1112 2013-04-10 Jan Beulich <jbeulich@suse.com>
1113
1114 * gas/config/tc-arm.c (parse_operands): Re-write
1115 po_barrier_or_imm().
1116 (do_barrier): Remove bogus constraint().
1117 (do_t_barrier): Remove.
1118
1119 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1120
1121 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1122 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1123 ATmega2564RFR2
1124 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1125
1126 2013-04-09 Jan Beulich <jbeulich@suse.com>
1127
1128 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1129 Use local variable Rt in more places.
1130 (do_vmsr): Accept all control registers.
1131
1132 2013-04-09 Jan Beulich <jbeulich@suse.com>
1133
1134 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1135 if there was none specified for moves between scalar and core
1136 register.
1137
1138 2013-04-09 Jan Beulich <jbeulich@suse.com>
1139
1140 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1141 NEON_ALL_LANES case.
1142
1143 2013-04-08 Jan Beulich <jbeulich@suse.com>
1144
1145 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1146 PC-relative VSTR.
1147
1148 2013-04-08 Jan Beulich <jbeulich@suse.com>
1149
1150 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1151 entry to sp_fiq.
1152
1153 2013-04-03 Alan Modra <amodra@gmail.com>
1154
1155 * doc/as.texinfo: Add support to generate man options for h8300.
1156 * doc/c-h8300.texi: Likewise.
1157
1158 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1159
1160 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1161 Cortex-A57.
1162
1163 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1164
1165 PR binutils/15068
1166 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1167
1168 2013-03-26 Nick Clifton <nickc@redhat.com>
1169
1170 PR gas/15295
1171 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1172 start of the file each time.
1173
1174 PR gas/15178
1175 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1176 FreeBSD targets.
1177
1178 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1179
1180 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1181 after fixup.
1182
1183 2013-03-21 Will Newton <will.newton@linaro.org>
1184
1185 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1186 pc-relative str instructions in Thumb mode.
1187
1188 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1189
1190 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1191 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1192 R_H8_DISP32A16.
1193 * config/tc-h8300.h: Remove duplicated defines.
1194
1195 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1196
1197 PR gas/15282
1198 * tc-avr.c (mcu_has_3_byte_pc): New function.
1199 (tc_cfi_frame_initial_instructions): Call it to find return
1200 address size.
1201
1202 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1203
1204 PR gas/15095
1205 * config/tc-tic6x.c (tic6x_try_encode): Handle
1206 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1207 encode register pair numbers when required.
1208
1209 2013-03-15 Will Newton <will.newton@linaro.org>
1210
1211 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1212 in vstr in Thumb mode for pre-ARMv7 cores.
1213
1214 2013-03-14 Andreas Schwab <schwab@suse.de>
1215
1216 * doc/c-arc.texi (ARC Directives): Revert last change and use
1217 @itemize instead of @table.
1218 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1219
1220 2013-03-14 Nick Clifton <nickc@redhat.com>
1221
1222 PR gas/15273
1223 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1224 NULL message, instead just check ARM_CPU_IS_ANY directly.
1225
1226 2013-03-14 Nick Clifton <nickc@redhat.com>
1227
1228 PR gas/15212
1229 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1230 for table format.
1231 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1232 to the @item directives.
1233 (ARM-Neon-Alignment): Move to correct place in the document.
1234 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1235 formatting.
1236 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1237 @smallexample.
1238
1239 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1240
1241 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1242 case. Add default BAD_CASE to switch.
1243
1244 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1245
1246 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1247 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1248
1249 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1250
1251 * config/tc-arm.c (crc_ext_armv8): New feature set.
1252 (UNPRED_REG): New macro.
1253 (do_crc32_1): New function.
1254 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1255 do_crc32ch, do_crc32cw): Likewise.
1256 (TUEc): New macro.
1257 (insns): Add entries for crc32 mnemonics.
1258 (arm_extensions): Add entry for crc.
1259
1260 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1261
1262 * write.h (struct fix): Add fx_dot_frag field.
1263 (dot_frag): Declare.
1264 * write.c (dot_frag): New variable.
1265 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1266 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1267 * expr.c (expr): Save value of frag_now in dot_frag when setting
1268 dot_value.
1269 * read.c (emit_expr): Likewise. Delete comments.
1270
1271 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1272
1273 * config/tc-i386.c (flag_code_names): Removed.
1274 (i386_index_check): Rewrote.
1275
1276 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1277
1278 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1279 add comment.
1280 (aarch64_double_precision_fmovable): New function.
1281 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1282 function; handle hexadecimal representation of IEEE754 encoding.
1283 (parse_operands): Update the call to parse_aarch64_imm_float.
1284
1285 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1286
1287 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1288 (check_hle): Updated.
1289 (md_assemble): Likewise.
1290 (parse_insn): Likewise.
1291
1292 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1293
1294 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1295 (md_assemble): Check if REP prefix is OK.
1296 (parse_insn): Remove expecting_string_instruction. Set
1297 i.rep_prefix.
1298
1299 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1300
1301 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1302
1303 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1304
1305 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1306 for system registers.
1307
1308 2013-02-27 DJ Delorie <dj@redhat.com>
1309
1310 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1311 (rl78_op): Handle %code().
1312 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1313 (tc_gen_reloc): Likwise; convert to a computed reloc.
1314 (md_apply_fix): Likewise.
1315
1316 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1317
1318 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1319
1320 2013-02-25 Terry Guo <terry.guo@arm.com>
1321
1322 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1323 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1324 list of accepted CPUs.
1325
1326 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1327
1328 PR gas/15159
1329 * config/tc-i386.c (cpu_arch): Add ".smap".
1330
1331 * doc/c-i386.texi: Document smap.
1332
1333 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1334
1335 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1336 mips_assembling_insn appropriately.
1337 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1338
1339 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1340
1341 * config/tc-mips.c (append_insn): Correct indentation, remove
1342 extraneous braces.
1343
1344 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1345
1346 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1347
1348 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1349
1350 * configure.tgt: Add nios2-*-rtems*.
1351
1352 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1353
1354 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1355 NULL.
1356
1357 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1358
1359 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1360 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1361
1362 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1363
1364 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1365 core.
1366
1367 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1368 Andrew Jenner <andrew@codesourcery.com>
1369
1370 Based on patches from Altera Corporation.
1371
1372 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1373 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1374 * Makefile.in: Regenerated.
1375 * configure.tgt: Add case for nios2*-linux*.
1376 * config/obj-elf.c: Conditionally include elf/nios2.h.
1377 * config/tc-nios2.c: New file.
1378 * config/tc-nios2.h: New file.
1379 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1380 * doc/Makefile.in: Regenerated.
1381 * doc/all.texi: Set NIOSII.
1382 * doc/as.texinfo (Overview): Add Nios II options.
1383 (Machine Dependencies): Include c-nios2.texi.
1384 * doc/c-nios2.texi: New file.
1385 * NEWS: Note Altera Nios II support.
1386
1387 2013-02-06 Alan Modra <amodra@gmail.com>
1388
1389 PR gas/14255
1390 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1391 Don't skip fixups with fx_subsy non-NULL.
1392 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1393 with fx_subsy non-NULL.
1394
1395 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1396
1397 * doc/c-metag.texi: Add "@c man" markers.
1398
1399 2013-02-04 Alan Modra <amodra@gmail.com>
1400
1401 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1402 related code.
1403 (TC_ADJUST_RELOC_COUNT): Delete.
1404 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1405
1406 2013-02-04 Alan Modra <amodra@gmail.com>
1407
1408 * po/POTFILES.in: Regenerate.
1409
1410 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1411
1412 * config/tc-metag.c: Make SWAP instruction less permissive with
1413 its operands.
1414
1415 2013-01-29 DJ Delorie <dj@redhat.com>
1416
1417 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1418 relocs in .word/.etc statements.
1419
1420 2013-01-29 Roland McGrath <mcgrathr@google.com>
1421
1422 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1423 immediate value for 8-bit offset" error so it shows line info.
1424
1425 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1426
1427 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1428 for 64-bit output.
1429
1430 2013-01-24 Nick Clifton <nickc@redhat.com>
1431
1432 * config/tc-v850.c: Add support for e3v5 architecture.
1433 * doc/c-v850.texi: Mention new support.
1434
1435 2013-01-23 Nick Clifton <nickc@redhat.com>
1436
1437 PR gas/15039
1438 * config/tc-avr.c: Include dwarf2dbg.h.
1439
1440 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1441
1442 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1443 (tc_i386_fix_adjustable): Likewise.
1444 (lex_got): Likewise.
1445 (tc_gen_reloc): Likewise.
1446
1447 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1448
1449 * config/tc-aarch64.c (output_operand_error_record): Change to output
1450 the out-of-range error message as value-expected message if there is
1451 only one single value in the expected range.
1452 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1453 LSL #0 as a programmer-friendly feature.
1454
1455 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1456
1457 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1458 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1459 BFD_RELOC_64_SIZE relocations.
1460 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1461 for it.
1462 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1463 relocations against local symbols.
1464
1465 2013-01-16 Alan Modra <amodra@gmail.com>
1466
1467 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1468 finding some sort of toc syntax error, and break to avoid
1469 compiler uninit warning.
1470
1471 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1472
1473 PR gas/15019
1474 * config/tc-i386.c (lex_got): Increment length by 1 if the
1475 relocation token is removed.
1476
1477 2013-01-15 Nick Clifton <nickc@redhat.com>
1478
1479 * config/tc-v850.c (md_assemble): Allow signed values for
1480 V850E_IMMEDIATE.
1481
1482 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1483
1484 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1485 git to cvs.
1486
1487 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1488
1489 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1490 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1491 * config/tc-ppc.c (md_show_usage): Likewise.
1492 (ppc_handle_align): Handle power8's group ending nop.
1493
1494 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1495
1496 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1497 that the assember exits after the opcodes have been printed.
1498
1499 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1500
1501 * app.c: Remove trailing white spaces.
1502 * as.c: Likewise.
1503 * as.h: Likewise.
1504 * cond.c: Likewise.
1505 * dw2gencfi.c: Likewise.
1506 * dwarf2dbg.h: Likewise.
1507 * ecoff.c: Likewise.
1508 * input-file.c: Likewise.
1509 * itbl-lex.h: Likewise.
1510 * output-file.c: Likewise.
1511 * read.c: Likewise.
1512 * sb.c: Likewise.
1513 * subsegs.c: Likewise.
1514 * symbols.c: Likewise.
1515 * write.c: Likewise.
1516 * config/tc-i386.c: Likewise.
1517 * doc/Makefile.am: Likewise.
1518 * doc/Makefile.in: Likewise.
1519 * doc/c-aarch64.texi: Likewise.
1520 * doc/c-alpha.texi: Likewise.
1521 * doc/c-arc.texi: Likewise.
1522 * doc/c-arm.texi: Likewise.
1523 * doc/c-avr.texi: Likewise.
1524 * doc/c-bfin.texi: Likewise.
1525 * doc/c-cr16.texi: Likewise.
1526 * doc/c-d10v.texi: Likewise.
1527 * doc/c-d30v.texi: Likewise.
1528 * doc/c-h8300.texi: Likewise.
1529 * doc/c-hppa.texi: Likewise.
1530 * doc/c-i370.texi: Likewise.
1531 * doc/c-i386.texi: Likewise.
1532 * doc/c-i860.texi: Likewise.
1533 * doc/c-m32c.texi: Likewise.
1534 * doc/c-m32r.texi: Likewise.
1535 * doc/c-m68hc11.texi: Likewise.
1536 * doc/c-m68k.texi: Likewise.
1537 * doc/c-microblaze.texi: Likewise.
1538 * doc/c-mips.texi: Likewise.
1539 * doc/c-msp430.texi: Likewise.
1540 * doc/c-mt.texi: Likewise.
1541 * doc/c-s390.texi: Likewise.
1542 * doc/c-score.texi: Likewise.
1543 * doc/c-sh.texi: Likewise.
1544 * doc/c-sh64.texi: Likewise.
1545 * doc/c-tic54x.texi: Likewise.
1546 * doc/c-tic6x.texi: Likewise.
1547 * doc/c-v850.texi: Likewise.
1548 * doc/c-xc16x.texi: Likewise.
1549 * doc/c-xgate.texi: Likewise.
1550 * doc/c-xtensa.texi: Likewise.
1551 * doc/c-z80.texi: Likewise.
1552 * doc/internals.texi: Likewise.
1553
1554 2013-01-10 Roland McGrath <mcgrathr@google.com>
1555
1556 * hash.c (hash_new_sized): Make it global.
1557 * hash.h: Declare it.
1558 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1559 pass a small size.
1560
1561 2013-01-10 Will Newton <will.newton@imgtec.com>
1562
1563 * Makefile.am: Add Meta.
1564 * Makefile.in: Regenerate.
1565 * config/tc-metag.c: New file.
1566 * config/tc-metag.h: New file.
1567 * configure.tgt: Add Meta.
1568 * doc/Makefile.am: Add Meta.
1569 * doc/Makefile.in: Regenerate.
1570 * doc/all.texi: Add Meta.
1571 * doc/as.texiinfo: Document Meta options.
1572 * doc/c-metag.texi: New file.
1573
1574 2013-01-09 Steve Ellcey <sellcey@mips.com>
1575
1576 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1577 calls.
1578 * config/tc-mips.c (internalError): Remove, replace with abort.
1579
1580 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1581
1582 * config/tc-aarch64.c (parse_operands): Change to compare the result
1583 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1584
1585 2013-01-07 Nick Clifton <nickc@redhat.com>
1586
1587 PR gas/14887
1588 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1589 anticipated character.
1590 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1591 here as it is no longer needed.
1592
1593 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1594
1595 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1596 * doc/c-score.texi (SCORE-Opts): Likewise.
1597 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1598
1599 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1600
1601 * config/tc-mips.c: Add support for MIPS r5900.
1602 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1603 lq and sq.
1604 (can_swap_branch_p, get_append_method): Detect some conditional
1605 short loops to fix a bug on the r5900 by NOP in the branch delay
1606 slot.
1607 (M_MUL): Support 3 operands in multu on r5900.
1608 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1609 (s_mipsset): Force 32 bit floating point on r5900.
1610 (mips_ip): Check parameter range of instructions mfps and mtps on
1611 r5900.
1612 * configure.in: Detect CPU type when target string contains r5900
1613 (e.g. mips64r5900el-linux-gnu).
1614
1615 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1616
1617 * as.c (parse_args): Update copyright year to 2013.
1618
1619 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1620
1621 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1622 and "cortex57".
1623
1624 2013-01-02 Nick Clifton <nickc@redhat.com>
1625
1626 PR gas/14987
1627 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1628 closing bracket.
1629
1630 For older changes see ChangeLog-2012
1631 \f
1632 Copyright (C) 2013 Free Software Foundation, Inc.
1633
1634 Copying and distribution of this file, with or without modification,
1635 are permitted in any medium without royalty provided the copyright
1636 notice and this notice are preserved.
1637
1638 Local Variables:
1639 mode: change-log
1640 left-margin: 8
1641 fill-column: 74
1642 version-control: never
1643 End: