1 2006-10-08 Paul Brook <paul@codesourcery.com>
3 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
4 (parse_operands): Use parse_big_immediate for OP_NILO.
5 (neon_cmode_for_logic_imm): Try smaller element sizes.
6 (neon_cmode_for_move_imm): Ditto.
7 (do_neon_logic): Handle .i64 pseudo-op.
9 2006-09-29 Alan Modra <amodra@bigpond.net.au>
11 * po/POTFILES.in: Regenerate.
13 2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
15 * config/tc-i386.h (CpuMNI): Renamed to ...
17 (CpuUnknownFlags): Updated.
18 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
19 and PROCESSOR_MEROM with PROCESSOR_CORE2.
20 * config/tc-i386.c: Updated.
21 * doc/c-i386.texi: Likewise.
23 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
25 2006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
27 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
29 2006-09-27 Nick Clifton <nickc@redhat.com>
31 * output-file.c (output_file_close): Prevent an infinite loop
32 reporting that stdoutput could not be closed.
34 2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
35 Joseph Myers <joseph@codesourcery.com>
36 Ian Lance Taylor <ian@wasabisystems.com>
37 Ben Elliston <bje@wasabisystems.com>
39 * config/tc-arm.c (arm_cext_iwmmxt2): New.
40 (enum operand_parse_code): New code OP_RIWR_I32z.
41 (parse_operands): Handle OP_RIWR_I32z.
42 (do_iwmmxt_wmerge): New function.
43 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
45 (do_iwmmxt_wrwrwr_or_imm5): New function.
46 (insns): Mark instructions as RIWR_I32z as appropriate.
47 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
48 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
49 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
50 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
51 (md_begin): Handle IWMMXT2.
52 (arm_cpus): Add iwmmxt2.
53 (arm_extensions): Likewise.
54 (arm_archs): Likewise.
56 2006-09-25 Bob Wilson <bob.wilson@acm.org>
58 * doc/as.texinfo (Overview): Revise description of --keep-locals.
59 Add xref to "Symbol Names".
60 (L): Refer to "local symbols" instead of "local labels". Move
61 definition to "Symbol Names" section; add xref to that section.
62 (Symbol Names): Use "Local Symbol Names" section to define local
63 symbols. Add "Local Labels" heading for description of temporary
64 forward/backward labels, and refer to those as "local labels".
66 2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
69 * config/tc-i386.c (match_template): Check address size prefix
70 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
73 2006-09-22 Alan Modra <amodra@bigpond.net.au>
75 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
77 2006-09-22 Alan Modra <amodra@bigpond.net.au>
79 * as.h (as_perror): Delete declaration.
80 * gdbinit.in (as_perror): Delete breakpoint.
81 * messages.c (as_perror): Delete function.
82 * doc/internals.texi: Remove as_perror description.
83 * listing.c (listing_print: Don't use as_perror.
84 * output-file.c (output_file_create, output_file_close): Likewise.
85 * symbols.c (symbol_create, symbol_clone): Likewise.
86 * write.c (write_contents): Likewise.
87 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
88 * config/tc-tic54x.c (tic54x_mlib): Likewise.
90 2006-09-22 Alan Modra <amodra@bigpond.net.au>
92 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
93 (ppc_handle_align): New function.
94 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
95 (SUB_SEGMENT_ALIGN): Define as zero.
97 2006-09-20 Bob Wilson <bob.wilson@acm.org>
99 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
100 (Overview): Skip cross reference in man page.
102 2006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
104 * configure.in: Add new target x86_64-pc-mingw64.
105 * configure: Regenerate.
106 * configure.tgt: Add new target x86_64-pc-mingw64.
107 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
108 * config/tc-i386.c: Add new targets.
109 (md_parse_option): Add targets to OPTION_64.
110 (x86_64_target_format): Add new method for setup proper default target cpu mode.
111 * config/te-pep.h: Add new target definition header.
112 (TE_PEP): New macro: Identifies new target architecture.
113 (COFF_WITH_pex64): Set proper includes in bfd.
114 * NEWS: Mention new target.
116 2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
118 * config/bfin-parse.y (binary): Change sub of const to add of negated
121 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
123 * config/tc-score.c: New file.
124 * config/tc-score.h: Newf file.
125 * configure.tgt: Add Score target.
126 * Makefile.am: Add Score files.
127 * Makefile.in: Regenerate.
128 * NEWS: Mention new target support.
130 2006-09-16 Paul Brook <paul@codesourcery.com>
132 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
133 * doc/c-arm.texi (movsp): Document offset argument.
135 2006-09-16 Paul Brook <paul@codesourcery.com>
137 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
138 unsigned int to avoid 64-bit host problems.
140 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
142 * config/bfin-parse.y (binary): Do some more constant folding for
145 2006-09-13 Jan Beulich <jbeulich@novell.com>
147 * input-file.c (input_file_give_next_buffer): Demote as_bad to
150 2006-09-13 Alan Modra <amodra@bigpond.net.au>
153 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
156 2006-09-13 Alan Modra <amodra@bigpond.net.au>
158 * input-file.c (input_file_open): Replace as_perror with as_bad
159 so that gas exits with error on file errors. Correct error
161 (input_file_get, input_file_give_next_buffer): Likewise.
162 * input-file.h: Update comment.
164 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
167 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
168 registers as a sub-class of wC registers.
170 2006-09-11 Alan Modra <amodra@bigpond.net.au>
173 * config/tc-mips.h (enum dwarf2_format): Forward declare.
174 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
175 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
176 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
178 2006-09-08 Nick Clifton <nickc@redhat.com>
181 * doc/as.texinfo (Macro): Improve documentation about separating
182 macro arguments from following text.
184 2006-09-08 Paul Brook <paul@codesourcery.com>
186 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
188 2006-09-07 Paul Brook <paul@codesourcery.com>
190 * config/tc-arm.c (parse_operands): Mark operand as present.
192 2006-09-04 Paul Brook <paul@codesourcery.com>
194 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
195 (do_neon_dyadic_if_i_d): Avoid setting U bit.
196 (do_neon_mac_maybe_scalar): Ditto.
197 (do_neon_dyadic_narrow): Force operand type to NT_integer.
198 (insns): Remove out of date comments.
200 2006-08-29 Nick Clifton <nickc@redhat.com>
202 * read.c (s_align): Initialize the 'stopc' variable to prevent
203 compiler complaints about it being used without being
205 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
206 s_float_space, s_struct, cons_worker, equals): Likewise.
208 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
210 * ecoff.c (ecoff_directive_val): Fix message typo.
211 * config/tc-ns32k.c (convert_iif): Likewise.
212 * config/tc-sh64.c (shmedia_check_limits): Likewise.
214 2006-08-25 Sterling Augustine <sterling@tensilica.com>
215 Bob Wilson <bob.wilson@acm.org>
217 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
218 the state of the absolute_literals directive. Remove align frag at
219 the start of the literal pool position.
221 2006-08-25 Bob Wilson <bob.wilson@acm.org>
223 * doc/c-xtensa.texi: Add @group commands in examples.
225 2006-08-24 Bob Wilson <bob.wilson@acm.org>
227 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
228 (INIT_LITERAL_SECTION_NAME): Delete.
229 (lit_state struct): Remove segment names, init_lit_seg, and
230 fini_lit_seg. Add lit_prefix and current_text_seg.
231 (init_literal_head_h, init_literal_head): Delete.
232 (fini_literal_head_h, fini_literal_head): Delete.
233 (xtensa_begin_directive): Move argument parsing to
234 xtensa_literal_prefix function.
235 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
236 (xtensa_literal_prefix): Parse the directive argument here and
237 record it in the lit_prefix field. Remove code to derive literal
240 (get_is_linkonce_section): Use linkonce_len. Check for any
241 ".gnu.linkonce.*" section, not just text sections.
242 (md_begin): Remove initialization of deleted lit_state fields.
243 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
244 to init_literal_head and fini_literal_head.
245 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
246 when traversing literal_head list.
247 (match_section_group): New.
248 (cache_literal_section): Rewrite to determine the literal section
249 name on the fly, create the section and return it.
250 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
251 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
252 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
253 Use xtensa_get_property_section from bfd.
254 (retrieve_xtensa_section): Delete.
255 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
256 description to refer to plural literal sections and add xref to
257 the Literal Directive section.
258 (Literal Directive): Describe new rules for deriving literal section
259 names. Add footnote for special case of .init/.fini with
260 --text-section-literals.
261 (Literal Prefix Directive): Replace old naming rules with xref to the
262 Literal Directive section.
264 2006-08-21 Joseph Myers <joseph@codesourcery.com>
266 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
267 merging with previous long opcode.
269 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
271 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
272 * Makefile.in: Regenerate.
273 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
276 2006-08-16 Julian Brown <julian@codesourcery.com>
278 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
279 to use ARM instructions on non-ARM-supporting cores.
280 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
281 mode automatically based on cpu variant.
282 (md_begin): Call above function.
284 2006-08-16 Julian Brown <julian@codesourcery.com>
286 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
287 recognized in non-unified syntax mode.
289 2006-08-15 Thiemo Seufer <ths@mips.com>
290 Nigel Stephens <nigel@mips.com>
291 David Ung <davidu@mips.com>
293 * configure.tgt: Handle mips*-sde-elf*.
295 2006-08-12 Thiemo Seufer <ths@networkno.de>
297 * config/tc-mips.c (mips16_ip): Fix argument register handling
298 for restore instruction.
300 2006-08-08 Bob Wilson <bob.wilson@acm.org>
302 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
304 (out_fixed_inc_line_addr): New.
305 (process_entries): Use out_fixed_inc_line_addr when
306 DWARF2_USE_FIXED_ADVANCE_PC is set.
307 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
309 2006-08-08 DJ Delorie <dj@redhat.com>
311 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
312 vs full symbols so that we never have more than one pointer value
313 for any given symbol in our symbol table.
315 2006-08-08 Sterling Augustine <sterling@tensilica.com>
317 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
318 and emit DW_AT_ranges when code in compilation unit is not
320 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
322 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
323 (out_debug_ranges): New function to emit .debug_ranges section
324 when code is not contiguous.
326 2006-08-08 Nick Clifton <nickc@redhat.com>
328 * config/tc-arm.c (WARN_DEPRECATED): Enable.
330 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
332 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
334 (pe_directive_secrel) [TE_PE]: New function.
335 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
336 loc, loc_mark_labels.
337 [TE_PE]: Handle secrel32.
338 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
340 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
341 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
342 (md_section_align): Only round section sizes here for AOUT
344 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
345 (tc_pe_dwarf2_emit_offset): New function.
346 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
347 (cons_fix_new_arm): Handle O_secrel.
348 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
349 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
350 of OBJ_ELF only block.
351 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
352 tc_pe_dwarf2_emit_offset.
354 2006-08-04 Richard Sandiford <richard@codesourcery.com>
356 * config/tc-sh.c (apply_full_field_fix): New function.
357 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
358 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
359 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
360 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
362 2006-08-03 Nick Clifton <nickc@redhat.com>
365 * config.in: Regenerate.
367 2006-08-03 Joseph Myers <joseph@codesourcery.com>
369 * config/tc-arm.c (parse_operands): Handle invalid register name
372 2006-08-03 Joseph Myers <joseph@codesourcery.com>
374 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
375 (parse_operands): Handle it.
376 (insns): Use it for tmcr and tmrc.
378 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
381 * config/tc-i386.c (md_parse_option): Treat any target starting
382 with elf64_x86_64 as a viable target for the -64 switch.
383 (i386_target_format): For 64-bit ELF flavoured output use
385 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
387 2006-08-02 Nick Clifton <nickc@redhat.com>
390 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
392 * configure.in: Run BFD_BINARY_FOPEN.
393 * configure: Regenerate.
394 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
397 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
399 * config/tc-i386.c (md_assemble): Don't update
402 2006-08-01 Thiemo Seufer <ths@mips.com>
404 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
406 2006-08-01 Thiemo Seufer <ths@mips.com>
408 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
409 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
410 BFD_RELOC_32 and BFD_RELOC_16.
411 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
412 md_convert_frag, md_obj_end): Fix comment formatting.
414 2006-07-31 Thiemo Seufer <ths@mips.com>
416 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
417 handling for BFD_RELOC_MIPS16_JMP.
419 2006-07-24 Andreas Schwab <schwab@suse.de>
422 * read.c (read_a_source_file): Ignore unknown text after line
423 comment character. Fix misleading comment.
425 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
427 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
428 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
429 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
430 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
431 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
432 doc/c-z80.texi, doc/internals.texi: Fix some typos.
434 2006-07-21 Nick Clifton <nickc@redhat.com>
436 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
439 2006-07-20 Thiemo Seufer <ths@mips.com>
440 Nigel Stephens <nigel@mips.com>
442 * config/tc-mips.c (md_parse_option): Don't infer optimisation
443 options from debug options.
445 2006-07-20 Thiemo Seufer <ths@mips.com>
447 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
448 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
450 2006-07-19 Paul Brook <paul@codesourcery.com>
452 * config/tc-arm.c (insns): Fix rbit Arm opcode.
454 2006-07-18 Paul Brook <paul@codesourcery.com>
456 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
457 (md_convert_frag): Use correct reloc for add_pc. Use
458 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
459 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
460 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
462 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
464 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
465 when file and line unknown.
467 2006-07-17 Thiemo Seufer <ths@mips.com>
469 * read.c (s_struct): Use IS_ELF.
470 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
471 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
472 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
473 s_mips_mask): Likewise.
475 2006-07-16 Thiemo Seufer <ths@mips.com>
476 David Ung <davidu@mips.com>
478 * read.c (s_struct): Handle ELF section changing.
479 * config/tc-mips.c (s_align): Leave enabling auto-align to the
481 (s_change_sec): Try section changing only if we output ELF.
483 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
485 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
487 (smallest_imm_type): Remove Cpu086.
488 (i386_target_format): Likewise.
490 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
493 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
494 Michael Meissner <michael.meissner@amd.com>
496 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
497 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
498 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
500 (i386_align_code): Ditto.
501 (md_assemble_code): Add support for insertq/extrq instructions,
502 swapping as needed for intel syntax.
503 (swap_imm_operands): New function to swap immediate operands.
504 (swap_operands): Deal with 4 operand instructions.
505 (build_modrm_byte): Add support for insertq instruction.
507 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
509 * config/tc-i386.h (Size64): Fix a typo in comment.
511 2006-07-12 Nick Clifton <nickc@redhat.com>
513 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
514 fixup_segment() to repeat a range check on a value that has
515 already been checked here.
517 2006-07-07 James E Wilson <wilson@specifix.com>
519 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
521 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
522 Nick Clifton <nickc@redhat.com>
525 * doc/as.texi: Fix spelling typo: branchs => branches.
526 * doc/c-m68hc11.texi: Likewise.
527 * config/tc-m68hc11.c: Likewise.
528 Support old spelling of command line switch for backwards
531 2006-07-04 Thiemo Seufer <ths@mips.com>
532 David Ung <davidu@mips.com>
534 * config/tc-mips.c (s_is_linkonce): New function.
535 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
536 weak, external, and linkonce symbols.
537 (pic_need_relax): Use s_is_linkonce.
539 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
541 * doc/as.texinfo (Org): Remove space.
542 (P2align): Add "@var{abs-expr},".
544 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
546 * config/tc-i386.c (cpu_arch_tune_set): New.
547 (cpu_arch_isa): Likewise.
548 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
549 nops with short or long nop sequences based on -march=/.arch
551 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
552 set cpu_arch_tune and cpu_arch_tune_flags.
553 (md_parse_option): For -march=, set cpu_arch_isa and set
554 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
555 0. Set cpu_arch_tune_set to 1 for -mtune=.
556 (i386_target_format): Don't set cpu_arch_tune.
558 2006-06-23 Nigel Stephens <nigel@mips.com>
560 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
561 generated .sbss.* and .gnu.linkonce.sb.*.
563 2006-06-23 Thiemo Seufer <ths@mips.com>
564 David Ung <davidu@mips.com>
566 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
568 * config/tc-mips.c (label_list): Define per-segment label_list.
569 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
570 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
571 mips_from_file_after_relocs, mips_define_label): Use per-segment
574 2006-06-22 Thiemo Seufer <ths@mips.com>
576 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
577 (append_insn): Use it.
578 (md_apply_fix): Whitespace formatting.
579 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
580 mips16_extended_frag): Remove register specifier.
581 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
584 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
586 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
587 a directive saving VFP registers for ARMv6 or later.
588 (s_arm_unwind_save): Add parameter arch_v6 and call
589 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
591 (md_pseudo_table): Add entry for new "vsave" directive.
592 * doc/c-arm.texi: Correct error in example for "save"
593 directive (fstmdf -> fstmdx). Also document "vsave" directive.
595 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
596 Anatoly Sokolov <aesok@post.ru>
598 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
599 and atmega644p devices. Rename atmega164/atmega324 devices to
600 atmega164p/atmega324p.
601 * doc/c-avr.texi: Document new mcu and arch options.
603 2006-06-17 Nick Clifton <nickc@redhat.com>
605 * config/tc-arm.c (enum parse_operand_result): Move outside of
606 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
608 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
610 * config/tc-i386.h (processor_type): New.
611 (arch_entry): Add type.
613 * config/tc-i386.c (cpu_arch_tune): New.
614 (cpu_arch_tune_flags): Likewise.
615 (cpu_arch_isa_flags): Likewise.
617 (set_cpu_arch): Also update cpu_arch_isa_flags.
618 (md_assemble): Update cpu_arch_isa_flags.
620 (OPTION_MTUNE): Likewise.
621 (md_longopts): Add -march= and -mtune=.
622 (md_parse_option): Support -march= and -mtune=.
623 (md_show_usage): Add -march=CPU/-mtune=CPU.
624 (i386_target_format): Also update cpu_arch_isa_flags,
625 cpu_arch_tune and cpu_arch_tune_flags.
627 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
629 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
631 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
633 * config/tc-arm.c (enum parse_operand_result): New.
634 (struct group_reloc_table_entry): New.
635 (enum group_reloc_type): New.
636 (group_reloc_table): New array.
637 (find_group_reloc_table_entry): New function.
638 (parse_shifter_operand_group_reloc): New function.
639 (parse_address_main): New function, incorporating code
640 from the old parse_address function. To be used via...
641 (parse_address): wrapper for parse_address_main; and
642 (parse_address_group_reloc): new function, likewise.
643 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
644 OP_ADDRGLDRS, OP_ADDRGLDC.
645 (parse_operands): Support for these new operand codes.
646 New macro po_misc_or_fail_no_backtrack.
647 (encode_arm_cp_address): Preserve group relocations.
648 (insns): Modify to use the above operand codes where group
649 relocations are permitted.
650 (md_apply_fix): Handle the group relocations
651 ALU_PC_G0_NC through LDC_SB_G2.
652 (tc_gen_reloc): Likewise.
653 (arm_force_relocation): Leave group relocations for the linker.
654 (arm_fix_adjustable): Likewise.
656 2006-06-15 Julian Brown <julian@codesourcery.com>
658 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
659 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
662 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
664 * config/tc-i386.c (process_suffix): Don't add rex64 for
667 2006-06-09 Thiemo Seufer <ths@mips.com>
669 * config/tc-mips.c (mips_ip): Maintain argument count.
671 2006-06-09 Alan Modra <amodra@bigpond.net.au>
673 * config/tc-iq2000.c: Include sb.h.
675 2006-06-08 Nigel Stephens <nigel@mips.com>
677 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
678 aliases for better compatibility with SGI tools.
680 2006-06-08 Alan Modra <amodra@bigpond.net.au>
682 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
683 * Makefile.am (GASLIBS): Expand @BFDLIB@.
685 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
686 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
687 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
689 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
690 * Makefile.in: Regenerate.
691 * doc/Makefile.in: Regenerate.
692 * configure: Regenerate.
694 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
696 * po/Make-in (pdf, ps): New dummy targets.
698 2006-06-07 Julian Brown <julian@codesourcery.com>
700 * config/tc-arm.c (stdarg.h): include.
701 (arm_it): Add uncond_value field. Add isvec and issingle to operand
703 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
704 REG_TYPE_NSDQ (single, double or quad vector reg).
705 (reg_expected_msgs): Update.
706 (BAD_FPU): Add macro for unsupported FPU instruction error.
707 (parse_neon_type): Support 'd' as an alias for .f64.
708 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
710 (parse_vfp_reg_list): Don't update first arg on error.
711 (parse_neon_mov): Support extra syntax for VFP moves.
712 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
713 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
714 (parse_operands): Support isvec, issingle operands fields, new parse
716 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
718 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
719 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
720 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
721 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
723 (neon_shape): Redefine in terms of above.
724 (neon_shape_class): New enumeration, table of shape classes.
725 (neon_shape_el): New enumeration. One element of a shape.
726 (neon_shape_el_size): Register widths of above, where appropriate.
727 (neon_shape_info): New struct. Info for shape table.
728 (neon_shape_tab): New array.
729 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
730 (neon_check_shape): Rewrite as...
731 (neon_select_shape): New function to classify instruction shapes,
732 driven by new table neon_shape_tab array.
733 (neon_quad): New function. Return 1 if shape should set Q flag in
734 instructions (or equivalent), 0 otherwise.
735 (type_chk_of_el_type): Support F64.
736 (el_type_of_type_chk): Likewise.
737 (neon_check_type): Add support for VFP type checking (VFP data
738 elements fill their containing registers).
739 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
740 in thumb mode for VFP instructions.
741 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
742 and encode the current instruction as if it were that opcode.
743 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
744 arguments, call function in PFN.
745 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
746 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
747 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
748 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
749 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
750 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
751 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
752 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
753 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
754 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
755 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
756 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
757 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
758 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
759 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
761 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
762 between VFP and Neon turns out to belong to Neon. Perform
763 architecture check and fill in condition field if appropriate.
764 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
765 (do_neon_cvt): Add support for VFP variants of instructions.
766 (neon_cvt_flavour): Extend to cover VFP conversions.
767 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
769 (do_neon_ldr_str): Handle single-precision VFP load/store.
770 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
771 NS_NULL not NS_IGNORE.
772 (opcode_tag): Add OT_csuffixF for operands which either take a
773 conditional suffix, or have 0xF in the condition field.
774 (md_assemble): Add support for OT_csuffixF.
775 (NCE): Replace macro with...
776 (NCE_tag, NCE, NCEF): New macros.
777 (nCE): Replace macro with...
778 (nCE_tag, nCE, nCEF): New macros.
779 (insns): Add support for VFP insns or VFP versions of insns msr,
780 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
781 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
782 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
783 VFP/Neon insns together.
785 2006-06-07 Alan Modra <amodra@bigpond.net.au>
786 Ladislav Michl <ladis@linux-mips.org>
788 * app.c: Don't include headers already included by as.h.
790 * atof-generic.c: Likewise.
792 * dwarf2dbg.c: Likewise.
794 * input-file.c: Likewise.
795 * input-scrub.c: Likewise.
797 * output-file.c: Likewise.
800 * config/bfin-lex.l: Likewise.
801 * config/obj-coff.h: Likewise.
802 * config/obj-elf.h: Likewise.
803 * config/obj-som.h: Likewise.
804 * config/tc-arc.c: Likewise.
805 * config/tc-arm.c: Likewise.
806 * config/tc-avr.c: Likewise.
807 * config/tc-bfin.c: Likewise.
808 * config/tc-cris.c: Likewise.
809 * config/tc-d10v.c: Likewise.
810 * config/tc-d30v.c: Likewise.
811 * config/tc-dlx.h: Likewise.
812 * config/tc-fr30.c: Likewise.
813 * config/tc-frv.c: Likewise.
814 * config/tc-h8300.c: Likewise.
815 * config/tc-hppa.c: Likewise.
816 * config/tc-i370.c: Likewise.
817 * config/tc-i860.c: Likewise.
818 * config/tc-i960.c: Likewise.
819 * config/tc-ip2k.c: Likewise.
820 * config/tc-iq2000.c: Likewise.
821 * config/tc-m32c.c: Likewise.
822 * config/tc-m32r.c: Likewise.
823 * config/tc-maxq.c: Likewise.
824 * config/tc-mcore.c: Likewise.
825 * config/tc-mips.c: Likewise.
826 * config/tc-mmix.c: Likewise.
827 * config/tc-mn10200.c: Likewise.
828 * config/tc-mn10300.c: Likewise.
829 * config/tc-msp430.c: Likewise.
830 * config/tc-mt.c: Likewise.
831 * config/tc-ns32k.c: Likewise.
832 * config/tc-openrisc.c: Likewise.
833 * config/tc-ppc.c: Likewise.
834 * config/tc-s390.c: Likewise.
835 * config/tc-sh.c: Likewise.
836 * config/tc-sh64.c: Likewise.
837 * config/tc-sparc.c: Likewise.
838 * config/tc-tic30.c: Likewise.
839 * config/tc-tic4x.c: Likewise.
840 * config/tc-tic54x.c: Likewise.
841 * config/tc-v850.c: Likewise.
842 * config/tc-vax.c: Likewise.
843 * config/tc-xc16x.c: Likewise.
844 * config/tc-xstormy16.c: Likewise.
845 * config/tc-xtensa.c: Likewise.
846 * config/tc-z80.c: Likewise.
847 * config/tc-z8k.c: Likewise.
848 * macro.h: Don't include sb.h or ansidecl.h.
849 * sb.h: Don't include stdio.h or ansidecl.h.
850 * cond.c: Include sb.h.
851 * itbl-lex.l: Include as.h instead of other system headers.
852 * itbl-parse.y: Likewise.
853 * itbl-ops.c: Similarly.
854 * itbl-ops.h: Don't include as.h or ansidecl.h.
855 * config/bfin-defs.h: Don't include bfd.h or as.h.
856 * config/bfin-parse.y: Include as.h instead of other system headers.
858 2006-06-06 Ben Elliston <bje@au.ibm.com>
859 Anton Blanchard <anton@samba.org>
861 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
862 (md_show_usage): Document it.
863 (ppc_setup_opcodes): Test power6 opcode flag bits.
864 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
866 2006-06-06 Thiemo Seufer <ths@mips.com>
867 Chao-ying Fu <fu@mips.com>
869 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
870 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
871 (macro_build): Update comment.
872 (mips_ip): Allow DSP64 instructions for MIPS64R2.
873 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
875 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
876 MIPS_CPU_ASE_MDMX flags for sb1.
878 2006-06-05 Thiemo Seufer <ths@mips.com>
880 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
882 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
883 (mips_ip): Make overflowed/underflowed constant arguments in DSP
884 and MT instructions a fatal error. Use INSERT_OPERAND where
885 appropriate. Improve warnings for break and wait code overflows.
886 Use symbolic constant of OP_MASK_COPZ.
887 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
889 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
891 * po/Make-in (top_builddir): Define.
893 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
895 * doc/Makefile.am (TEXI2DVI): Define.
896 * doc/Makefile.in: Regenerate.
897 * doc/c-arc.texi: Fix typo.
899 2006-06-01 Alan Modra <amodra@bigpond.net.au>
901 * config/obj-ieee.c: Delete.
902 * config/obj-ieee.h: Delete.
903 * Makefile.am (OBJ_FORMATS): Remove ieee.
904 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
905 (obj-ieee.o): Remove rule.
906 * Makefile.in: Regenerate.
907 * configure.in (atof): Remove tahoe.
908 (OBJ_MAYBE_IEEE): Don't define.
909 * configure: Regenerate.
910 * config.in: Regenerate.
911 * doc/Makefile.in: Regenerate.
912 * po/POTFILES.in: Regenerate.
914 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
916 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
917 and LIBINTL_DEP everywhere.
919 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
920 * acinclude.m4: Include new gettext macros.
921 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
922 Remove local code for po/Makefile.
923 * Makefile.in, configure, doc/Makefile.in: Regenerated.
925 2006-05-30 Nick Clifton <nickc@redhat.com>
927 * po/es.po: Updated Spanish translation.
929 2006-05-06 Denis Chertykov <denisc@overta.ru>
931 * doc/c-avr.texi: New file.
932 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
933 * doc/all.texi: Set AVR
934 * doc/as.texinfo: Include c-avr.texi
936 2006-05-28 Jie Zhang <jie.zhang@analog.com>
938 * config/bfin-parse.y (check_macfunc): Loose the condition of
939 calling check_multiply_halfregs ().
941 2006-05-25 Jie Zhang <jie.zhang@analog.com>
943 * config/bfin-parse.y (asm_1): Better check and deal with
944 vector and scalar Multiply 16-Bit Operands instructions.
946 2006-05-24 Nick Clifton <nickc@redhat.com>
948 * config/tc-hppa.c: Convert to ISO C90 format.
949 * config/tc-hppa.h: Likewise.
951 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
952 Randolph Chung <randolph@tausq.org>
954 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
955 is_tls_ieoff, is_tls_leoff): Define.
956 (fix_new_hppa): Handle TLS.
957 (cons_fix_new_hppa): Likewise.
959 (md_apply_fix): Handle TLS relocs.
960 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
962 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
964 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
966 2006-05-23 Thiemo Seufer <ths@mips.com>
967 David Ung <davidu@mips.com>
968 Nigel Stephens <nigel@mips.com>
971 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
972 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
973 ISA_HAS_MXHC1): New macros.
974 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
975 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
976 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
977 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
978 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
979 (mips_after_parse_args): Change default handling of float register
980 size to account for 32bit code with 64bit FP. Better sanity checking
981 of ISA/ASE/ABI option combinations.
982 (s_mipsset): Support switching of GPR and FPR sizes via
983 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
985 (mips_elf_final_processing): We should record the use of 64bit FP
986 registers in 32bit code but we don't, because ELF header flags are
988 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
989 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
990 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
991 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
992 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
993 missing -march options. Document .set arch=CPU. Move .set smartmips
994 to ASE page. Use @code for .set FOO examples.
996 2006-05-23 Jie Zhang <jie.zhang@analog.com>
998 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1001 2006-05-23 Jie Zhang <jie.zhang@analog.com>
1003 * config/bfin-defs.h (bfin_equals): Remove declaration.
1004 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1005 * config/tc-bfin.c (bfin_name_is_register): Remove.
1006 (bfin_equals): Remove.
1007 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1008 (bfin_name_is_register): Remove declaration.
1010 2006-05-19 Thiemo Seufer <ths@mips.com>
1011 Nigel Stephens <nigel@mips.com>
1013 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1014 (mips_oddfpreg_ok): New function.
1017 2006-05-19 Thiemo Seufer <ths@mips.com>
1018 David Ung <davidu@mips.com>
1020 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1021 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1022 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1023 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1024 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1025 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1026 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1027 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1028 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1029 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1030 reg_names_o32, reg_names_n32n64): Define register classes.
1031 (reg_lookup): New function, use register classes.
1032 (md_begin): Reserve register names in the symbol table. Simplify
1034 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1036 (mips16_ip): Use reg_lookup.
1037 (tc_get_register): Likewise.
1038 (tc_mips_regname_to_dw2regnum): New function.
1040 2006-05-19 Thiemo Seufer <ths@mips.com>
1042 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1043 Un-constify string argument.
1044 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1046 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1048 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1050 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1052 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1054 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1057 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1059 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1060 cfloat/m68881 to correct architecture before using it.
1062 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1064 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1067 2006-05-15 Paul Brook <paul@codesourcery.com>
1069 * config/tc-arm.c (arm_adjust_symtab): Use
1070 bfd_is_arm_special_symbol_name.
1072 2006-05-15 Bob Wilson <bob.wilson@acm.org>
1074 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1075 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1076 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1077 Handle errors from calls to xtensa_opcode_is_* functions.
1079 2006-05-14 Thiemo Seufer <ths@mips.com>
1081 * config/tc-mips.c (macro_build): Test for currently active
1083 (mips16_ip): Reject invalid opcodes.
1085 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1087 * doc/as.texinfo: Rename "Index" to "AS Index",
1088 and "ABORT" to "ABORT (COFF)".
1090 2006-05-11 Paul Brook <paul@codesourcery.com>
1092 * config/tc-arm.c (parse_half): New function.
1093 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1094 (parse_operands): Ditto.
1095 (do_mov16): Reject invalid relocations.
1096 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1097 (insns): Replace Iffff with HALF.
1098 (md_apply_fix): Add MOVW and MOVT relocs.
1099 (tc_gen_reloc): Ditto.
1100 * doc/c-arm.texi: Document relocation operators
1102 2006-05-11 Paul Brook <paul@codesourcery.com>
1104 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1106 2006-05-11 Thiemo Seufer <ths@mips.com>
1108 * config/tc-mips.c (append_insn): Don't check the range of j or
1111 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1113 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1114 relocs against external symbols for WinCE targets.
1115 (md_apply_fix): Likewise.
1117 2006-05-09 David Ung <davidu@mips.com>
1119 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1122 2006-05-09 Nick Clifton <nickc@redhat.com>
1124 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1125 against symbols which are not going to be placed into the symbol
1128 2006-05-09 Ben Elliston <bje@au.ibm.com>
1130 * expr.c (operand): Remove `if (0 && ..)' statement and
1131 subsequently unused target_op label. Collapse `if (1 || ..)'
1133 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1134 separately above the switch.
1136 2006-05-08 Nick Clifton <nickc@redhat.com>
1139 * config/tc-msp430.c (line_separator_character): Define as |.
1141 2006-05-08 Thiemo Seufer <ths@mips.com>
1142 Nigel Stephens <nigel@mips.com>
1143 David Ung <davidu@mips.com>
1145 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1146 (mips_opts): Likewise.
1147 (file_ase_smartmips): New variable.
1148 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1149 (macro_build): Handle SmartMIPS instructions.
1150 (mips_ip): Likewise.
1151 (md_longopts): Add argument handling for smartmips.
1152 (md_parse_options, mips_after_parse_args): Likewise.
1153 (s_mipsset): Add .set smartmips support.
1154 (md_show_usage): Document -msmartmips/-mno-smartmips.
1155 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1157 * doc/c-mips.texi: Likewise.
1159 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1161 * write.c (relax_segment): Add pass count arg. Don't error on
1162 negative org/space on first two passes.
1163 (relax_seg_info): New struct.
1164 (relax_seg, write_object_file): Adjust.
1165 * write.h (relax_segment): Update prototype.
1167 2006-05-05 Julian Brown <julian@codesourcery.com>
1169 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1171 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1172 architecture version checks.
1173 (insns): Allow overlapping instructions to be used in VFP mode.
1175 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1178 * config/obj-elf.c (obj_elf_change_section): Allow user
1179 specified SHF_ALPHA_GPREL.
1181 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1183 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1184 for PMEM related expressions.
1186 2006-05-05 Nick Clifton <nickc@redhat.com>
1189 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1190 insertion of a directory separator character into a string at a
1191 given offset. Uses heuristics to decide when to use a backslash
1192 character rather than a forward-slash character.
1193 (dwarf2_directive_loc): Use the macro.
1194 (out_debug_info): Likewise.
1196 2006-05-05 Thiemo Seufer <ths@mips.com>
1197 David Ung <davidu@mips.com>
1199 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1201 (macro): Add new case M_CACHE_AB.
1203 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1205 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1206 (opcode_lookup): Issue a warning for opcode with
1207 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1208 identical to OT_cinfix3.
1209 (TxC3w, TC3w, tC3w): New.
1210 (insns): Use tC3w and TC3w for comparison instructions with
1213 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1215 * subsegs.h (struct frchain): Delete frch_seg.
1216 (frchain_root): Delete.
1217 (seg_info): Define as macro.
1218 * subsegs.c (frchain_root): Delete.
1219 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1220 (subsegs_begin, subseg_change): Adjust for above.
1221 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1222 rather than to one big list.
1223 (subseg_get): Don't special case abs, und sections.
1224 (subseg_new, subseg_force_new): Don't set frchainP here.
1226 (subsegs_print_statistics): Adjust frag chain control list traversal.
1227 * debug.c (dmp_frags): Likewise.
1228 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1229 at frchain_root. Make use of known frchain ordering.
1230 (last_frag_for_seg): Likewise.
1231 (get_frag_fix): Likewise. Add seg param.
1232 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1233 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1234 (SUB_SEGMENT_ALIGN): Likewise.
1235 (subsegs_finish): Adjust frchain list traversal.
1236 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1237 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1238 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1239 (xtensa_fix_b_j_loop_end_frags): Likewise.
1240 (xtensa_fix_close_loop_end_frags): Likewise.
1241 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1242 (retrieve_segment_info): Delete frch_seg initialisation.
1244 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1246 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1247 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1248 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1249 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1251 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1253 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1255 (md_apply_fix3): Multiply offset by 4 here for
1256 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1258 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1259 Jan Beulich <jbeulich@novell.com>
1261 * config/tc-i386.c (output_invalid_buf): Change size for
1263 * config/tc-tic30.c (output_invalid_buf): Likewise.
1265 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1267 * config/tc-tic30.c (output_invalid): Likewise.
1269 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1271 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1272 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1273 (asconfig.texi): Don't set top_srcdir.
1274 * doc/as.texinfo: Don't use top_srcdir.
1275 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1277 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1279 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1280 * config/tc-tic30.c (output_invalid_buf): Likewise.
1282 * config/tc-i386.c (output_invalid): Use snprintf instead of
1284 * config/tc-ia64.c (declare_register_set): Likewise.
1285 (emit_one_bundle): Likewise.
1286 (check_dependencies): Likewise.
1287 * config/tc-tic30.c (output_invalid): Likewise.
1289 2006-05-02 Paul Brook <paul@codesourcery.com>
1291 * config/tc-arm.c (arm_optimize_expr): New function.
1292 * config/tc-arm.h (md_optimize_expr): Define
1293 (arm_optimize_expr): Add prototype.
1294 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1296 2006-05-02 Ben Elliston <bje@au.ibm.com>
1298 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1301 * sb.h (sb_list_vector): Move to sb.c.
1302 * sb.c (free_list): Use type of sb_list_vector directly.
1303 (sb_build): Fix off-by-one error in assertion about `size'.
1305 2006-05-01 Ben Elliston <bje@au.ibm.com>
1307 * listing.c (listing_listing): Remove useless loop.
1308 * macro.c (macro_expand): Remove is_positional local variable.
1309 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1310 and simplify surrounding expressions, where possible.
1311 (assign_symbol): Likewise.
1312 (s_weakref): Likewise.
1313 * symbols.c (colon): Likewise.
1315 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1317 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1319 2006-04-30 Thiemo Seufer <ths@mips.com>
1320 David Ung <davidu@mips.com>
1322 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1323 (mips_immed): New table that records various handling of udi
1324 instruction patterns.
1325 (mips_ip): Adds udi handling.
1327 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1329 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1330 of list rather than beginning.
1332 2006-04-26 Julian Brown <julian@codesourcery.com>
1334 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1335 (is_quarter_float): Rename from above. Simplify slightly.
1336 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1338 (parse_neon_mov): Parse floating-point constants.
1339 (neon_qfloat_bits): Fix encoding.
1340 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1341 preference to integer encoding when using the F32 type.
1343 2006-04-26 Julian Brown <julian@codesourcery.com>
1345 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1346 zero-initialising structures containing it will lead to invalid types).
1347 (arm_it): Add vectype to each operand.
1348 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1350 (neon_typed_alias): New structure. Extra information for typed
1352 (reg_entry): Add neon type info field.
1353 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1354 Break out alternative syntax for coprocessor registers, etc. into...
1355 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1356 out from arm_reg_parse.
1357 (parse_neon_type): Move. Return SUCCESS/FAIL.
1358 (first_error): New function. Call to ensure first error which occurs is
1360 (parse_neon_operand_type): Parse exactly one type.
1361 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1362 (parse_typed_reg_or_scalar): New function. Handle core of both
1363 arm_typed_reg_parse and parse_scalar.
1364 (arm_typed_reg_parse): Parse a register with an optional type.
1365 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1367 (parse_scalar): Parse a Neon scalar with optional type.
1368 (parse_reg_list): Use first_error.
1369 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1370 (neon_alias_types_same): New function. Return true if two (alias) types
1372 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1374 (insert_reg_alias): Return new reg_entry not void.
1375 (insert_neon_reg_alias): New function. Insert type/index information as
1376 well as register for alias.
1377 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1378 make typed register aliases accordingly.
1379 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1381 (s_unreq): Delete type information if present.
1382 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1383 (s_arm_unwind_save_mmxwcg): Likewise.
1384 (s_arm_unwind_movsp): Likewise.
1385 (s_arm_unwind_setfp): Likewise.
1386 (parse_shift): Likewise.
1387 (parse_shifter_operand): Likewise.
1388 (parse_address): Likewise.
1389 (parse_tb): Likewise.
1390 (tc_arm_regname_to_dw2regnum): Likewise.
1391 (md_pseudo_table): Add dn, qn.
1392 (parse_neon_mov): Handle typed operands.
1393 (parse_operands): Likewise.
1394 (neon_type_mask): Add N_SIZ.
1395 (N_ALLMODS): New macro.
1396 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1397 (el_type_of_type_chk): Add some safeguards.
1398 (modify_types_allowed): Fix logic bug.
1399 (neon_check_type): Handle operands with types.
1400 (neon_three_same): Remove redundant optional arg handling.
1401 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1402 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1403 (do_neon_step): Adjust accordingly.
1404 (neon_cmode_for_logic_imm): Use first_error.
1405 (do_neon_bitfield): Call neon_check_type.
1406 (neon_dyadic): Rename to...
1407 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1408 to allow modification of type of the destination.
1409 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1410 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1411 (do_neon_compare): Make destination be an untyped bitfield.
1412 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1413 (neon_mul_mac): Return early in case of errors.
1414 (neon_move_immediate): Use first_error.
1415 (neon_mac_reg_scalar_long): Fix type to include scalar.
1416 (do_neon_dup): Likewise.
1417 (do_neon_mov): Likewise (in several places).
1418 (do_neon_tbl_tbx): Fix type.
1419 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1420 (do_neon_ld_dup): Exit early in case of errors and/or use
1422 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1423 Handle .dn/.qn directives.
1424 (REGDEF): Add zero for reg_entry neon field.
1426 2006-04-26 Julian Brown <julian@codesourcery.com>
1428 * config/tc-arm.c (limits.h): Include.
1429 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1430 (fpu_vfp_v3_or_neon_ext): Declare constants.
1431 (neon_el_type): New enumeration of types for Neon vector elements.
1432 (neon_type_el): New struct. Define type and size of a vector element.
1433 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1435 (neon_type): Define struct. The type of an instruction.
1436 (arm_it): Add 'vectype' for the current instruction.
1437 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1438 (vfp_sp_reg_pos): Rename to...
1439 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1441 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1442 (Neon D or Q register).
1443 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1445 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1446 (my_get_expression): Allow above constant as argument to accept
1447 64-bit constants with optional prefix.
1448 (arm_reg_parse): Add extra argument to return the specific type of
1449 register in when either a D or Q register (REG_TYPE_NDQ) is
1450 requested. Can be NULL.
1451 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1452 (parse_reg_list): Update for new arm_reg_parse args.
1453 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1454 (parse_neon_el_struct_list): New function. Parse element/structure
1455 register lists for VLD<n>/VST<n> instructions.
1456 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1457 (s_arm_unwind_save_mmxwr): Likewise.
1458 (s_arm_unwind_save_mmxwcg): Likewise.
1459 (s_arm_unwind_movsp): Likewise.
1460 (s_arm_unwind_setfp): Likewise.
1461 (parse_big_immediate): New function. Parse an immediate, which may be
1462 64 bits wide. Put results in inst.operands[i].
1463 (parse_shift): Update for new arm_reg_parse args.
1464 (parse_address): Likewise. Add parsing of alignment specifiers.
1465 (parse_neon_mov): Parse the operands of a VMOV instruction.
1466 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1467 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1468 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1469 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1470 (parse_operands): Handle new codes above.
1471 (encode_arm_vfp_sp_reg): Rename to...
1472 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1473 selected VFP version only supports D0-D15.
1474 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1475 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1476 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1477 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1478 encode_arm_vfp_reg name, and allow 32 D regs.
1479 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1480 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1482 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1483 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1484 constant-load and conversion insns introduced with VFPv3.
1485 (neon_tab_entry): New struct.
1486 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1487 those which are the targets of pseudo-instructions.
1488 (neon_opc): Enumerate opcodes, use as indices into...
1489 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1490 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1491 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1492 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1494 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1496 (neon_type_mask): New. Compact type representation for type checking.
1497 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1498 permitted type combinations.
1499 (N_IGNORE_TYPE): New macro.
1500 (neon_check_shape): New function. Check an instruction shape for
1501 multiple alternatives. Return the specific shape for the current
1503 (neon_modify_type_size): New function. Modify a vector type and size,
1504 depending on the bit mask in argument 1.
1505 (neon_type_promote): New function. Convert a given "key" type (of an
1506 operand) into the correct type for a different operand, based on a bit
1508 (type_chk_of_el_type): New function. Convert a type and size into the
1509 compact representation used for type checking.
1510 (el_type_of_type_ckh): New function. Reverse of above (only when a
1511 single bit is set in the bit mask).
1512 (modify_types_allowed): New function. Alter a mask of allowed types
1513 based on a bit mask of modifications.
1514 (neon_check_type): New function. Check the type of the current
1515 instruction against the variable argument list. The "key" type of the
1516 instruction is returned.
1517 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1518 a Neon data-processing instruction depending on whether we're in ARM
1519 mode or Thumb-2 mode.
1520 (neon_logbits): New function.
1521 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1522 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1523 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1524 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1525 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1526 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1527 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1528 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1529 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1530 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1531 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1532 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1533 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1534 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1535 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1536 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1537 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1538 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1539 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1540 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1541 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1542 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1543 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1544 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1545 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1547 (parse_neon_type): New function. Parse Neon type specifier.
1548 (opcode_lookup): Allow parsing of Neon type specifiers.
1549 (REGNUM2, REGSETH, REGSET2): New macros.
1550 (reg_names): Add new VFPv3 and Neon registers.
1551 (NUF, nUF, NCE, nCE): New macros for opcode table.
1552 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1553 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1554 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1555 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1556 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1557 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1558 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1559 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1560 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1561 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1562 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1563 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1564 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1565 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1567 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1568 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1569 (arm_option_cpu_value): Add vfp3 and neon.
1570 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1573 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1575 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1576 syntax instead of hardcoded opcodes with ".w18" suffixes.
1577 (wide_branch_opcode): New.
1578 (build_transition): Use it to check for wide branch opcodes with
1579 either ".w18" or ".w15" suffixes.
1581 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1583 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1584 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1585 frag's is_literal flag.
1587 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1589 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1591 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1593 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1594 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1595 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1596 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1597 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1599 2005-04-20 Paul Brook <paul@codesourcery.com>
1601 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1603 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1605 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1607 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1608 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1609 Make some cpus unsupported on ELF. Run "make dep-am".
1610 * Makefile.in: Regenerate.
1612 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1614 * configure.in (--enable-targets): Indent help message.
1615 * configure: Regenerate.
1617 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1620 * config/tc-i386.c (i386_immediate): Check illegal immediate
1623 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1625 * config/tc-i386.c: Formatting.
1626 (output_disp, output_imm): ISO C90 params.
1628 * frags.c (frag_offset_fixed_p): Constify args.
1629 * frags.h (frag_offset_fixed_p): Ditto.
1631 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1632 (COFF_MAGIC): Delete.
1634 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1636 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1638 * po/POTFILES.in: Regenerated.
1640 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1642 * doc/as.texinfo: Mention that some .type syntaxes are not
1643 supported on all architectures.
1645 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1647 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1648 instructions when such transformations have been disabled.
1650 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1652 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1653 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1654 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1655 decoding the loop instructions. Remove current_offset variable.
1656 (xtensa_fix_short_loop_frags): Likewise.
1657 (min_bytes_to_other_loop_end): Remove current_offset argument.
1659 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1661 * config/tc-z80.c (z80_optimize_expr): Removed.
1662 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1664 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1666 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1667 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1668 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1669 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1670 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1671 at90can64, at90usb646, at90usb647, at90usb1286 and
1673 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1675 2006-04-07 Paul Brook <paul@codesourcery.com>
1677 * config/tc-arm.c (parse_operands): Set default error message.
1679 2006-04-07 Paul Brook <paul@codesourcery.com>
1681 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1683 2006-04-07 Paul Brook <paul@codesourcery.com>
1685 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1687 2006-04-07 Paul Brook <paul@codesourcery.com>
1689 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1690 (move_or_literal_pool): Handle Thumb-2 instructions.
1691 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1693 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1696 * config/tc-i386.c (match_template): Move 64-bit operand tests
1699 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1701 * po/Make-in: Add install-html target.
1702 * Makefile.am: Add install-html and install-html-recursive targets.
1703 * Makefile.in: Regenerate.
1704 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1705 * configure: Regenerate.
1706 * doc/Makefile.am: Add install-html and install-html-am targets.
1707 * doc/Makefile.in: Regenerate.
1709 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1711 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1714 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1715 Daniel Jacobowitz <dan@codesourcery.com>
1717 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1718 (GOTT_BASE, GOTT_INDEX): New.
1719 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1720 GOTT_INDEX when generating VxWorks PIC.
1721 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1722 use the generic *-*-vxworks* stanza instead.
1724 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1727 * frags.c (frag_offset_fixed_p): New function.
1728 * frags.h (frag_offset_fixed_p): Declare.
1729 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1730 (resolve_expression): Likewise.
1732 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1734 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1735 of the same length but different numbers of slots.
1737 2006-03-30 Andreas Schwab <schwab@suse.de>
1739 * configure.in: Fix help string for --enable-targets option.
1740 * configure: Regenerate.
1742 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1744 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1745 (m68k_ip): ... here. Use for all chips. Protect against buffer
1746 overrun and avoid excessive copying.
1748 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1749 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1750 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1751 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1752 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1753 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1754 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1755 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1756 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1757 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1758 (struct m68k_cpu): Change chip field to control_regs.
1759 (current_chip): Remove.
1760 (control_regs): New.
1761 (m68k_archs, m68k_extensions): Adjust.
1762 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1763 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1764 (find_cf_chip): Reimplement for new organization of cpu table.
1765 (select_control_regs): Remove.
1767 (struct save_opts): Save control regs, not chip.
1768 (s_save, s_restore): Adjust.
1769 (m68k_lookup_cpu): Give deprecated warning when necessary.
1770 (m68k_init_arch): Adjust.
1771 (md_show_usage): Adjust for new cpu table organization.
1773 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1775 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1776 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1777 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1779 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1780 (any_gotrel): New rule.
1781 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1782 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1784 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1785 (bfin_pic_ptr): New function.
1786 (md_pseudo_table): Add it for ".picptr".
1787 (OPTION_FDPIC): New macro.
1788 (md_longopts): Add -mfdpic.
1789 (md_parse_option): Handle it.
1790 (md_begin): Set BFD flags.
1791 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1792 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1794 * Makefile.am (bfin-parse.o): Update dependencies.
1795 (DEPTC_bfin_elf): Likewise.
1796 * Makefile.in: Regenerate.
1798 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1800 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1801 mcfemac instead of mcfmac.
1803 2006-03-23 Michael Matz <matz@suse.de>
1805 * config/tc-i386.c (type_names): Correct placement of 'static'.
1806 (reloc): Map some more relocs to their 64 bit counterpart when
1808 (output_insn): Work around breakage if DEBUG386 is defined.
1809 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1810 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1811 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1812 different from i386.
1813 (output_imm): Ditto.
1814 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1816 (md_convert_frag): Jumps can now be larger than 2GB away, error
1818 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1819 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1821 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1822 Daniel Jacobowitz <dan@codesourcery.com>
1823 Phil Edwards <phil@codesourcery.com>
1824 Zack Weinberg <zack@codesourcery.com>
1825 Mark Mitchell <mark@codesourcery.com>
1826 Nathan Sidwell <nathan@codesourcery.com>
1828 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1829 (md_begin): Complain about -G being used for PIC. Don't change
1830 the text, data and bss alignments on VxWorks.
1831 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1832 generating VxWorks PIC.
1833 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1834 (macro): Likewise, but do not treat la $25 specially for
1835 VxWorks PIC, and do not handle jal.
1836 (OPTION_MVXWORKS_PIC): New macro.
1837 (md_longopts): Add -mvxworks-pic.
1838 (md_parse_option): Don't complain about using PIC and -G together here.
1839 Handle OPTION_MVXWORKS_PIC.
1840 (md_estimate_size_before_relax): Always use the first relaxation
1841 sequence on VxWorks.
1842 * config/tc-mips.h (VXWORKS_PIC): New.
1844 2006-03-21 Paul Brook <paul@codesourcery.com>
1846 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1848 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1850 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1851 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1852 (get_loop_align_size): New.
1853 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1854 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1855 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1856 (get_noop_aligned_address): Use get_loop_align_size.
1857 (get_aligned_diff): Likewise.
1859 2006-03-21 Paul Brook <paul@codesourcery.com>
1861 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1863 2006-03-20 Paul Brook <paul@codesourcery.com>
1865 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1866 (do_t_branch): Encode branches inside IT blocks as unconditional.
1867 (do_t_cps): New function.
1868 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1869 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1870 (opcode_lookup): Allow conditional suffixes on all instructions in
1872 (md_assemble): Advance condexec state before checking for errors.
1873 (insns): Use do_t_cps.
1875 2006-03-20 Paul Brook <paul@codesourcery.com>
1877 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1878 outputting the insn.
1880 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1882 * config/tc-vax.c: Update copyright year.
1883 * config/tc-vax.h: Likewise.
1885 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1887 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1889 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1891 2006-03-17 Paul Brook <paul@codesourcery.com>
1893 * config/tc-arm.c (insns): Add ldm and stm.
1895 2006-03-17 Ben Elliston <bje@au.ibm.com>
1898 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1900 2006-03-16 Paul Brook <paul@codesourcery.com>
1902 * config/tc-arm.c (insns): Add "svc".
1904 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1906 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1907 flag and avoid double underscore prefixes.
1909 2006-03-10 Paul Brook <paul@codesourcery.com>
1911 * config/tc-arm.c (md_begin): Handle EABIv5.
1912 (arm_eabis): Add EF_ARM_EABI_VER5.
1913 * doc/c-arm.texi: Document -meabi=5.
1915 2006-03-10 Ben Elliston <bje@au.ibm.com>
1917 * app.c (do_scrub_chars): Simplify string handling.
1919 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1920 Daniel Jacobowitz <dan@codesourcery.com>
1921 Zack Weinberg <zack@codesourcery.com>
1922 Nathan Sidwell <nathan@codesourcery.com>
1923 Paul Brook <paul@codesourcery.com>
1924 Ricardo Anguiano <anguiano@codesourcery.com>
1925 Phil Edwards <phil@codesourcery.com>
1927 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1928 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1930 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1931 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1932 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1934 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1936 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1937 even when using the text-section-literals option.
1939 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1941 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1943 (m68k_ip): <case 'J'> Check we have some control regs.
1944 (md_parse_option): Allow raw arch switch.
1945 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1946 whether 68881 or cfloat was meant by -mfloat.
1947 (md_show_usage): Adjust extension display.
1948 (m68k_elf_final_processing): Adjust.
1950 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1952 * config/tc-avr.c (avr_mod_hash_value): New function.
1953 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1954 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1955 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1956 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1958 (tc_gen_reloc): Handle substractions of symbols, if possible do
1959 fixups, abort otherwise.
1960 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1961 tc_fix_adjustable): Define.
1963 2006-03-02 James E Wilson <wilson@specifix.com>
1965 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1966 change the template, then clear md.slot[curr].end_of_insn_group.
1968 2006-02-28 Jan Beulich <jbeulich@novell.com>
1970 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1972 2006-02-28 Jan Beulich <jbeulich@novell.com>
1975 * macro.c (getstring): Don't treat parentheses special anymore.
1976 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1977 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1980 2006-02-28 Mat <mat@csail.mit.edu>
1982 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1984 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1986 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1988 (CFI_signal_frame): Define.
1989 (cfi_pseudo_table): Add .cfi_signal_frame.
1990 (dot_cfi): Handle CFI_signal_frame.
1991 (output_cie): Handle cie->signal_frame.
1992 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1993 different. Copy signal_frame from FDE to newly created CIE.
1994 * doc/as.texinfo: Document .cfi_signal_frame.
1996 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1998 * doc/Makefile.am: Add html target.
1999 * doc/Makefile.in: Regenerate.
2000 * po/Make-in: Add html target.
2002 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2004 * config/tc-i386.c (output_insn): Support Intel Merom New
2007 * config/tc-i386.h (CpuMNI): New.
2008 (CpuUnknownFlags): Add CpuMNI.
2010 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
2012 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2013 (hpriv_reg_table): New table for hyperprivileged registers.
2014 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2017 2006-02-24 DJ Delorie <dj@redhat.com>
2019 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2020 (tc_gen_reloc): Don't define.
2021 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2022 (OPTION_LINKRELAX): New.
2023 (md_longopts): Add it.
2025 (md_parse_options): Set it.
2026 (md_assemble): Emit relaxation relocs as needed.
2027 (md_convert_frag): Emit relaxation relocs as needed.
2028 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2029 (m32c_apply_fix): New.
2030 (tc_gen_reloc): New.
2031 (m32c_force_relocation): Force out jump relocs when relaxing.
2032 (m32c_fix_adjustable): Return false if relaxing.
2034 2006-02-24 Paul Brook <paul@codesourcery.com>
2036 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2037 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2038 (struct asm_barrier_opt): Define.
2039 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2040 (parse_psr): Accept V7M psr names.
2041 (parse_barrier): New function.
2042 (enum operand_parse_code): Add OP_oBARRIER.
2043 (parse_operands): Implement OP_oBARRIER.
2044 (do_barrier): New function.
2045 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2046 (do_t_cpsi): Add V7M restrictions.
2047 (do_t_mrs, do_t_msr): Validate V7M variants.
2048 (md_assemble): Check for NULL variants.
2049 (v7m_psrs, barrier_opt_names): New tables.
2050 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2051 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2052 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2053 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2054 (struct cpu_arch_ver_table): Define.
2055 (cpu_arch_ver): New.
2056 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2057 Tag_CPU_arch_profile.
2058 * doc/c-arm.texi: Document new cpu and arch options.
2060 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2062 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2064 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2066 * config/tc-ia64.c: Update copyright years.
2068 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2070 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2073 2005-02-22 Paul Brook <paul@codesourcery.com>
2075 * config/tc-arm.c (do_pld): Remove incorrect write to
2077 (encode_thumb32_addr_mode): Use correct operand.
2079 2006-02-21 Paul Brook <paul@codesourcery.com>
2081 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2083 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2084 Anil Paranjape <anilp1@kpitcummins.com>
2085 Shilin Shakti <shilins@kpitcummins.com>
2087 * Makefile.am: Add xc16x related entry.
2088 * Makefile.in: Regenerate.
2089 * configure.in: Added xc16x related entry.
2090 * configure: Regenerate.
2091 * config/tc-xc16x.h: New file
2092 * config/tc-xc16x.c: New file
2093 * doc/c-xc16x.texi: New file for xc16x
2094 * doc/all.texi: Entry for xc16x
2095 * doc/Makefile.texi: Added c-xc16x.texi
2096 * NEWS: Announce the support for the new target.
2098 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2100 * configure.tgt: set emulation for mips-*-netbsd*
2102 2006-02-14 Jakub Jelinek <jakub@redhat.com>
2104 * config.in: Rebuilt.
2106 2006-02-13 Bob Wilson <bob.wilson@acm.org>
2108 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2109 from 1, not 0, in error messages.
2110 (md_assemble): Simplify special-case check for ENTRY instructions.
2111 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2112 operand in error message.
2114 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2116 * configure.tgt (arm-*-linux-gnueabi*): Change to
2119 2006-02-10 Nick Clifton <nickc@redhat.com>
2121 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2122 32-bit value is propagated into the upper bits of a 64-bit long.
2124 * config/tc-arc.c (init_opcode_tables): Fix cast.
2125 (arc_extoper, md_operand): Likewise.
2127 2006-02-09 David Heine <dlheine@tensilica.com>
2129 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2130 each relaxation step.
2132 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2134 * configure.in (CHECK_DECLS): Add vsnprintf.
2135 * configure: Regenerate.
2136 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2137 include/declare here, but...
2138 * as.h: Move code detecting VARARGS idiom to the top.
2139 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2140 (vsnprintf): Declare if not already declared.
2142 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2144 * as.c (close_output_file): New.
2145 (main): Register close_output_file with xatexit before
2146 dump_statistics. Don't call output_file_close.
2148 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2150 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2151 mcf5329_control_regs): New.
2152 (not_current_architecture, selected_arch, selected_cpu): New.
2153 (m68k_archs, m68k_extensions): New.
2154 (archs): Renamed to ...
2155 (m68k_cpus): ... here. Adjust.
2157 (md_pseudo_table): Add arch and cpu directives.
2158 (find_cf_chip, m68k_ip): Adjust table scanning.
2159 (no_68851, no_68881): Remove.
2160 (md_assemble): Lazily initialize.
2161 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2162 (md_init_after_args): Move functionality to m68k_init_arch.
2163 (mri_chip): Adjust table scanning.
2164 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2165 options with saner parsing.
2166 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2167 m68k_init_arch): New.
2168 (s_m68k_cpu, s_m68k_arch): New.
2169 (md_show_usage): Adjust.
2170 (m68k_elf_final_processing): Set CF EF flags.
2171 * config/tc-m68k.h (m68k_init_after_args): Remove.
2172 (tc_init_after_args): Remove.
2173 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2174 (M68k-Directives): Document .arch and .cpu directives.
2176 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2178 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2179 synonyms for equ and defl.
2180 (z80_cons_fix_new): New function.
2181 (emit_byte): Disallow relative jumps to absolute locations.
2182 (emit_data): Only handle defb, prototype changed, because defb is
2183 now handled as pseudo-op rather than an instruction.
2184 (instab): Entries for defb,defw,db,dw moved from here...
2185 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2186 Add entries for def24,def32,d24,d32.
2187 (md_assemble): Improved error handling.
2188 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2189 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2190 (z80_cons_fix_new): Declare.
2191 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2192 (def24,d24,def32,d32): New pseudo-ops.
2194 2006-02-02 Paul Brook <paul@codesourcery.com>
2196 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2198 2005-02-02 Paul Brook <paul@codesourcery.com>
2200 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2201 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2202 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2203 T2_OPCODE_RSB): Define.
2204 (thumb32_negate_data_op): New function.
2205 (md_apply_fix): Use it.
2207 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2209 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2211 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2212 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2214 (relaxation_requirements): Add pfinish_frag argument and use it to
2215 replace setting tinsn->record_fix fields.
2216 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2217 and vinsn_to_insnbuf. Remove references to record_fix and
2218 slot_sub_symbols fields.
2219 (xtensa_mark_narrow_branches): Delete unused code.
2220 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2222 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2224 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2225 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2226 of the record_fix field. Simplify error messages for unexpected
2228 (set_expr_symbol_offset_diff): Delete.
2230 2006-01-31 Paul Brook <paul@codesourcery.com>
2232 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2234 2006-01-31 Paul Brook <paul@codesourcery.com>
2235 Richard Earnshaw <rearnsha@arm.com>
2237 * config/tc-arm.c: Use arm_feature_set.
2238 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2239 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2240 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2243 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2244 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2245 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2246 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2248 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2249 (arm_opts): Move old cpu/arch options from here...
2250 (arm_legacy_opts): ... to here.
2251 (md_parse_option): Search arm_legacy_opts.
2252 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2253 (arm_float_abis, arm_eabis): Make const.
2255 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2257 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2259 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2261 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2262 in load immediate intruction.
2264 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2266 * config/bfin-parse.y (value_match): Use correct conversion
2267 specifications in template string for __FILE__ and __LINE__.
2271 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2273 Introduce TLS descriptors for i386 and x86_64.
2274 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2275 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2276 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2277 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2278 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2280 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2281 (lex_got): Handle @tlsdesc and @tlscall.
2282 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2284 2006-01-11 Nick Clifton <nickc@redhat.com>
2286 Fixes for building on 64-bit hosts:
2287 * config/tc-avr.c (mod_index): New union to allow conversion
2288 between pointers and integers.
2289 (md_begin, avr_ldi_expression): Use it.
2290 * config/tc-i370.c (md_assemble): Add cast for argument to print
2292 * config/tc-tic54x.c (subsym_substitute): Likewise.
2293 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2294 opindex field of fr_cgen structure into a pointer so that it can
2295 be stored in a frag.
2296 * config/tc-mn10300.c (md_assemble): Likewise.
2297 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2299 * config/tc-v850.c: Replace uses of (int) casts with correct
2302 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2305 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2307 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2310 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2311 a local-label reference.
2313 For older changes see ChangeLog-2005
2319 version-control: never