gas/ChangeLog

   1 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
   4         of list rather than beginning.
   5
   6 2006-04-26  Julian Brown  <julian@codesourcery.com>
   7
   8         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
   9         (is_quarter_float): Rename from above. Simplify slightly.
  10         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
  11         number.
  12         (parse_neon_mov): Parse floating-point constants.
  13         (neon_qfloat_bits): Fix encoding.
  14         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
  15         preference to integer encoding when using the F32 type.
  16
  17 2006-04-26  Julian Brown  <julian@codesourcery.com>
  18
  19         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
  20         zero-initialising structures containing it will lead to invalid types).
  21         (arm_it): Add vectype to each operand.
  22         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
  23         defined field.
  24         (neon_typed_alias): New structure. Extra information for typed
  25         register aliases.
  26         (reg_entry): Add neon type info field.
  27         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
  28         Break out alternative syntax for coprocessor registers, etc. into...
  29         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
  30         out from arm_reg_parse.
  31         (parse_neon_type): Move. Return SUCCESS/FAIL.
  32         (first_error): New function. Call to ensure first error which occurs is
  33         reported.
  34         (parse_neon_operand_type): Parse exactly one type.
  35         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
  36         (parse_typed_reg_or_scalar): New function. Handle core of both
  37         arm_typed_reg_parse and parse_scalar.
  38         (arm_typed_reg_parse): Parse a register with an optional type.
  39         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
  40         result.
  41         (parse_scalar): Parse a Neon scalar with optional type.
  42         (parse_reg_list): Use first_error.
  43         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
  44         (neon_alias_types_same): New function. Return true if two (alias) types
  45         are the same.
  46         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
  47         of elements.
  48         (insert_reg_alias): Return new reg_entry not void.
  49         (insert_neon_reg_alias): New function. Insert type/index information as
  50         well as register for alias.
  51         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
  52         make typed register aliases accordingly.
  53         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
  54         of line.
  55         (s_unreq): Delete type information if present.
  56         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
  57         (s_arm_unwind_save_mmxwcg): Likewise.
  58         (s_arm_unwind_movsp): Likewise.
  59         (s_arm_unwind_setfp): Likewise.
  60         (parse_shift): Likewise.
  61         (parse_shifter_operand): Likewise.
  62         (parse_address): Likewise.
  63         (parse_tb): Likewise.
  64         (tc_arm_regname_to_dw2regnum): Likewise.
  65         (md_pseudo_table): Add dn, qn.
  66         (parse_neon_mov): Handle typed operands.
  67         (parse_operands): Likewise.
  68         (neon_type_mask): Add N_SIZ.
  69         (N_ALLMODS): New macro.
  70         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
  71         (el_type_of_type_chk): Add some safeguards.
  72         (modify_types_allowed): Fix logic bug.
  73         (neon_check_type): Handle operands with types.
  74         (neon_three_same): Remove redundant optional arg handling.
  75         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
  76         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
  77         (do_neon_step): Adjust accordingly.
  78         (neon_cmode_for_logic_imm): Use first_error.
  79         (do_neon_bitfield): Call neon_check_type.
  80         (neon_dyadic): Rename to...
  81         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
  82         to allow modification of type of the destination.
  83         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
  84         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
  85         (do_neon_compare): Make destination be an untyped bitfield.
  86         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
  87         (neon_mul_mac): Return early in case of errors.
  88         (neon_move_immediate): Use first_error.
  89         (neon_mac_reg_scalar_long): Fix type to include scalar.
  90         (do_neon_dup): Likewise.
  91         (do_neon_mov): Likewise (in several places).
  92         (do_neon_tbl_tbx): Fix type.
  93         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
  94         (do_neon_ld_dup): Exit early in case of errors and/or use
  95         first_error.
  96         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
  97         Handle .dn/.qn directives.
  98         (REGDEF): Add zero for reg_entry neon field.
  99
 100 2006-04-26  Julian Brown  <julian@codesourcery.com>
 101
 102         * config/tc-arm.c (limits.h): Include.
 103         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 104         (fpu_vfp_v3_or_neon_ext): Declare constants.
 105         (neon_el_type): New enumeration of types for Neon vector elements.
 106         (neon_type_el): New struct. Define type and size of a vector element.
 107         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 108         instruction.
 109         (neon_type): Define struct. The type of an instruction.
 110         (arm_it): Add 'vectype' for the current instruction.
 111         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 112         (vfp_sp_reg_pos): Rename to...
 113         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 114         tags.
 115         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 116         (Neon D or Q register).
 117         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 118         register.
 119         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 120         (my_get_expression): Allow above constant as argument to accept
 121         64-bit constants with optional prefix.
 122         (arm_reg_parse): Add extra argument to return the specific type of
 123         register in when either a D or Q register (REG_TYPE_NDQ) is
 124         requested. Can be NULL.
 125         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 126         (parse_reg_list): Update for new arm_reg_parse args.
 127         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 128         (parse_neon_el_struct_list): New function. Parse element/structure
 129         register lists for VLD<n>/VST<n> instructions.
 130         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 131         (s_arm_unwind_save_mmxwr): Likewise.
 132         (s_arm_unwind_save_mmxwcg): Likewise.
 133         (s_arm_unwind_movsp): Likewise.
 134         (s_arm_unwind_setfp): Likewise.
 135         (parse_big_immediate): New function. Parse an immediate, which may be
 136         64 bits wide. Put results in inst.operands[i].
 137         (parse_shift): Update for new arm_reg_parse args.
 138         (parse_address): Likewise. Add parsing of alignment specifiers.
 139         (parse_neon_mov): Parse the operands of a VMOV instruction.
 140         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 141         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 142         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 143         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 144         (parse_operands): Handle new codes above.
 145         (encode_arm_vfp_sp_reg): Rename to...
 146         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 147         selected VFP version only supports D0-D15.
 148         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 149         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 150         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 151         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 152         encode_arm_vfp_reg name, and allow 32 D regs.
 153         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 154         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 155         regs.
 156         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 157         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 158         constant-load and conversion insns introduced with VFPv3.
 159         (neon_tab_entry): New struct.
 160         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 161         those which are the targets of pseudo-instructions.
 162         (neon_opc): Enumerate opcodes, use as indices into...
 163         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 164         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 165         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 166         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 167         neon_enc_tab.
 168         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 169         Neon instructions.
 170         (neon_type_mask): New. Compact type representation for type checking.
 171         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 172         permitted type combinations.
 173         (N_IGNORE_TYPE): New macro.
 174         (neon_check_shape): New function. Check an instruction shape for
 175         multiple alternatives. Return the specific shape for the current
 176         instruction.
 177         (neon_modify_type_size): New function. Modify a vector type and size,
 178         depending on the bit mask in argument 1.
 179         (neon_type_promote): New function. Convert a given "key" type (of an
 180         operand) into the correct type for a different operand, based on a bit
 181         mask.
 182         (type_chk_of_el_type): New function. Convert a type and size into the
 183         compact representation used for type checking.
 184         (el_type_of_type_ckh): New function. Reverse of above (only when a
 185         single bit is set in the bit mask).
 186         (modify_types_allowed): New function. Alter a mask of allowed types
 187         based on a bit mask of modifications.
 188         (neon_check_type): New function. Check the type of the current
 189         instruction against the variable argument list. The "key" type of the
 190         instruction is returned.
 191         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 192         a Neon data-processing instruction depending on whether we're in ARM
 193         mode or Thumb-2 mode.
 194         (neon_logbits): New function.
 195         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 196         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 197         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 198         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 199         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 200         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 201         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 202         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 203         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 204         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 205         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 206         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 207         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 208         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 209         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 210         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 211         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 212         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 213         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 214         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 215         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 216         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 217         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 218         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 219         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 220         helpers.
 221         (parse_neon_type): New function. Parse Neon type specifier.
 222         (opcode_lookup): Allow parsing of Neon type specifiers.
 223         (REGNUM2, REGSETH, REGSET2): New macros.
 224         (reg_names): Add new VFPv3 and Neon registers.
 225         (NUF, nUF, NCE, nCE): New macros for opcode table.
 226         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 227         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 228         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 229         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 230         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 231         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 232         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 233         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 234         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 235         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 236         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 237         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 238         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 239         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 240         fto[us][lh][sd].
 241         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 242         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 243         (arm_option_cpu_value): Add vfp3 and neon.
 244         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 245         VFPv1 attribute.
 246
 247 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 248
 249         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 250         syntax instead of hardcoded opcodes with ".w18" suffixes.
 251         (wide_branch_opcode): New.
 252         (build_transition): Use it to check for wide branch opcodes with
 253         either ".w18" or ".w15" suffixes.
 254
 255 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 256
 257         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 258         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 259         frag's is_literal flag.
 260
 261 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 262
 263         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 264
 265 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 266
 267         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 268         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 269         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 270         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 271         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 272
 273 2005-04-20  Paul Brook  <paul@codesourcery.com>
 274
 275         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 276         all targets.
 277         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 278
 279 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 280
 281         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 282         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 283         Make some cpus unsupported on ELF.  Run "make dep-am".
 284         * Makefile.in: Regenerate.
 285
 286 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 287
 288         * configure.in (--enable-targets): Indent help message.
 289         * configure: Regenerate.
 290
 291 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 292
 293         PR gas/2533
 294         * config/tc-i386.c (i386_immediate): Check illegal immediate
 295         register operand.
 296
 297 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 298
 299         * config/tc-i386.c: Formatting.
 300         (output_disp, output_imm): ISO C90 params.
 301
 302         * frags.c (frag_offset_fixed_p): Constify args.
 303         * frags.h (frag_offset_fixed_p): Ditto.
 304
 305         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 306         (COFF_MAGIC): Delete.
 307
 308         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 309
 310 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 311
 312         * po/POTFILES.in: Regenerated.
 313
 314 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 315
 316         * doc/as.texinfo: Mention that some .type syntaxes are not
 317         supported on all architectures.
 318
 319 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 320
 321         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 322         instructions when such transformations have been disabled.
 323
 324 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 325
 326         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 327         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 328         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 329         decoding the loop instructions.  Remove current_offset variable.
 330         (xtensa_fix_short_loop_frags): Likewise.
 331         (min_bytes_to_other_loop_end): Remove current_offset argument.
 332
 333 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 334
 335         * config/tc-z80.c (z80_optimize_expr): Removed.
 336         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 337
 338 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 339
 340         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 341         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 342         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 343         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 344         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 345         at90can64, at90usb646, at90usb647, at90usb1286 and
 346         at90usb1287.
 347         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 348
 349 2006-04-07  Paul Brook  <paul@codesourcery.com>
 350
 351         * config/tc-arm.c (parse_operands): Set default error message.
 352
 353 2006-04-07  Paul Brook  <paul@codesourcery.com>
 354
 355         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 356
 357 2006-04-07  Paul Brook  <paul@codesourcery.com>
 358
 359         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 360
 361 2006-04-07  Paul Brook  <paul@codesourcery.com>
 362
 363         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 364         (move_or_literal_pool): Handle Thumb-2 instructions.
 365         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 366
 367 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 368
 369         PR 2512.
 370         * config/tc-i386.c (match_template): Move 64-bit operand tests
 371         inside loop.
 372
 373 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 374
 375         * po/Make-in: Add install-html target.
 376         * Makefile.am: Add install-html and install-html-recursive targets.
 377         * Makefile.in: Regenerate.
 378         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 379         * configure: Regenerate.
 380         * doc/Makefile.am: Add install-html and install-html-am targets.
 381         * doc/Makefile.in: Regenerate.
 382
 383 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 384
 385         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 386         second scan.
 387
 388 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 389             Daniel Jacobowitz  <dan@codesourcery.com>
 390
 391         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 392         (GOTT_BASE, GOTT_INDEX): New.
 393         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 394         GOTT_INDEX when generating VxWorks PIC.
 395         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 396         use the generic *-*-vxworks* stanza instead.
 397
 398 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 399
 400         PR 997
 401         * frags.c (frag_offset_fixed_p): New function.
 402         * frags.h (frag_offset_fixed_p): Declare.
 403         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 404         (resolve_expression): Likewise.
 405
 406 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 407
 408         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 409         of the same length but different numbers of slots.
 410
 411 2006-03-30  Andreas Schwab  <schwab@suse.de>
 412
 413         * configure.in: Fix help string for --enable-targets option.
 414         * configure: Regenerate.
 415
 416 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 417
 418         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 419         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 420         overrun and avoid excessive copying.
 421
 422         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 423         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 424         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 425         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 426         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 427         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 428         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 429         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 430         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 431         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 432         (struct m68k_cpu): Change chip field to control_regs.
 433         (current_chip): Remove.
 434         (control_regs): New.
 435         (m68k_archs, m68k_extensions): Adjust.
 436         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 437         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 438         (find_cf_chip): Reimplement for new organization of cpu table.
 439         (select_control_regs): Remove.
 440         (mri_chip): Adjust.
 441         (struct save_opts): Save control regs, not chip.
 442         (s_save, s_restore): Adjust.
 443         (m68k_lookup_cpu): Give deprecated warning when necessary.
 444         (m68k_init_arch): Adjust.
 445         (md_show_usage): Adjust for new cpu table organization.
 446
 447 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 448
 449         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 450         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 451         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 452         "elf/bfin.h".
 453         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 454         (any_gotrel): New rule.
 455         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 456         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 457         "elf/bfin.h".
 458         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 459         (bfin_pic_ptr): New function.
 460         (md_pseudo_table): Add it for ".picptr".
 461         (OPTION_FDPIC): New macro.
 462         (md_longopts): Add -mfdpic.
 463         (md_parse_option): Handle it.
 464         (md_begin): Set BFD flags.
 465         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 466         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 467         us for GOT relocs.
 468         * Makefile.am (bfin-parse.o): Update dependencies.
 469         (DEPTC_bfin_elf): Likewise.
 470         * Makefile.in: Regenerate.
 471
 472 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 473
 474         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 475         mcfemac instead of mcfmac.
 476
 477 2006-03-23  Michael Matz  <matz@suse.de>
 478
 479         * config/tc-i386.c (type_names): Correct placement of 'static'.
 480         (reloc): Map some more relocs to their 64 bit counterpart when
 481         size is 8.
 482         (output_insn): Work around breakage if DEBUG386 is defined.
 483         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 484         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 485         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 486         different from i386.
 487         (output_imm): Ditto.
 488         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 489         Imm64.
 490         (md_convert_frag): Jumps can now be larger than 2GB away, error
 491         out in that case.
 492         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 493         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 494
 495 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 496             Daniel Jacobowitz  <dan@codesourcery.com>
 497             Phil Edwards  <phil@codesourcery.com>
 498             Zack Weinberg  <zack@codesourcery.com>
 499             Mark Mitchell  <mark@codesourcery.com>
 500             Nathan Sidwell  <nathan@codesourcery.com>
 501
 502         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 503         (md_begin): Complain about -G being used for PIC.  Don't change
 504         the text, data and bss alignments on VxWorks.
 505         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 506         generating VxWorks PIC.
 507         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 508         (macro): Likewise, but do not treat la $25 specially for
 509         VxWorks PIC, and do not handle jal.
 510         (OPTION_MVXWORKS_PIC): New macro.
 511         (md_longopts): Add -mvxworks-pic.
 512         (md_parse_option): Don't complain about using PIC and -G together here.
 513         Handle OPTION_MVXWORKS_PIC.
 514         (md_estimate_size_before_relax): Always use the first relaxation
 515         sequence on VxWorks.
 516         * config/tc-mips.h (VXWORKS_PIC): New.
 517
 518 2006-03-21  Paul Brook  <paul@codesourcery.com>
 519
 520         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 521
 522 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 523
 524         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 525         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 526         (get_loop_align_size): New.
 527         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 528         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 529         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 530         (get_noop_aligned_address): Use get_loop_align_size.
 531         (get_aligned_diff): Likewise.
 532
 533 2006-03-21  Paul Brook  <paul@codesourcery.com>
 534
 535         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 536
 537 2006-03-20  Paul Brook  <paul@codesourcery.com>
 538
 539         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 540         (do_t_branch): Encode branches inside IT blocks as unconditional.
 541         (do_t_cps): New function.
 542         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 543         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 544         (opcode_lookup): Allow conditional suffixes on all instructions in
 545         Thumb mode.
 546         (md_assemble): Advance condexec state before checking for errors.
 547         (insns): Use do_t_cps.
 548
 549 2006-03-20  Paul Brook  <paul@codesourcery.com>
 550
 551         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 552         outputting the insn.
 553
 554 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 555
 556         * config/tc-vax.c: Update copyright year.
 557         * config/tc-vax.h: Likewise.
 558
 559 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 560
 561         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 562         make it static.
 563         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 564
 565 2006-03-17  Paul Brook  <paul@codesourcery.com>
 566
 567         * config/tc-arm.c (insns): Add ldm and stm.
 568
 569 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 570
 571         PR gas/2446
 572         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 573
 574 2006-03-16  Paul Brook  <paul@codesourcery.com>
 575
 576         * config/tc-arm.c (insns): Add "svc".
 577
 578 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 579
 580         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 581         flag and avoid double underscore prefixes.
 582
 583 2006-03-10  Paul Brook  <paul@codesourcery.com>
 584
 585         * config/tc-arm.c (md_begin): Handle EABIv5.
 586         (arm_eabis): Add EF_ARM_EABI_VER5.
 587         * doc/c-arm.texi: Document -meabi=5.
 588
 589 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 590
 591         * app.c (do_scrub_chars): Simplify string handling.
 592
 593 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 594             Daniel Jacobowitz  <dan@codesourcery.com>
 595             Zack Weinberg  <zack@codesourcery.com>
 596             Nathan Sidwell  <nathan@codesourcery.com>
 597             Paul Brook  <paul@codesourcery.com>
 598             Ricardo Anguiano  <anguiano@codesourcery.com>
 599             Phil Edwards  <phil@codesourcery.com>
 600
 601         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 602         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 603         R_ARM_ABS12 reloc.
 604         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 605         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 606         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 607
 608 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 609
 610         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 611         even when using the text-section-literals option.
 612
 613 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 614
 615         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 616         and cf.
 617         (m68k_ip): <case 'J'> Check we have some control regs.
 618         (md_parse_option): Allow raw arch switch.
 619         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 620         whether 68881 or cfloat was meant by -mfloat.
 621         (md_show_usage): Adjust extension display.
 622         (m68k_elf_final_processing): Adjust.
 623
 624 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 625
 626         * config/tc-avr.c (avr_mod_hash_value): New function.
 627         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 628         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 629         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 630         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 631         of (int).
 632         (tc_gen_reloc): Handle substractions of symbols, if possible do
 633         fixups, abort otherwise.
 634         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 635         tc_fix_adjustable): Define.
 636
 637 2006-03-02  James E Wilson  <wilson@specifix.com>
 638
 639         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 640         change the template, then clear md.slot[curr].end_of_insn_group.
 641
 642 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 643
 644         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 645
 646 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 647
 648         PR/1070
 649         * macro.c (getstring): Don't treat parentheses special anymore.
 650         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 651         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 652         characters.
 653
 654 2006-02-28  Mat <mat@csail.mit.edu>
 655
 656         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 657
 658 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 659
 660         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 661         field.
 662         (CFI_signal_frame): Define.
 663         (cfi_pseudo_table): Add .cfi_signal_frame.
 664         (dot_cfi): Handle CFI_signal_frame.
 665         (output_cie): Handle cie->signal_frame.
 666         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 667         different.  Copy signal_frame from FDE to newly created CIE.
 668         * doc/as.texinfo: Document .cfi_signal_frame.
 669
 670 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 671
 672         * doc/Makefile.am: Add html target.
 673         * doc/Makefile.in: Regenerate.
 674         * po/Make-in: Add html target.
 675
 676 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 677
 678         * config/tc-i386.c (output_insn): Support Intel Merom New
 679         Instructions.
 680
 681         * config/tc-i386.h (CpuMNI): New.
 682         (CpuUnknownFlags): Add CpuMNI.
 683
 684 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 685
 686         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 687         (hpriv_reg_table): New table for hyperprivileged registers.
 688         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 689         register encoding.
 690
 691 2006-02-24  DJ Delorie  <dj@redhat.com>
 692
 693         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 694         (tc_gen_reloc): Don't define.
 695         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 696         (OPTION_LINKRELAX): New.
 697         (md_longopts): Add it.
 698         (m32c_relax): New.
 699         (md_parse_options): Set it.
 700         (md_assemble): Emit relaxation relocs as needed.
 701         (md_convert_frag): Emit relaxation relocs as needed.
 702         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 703         (m32c_apply_fix): New.
 704         (tc_gen_reloc): New.
 705         (m32c_force_relocation): Force out jump relocs when relaxing.
 706         (m32c_fix_adjustable): Return false if relaxing.
 707
 708 2006-02-24  Paul Brook  <paul@codesourcery.com>
 709
 710         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 711         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 712         (struct asm_barrier_opt): Define.
 713         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 714         (parse_psr): Accept V7M psr names.
 715         (parse_barrier): New function.
 716         (enum operand_parse_code): Add OP_oBARRIER.
 717         (parse_operands): Implement OP_oBARRIER.
 718         (do_barrier): New function.
 719         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 720         (do_t_cpsi): Add V7M restrictions.
 721         (do_t_mrs, do_t_msr): Validate V7M variants.
 722         (md_assemble): Check for NULL variants.
 723         (v7m_psrs, barrier_opt_names): New tables.
 724         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 725         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 726         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 727         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 728         (struct cpu_arch_ver_table): Define.
 729         (cpu_arch_ver): New.
 730         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 731         Tag_CPU_arch_profile.
 732         * doc/c-arm.texi: Document new cpu and arch options.
 733
 734 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 735
 736         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 737
 738 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 739
 740         * config/tc-ia64.c: Update copyright years.
 741
 742 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 743
 744         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 745         SDM 2.2.
 746
 747 2005-02-22  Paul Brook  <paul@codesourcery.com>
 748
 749         * config/tc-arm.c (do_pld): Remove incorrect write to
 750         inst.instruction.
 751         (encode_thumb32_addr_mode): Use correct operand.
 752
 753 2006-02-21  Paul Brook  <paul@codesourcery.com>
 754
 755         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 756
 757 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 758             Anil Paranjape   <anilp1@kpitcummins.com>
 759             Shilin Shakti    <shilins@kpitcummins.com>
 760
 761         * Makefile.am: Add xc16x related entry.
 762         * Makefile.in: Regenerate.
 763         * configure.in: Added xc16x related entry.
 764         * configure: Regenerate.
 765         * config/tc-xc16x.h: New file
 766         * config/tc-xc16x.c: New file
 767         * doc/c-xc16x.texi: New file for xc16x
 768         * doc/all.texi: Entry for xc16x
 769         * doc/Makefile.texi: Added c-xc16x.texi
 770         * NEWS: Announce the support for the new target.
 771
 772 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 773
 774         * configure.tgt: set emulation for mips-*-netbsd*
 775
 776 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 777
 778         * config.in: Rebuilt.
 779
 780 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 781
 782         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 783         from 1, not 0, in error messages.
 784         (md_assemble): Simplify special-case check for ENTRY instructions.
 785         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 786         operand in error message.
 787
 788 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 789
 790         * configure.tgt (arm-*-linux-gnueabi*): Change to
 791         arm-*-linux-*eabi*.
 792
 793 2006-02-10  Nick Clifton  <nickc@redhat.com>
 794
 795         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 796         32-bit value is propagated into the upper bits of a 64-bit long.
 797
 798         * config/tc-arc.c (init_opcode_tables): Fix cast.
 799         (arc_extoper, md_operand): Likewise.
 800
 801 2006-02-09  David Heine  <dlheine@tensilica.com>
 802
 803         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 804         each relaxation step.
 805
 806 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 807
 808         * configure.in (CHECK_DECLS): Add vsnprintf.
 809         * configure: Regenerate.
 810         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 811         include/declare here, but...
 812         * as.h: Move code detecting VARARGS idiom to the top.
 813         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 814         (vsnprintf): Declare if not already declared.
 815
 816 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 817
 818         * as.c (close_output_file): New.
 819         (main): Register close_output_file with xatexit before
 820         dump_statistics. Don't call output_file_close.
 821
 822 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 823
 824         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 825         mcf5329_control_regs): New.
 826         (not_current_architecture, selected_arch, selected_cpu): New.
 827         (m68k_archs, m68k_extensions): New.
 828         (archs): Renamed to ...
 829         (m68k_cpus): ... here.  Adjust.
 830         (n_arches): Remove.
 831         (md_pseudo_table): Add arch and cpu directives.
 832         (find_cf_chip, m68k_ip): Adjust table scanning.
 833         (no_68851, no_68881): Remove.
 834         (md_assemble): Lazily initialize.
 835         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 836         (md_init_after_args): Move functionality to m68k_init_arch.
 837         (mri_chip): Adjust table scanning.
 838         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 839         options with saner parsing.
 840         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 841         m68k_init_arch): New.
 842         (s_m68k_cpu, s_m68k_arch): New.
 843         (md_show_usage): Adjust.
 844         (m68k_elf_final_processing): Set CF EF flags.
 845         * config/tc-m68k.h (m68k_init_after_args): Remove.
 846         (tc_init_after_args): Remove.
 847         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 848         (M68k-Directives): Document .arch and .cpu directives.
 849
 850 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 851
 852         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 853         synonyms for equ and defl.
 854         (z80_cons_fix_new): New function.
 855         (emit_byte): Disallow relative jumps to absolute locations.
 856         (emit_data): Only handle defb, prototype changed, because defb is
 857         now handled as pseudo-op rather than an instruction.
 858         (instab): Entries for defb,defw,db,dw moved from here...
 859         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 860         Add entries for def24,def32,d24,d32.
 861         (md_assemble): Improved error handling.
 862         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 863         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 864         (z80_cons_fix_new): Declare.
 865         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 866         (def24,d24,def32,d32): New pseudo-ops.
 867
 868 2006-02-02  Paul Brook  <paul@codesourcery.com>
 869
 870         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 871
 872 2005-02-02  Paul Brook  <paul@codesourcery.com>
 873
 874         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 875         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
 876         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
 877         T2_OPCODE_RSB): Define.
 878         (thumb32_negate_data_op): New function.
 879         (md_apply_fix): Use it.
 880
 881 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
 882
 883         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
 884         fields.
 885         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
 886         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
 887         subtracted symbols.
 888         (relaxation_requirements): Add pfinish_frag argument and use it to
 889         replace setting tinsn->record_fix fields.
 890         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
 891         and vinsn_to_insnbuf.  Remove references to record_fix and
 892         slot_sub_symbols fields.
 893         (xtensa_mark_narrow_branches): Delete unused code.
 894         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
 895         a symbol.
 896         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
 897         record_fix fields.
 898         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
 899         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
 900         of the record_fix field.  Simplify error messages for unexpected
 901         symbolic operands.
 902         (set_expr_symbol_offset_diff): Delete.
 903
 904 2006-01-31  Paul Brook  <paul@codesourcery.com>
 905
 906         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
 907
 908 2006-01-31  Paul Brook  <paul@codesourcery.com>
 909         Richard Earnshaw <rearnsha@arm.com>
 910
 911         * config/tc-arm.c: Use arm_feature_set.
 912         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
 913         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
 914         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
 915         New variables.
 916         (insns): Use them.
 917         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
 918         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
 919         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
 920         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
 921         feature flags.
 922         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
 923         (arm_opts): Move old cpu/arch options from here...
 924         (arm_legacy_opts): ... to here.
 925         (md_parse_option): Search arm_legacy_opts.
 926         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
 927         (arm_float_abis, arm_eabis): Make const.
 928
 929 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
 930
 931         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
 932
 933 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 934
 935         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
 936         in load immediate intruction.
 937
 938 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 939
 940         * config/bfin-parse.y (value_match): Use correct conversion
 941         specifications in template string for __FILE__ and __LINE__.
 942         (binary): Ditto.
 943         (unary): Ditto.
 944
 945 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
 946
 947         Introduce TLS descriptors for i386 and x86_64.
 948         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
 949         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
 950         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
 951         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
 952         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
 953         displacement bits.
 954         (build_modrm_byte): Set up zero modrm for TLS desc calls.
 955         (lex_got): Handle @tlsdesc and @tlscall.
 956         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
 957
 958 2006-01-11  Nick Clifton  <nickc@redhat.com>
 959
 960         Fixes for building on 64-bit hosts:
 961         * config/tc-avr.c (mod_index): New union to allow conversion
 962         between pointers and integers.
 963         (md_begin, avr_ldi_expression): Use it.
 964         * config/tc-i370.c (md_assemble): Add cast for argument to print
 965         statement.
 966         * config/tc-tic54x.c (subsym_substitute): Likewise.
 967         * config/tc-mn10200.c (md_assemble): Use a union to convert the
 968         opindex field of fr_cgen structure into a pointer so that it can
 969         be stored in a frag.
 970         * config/tc-mn10300.c (md_assemble): Likewise.
 971         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
 972         types.
 973         * config/tc-v850.c: Replace uses of (int) casts with correct
 974         types.
 975
 976 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
 977
 978         PR gas/2117
 979         * symbols.c (snapshot_symbol): Don't change a defined symbol.
 980
 981 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
 982
 983         PR gas/2101
 984         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
 985         a local-label reference.
 986
 987 For older changes see ChangeLog-2005
 988 \f
 989 Local Variables:
 990 mode: change-log
 991 left-margin: 8
 992 fill-column: 74
 993 version-control: never
 994 End: