1 2006-06-07 Julian Brown <julian@codesourcery.com>
3 * config/tc-arm.c (stdarg.h): include.
4 (arm_it): Add uncond_value field. Add isvec and issingle to operand
6 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
7 REG_TYPE_NSDQ (single, double or quad vector reg).
8 (reg_expected_msgs): Update.
9 (BAD_FPU): Add macro for unsupported FPU instruction error.
10 (parse_neon_type): Support 'd' as an alias for .f64.
11 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
13 (parse_vfp_reg_list): Don't update first arg on error.
14 (parse_neon_mov): Support extra syntax for VFP moves.
15 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
16 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
17 (parse_operands): Support isvec, issingle operands fields, new parse
19 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
21 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
22 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
23 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
24 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
26 (neon_shape): Redefine in terms of above.
27 (neon_shape_class): New enumeration, table of shape classes.
28 (neon_shape_el): New enumeration. One element of a shape.
29 (neon_shape_el_size): Register widths of above, where appropriate.
30 (neon_shape_info): New struct. Info for shape table.
31 (neon_shape_tab): New array.
32 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
33 (neon_check_shape): Rewrite as...
34 (neon_select_shape): New function to classify instruction shapes,
35 driven by new table neon_shape_tab array.
36 (neon_quad): New function. Return 1 if shape should set Q flag in
37 instructions (or equivalent), 0 otherwise.
38 (type_chk_of_el_type): Support F64.
39 (el_type_of_type_chk): Likewise.
40 (neon_check_type): Add support for VFP type checking (VFP data
41 elements fill their containing registers).
42 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
43 in thumb mode for VFP instructions.
44 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
45 and encode the current instruction as if it were that opcode.
46 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
47 arguments, call function in PFN.
48 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
49 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
50 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
51 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
52 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
53 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
54 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
55 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
56 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
57 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
58 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
59 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
60 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
61 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
62 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
64 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
65 between VFP and Neon turns out to belong to Neon. Perform
66 architecture check and fill in condition field if appropriate.
67 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
68 (do_neon_cvt): Add support for VFP variants of instructions.
69 (neon_cvt_flavour): Extend to cover VFP conversions.
70 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
72 (do_neon_ldr_str): Handle single-precision VFP load/store.
73 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
74 NS_NULL not NS_IGNORE.
75 (opcode_tag): Add OT_csuffixF for operands which either take a
76 conditional suffix, or have 0xF in the condition field.
77 (md_assemble): Add support for OT_csuffixF.
78 (NCE): Replace macro with...
79 (NCE_tag, NCE, NCEF): New macros.
80 (nCE): Replace macro with...
81 (nCE_tag, nCE, nCEF): New macros.
82 (insns): Add support for VFP insns or VFP versions of insns msr,
83 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
84 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
85 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
86 VFP/Neon insns together.
88 2006-06-07 Alan Modra <amodra@bigpond.net.au>
89 Ladislav Michl <ladis@linux-mips.org>
91 * app.c: Don't include headers already included by as.h.
93 * atof-generic.c: Likewise.
95 * dwarf2dbg.c: Likewise.
97 * input-file.c: Likewise.
98 * input-scrub.c: Likewise.
100 * output-file.c: Likewise.
103 * config/bfin-lex.l: Likewise.
104 * config/obj-coff.h: Likewise.
105 * config/obj-elf.h: Likewise.
106 * config/obj-som.h: Likewise.
107 * config/tc-arc.c: Likewise.
108 * config/tc-arm.c: Likewise.
109 * config/tc-avr.c: Likewise.
110 * config/tc-bfin.c: Likewise.
111 * config/tc-cris.c: Likewise.
112 * config/tc-d10v.c: Likewise.
113 * config/tc-d30v.c: Likewise.
114 * config/tc-dlx.h: Likewise.
115 * config/tc-fr30.c: Likewise.
116 * config/tc-frv.c: Likewise.
117 * config/tc-h8300.c: Likewise.
118 * config/tc-hppa.c: Likewise.
119 * config/tc-i370.c: Likewise.
120 * config/tc-i860.c: Likewise.
121 * config/tc-i960.c: Likewise.
122 * config/tc-ip2k.c: Likewise.
123 * config/tc-iq2000.c: Likewise.
124 * config/tc-m32c.c: Likewise.
125 * config/tc-m32r.c: Likewise.
126 * config/tc-maxq.c: Likewise.
127 * config/tc-mcore.c: Likewise.
128 * config/tc-mips.c: Likewise.
129 * config/tc-mmix.c: Likewise.
130 * config/tc-mn10200.c: Likewise.
131 * config/tc-mn10300.c: Likewise.
132 * config/tc-msp430.c: Likewise.
133 * config/tc-mt.c: Likewise.
134 * config/tc-ns32k.c: Likewise.
135 * config/tc-openrisc.c: Likewise.
136 * config/tc-ppc.c: Likewise.
137 * config/tc-s390.c: Likewise.
138 * config/tc-sh.c: Likewise.
139 * config/tc-sh64.c: Likewise.
140 * config/tc-sparc.c: Likewise.
141 * config/tc-tic30.c: Likewise.
142 * config/tc-tic4x.c: Likewise.
143 * config/tc-tic54x.c: Likewise.
144 * config/tc-v850.c: Likewise.
145 * config/tc-vax.c: Likewise.
146 * config/tc-xc16x.c: Likewise.
147 * config/tc-xstormy16.c: Likewise.
148 * config/tc-xtensa.c: Likewise.
149 * config/tc-z80.c: Likewise.
150 * config/tc-z8k.c: Likewise.
151 * macro.h: Don't include sb.h or ansidecl.h.
152 * sb.h: Don't include stdio.h or ansidecl.h.
153 * cond.c: Include sb.h.
154 * itbl-lex.l: Include as.h instead of other system headers.
155 * itbl-parse.y: Likewise.
156 * itbl-ops.c: Similarly.
157 * itbl-ops.h: Don't include as.h or ansidecl.h.
158 * config/bfin-defs.h: Don't include bfd.h or as.h.
159 * config/bfin-parse.y: Include as.h instead of other system headers.
161 2006-06-06 Ben Elliston <bje@au.ibm.com>
162 Anton Blanchard <anton@samba.org>
164 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
165 (md_show_usage): Document it.
166 (ppc_setup_opcodes): Test power6 opcode flag bits.
167 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
169 2006-06-06 Thiemo Seufer <ths@mips.com>
170 Chao-ying Fu <fu@mips.com>
172 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
173 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
174 (macro_build): Update comment.
175 (mips_ip): Allow DSP64 instructions for MIPS64R2.
176 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
178 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
179 MIPS_CPU_ASE_MDMX flags for sb1.
181 2006-06-05 Thiemo Seufer <ths@mips.com>
183 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
185 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
186 (mips_ip): Make overflowed/underflowed constant arguments in DSP
187 and MT instructions a fatal error. Use INSERT_OPERAND where
188 appropriate. Improve warnings for break and wait code overflows.
189 Use symbolic constant of OP_MASK_COPZ.
190 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
192 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
194 * po/Make-in (top_builddir): Define.
196 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
198 * doc/Makefile.am (TEXI2DVI): Define.
199 * doc/Makefile.in: Regenerate.
200 * doc/c-arc.texi: Fix typo.
202 2006-06-01 Alan Modra <amodra@bigpond.net.au>
204 * config/obj-ieee.c: Delete.
205 * config/obj-ieee.h: Delete.
206 * Makefile.am (OBJ_FORMATS): Remove ieee.
207 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
208 (obj-ieee.o): Remove rule.
209 * Makefile.in: Regenerate.
210 * configure.in (atof): Remove tahoe.
211 (OBJ_MAYBE_IEEE): Don't define.
212 * configure: Regenerate.
213 * config.in: Regenerate.
214 * doc/Makefile.in: Regenerate.
215 * po/POTFILES.in: Regenerate.
217 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
219 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
220 and LIBINTL_DEP everywhere.
222 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
223 * acinclude.m4: Include new gettext macros.
224 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
225 Remove local code for po/Makefile.
226 * Makefile.in, configure, doc/Makefile.in: Regenerated.
228 2006-05-30 Nick Clifton <nickc@redhat.com>
230 * po/es.po: Updated Spanish translation.
232 2006-05-06 Denis Chertykov <denisc@overta.ru>
234 * doc/c-avr.texi: New file.
235 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
236 * doc/all.texi: Set AVR
237 * doc/as.texinfo: Include c-avr.texi
239 2006-05-28 Jie Zhang <jie.zhang@analog.com>
241 * config/bfin-parse.y (check_macfunc): Loose the condition of
242 calling check_multiply_halfregs ().
244 2006-05-25 Jie Zhang <jie.zhang@analog.com>
246 * config/bfin-parse.y (asm_1): Better check and deal with
247 vector and scalar Multiply 16-Bit Operands instructions.
249 2006-05-24 Nick Clifton <nickc@redhat.com>
251 * config/tc-hppa.c: Convert to ISO C90 format.
252 * config/tc-hppa.h: Likewise.
254 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
255 Randolph Chung <randolph@tausq.org>
257 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
258 is_tls_ieoff, is_tls_leoff): Define.
259 (fix_new_hppa): Handle TLS.
260 (cons_fix_new_hppa): Likewise.
262 (md_apply_fix): Handle TLS relocs.
263 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
265 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
267 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
269 2006-05-23 Thiemo Seufer <ths@mips.com>
270 David Ung <davidu@mips.com>
271 Nigel Stephens <nigel@mips.com>
274 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
275 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
276 ISA_HAS_MXHC1): New macros.
277 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
278 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
279 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
280 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
281 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
282 (mips_after_parse_args): Change default handling of float register
283 size to account for 32bit code with 64bit FP. Better sanity checking
284 of ISA/ASE/ABI option combinations.
285 (s_mipsset): Support switching of GPR and FPR sizes via
286 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
288 (mips_elf_final_processing): We should record the use of 64bit FP
289 registers in 32bit code but we don't, because ELF header flags are
291 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
292 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
293 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
294 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
295 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
296 missing -march options. Document .set arch=CPU. Move .set smartmips
297 to ASE page. Use @code for .set FOO examples.
299 2006-05-23 Jie Zhang <jie.zhang@analog.com>
301 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
304 2006-05-23 Jie Zhang <jie.zhang@analog.com>
306 * config/bfin-defs.h (bfin_equals): Remove declaration.
307 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
308 * config/tc-bfin.c (bfin_name_is_register): Remove.
309 (bfin_equals): Remove.
310 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
311 (bfin_name_is_register): Remove declaration.
313 2006-05-19 Thiemo Seufer <ths@mips.com>
314 Nigel Stephens <nigel@mips.com>
316 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
317 (mips_oddfpreg_ok): New function.
320 2006-05-19 Thiemo Seufer <ths@mips.com>
321 David Ung <davidu@mips.com>
323 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
324 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
325 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
326 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
327 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
328 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
329 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
330 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
331 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
332 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
333 reg_names_o32, reg_names_n32n64): Define register classes.
334 (reg_lookup): New function, use register classes.
335 (md_begin): Reserve register names in the symbol table. Simplify
337 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
339 (mips16_ip): Use reg_lookup.
340 (tc_get_register): Likewise.
341 (tc_mips_regname_to_dw2regnum): New function.
343 2006-05-19 Thiemo Seufer <ths@mips.com>
345 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
346 Un-constify string argument.
347 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
349 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
351 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
353 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
355 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
357 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
360 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
362 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
363 cfloat/m68881 to correct architecture before using it.
365 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
367 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
370 2006-05-15 Paul Brook <paul@codesourcery.com>
372 * config/tc-arm.c (arm_adjust_symtab): Use
373 bfd_is_arm_special_symbol_name.
375 2006-05-15 Bob Wilson <bob.wilson@acm.org>
377 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
378 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
379 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
380 Handle errors from calls to xtensa_opcode_is_* functions.
382 2006-05-14 Thiemo Seufer <ths@mips.com>
384 * config/tc-mips.c (macro_build): Test for currently active
386 (mips16_ip): Reject invalid opcodes.
388 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
390 * doc/as.texinfo: Rename "Index" to "AS Index",
391 and "ABORT" to "ABORT (COFF)".
393 2006-05-11 Paul Brook <paul@codesourcery.com>
395 * config/tc-arm.c (parse_half): New function.
396 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
397 (parse_operands): Ditto.
398 (do_mov16): Reject invalid relocations.
399 (do_t_mov16): Ditto. Use Thumb reloc numbers.
400 (insns): Replace Iffff with HALF.
401 (md_apply_fix): Add MOVW and MOVT relocs.
402 (tc_gen_reloc): Ditto.
403 * doc/c-arm.texi: Document relocation operators
405 2006-05-11 Paul Brook <paul@codesourcery.com>
407 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
409 2006-05-11 Thiemo Seufer <ths@mips.com>
411 * config/tc-mips.c (append_insn): Don't check the range of j or
414 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
416 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
417 relocs against external symbols for WinCE targets.
418 (md_apply_fix): Likewise.
420 2006-05-09 David Ung <davidu@mips.com>
422 * config/tc-mips.c (append_insn): Only warn about an out-of-range
425 2006-05-09 Nick Clifton <nickc@redhat.com>
427 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
428 against symbols which are not going to be placed into the symbol
431 2006-05-09 Ben Elliston <bje@au.ibm.com>
433 * expr.c (operand): Remove `if (0 && ..)' statement and
434 subsequently unused target_op label. Collapse `if (1 || ..)'
436 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
437 separately above the switch.
439 2006-05-08 Nick Clifton <nickc@redhat.com>
442 * config/tc-msp430.c (line_separator_character): Define as |.
444 2006-05-08 Thiemo Seufer <ths@mips.com>
445 Nigel Stephens <nigel@mips.com>
446 David Ung <davidu@mips.com>
448 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
449 (mips_opts): Likewise.
450 (file_ase_smartmips): New variable.
451 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
452 (macro_build): Handle SmartMIPS instructions.
454 (md_longopts): Add argument handling for smartmips.
455 (md_parse_options, mips_after_parse_args): Likewise.
456 (s_mipsset): Add .set smartmips support.
457 (md_show_usage): Document -msmartmips/-mno-smartmips.
458 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
460 * doc/c-mips.texi: Likewise.
462 2006-05-08 Alan Modra <amodra@bigpond.net.au>
464 * write.c (relax_segment): Add pass count arg. Don't error on
465 negative org/space on first two passes.
466 (relax_seg_info): New struct.
467 (relax_seg, write_object_file): Adjust.
468 * write.h (relax_segment): Update prototype.
470 2006-05-05 Julian Brown <julian@codesourcery.com>
472 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
474 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
475 architecture version checks.
476 (insns): Allow overlapping instructions to be used in VFP mode.
478 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
481 * config/obj-elf.c (obj_elf_change_section): Allow user
482 specified SHF_ALPHA_GPREL.
484 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
486 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
487 for PMEM related expressions.
489 2006-05-05 Nick Clifton <nickc@redhat.com>
492 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
493 insertion of a directory separator character into a string at a
494 given offset. Uses heuristics to decide when to use a backslash
495 character rather than a forward-slash character.
496 (dwarf2_directive_loc): Use the macro.
497 (out_debug_info): Likewise.
499 2006-05-05 Thiemo Seufer <ths@mips.com>
500 David Ung <davidu@mips.com>
502 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
504 (macro): Add new case M_CACHE_AB.
506 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
508 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
509 (opcode_lookup): Issue a warning for opcode with
510 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
511 identical to OT_cinfix3.
512 (TxC3w, TC3w, tC3w): New.
513 (insns): Use tC3w and TC3w for comparison instructions with
516 2006-05-04 Alan Modra <amodra@bigpond.net.au>
518 * subsegs.h (struct frchain): Delete frch_seg.
519 (frchain_root): Delete.
520 (seg_info): Define as macro.
521 * subsegs.c (frchain_root): Delete.
522 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
523 (subsegs_begin, subseg_change): Adjust for above.
524 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
525 rather than to one big list.
526 (subseg_get): Don't special case abs, und sections.
527 (subseg_new, subseg_force_new): Don't set frchainP here.
529 (subsegs_print_statistics): Adjust frag chain control list traversal.
530 * debug.c (dmp_frags): Likewise.
531 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
532 at frchain_root. Make use of known frchain ordering.
533 (last_frag_for_seg): Likewise.
534 (get_frag_fix): Likewise. Add seg param.
535 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
536 * write.c (chain_frchains_together_1): Adjust for struct frchain.
537 (SUB_SEGMENT_ALIGN): Likewise.
538 (subsegs_finish): Adjust frchain list traversal.
539 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
540 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
541 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
542 (xtensa_fix_b_j_loop_end_frags): Likewise.
543 (xtensa_fix_close_loop_end_frags): Likewise.
544 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
545 (retrieve_segment_info): Delete frch_seg initialisation.
547 2006-05-03 Alan Modra <amodra@bigpond.net.au>
549 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
550 * config/obj-elf.h (obj_sec_set_private_data): Delete.
551 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
552 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
554 2006-05-02 Joseph Myers <joseph@codesourcery.com>
556 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
558 (md_apply_fix3): Multiply offset by 4 here for
559 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
561 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
562 Jan Beulich <jbeulich@novell.com>
564 * config/tc-i386.c (output_invalid_buf): Change size for
566 * config/tc-tic30.c (output_invalid_buf): Likewise.
568 * config/tc-i386.c (output_invalid): Cast none-ascii char to
570 * config/tc-tic30.c (output_invalid): Likewise.
572 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
574 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
575 (TEXI2POD): Use AM_MAKEINFOFLAGS.
576 (asconfig.texi): Don't set top_srcdir.
577 * doc/as.texinfo: Don't use top_srcdir.
578 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
580 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
582 * config/tc-i386.c (output_invalid_buf): Change size to 16.
583 * config/tc-tic30.c (output_invalid_buf): Likewise.
585 * config/tc-i386.c (output_invalid): Use snprintf instead of
587 * config/tc-ia64.c (declare_register_set): Likewise.
588 (emit_one_bundle): Likewise.
589 (check_dependencies): Likewise.
590 * config/tc-tic30.c (output_invalid): Likewise.
592 2006-05-02 Paul Brook <paul@codesourcery.com>
594 * config/tc-arm.c (arm_optimize_expr): New function.
595 * config/tc-arm.h (md_optimize_expr): Define
596 (arm_optimize_expr): Add prototype.
597 (TC_FORCE_RELOCATION_SUB_SAME): Define.
599 2006-05-02 Ben Elliston <bje@au.ibm.com>
601 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
604 * sb.h (sb_list_vector): Move to sb.c.
605 * sb.c (free_list): Use type of sb_list_vector directly.
606 (sb_build): Fix off-by-one error in assertion about `size'.
608 2006-05-01 Ben Elliston <bje@au.ibm.com>
610 * listing.c (listing_listing): Remove useless loop.
611 * macro.c (macro_expand): Remove is_positional local variable.
612 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
613 and simplify surrounding expressions, where possible.
614 (assign_symbol): Likewise.
615 (s_weakref): Likewise.
616 * symbols.c (colon): Likewise.
618 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
620 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
622 2006-04-30 Thiemo Seufer <ths@mips.com>
623 David Ung <davidu@mips.com>
625 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
626 (mips_immed): New table that records various handling of udi
627 instruction patterns.
628 (mips_ip): Adds udi handling.
630 2006-04-28 Alan Modra <amodra@bigpond.net.au>
632 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
633 of list rather than beginning.
635 2006-04-26 Julian Brown <julian@codesourcery.com>
637 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
638 (is_quarter_float): Rename from above. Simplify slightly.
639 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
641 (parse_neon_mov): Parse floating-point constants.
642 (neon_qfloat_bits): Fix encoding.
643 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
644 preference to integer encoding when using the F32 type.
646 2006-04-26 Julian Brown <julian@codesourcery.com>
648 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
649 zero-initialising structures containing it will lead to invalid types).
650 (arm_it): Add vectype to each operand.
651 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
653 (neon_typed_alias): New structure. Extra information for typed
655 (reg_entry): Add neon type info field.
656 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
657 Break out alternative syntax for coprocessor registers, etc. into...
658 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
659 out from arm_reg_parse.
660 (parse_neon_type): Move. Return SUCCESS/FAIL.
661 (first_error): New function. Call to ensure first error which occurs is
663 (parse_neon_operand_type): Parse exactly one type.
664 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
665 (parse_typed_reg_or_scalar): New function. Handle core of both
666 arm_typed_reg_parse and parse_scalar.
667 (arm_typed_reg_parse): Parse a register with an optional type.
668 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
670 (parse_scalar): Parse a Neon scalar with optional type.
671 (parse_reg_list): Use first_error.
672 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
673 (neon_alias_types_same): New function. Return true if two (alias) types
675 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
677 (insert_reg_alias): Return new reg_entry not void.
678 (insert_neon_reg_alias): New function. Insert type/index information as
679 well as register for alias.
680 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
681 make typed register aliases accordingly.
682 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
684 (s_unreq): Delete type information if present.
685 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
686 (s_arm_unwind_save_mmxwcg): Likewise.
687 (s_arm_unwind_movsp): Likewise.
688 (s_arm_unwind_setfp): Likewise.
689 (parse_shift): Likewise.
690 (parse_shifter_operand): Likewise.
691 (parse_address): Likewise.
692 (parse_tb): Likewise.
693 (tc_arm_regname_to_dw2regnum): Likewise.
694 (md_pseudo_table): Add dn, qn.
695 (parse_neon_mov): Handle typed operands.
696 (parse_operands): Likewise.
697 (neon_type_mask): Add N_SIZ.
698 (N_ALLMODS): New macro.
699 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
700 (el_type_of_type_chk): Add some safeguards.
701 (modify_types_allowed): Fix logic bug.
702 (neon_check_type): Handle operands with types.
703 (neon_three_same): Remove redundant optional arg handling.
704 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
705 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
706 (do_neon_step): Adjust accordingly.
707 (neon_cmode_for_logic_imm): Use first_error.
708 (do_neon_bitfield): Call neon_check_type.
709 (neon_dyadic): Rename to...
710 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
711 to allow modification of type of the destination.
712 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
713 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
714 (do_neon_compare): Make destination be an untyped bitfield.
715 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
716 (neon_mul_mac): Return early in case of errors.
717 (neon_move_immediate): Use first_error.
718 (neon_mac_reg_scalar_long): Fix type to include scalar.
719 (do_neon_dup): Likewise.
720 (do_neon_mov): Likewise (in several places).
721 (do_neon_tbl_tbx): Fix type.
722 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
723 (do_neon_ld_dup): Exit early in case of errors and/or use
725 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
726 Handle .dn/.qn directives.
727 (REGDEF): Add zero for reg_entry neon field.
729 2006-04-26 Julian Brown <julian@codesourcery.com>
731 * config/tc-arm.c (limits.h): Include.
732 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
733 (fpu_vfp_v3_or_neon_ext): Declare constants.
734 (neon_el_type): New enumeration of types for Neon vector elements.
735 (neon_type_el): New struct. Define type and size of a vector element.
736 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
738 (neon_type): Define struct. The type of an instruction.
739 (arm_it): Add 'vectype' for the current instruction.
740 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
741 (vfp_sp_reg_pos): Rename to...
742 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
744 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
745 (Neon D or Q register).
746 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
748 (GE_OPT_PREFIX_BIG): Define constant, for use in...
749 (my_get_expression): Allow above constant as argument to accept
750 64-bit constants with optional prefix.
751 (arm_reg_parse): Add extra argument to return the specific type of
752 register in when either a D or Q register (REG_TYPE_NDQ) is
753 requested. Can be NULL.
754 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
755 (parse_reg_list): Update for new arm_reg_parse args.
756 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
757 (parse_neon_el_struct_list): New function. Parse element/structure
758 register lists for VLD<n>/VST<n> instructions.
759 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
760 (s_arm_unwind_save_mmxwr): Likewise.
761 (s_arm_unwind_save_mmxwcg): Likewise.
762 (s_arm_unwind_movsp): Likewise.
763 (s_arm_unwind_setfp): Likewise.
764 (parse_big_immediate): New function. Parse an immediate, which may be
765 64 bits wide. Put results in inst.operands[i].
766 (parse_shift): Update for new arm_reg_parse args.
767 (parse_address): Likewise. Add parsing of alignment specifiers.
768 (parse_neon_mov): Parse the operands of a VMOV instruction.
769 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
770 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
771 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
772 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
773 (parse_operands): Handle new codes above.
774 (encode_arm_vfp_sp_reg): Rename to...
775 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
776 selected VFP version only supports D0-D15.
777 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
778 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
779 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
780 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
781 encode_arm_vfp_reg name, and allow 32 D regs.
782 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
783 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
785 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
786 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
787 constant-load and conversion insns introduced with VFPv3.
788 (neon_tab_entry): New struct.
789 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
790 those which are the targets of pseudo-instructions.
791 (neon_opc): Enumerate opcodes, use as indices into...
792 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
793 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
794 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
795 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
797 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
799 (neon_type_mask): New. Compact type representation for type checking.
800 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
801 permitted type combinations.
802 (N_IGNORE_TYPE): New macro.
803 (neon_check_shape): New function. Check an instruction shape for
804 multiple alternatives. Return the specific shape for the current
806 (neon_modify_type_size): New function. Modify a vector type and size,
807 depending on the bit mask in argument 1.
808 (neon_type_promote): New function. Convert a given "key" type (of an
809 operand) into the correct type for a different operand, based on a bit
811 (type_chk_of_el_type): New function. Convert a type and size into the
812 compact representation used for type checking.
813 (el_type_of_type_ckh): New function. Reverse of above (only when a
814 single bit is set in the bit mask).
815 (modify_types_allowed): New function. Alter a mask of allowed types
816 based on a bit mask of modifications.
817 (neon_check_type): New function. Check the type of the current
818 instruction against the variable argument list. The "key" type of the
819 instruction is returned.
820 (neon_dp_fixup): New function. Fill in and modify instruction bits for
821 a Neon data-processing instruction depending on whether we're in ARM
822 mode or Thumb-2 mode.
823 (neon_logbits): New function.
824 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
825 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
826 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
827 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
828 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
829 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
830 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
831 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
832 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
833 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
834 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
835 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
836 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
837 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
838 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
839 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
840 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
841 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
842 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
843 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
844 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
845 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
846 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
847 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
848 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
850 (parse_neon_type): New function. Parse Neon type specifier.
851 (opcode_lookup): Allow parsing of Neon type specifiers.
852 (REGNUM2, REGSETH, REGSET2): New macros.
853 (reg_names): Add new VFPv3 and Neon registers.
854 (NUF, nUF, NCE, nCE): New macros for opcode table.
855 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
856 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
857 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
858 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
859 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
860 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
861 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
862 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
863 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
864 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
865 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
866 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
867 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
868 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
870 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
871 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
872 (arm_option_cpu_value): Add vfp3 and neon.
873 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
876 2006-04-25 Bob Wilson <bob.wilson@acm.org>
878 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
879 syntax instead of hardcoded opcodes with ".w18" suffixes.
880 (wide_branch_opcode): New.
881 (build_transition): Use it to check for wide branch opcodes with
882 either ".w18" or ".w15" suffixes.
884 2006-04-25 Bob Wilson <bob.wilson@acm.org>
886 * config/tc-xtensa.c (xtensa_create_literal_symbol,
887 xg_assemble_literal, xg_assemble_literal_space): Do not set the
888 frag's is_literal flag.
890 2006-04-25 Bob Wilson <bob.wilson@acm.org>
892 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
894 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
896 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
897 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
898 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
899 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
900 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
902 2005-04-20 Paul Brook <paul@codesourcery.com>
904 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
906 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
908 2006-04-19 Alan Modra <amodra@bigpond.net.au>
910 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
911 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
912 Make some cpus unsupported on ELF. Run "make dep-am".
913 * Makefile.in: Regenerate.
915 2006-04-19 Alan Modra <amodra@bigpond.net.au>
917 * configure.in (--enable-targets): Indent help message.
918 * configure: Regenerate.
920 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
923 * config/tc-i386.c (i386_immediate): Check illegal immediate
926 2006-04-18 Alan Modra <amodra@bigpond.net.au>
928 * config/tc-i386.c: Formatting.
929 (output_disp, output_imm): ISO C90 params.
931 * frags.c (frag_offset_fixed_p): Constify args.
932 * frags.h (frag_offset_fixed_p): Ditto.
934 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
935 (COFF_MAGIC): Delete.
937 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
939 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
941 * po/POTFILES.in: Regenerated.
943 2006-04-16 Mark Mitchell <mark@codesourcery.com>
945 * doc/as.texinfo: Mention that some .type syntaxes are not
946 supported on all architectures.
948 2006-04-14 Sterling Augustine <sterling@tensilica.com>
950 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
951 instructions when such transformations have been disabled.
953 2006-04-10 Sterling Augustine <sterling@tensilica.com>
955 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
956 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
957 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
958 decoding the loop instructions. Remove current_offset variable.
959 (xtensa_fix_short_loop_frags): Likewise.
960 (min_bytes_to_other_loop_end): Remove current_offset argument.
962 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
964 * config/tc-z80.c (z80_optimize_expr): Removed.
965 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
967 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
969 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
970 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
971 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
972 atmega644, atmega329, atmega3290, atmega649, atmega6490,
973 atmega406, atmega640, atmega1280, atmega1281, at90can32,
974 at90can64, at90usb646, at90usb647, at90usb1286 and
976 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
978 2006-04-07 Paul Brook <paul@codesourcery.com>
980 * config/tc-arm.c (parse_operands): Set default error message.
982 2006-04-07 Paul Brook <paul@codesourcery.com>
984 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
986 2006-04-07 Paul Brook <paul@codesourcery.com>
988 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
990 2006-04-07 Paul Brook <paul@codesourcery.com>
992 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
993 (move_or_literal_pool): Handle Thumb-2 instructions.
994 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
996 2006-04-07 Alan Modra <amodra@bigpond.net.au>
999 * config/tc-i386.c (match_template): Move 64-bit operand tests
1002 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1004 * po/Make-in: Add install-html target.
1005 * Makefile.am: Add install-html and install-html-recursive targets.
1006 * Makefile.in: Regenerate.
1007 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1008 * configure: Regenerate.
1009 * doc/Makefile.am: Add install-html and install-html-am targets.
1010 * doc/Makefile.in: Regenerate.
1012 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1014 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1017 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1018 Daniel Jacobowitz <dan@codesourcery.com>
1020 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1021 (GOTT_BASE, GOTT_INDEX): New.
1022 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1023 GOTT_INDEX when generating VxWorks PIC.
1024 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1025 use the generic *-*-vxworks* stanza instead.
1027 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1030 * frags.c (frag_offset_fixed_p): New function.
1031 * frags.h (frag_offset_fixed_p): Declare.
1032 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1033 (resolve_expression): Likewise.
1035 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1037 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1038 of the same length but different numbers of slots.
1040 2006-03-30 Andreas Schwab <schwab@suse.de>
1042 * configure.in: Fix help string for --enable-targets option.
1043 * configure: Regenerate.
1045 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1047 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1048 (m68k_ip): ... here. Use for all chips. Protect against buffer
1049 overrun and avoid excessive copying.
1051 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1052 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1053 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1054 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1055 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1056 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1057 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1058 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1059 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1060 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1061 (struct m68k_cpu): Change chip field to control_regs.
1062 (current_chip): Remove.
1063 (control_regs): New.
1064 (m68k_archs, m68k_extensions): Adjust.
1065 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1066 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1067 (find_cf_chip): Reimplement for new organization of cpu table.
1068 (select_control_regs): Remove.
1070 (struct save_opts): Save control regs, not chip.
1071 (s_save, s_restore): Adjust.
1072 (m68k_lookup_cpu): Give deprecated warning when necessary.
1073 (m68k_init_arch): Adjust.
1074 (md_show_usage): Adjust for new cpu table organization.
1076 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1078 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1079 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1080 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1082 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1083 (any_gotrel): New rule.
1084 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1085 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1087 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1088 (bfin_pic_ptr): New function.
1089 (md_pseudo_table): Add it for ".picptr".
1090 (OPTION_FDPIC): New macro.
1091 (md_longopts): Add -mfdpic.
1092 (md_parse_option): Handle it.
1093 (md_begin): Set BFD flags.
1094 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1095 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1097 * Makefile.am (bfin-parse.o): Update dependencies.
1098 (DEPTC_bfin_elf): Likewise.
1099 * Makefile.in: Regenerate.
1101 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1103 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1104 mcfemac instead of mcfmac.
1106 2006-03-23 Michael Matz <matz@suse.de>
1108 * config/tc-i386.c (type_names): Correct placement of 'static'.
1109 (reloc): Map some more relocs to their 64 bit counterpart when
1111 (output_insn): Work around breakage if DEBUG386 is defined.
1112 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1113 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1114 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1115 different from i386.
1116 (output_imm): Ditto.
1117 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1119 (md_convert_frag): Jumps can now be larger than 2GB away, error
1121 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1122 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1124 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1125 Daniel Jacobowitz <dan@codesourcery.com>
1126 Phil Edwards <phil@codesourcery.com>
1127 Zack Weinberg <zack@codesourcery.com>
1128 Mark Mitchell <mark@codesourcery.com>
1129 Nathan Sidwell <nathan@codesourcery.com>
1131 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1132 (md_begin): Complain about -G being used for PIC. Don't change
1133 the text, data and bss alignments on VxWorks.
1134 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1135 generating VxWorks PIC.
1136 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1137 (macro): Likewise, but do not treat la $25 specially for
1138 VxWorks PIC, and do not handle jal.
1139 (OPTION_MVXWORKS_PIC): New macro.
1140 (md_longopts): Add -mvxworks-pic.
1141 (md_parse_option): Don't complain about using PIC and -G together here.
1142 Handle OPTION_MVXWORKS_PIC.
1143 (md_estimate_size_before_relax): Always use the first relaxation
1144 sequence on VxWorks.
1145 * config/tc-mips.h (VXWORKS_PIC): New.
1147 2006-03-21 Paul Brook <paul@codesourcery.com>
1149 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1151 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1153 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1154 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1155 (get_loop_align_size): New.
1156 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1157 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1158 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1159 (get_noop_aligned_address): Use get_loop_align_size.
1160 (get_aligned_diff): Likewise.
1162 2006-03-21 Paul Brook <paul@codesourcery.com>
1164 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1166 2006-03-20 Paul Brook <paul@codesourcery.com>
1168 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1169 (do_t_branch): Encode branches inside IT blocks as unconditional.
1170 (do_t_cps): New function.
1171 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1172 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1173 (opcode_lookup): Allow conditional suffixes on all instructions in
1175 (md_assemble): Advance condexec state before checking for errors.
1176 (insns): Use do_t_cps.
1178 2006-03-20 Paul Brook <paul@codesourcery.com>
1180 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1181 outputting the insn.
1183 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1185 * config/tc-vax.c: Update copyright year.
1186 * config/tc-vax.h: Likewise.
1188 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1190 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1192 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1194 2006-03-17 Paul Brook <paul@codesourcery.com>
1196 * config/tc-arm.c (insns): Add ldm and stm.
1198 2006-03-17 Ben Elliston <bje@au.ibm.com>
1201 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1203 2006-03-16 Paul Brook <paul@codesourcery.com>
1205 * config/tc-arm.c (insns): Add "svc".
1207 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1209 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1210 flag and avoid double underscore prefixes.
1212 2006-03-10 Paul Brook <paul@codesourcery.com>
1214 * config/tc-arm.c (md_begin): Handle EABIv5.
1215 (arm_eabis): Add EF_ARM_EABI_VER5.
1216 * doc/c-arm.texi: Document -meabi=5.
1218 2006-03-10 Ben Elliston <bje@au.ibm.com>
1220 * app.c (do_scrub_chars): Simplify string handling.
1222 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1223 Daniel Jacobowitz <dan@codesourcery.com>
1224 Zack Weinberg <zack@codesourcery.com>
1225 Nathan Sidwell <nathan@codesourcery.com>
1226 Paul Brook <paul@codesourcery.com>
1227 Ricardo Anguiano <anguiano@codesourcery.com>
1228 Phil Edwards <phil@codesourcery.com>
1230 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1231 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1233 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1234 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1235 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1237 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1239 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1240 even when using the text-section-literals option.
1242 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1244 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1246 (m68k_ip): <case 'J'> Check we have some control regs.
1247 (md_parse_option): Allow raw arch switch.
1248 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1249 whether 68881 or cfloat was meant by -mfloat.
1250 (md_show_usage): Adjust extension display.
1251 (m68k_elf_final_processing): Adjust.
1253 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1255 * config/tc-avr.c (avr_mod_hash_value): New function.
1256 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1257 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1258 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1259 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1261 (tc_gen_reloc): Handle substractions of symbols, if possible do
1262 fixups, abort otherwise.
1263 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1264 tc_fix_adjustable): Define.
1266 2006-03-02 James E Wilson <wilson@specifix.com>
1268 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1269 change the template, then clear md.slot[curr].end_of_insn_group.
1271 2006-02-28 Jan Beulich <jbeulich@novell.com>
1273 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1275 2006-02-28 Jan Beulich <jbeulich@novell.com>
1278 * macro.c (getstring): Don't treat parentheses special anymore.
1279 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1280 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1283 2006-02-28 Mat <mat@csail.mit.edu>
1285 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1287 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1289 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1291 (CFI_signal_frame): Define.
1292 (cfi_pseudo_table): Add .cfi_signal_frame.
1293 (dot_cfi): Handle CFI_signal_frame.
1294 (output_cie): Handle cie->signal_frame.
1295 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1296 different. Copy signal_frame from FDE to newly created CIE.
1297 * doc/as.texinfo: Document .cfi_signal_frame.
1299 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1301 * doc/Makefile.am: Add html target.
1302 * doc/Makefile.in: Regenerate.
1303 * po/Make-in: Add html target.
1305 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1307 * config/tc-i386.c (output_insn): Support Intel Merom New
1310 * config/tc-i386.h (CpuMNI): New.
1311 (CpuUnknownFlags): Add CpuMNI.
1313 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1315 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1316 (hpriv_reg_table): New table for hyperprivileged registers.
1317 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1320 2006-02-24 DJ Delorie <dj@redhat.com>
1322 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1323 (tc_gen_reloc): Don't define.
1324 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1325 (OPTION_LINKRELAX): New.
1326 (md_longopts): Add it.
1328 (md_parse_options): Set it.
1329 (md_assemble): Emit relaxation relocs as needed.
1330 (md_convert_frag): Emit relaxation relocs as needed.
1331 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1332 (m32c_apply_fix): New.
1333 (tc_gen_reloc): New.
1334 (m32c_force_relocation): Force out jump relocs when relaxing.
1335 (m32c_fix_adjustable): Return false if relaxing.
1337 2006-02-24 Paul Brook <paul@codesourcery.com>
1339 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1340 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1341 (struct asm_barrier_opt): Define.
1342 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1343 (parse_psr): Accept V7M psr names.
1344 (parse_barrier): New function.
1345 (enum operand_parse_code): Add OP_oBARRIER.
1346 (parse_operands): Implement OP_oBARRIER.
1347 (do_barrier): New function.
1348 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1349 (do_t_cpsi): Add V7M restrictions.
1350 (do_t_mrs, do_t_msr): Validate V7M variants.
1351 (md_assemble): Check for NULL variants.
1352 (v7m_psrs, barrier_opt_names): New tables.
1353 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1354 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1355 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1356 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1357 (struct cpu_arch_ver_table): Define.
1358 (cpu_arch_ver): New.
1359 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1360 Tag_CPU_arch_profile.
1361 * doc/c-arm.texi: Document new cpu and arch options.
1363 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1365 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1367 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1369 * config/tc-ia64.c: Update copyright years.
1371 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1373 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1376 2005-02-22 Paul Brook <paul@codesourcery.com>
1378 * config/tc-arm.c (do_pld): Remove incorrect write to
1380 (encode_thumb32_addr_mode): Use correct operand.
1382 2006-02-21 Paul Brook <paul@codesourcery.com>
1384 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1386 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1387 Anil Paranjape <anilp1@kpitcummins.com>
1388 Shilin Shakti <shilins@kpitcummins.com>
1390 * Makefile.am: Add xc16x related entry.
1391 * Makefile.in: Regenerate.
1392 * configure.in: Added xc16x related entry.
1393 * configure: Regenerate.
1394 * config/tc-xc16x.h: New file
1395 * config/tc-xc16x.c: New file
1396 * doc/c-xc16x.texi: New file for xc16x
1397 * doc/all.texi: Entry for xc16x
1398 * doc/Makefile.texi: Added c-xc16x.texi
1399 * NEWS: Announce the support for the new target.
1401 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1403 * configure.tgt: set emulation for mips-*-netbsd*
1405 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1407 * config.in: Rebuilt.
1409 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1411 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1412 from 1, not 0, in error messages.
1413 (md_assemble): Simplify special-case check for ENTRY instructions.
1414 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1415 operand in error message.
1417 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1419 * configure.tgt (arm-*-linux-gnueabi*): Change to
1422 2006-02-10 Nick Clifton <nickc@redhat.com>
1424 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1425 32-bit value is propagated into the upper bits of a 64-bit long.
1427 * config/tc-arc.c (init_opcode_tables): Fix cast.
1428 (arc_extoper, md_operand): Likewise.
1430 2006-02-09 David Heine <dlheine@tensilica.com>
1432 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1433 each relaxation step.
1435 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1437 * configure.in (CHECK_DECLS): Add vsnprintf.
1438 * configure: Regenerate.
1439 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1440 include/declare here, but...
1441 * as.h: Move code detecting VARARGS idiom to the top.
1442 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1443 (vsnprintf): Declare if not already declared.
1445 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1447 * as.c (close_output_file): New.
1448 (main): Register close_output_file with xatexit before
1449 dump_statistics. Don't call output_file_close.
1451 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1453 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1454 mcf5329_control_regs): New.
1455 (not_current_architecture, selected_arch, selected_cpu): New.
1456 (m68k_archs, m68k_extensions): New.
1457 (archs): Renamed to ...
1458 (m68k_cpus): ... here. Adjust.
1460 (md_pseudo_table): Add arch and cpu directives.
1461 (find_cf_chip, m68k_ip): Adjust table scanning.
1462 (no_68851, no_68881): Remove.
1463 (md_assemble): Lazily initialize.
1464 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1465 (md_init_after_args): Move functionality to m68k_init_arch.
1466 (mri_chip): Adjust table scanning.
1467 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1468 options with saner parsing.
1469 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1470 m68k_init_arch): New.
1471 (s_m68k_cpu, s_m68k_arch): New.
1472 (md_show_usage): Adjust.
1473 (m68k_elf_final_processing): Set CF EF flags.
1474 * config/tc-m68k.h (m68k_init_after_args): Remove.
1475 (tc_init_after_args): Remove.
1476 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1477 (M68k-Directives): Document .arch and .cpu directives.
1479 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1481 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1482 synonyms for equ and defl.
1483 (z80_cons_fix_new): New function.
1484 (emit_byte): Disallow relative jumps to absolute locations.
1485 (emit_data): Only handle defb, prototype changed, because defb is
1486 now handled as pseudo-op rather than an instruction.
1487 (instab): Entries for defb,defw,db,dw moved from here...
1488 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1489 Add entries for def24,def32,d24,d32.
1490 (md_assemble): Improved error handling.
1491 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1492 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1493 (z80_cons_fix_new): Declare.
1494 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1495 (def24,d24,def32,d32): New pseudo-ops.
1497 2006-02-02 Paul Brook <paul@codesourcery.com>
1499 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1501 2005-02-02 Paul Brook <paul@codesourcery.com>
1503 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1504 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1505 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1506 T2_OPCODE_RSB): Define.
1507 (thumb32_negate_data_op): New function.
1508 (md_apply_fix): Use it.
1510 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1512 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1514 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1515 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1517 (relaxation_requirements): Add pfinish_frag argument and use it to
1518 replace setting tinsn->record_fix fields.
1519 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1520 and vinsn_to_insnbuf. Remove references to record_fix and
1521 slot_sub_symbols fields.
1522 (xtensa_mark_narrow_branches): Delete unused code.
1523 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1525 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1527 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1528 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1529 of the record_fix field. Simplify error messages for unexpected
1531 (set_expr_symbol_offset_diff): Delete.
1533 2006-01-31 Paul Brook <paul@codesourcery.com>
1535 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1537 2006-01-31 Paul Brook <paul@codesourcery.com>
1538 Richard Earnshaw <rearnsha@arm.com>
1540 * config/tc-arm.c: Use arm_feature_set.
1541 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1542 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1543 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1546 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1547 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1548 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1549 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1551 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1552 (arm_opts): Move old cpu/arch options from here...
1553 (arm_legacy_opts): ... to here.
1554 (md_parse_option): Search arm_legacy_opts.
1555 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1556 (arm_float_abis, arm_eabis): Make const.
1558 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1560 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1562 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1564 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1565 in load immediate intruction.
1567 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1569 * config/bfin-parse.y (value_match): Use correct conversion
1570 specifications in template string for __FILE__ and __LINE__.
1574 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1576 Introduce TLS descriptors for i386 and x86_64.
1577 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1578 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1579 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1580 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1581 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1583 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1584 (lex_got): Handle @tlsdesc and @tlscall.
1585 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1587 2006-01-11 Nick Clifton <nickc@redhat.com>
1589 Fixes for building on 64-bit hosts:
1590 * config/tc-avr.c (mod_index): New union to allow conversion
1591 between pointers and integers.
1592 (md_begin, avr_ldi_expression): Use it.
1593 * config/tc-i370.c (md_assemble): Add cast for argument to print
1595 * config/tc-tic54x.c (subsym_substitute): Likewise.
1596 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1597 opindex field of fr_cgen structure into a pointer so that it can
1598 be stored in a frag.
1599 * config/tc-mn10300.c (md_assemble): Likewise.
1600 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1602 * config/tc-v850.c: Replace uses of (int) casts with correct
1605 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1608 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1610 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1613 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1614 a local-label reference.
1616 For older changes see ChangeLog-2005
1622 version-control: never