gas/ChangeLog

   1 2006-04-26  Julian Brown  <julian@codesourcery.com>
   2
   3         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
   4         (is_quarter_float): Rename from above. Simplify slightly.
   5         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
   6         number.
   7         (parse_neon_mov): Parse floating-point constants.
   8         (neon_qfloat_bits): Fix encoding.
   9         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
  10         preference to integer encoding when using the F32 type.
  11
  12 2006-04-26  Julian Brown  <julian@codesourcery.com>
  13
  14         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
  15         zero-initialising structures containing it will lead to invalid types).
  16         (arm_it): Add vectype to each operand.
  17         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
  18         defined field.
  19         (neon_typed_alias): New structure. Extra information for typed
  20         register aliases.
  21         (reg_entry): Add neon type info field.
  22         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
  23         Break out alternative syntax for coprocessor registers, etc. into...
  24         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
  25         out from arm_reg_parse.
  26         (parse_neon_type): Move. Return SUCCESS/FAIL.
  27         (first_error): New function. Call to ensure first error which occurs is
  28         reported.
  29         (parse_neon_operand_type): Parse exactly one type.
  30         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
  31         (parse_typed_reg_or_scalar): New function. Handle core of both
  32         arm_typed_reg_parse and parse_scalar.
  33         (arm_typed_reg_parse): Parse a register with an optional type.
  34         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
  35         result.
  36         (parse_scalar): Parse a Neon scalar with optional type.
  37         (parse_reg_list): Use first_error.
  38         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
  39         (neon_alias_types_same): New function. Return true if two (alias) types
  40         are the same.
  41         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
  42         of elements.
  43         (insert_reg_alias): Return new reg_entry not void.
  44         (insert_neon_reg_alias): New function. Insert type/index information as
  45         well as register for alias.
  46         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
  47         make typed register aliases accordingly.
  48         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
  49         of line.
  50         (s_unreq): Delete type information if present.
  51         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
  52         (s_arm_unwind_save_mmxwcg): Likewise.
  53         (s_arm_unwind_movsp): Likewise.
  54         (s_arm_unwind_setfp): Likewise.
  55         (parse_shift): Likewise.
  56         (parse_shifter_operand): Likewise.
  57         (parse_address): Likewise.
  58         (parse_tb): Likewise.
  59         (tc_arm_regname_to_dw2regnum): Likewise.
  60         (md_pseudo_table): Add dn, qn.
  61         (parse_neon_mov): Handle typed operands.
  62         (parse_operands): Likewise.
  63         (neon_type_mask): Add N_SIZ.
  64         (N_ALLMODS): New macro.
  65         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
  66         (el_type_of_type_chk): Add some safeguards.
  67         (modify_types_allowed): Fix logic bug.
  68         (neon_check_type): Handle operands with types.
  69         (neon_three_same): Remove redundant optional arg handling.
  70         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
  71         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
  72         (do_neon_step): Adjust accordingly.
  73         (neon_cmode_for_logic_imm): Use first_error.
  74         (do_neon_bitfield): Call neon_check_type.
  75         (neon_dyadic): Rename to...
  76         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
  77         to allow modification of type of the destination.
  78         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
  79         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
  80         (do_neon_compare): Make destination be an untyped bitfield.
  81         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
  82         (neon_mul_mac): Return early in case of errors.
  83         (neon_move_immediate): Use first_error.
  84         (neon_mac_reg_scalar_long): Fix type to include scalar.
  85         (do_neon_dup): Likewise.
  86         (do_neon_mov): Likewise (in several places).
  87         (do_neon_tbl_tbx): Fix type.
  88         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
  89         (do_neon_ld_dup): Exit early in case of errors and/or use
  90         first_error.
  91         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
  92         Handle .dn/.qn directives.
  93         (REGDEF): Add zero for reg_entry neon field.
  94
  95 2006-04-26  Julian Brown  <julian@codesourcery.com>
  96
  97         * config/tc-arm.c (limits.h): Include.
  98         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
  99         (fpu_vfp_v3_or_neon_ext): Declare constants.
 100         (neon_el_type): New enumeration of types for Neon vector elements.
 101         (neon_type_el): New struct. Define type and size of a vector element.
 102         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 103         instruction.
 104         (neon_type): Define struct. The type of an instruction.
 105         (arm_it): Add 'vectype' for the current instruction.
 106         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 107         (vfp_sp_reg_pos): Rename to...
 108         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 109         tags.
 110         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 111         (Neon D or Q register).
 112         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 113         register.
 114         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 115         (my_get_expression): Allow above constant as argument to accept
 116         64-bit constants with optional prefix.
 117         (arm_reg_parse): Add extra argument to return the specific type of
 118         register in when either a D or Q register (REG_TYPE_NDQ) is
 119         requested. Can be NULL.
 120         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 121         (parse_reg_list): Update for new arm_reg_parse args.
 122         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 123         (parse_neon_el_struct_list): New function. Parse element/structure
 124         register lists for VLD<n>/VST<n> instructions.
 125         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 126         (s_arm_unwind_save_mmxwr): Likewise.
 127         (s_arm_unwind_save_mmxwcg): Likewise.
 128         (s_arm_unwind_movsp): Likewise.
 129         (s_arm_unwind_setfp): Likewise.
 130         (parse_big_immediate): New function. Parse an immediate, which may be
 131         64 bits wide. Put results in inst.operands[i].
 132         (parse_shift): Update for new arm_reg_parse args.
 133         (parse_address): Likewise. Add parsing of alignment specifiers.
 134         (parse_neon_mov): Parse the operands of a VMOV instruction.
 135         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 136         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 137         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 138         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 139         (parse_operands): Handle new codes above.
 140         (encode_arm_vfp_sp_reg): Rename to...
 141         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 142         selected VFP version only supports D0-D15.
 143         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 144         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 145         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 146         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 147         encode_arm_vfp_reg name, and allow 32 D regs.
 148         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 149         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 150         regs.
 151         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 152         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 153         constant-load and conversion insns introduced with VFPv3.
 154         (neon_tab_entry): New struct.
 155         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 156         those which are the targets of pseudo-instructions.
 157         (neon_opc): Enumerate opcodes, use as indices into...
 158         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 159         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 160         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 161         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 162         neon_enc_tab.
 163         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 164         Neon instructions.
 165         (neon_type_mask): New. Compact type representation for type checking.
 166         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 167         permitted type combinations.
 168         (N_IGNORE_TYPE): New macro.
 169         (neon_check_shape): New function. Check an instruction shape for
 170         multiple alternatives. Return the specific shape for the current
 171         instruction.
 172         (neon_modify_type_size): New function. Modify a vector type and size,
 173         depending on the bit mask in argument 1.
 174         (neon_type_promote): New function. Convert a given "key" type (of an
 175         operand) into the correct type for a different operand, based on a bit
 176         mask.
 177         (type_chk_of_el_type): New function. Convert a type and size into the
 178         compact representation used for type checking.
 179         (el_type_of_type_ckh): New function. Reverse of above (only when a
 180         single bit is set in the bit mask).
 181         (modify_types_allowed): New function. Alter a mask of allowed types
 182         based on a bit mask of modifications.
 183         (neon_check_type): New function. Check the type of the current
 184         instruction against the variable argument list. The "key" type of the
 185         instruction is returned.
 186         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 187         a Neon data-processing instruction depending on whether we're in ARM
 188         mode or Thumb-2 mode.
 189         (neon_logbits): New function.
 190         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 191         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 192         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 193         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 194         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 195         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 196         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 197         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 198         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 199         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 200         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 201         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 202         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 203         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 204         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 205         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 206         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 207         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 208         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 209         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 210         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 211         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 212         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 213         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 214         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 215         helpers.
 216         (parse_neon_type): New function. Parse Neon type specifier.
 217         (opcode_lookup): Allow parsing of Neon type specifiers.
 218         (REGNUM2, REGSETH, REGSET2): New macros.
 219         (reg_names): Add new VFPv3 and Neon registers.
 220         (NUF, nUF, NCE, nCE): New macros for opcode table.
 221         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 222         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 223         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 224         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 225         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 226         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 227         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 228         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 229         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 230         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 231         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 232         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 233         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 234         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 235         fto[us][lh][sd].
 236         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 237         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 238         (arm_option_cpu_value): Add vfp3 and neon.
 239         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 240         VFPv1 attribute.
 241
 242 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 243
 244         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 245         syntax instead of hardcoded opcodes with ".w18" suffixes.
 246         (wide_branch_opcode): New.
 247         (build_transition): Use it to check for wide branch opcodes with
 248         either ".w18" or ".w15" suffixes.
 249
 250 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 251
 252         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 253         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 254         frag's is_literal flag.
 255
 256 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 257
 258         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 259
 260 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 261
 262         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 263         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 264         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 265         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 266         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 267
 268 2005-04-20  Paul Brook  <paul@codesourcery.com>
 269
 270         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 271         all targets.
 272         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 273
 274 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 275
 276         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 277         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 278         Make some cpus unsupported on ELF.  Run "make dep-am".
 279         * Makefile.in: Regenerate.
 280
 281 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 282
 283         * configure.in (--enable-targets): Indent help message.
 284         * configure: Regenerate.
 285
 286 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 287
 288         PR gas/2533
 289         * config/tc-i386.c (i386_immediate): Check illegal immediate
 290         register operand.
 291
 292 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 293
 294         * config/tc-i386.c: Formatting.
 295         (output_disp, output_imm): ISO C90 params.
 296
 297         * frags.c (frag_offset_fixed_p): Constify args.
 298         * frags.h (frag_offset_fixed_p): Ditto.
 299
 300         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 301         (COFF_MAGIC): Delete.
 302
 303         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 304
 305 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 306
 307         * po/POTFILES.in: Regenerated.
 308
 309 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 310
 311         * doc/as.texinfo: Mention that some .type syntaxes are not
 312         supported on all architectures.
 313
 314 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 315
 316         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 317         instructions when such transformations have been disabled.
 318
 319 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 320
 321         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 322         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 323         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 324         decoding the loop instructions.  Remove current_offset variable.
 325         (xtensa_fix_short_loop_frags): Likewise.
 326         (min_bytes_to_other_loop_end): Remove current_offset argument.
 327
 328 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 329
 330         * config/tc-z80.c (z80_optimize_expr): Removed.
 331         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 332
 333 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 334
 335         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 336         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 337         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 338         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 339         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 340         at90can64, at90usb646, at90usb647, at90usb1286 and
 341         at90usb1287.
 342         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 343
 344 2006-04-07  Paul Brook  <paul@codesourcery.com>
 345
 346         * config/tc-arm.c (parse_operands): Set default error message.
 347
 348 2006-04-07  Paul Brook  <paul@codesourcery.com>
 349
 350         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 351
 352 2006-04-07  Paul Brook  <paul@codesourcery.com>
 353
 354         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 355
 356 2006-04-07  Paul Brook  <paul@codesourcery.com>
 357
 358         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 359         (move_or_literal_pool): Handle Thumb-2 instructions.
 360         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 361
 362 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 363
 364         PR 2512.
 365         * config/tc-i386.c (match_template): Move 64-bit operand tests
 366         inside loop.
 367
 368 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 369
 370         * po/Make-in: Add install-html target.
 371         * Makefile.am: Add install-html and install-html-recursive targets.
 372         * Makefile.in: Regenerate.
 373         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 374         * configure: Regenerate.
 375         * doc/Makefile.am: Add install-html and install-html-am targets.
 376         * doc/Makefile.in: Regenerate.
 377
 378 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 379
 380         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 381         second scan.
 382
 383 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 384             Daniel Jacobowitz  <dan@codesourcery.com>
 385
 386         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 387         (GOTT_BASE, GOTT_INDEX): New.
 388         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 389         GOTT_INDEX when generating VxWorks PIC.
 390         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 391         use the generic *-*-vxworks* stanza instead.
 392
 393 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 394
 395         PR 997
 396         * frags.c (frag_offset_fixed_p): New function.
 397         * frags.h (frag_offset_fixed_p): Declare.
 398         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 399         (resolve_expression): Likewise.
 400
 401 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 402
 403         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 404         of the same length but different numbers of slots.
 405
 406 2006-03-30  Andreas Schwab  <schwab@suse.de>
 407
 408         * configure.in: Fix help string for --enable-targets option.
 409         * configure: Regenerate.
 410
 411 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 412
 413         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 414         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 415         overrun and avoid excessive copying.
 416
 417         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 418         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 419         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 420         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 421         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 422         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 423         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 424         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 425         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 426         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 427         (struct m68k_cpu): Change chip field to control_regs.
 428         (current_chip): Remove.
 429         (control_regs): New.
 430         (m68k_archs, m68k_extensions): Adjust.
 431         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 432         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 433         (find_cf_chip): Reimplement for new organization of cpu table.
 434         (select_control_regs): Remove.
 435         (mri_chip): Adjust.
 436         (struct save_opts): Save control regs, not chip.
 437         (s_save, s_restore): Adjust.
 438         (m68k_lookup_cpu): Give deprecated warning when necessary.
 439         (m68k_init_arch): Adjust.
 440         (md_show_usage): Adjust for new cpu table organization.
 441
 442 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 443
 444         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 445         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 446         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 447         "elf/bfin.h".
 448         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 449         (any_gotrel): New rule.
 450         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 451         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 452         "elf/bfin.h".
 453         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 454         (bfin_pic_ptr): New function.
 455         (md_pseudo_table): Add it for ".picptr".
 456         (OPTION_FDPIC): New macro.
 457         (md_longopts): Add -mfdpic.
 458         (md_parse_option): Handle it.
 459         (md_begin): Set BFD flags.
 460         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 461         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 462         us for GOT relocs.
 463         * Makefile.am (bfin-parse.o): Update dependencies.
 464         (DEPTC_bfin_elf): Likewise.
 465         * Makefile.in: Regenerate.
 466
 467 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 468
 469         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 470         mcfemac instead of mcfmac.
 471
 472 2006-03-23  Michael Matz  <matz@suse.de>
 473
 474         * config/tc-i386.c (type_names): Correct placement of 'static'.
 475         (reloc): Map some more relocs to their 64 bit counterpart when
 476         size is 8.
 477         (output_insn): Work around breakage if DEBUG386 is defined.
 478         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 479         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 480         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 481         different from i386.
 482         (output_imm): Ditto.
 483         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 484         Imm64.
 485         (md_convert_frag): Jumps can now be larger than 2GB away, error
 486         out in that case.
 487         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 488         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 489
 490 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 491             Daniel Jacobowitz  <dan@codesourcery.com>
 492             Phil Edwards  <phil@codesourcery.com>
 493             Zack Weinberg  <zack@codesourcery.com>
 494             Mark Mitchell  <mark@codesourcery.com>
 495             Nathan Sidwell  <nathan@codesourcery.com>
 496
 497         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 498         (md_begin): Complain about -G being used for PIC.  Don't change
 499         the text, data and bss alignments on VxWorks.
 500         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 501         generating VxWorks PIC.
 502         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 503         (macro): Likewise, but do not treat la $25 specially for
 504         VxWorks PIC, and do not handle jal.
 505         (OPTION_MVXWORKS_PIC): New macro.
 506         (md_longopts): Add -mvxworks-pic.
 507         (md_parse_option): Don't complain about using PIC and -G together here.
 508         Handle OPTION_MVXWORKS_PIC.
 509         (md_estimate_size_before_relax): Always use the first relaxation
 510         sequence on VxWorks.
 511         * config/tc-mips.h (VXWORKS_PIC): New.
 512
 513 2006-03-21  Paul Brook  <paul@codesourcery.com>
 514
 515         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 516
 517 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 518
 519         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 520         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 521         (get_loop_align_size): New.
 522         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 523         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 524         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 525         (get_noop_aligned_address): Use get_loop_align_size.
 526         (get_aligned_diff): Likewise.
 527
 528 2006-03-21  Paul Brook  <paul@codesourcery.com>
 529
 530         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 531
 532 2006-03-20  Paul Brook  <paul@codesourcery.com>
 533
 534         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 535         (do_t_branch): Encode branches inside IT blocks as unconditional.
 536         (do_t_cps): New function.
 537         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 538         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 539         (opcode_lookup): Allow conditional suffixes on all instructions in
 540         Thumb mode.
 541         (md_assemble): Advance condexec state before checking for errors.
 542         (insns): Use do_t_cps.
 543
 544 2006-03-20  Paul Brook  <paul@codesourcery.com>
 545
 546         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 547         outputting the insn.
 548
 549 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 550
 551         * config/tc-vax.c: Update copyright year.
 552         * config/tc-vax.h: Likewise.
 553
 554 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 555
 556         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 557         make it static.
 558         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 559
 560 2006-03-17  Paul Brook  <paul@codesourcery.com>
 561
 562         * config/tc-arm.c (insns): Add ldm and stm.
 563
 564 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 565
 566         PR gas/2446
 567         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 568
 569 2006-03-16  Paul Brook  <paul@codesourcery.com>
 570
 571         * config/tc-arm.c (insns): Add "svc".
 572
 573 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 574
 575         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 576         flag and avoid double underscore prefixes.
 577
 578 2006-03-10  Paul Brook  <paul@codesourcery.com>
 579
 580         * config/tc-arm.c (md_begin): Handle EABIv5.
 581         (arm_eabis): Add EF_ARM_EABI_VER5.
 582         * doc/c-arm.texi: Document -meabi=5.
 583
 584 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 585
 586         * app.c (do_scrub_chars): Simplify string handling.
 587
 588 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 589             Daniel Jacobowitz  <dan@codesourcery.com>
 590             Zack Weinberg  <zack@codesourcery.com>
 591             Nathan Sidwell  <nathan@codesourcery.com>
 592             Paul Brook  <paul@codesourcery.com>
 593             Ricardo Anguiano  <anguiano@codesourcery.com>
 594             Phil Edwards  <phil@codesourcery.com>
 595
 596         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 597         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 598         R_ARM_ABS12 reloc.
 599         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 600         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 601         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 602
 603 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 604
 605         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 606         even when using the text-section-literals option.
 607
 608 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 609
 610         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 611         and cf.
 612         (m68k_ip): <case 'J'> Check we have some control regs.
 613         (md_parse_option): Allow raw arch switch.
 614         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 615         whether 68881 or cfloat was meant by -mfloat.
 616         (md_show_usage): Adjust extension display.
 617         (m68k_elf_final_processing): Adjust.
 618
 619 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 620
 621         * config/tc-avr.c (avr_mod_hash_value): New function.
 622         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 623         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 624         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 625         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 626         of (int).
 627         (tc_gen_reloc): Handle substractions of symbols, if possible do
 628         fixups, abort otherwise.
 629         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 630         tc_fix_adjustable): Define.
 631
 632 2006-03-02  James E Wilson  <wilson@specifix.com>
 633
 634         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 635         change the template, then clear md.slot[curr].end_of_insn_group.
 636
 637 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 638
 639         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 640
 641 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 642
 643         PR/1070
 644         * macro.c (getstring): Don't treat parentheses special anymore.
 645         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 646         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 647         characters.
 648
 649 2006-02-28  Mat <mat@csail.mit.edu>
 650
 651         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 652
 653 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 654
 655         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 656         field.
 657         (CFI_signal_frame): Define.
 658         (cfi_pseudo_table): Add .cfi_signal_frame.
 659         (dot_cfi): Handle CFI_signal_frame.
 660         (output_cie): Handle cie->signal_frame.
 661         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 662         different.  Copy signal_frame from FDE to newly created CIE.
 663         * doc/as.texinfo: Document .cfi_signal_frame.
 664
 665 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 666
 667         * doc/Makefile.am: Add html target.
 668         * doc/Makefile.in: Regenerate.
 669         * po/Make-in: Add html target.
 670
 671 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 672
 673         * config/tc-i386.c (output_insn): Support Intel Merom New
 674         Instructions.
 675
 676         * config/tc-i386.h (CpuMNI): New.
 677         (CpuUnknownFlags): Add CpuMNI.
 678
 679 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 680
 681         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 682         (hpriv_reg_table): New table for hyperprivileged registers.
 683         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 684         register encoding.
 685
 686 2006-02-24  DJ Delorie  <dj@redhat.com>
 687
 688         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 689         (tc_gen_reloc): Don't define.
 690         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 691         (OPTION_LINKRELAX): New.
 692         (md_longopts): Add it.
 693         (m32c_relax): New.
 694         (md_parse_options): Set it.
 695         (md_assemble): Emit relaxation relocs as needed.
 696         (md_convert_frag): Emit relaxation relocs as needed.
 697         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 698         (m32c_apply_fix): New.
 699         (tc_gen_reloc): New.
 700         (m32c_force_relocation): Force out jump relocs when relaxing.
 701         (m32c_fix_adjustable): Return false if relaxing.
 702
 703 2006-02-24  Paul Brook  <paul@codesourcery.com>
 704
 705         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 706         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 707         (struct asm_barrier_opt): Define.
 708         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 709         (parse_psr): Accept V7M psr names.
 710         (parse_barrier): New function.
 711         (enum operand_parse_code): Add OP_oBARRIER.
 712         (parse_operands): Implement OP_oBARRIER.
 713         (do_barrier): New function.
 714         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 715         (do_t_cpsi): Add V7M restrictions.
 716         (do_t_mrs, do_t_msr): Validate V7M variants.
 717         (md_assemble): Check for NULL variants.
 718         (v7m_psrs, barrier_opt_names): New tables.
 719         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 720         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 721         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 722         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 723         (struct cpu_arch_ver_table): Define.
 724         (cpu_arch_ver): New.
 725         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 726         Tag_CPU_arch_profile.
 727         * doc/c-arm.texi: Document new cpu and arch options.
 728
 729 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 730
 731         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 732
 733 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 734
 735         * config/tc-ia64.c: Update copyright years.
 736
 737 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 738
 739         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 740         SDM 2.2.
 741
 742 2005-02-22  Paul Brook  <paul@codesourcery.com>
 743
 744         * config/tc-arm.c (do_pld): Remove incorrect write to
 745         inst.instruction.
 746         (encode_thumb32_addr_mode): Use correct operand.
 747
 748 2006-02-21  Paul Brook  <paul@codesourcery.com>
 749
 750         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 751
 752 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 753             Anil Paranjape   <anilp1@kpitcummins.com>
 754             Shilin Shakti    <shilins@kpitcummins.com>
 755
 756         * Makefile.am: Add xc16x related entry.
 757         * Makefile.in: Regenerate.
 758         * configure.in: Added xc16x related entry.
 759         * configure: Regenerate.
 760         * config/tc-xc16x.h: New file
 761         * config/tc-xc16x.c: New file
 762         * doc/c-xc16x.texi: New file for xc16x
 763         * doc/all.texi: Entry for xc16x
 764         * doc/Makefile.texi: Added c-xc16x.texi
 765         * NEWS: Announce the support for the new target.
 766
 767 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 768
 769         * configure.tgt: set emulation for mips-*-netbsd*
 770
 771 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 772
 773         * config.in: Rebuilt.
 774
 775 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 776
 777         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 778         from 1, not 0, in error messages.
 779         (md_assemble): Simplify special-case check for ENTRY instructions.
 780         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 781         operand in error message.
 782
 783 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 784
 785         * configure.tgt (arm-*-linux-gnueabi*): Change to
 786         arm-*-linux-*eabi*.
 787
 788 2006-02-10  Nick Clifton  <nickc@redhat.com>
 789
 790         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 791         32-bit value is propagated into the upper bits of a 64-bit long.
 792
 793         * config/tc-arc.c (init_opcode_tables): Fix cast.
 794         (arc_extoper, md_operand): Likewise.
 795
 796 2006-02-09  David Heine  <dlheine@tensilica.com>
 797
 798         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 799         each relaxation step.
 800
 801 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 802
 803         * configure.in (CHECK_DECLS): Add vsnprintf.
 804         * configure: Regenerate.
 805         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 806         include/declare here, but...
 807         * as.h: Move code detecting VARARGS idiom to the top.
 808         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 809         (vsnprintf): Declare if not already declared.
 810
 811 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 812
 813         * as.c (close_output_file): New.
 814         (main): Register close_output_file with xatexit before
 815         dump_statistics. Don't call output_file_close.
 816
 817 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 818
 819         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 820         mcf5329_control_regs): New.
 821         (not_current_architecture, selected_arch, selected_cpu): New.
 822         (m68k_archs, m68k_extensions): New.
 823         (archs): Renamed to ...
 824         (m68k_cpus): ... here.  Adjust.
 825         (n_arches): Remove.
 826         (md_pseudo_table): Add arch and cpu directives.
 827         (find_cf_chip, m68k_ip): Adjust table scanning.
 828         (no_68851, no_68881): Remove.
 829         (md_assemble): Lazily initialize.
 830         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 831         (md_init_after_args): Move functionality to m68k_init_arch.
 832         (mri_chip): Adjust table scanning.
 833         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 834         options with saner parsing.
 835         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 836         m68k_init_arch): New.
 837         (s_m68k_cpu, s_m68k_arch): New.
 838         (md_show_usage): Adjust.
 839         (m68k_elf_final_processing): Set CF EF flags.
 840         * config/tc-m68k.h (m68k_init_after_args): Remove.
 841         (tc_init_after_args): Remove.
 842         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 843         (M68k-Directives): Document .arch and .cpu directives.
 844
 845 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 846
 847         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 848         synonyms for equ and defl.
 849         (z80_cons_fix_new): New function.
 850         (emit_byte): Disallow relative jumps to absolute locations.
 851         (emit_data): Only handle defb, prototype changed, because defb is
 852         now handled as pseudo-op rather than an instruction.
 853         (instab): Entries for defb,defw,db,dw moved from here...
 854         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 855         Add entries for def24,def32,d24,d32.
 856         (md_assemble): Improved error handling.
 857         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 858         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 859         (z80_cons_fix_new): Declare.
 860         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 861         (def24,d24,def32,d32): New pseudo-ops.
 862
 863 2006-02-02  Paul Brook  <paul@codesourcery.com>
 864
 865         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 866
 867 2005-02-02  Paul Brook  <paul@codesourcery.com>
 868
 869         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 870         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
 871         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
 872         T2_OPCODE_RSB): Define.
 873         (thumb32_negate_data_op): New function.
 874         (md_apply_fix): Use it.
 875
 876 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
 877
 878         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
 879         fields.
 880         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
 881         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
 882         subtracted symbols.
 883         (relaxation_requirements): Add pfinish_frag argument and use it to
 884         replace setting tinsn->record_fix fields.
 885         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
 886         and vinsn_to_insnbuf.  Remove references to record_fix and
 887         slot_sub_symbols fields.
 888         (xtensa_mark_narrow_branches): Delete unused code.
 889         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
 890         a symbol.
 891         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
 892         record_fix fields.
 893         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
 894         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
 895         of the record_fix field.  Simplify error messages for unexpected
 896         symbolic operands.
 897         (set_expr_symbol_offset_diff): Delete.
 898
 899 2006-01-31  Paul Brook  <paul@codesourcery.com>
 900
 901         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
 902
 903 2006-01-31  Paul Brook  <paul@codesourcery.com>
 904         Richard Earnshaw <rearnsha@arm.com>
 905
 906         * config/tc-arm.c: Use arm_feature_set.
 907         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
 908         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
 909         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
 910         New variables.
 911         (insns): Use them.
 912         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
 913         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
 914         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
 915         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
 916         feature flags.
 917         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
 918         (arm_opts): Move old cpu/arch options from here...
 919         (arm_legacy_opts): ... to here.
 920         (md_parse_option): Search arm_legacy_opts.
 921         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
 922         (arm_float_abis, arm_eabis): Make const.
 923
 924 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
 925
 926         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
 927
 928 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 929
 930         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
 931         in load immediate intruction.
 932
 933 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 934
 935         * config/bfin-parse.y (value_match): Use correct conversion
 936         specifications in template string for __FILE__ and __LINE__.
 937         (binary): Ditto.
 938         (unary): Ditto.
 939
 940 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
 941
 942         Introduce TLS descriptors for i386 and x86_64.
 943         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
 944         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
 945         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
 946         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
 947         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
 948         displacement bits.
 949         (build_modrm_byte): Set up zero modrm for TLS desc calls.
 950         (lex_got): Handle @tlsdesc and @tlscall.
 951         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
 952
 953 2006-01-11  Nick Clifton  <nickc@redhat.com>
 954
 955         Fixes for building on 64-bit hosts:
 956         * config/tc-avr.c (mod_index): New union to allow conversion
 957         between pointers and integers.
 958         (md_begin, avr_ldi_expression): Use it.
 959         * config/tc-i370.c (md_assemble): Add cast for argument to print
 960         statement.
 961         * config/tc-tic54x.c (subsym_substitute): Likewise.
 962         * config/tc-mn10200.c (md_assemble): Use a union to convert the
 963         opindex field of fr_cgen structure into a pointer so that it can
 964         be stored in a frag.
 965         * config/tc-mn10300.c (md_assemble): Likewise.
 966         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
 967         types.
 968         * config/tc-v850.c: Replace uses of (int) casts with correct
 969         types.
 970
 971 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
 972
 973         PR gas/2117
 974         * symbols.c (snapshot_symbol): Don't change a defined symbol.
 975
 976 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
 977
 978         PR gas/2101
 979         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
 980         a local-label reference.
 981
 982 For older changes see ChangeLog-2005
 983 \f
 984 Local Variables:
 985 mode: change-log
 986 left-margin: 8
 987 fill-column: 74
 988 version-control: never
 989 End: