1 2006-05-19 Thiemo Seufer <ths@mips.com>
3 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
4 Un-constify string argument.
5 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
7 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
9 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
11 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
13 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
15 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
18 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
20 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
21 cfloat/m68881 to correct architecture before using it.
23 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
25 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
28 2006-05-15 Paul Brook <paul@codesourcery.com>
30 * config/tc-arm.c (arm_adjust_symtab): Use
31 bfd_is_arm_special_symbol_name.
33 2006-05-15 Bob Wilson <bob.wilson@acm.org>
35 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
36 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
37 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
38 Handle errors from calls to xtensa_opcode_is_* functions.
40 2006-05-14 Thiemo Seufer <ths@mips.com>
42 * config/tc-mips.c (macro_build): Test for currently active
44 (mips16_ip): Reject invalid opcodes.
46 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
48 * doc/as.texinfo: Rename "Index" to "AS Index",
49 and "ABORT" to "ABORT (COFF)".
51 2006-05-11 Paul Brook <paul@codesourcery.com>
53 * config/tc-arm.c (parse_half): New function.
54 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
55 (parse_operands): Ditto.
56 (do_mov16): Reject invalid relocations.
57 (do_t_mov16): Ditto. Use Thumb reloc numbers.
58 (insns): Replace Iffff with HALF.
59 (md_apply_fix): Add MOVW and MOVT relocs.
60 (tc_gen_reloc): Ditto.
61 * doc/c-arm.texi: Document relocation operators
63 2006-05-11 Paul Brook <paul@codesourcery.com>
65 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
67 2006-05-11 Thiemo Seufer <ths@mips.com>
69 * config/tc-mips.c (append_insn): Don't check the range of j or
72 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
74 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
75 relocs against external symbols for WinCE targets.
76 (md_apply_fix): Likewise.
78 2006-05-09 David Ung <davidu@mips.com>
80 * config/tc-mips.c (append_insn): Only warn about an out-of-range
83 2006-05-09 Nick Clifton <nickc@redhat.com>
85 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
86 against symbols which are not going to be placed into the symbol
89 2006-05-09 Ben Elliston <bje@au.ibm.com>
91 * expr.c (operand): Remove `if (0 && ..)' statement and
92 subsequently unused target_op label. Collapse `if (1 || ..)'
94 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
95 separately above the switch.
97 2006-05-08 Nick Clifton <nickc@redhat.com>
100 * config/tc-msp430.c (line_separator_character): Define as |.
102 2006-05-08 Thiemo Seufer <ths@mips.com>
103 Nigel Stephens <nigel@mips.com>
104 David Ung <davidu@mips.com>
106 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
107 (mips_opts): Likewise.
108 (file_ase_smartmips): New variable.
109 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
110 (macro_build): Handle SmartMIPS instructions.
112 (md_longopts): Add argument handling for smartmips.
113 (md_parse_options, mips_after_parse_args): Likewise.
114 (s_mipsset): Add .set smartmips support.
115 (md_show_usage): Document -msmartmips/-mno-smartmips.
116 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
118 * doc/c-mips.texi: Likewise.
120 2006-05-08 Alan Modra <amodra@bigpond.net.au>
122 * write.c (relax_segment): Add pass count arg. Don't error on
123 negative org/space on first two passes.
124 (relax_seg_info): New struct.
125 (relax_seg, write_object_file): Adjust.
126 * write.h (relax_segment): Update prototype.
128 2006-05-05 Julian Brown <julian@codesourcery.com>
130 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
132 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
133 architecture version checks.
134 (insns): Allow overlapping instructions to be used in VFP mode.
136 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
139 * config/obj-elf.c (obj_elf_change_section): Allow user
140 specified SHF_ALPHA_GPREL.
142 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
144 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
145 for PMEM related expressions.
147 2006-05-05 Nick Clifton <nickc@redhat.com>
150 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
151 insertion of a directory separator character into a string at a
152 given offset. Uses heuristics to decide when to use a backslash
153 character rather than a forward-slash character.
154 (dwarf2_directive_loc): Use the macro.
155 (out_debug_info): Likewise.
157 2006-05-05 Thiemo Seufer <ths@mips.com>
158 David Ung <davidu@mips.com>
160 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
162 (macro): Add new case M_CACHE_AB.
164 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
166 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
167 (opcode_lookup): Issue a warning for opcode with
168 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
169 identical to OT_cinfix3.
170 (TxC3w, TC3w, tC3w): New.
171 (insns): Use tC3w and TC3w for comparison instructions with
174 2006-05-04 Alan Modra <amodra@bigpond.net.au>
176 * subsegs.h (struct frchain): Delete frch_seg.
177 (frchain_root): Delete.
178 (seg_info): Define as macro.
179 * subsegs.c (frchain_root): Delete.
180 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
181 (subsegs_begin, subseg_change): Adjust for above.
182 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
183 rather than to one big list.
184 (subseg_get): Don't special case abs, und sections.
185 (subseg_new, subseg_force_new): Don't set frchainP here.
187 (subsegs_print_statistics): Adjust frag chain control list traversal.
188 * debug.c (dmp_frags): Likewise.
189 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
190 at frchain_root. Make use of known frchain ordering.
191 (last_frag_for_seg): Likewise.
192 (get_frag_fix): Likewise. Add seg param.
193 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
194 * write.c (chain_frchains_together_1): Adjust for struct frchain.
195 (SUB_SEGMENT_ALIGN): Likewise.
196 (subsegs_finish): Adjust frchain list traversal.
197 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
198 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
199 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
200 (xtensa_fix_b_j_loop_end_frags): Likewise.
201 (xtensa_fix_close_loop_end_frags): Likewise.
202 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
203 (retrieve_segment_info): Delete frch_seg initialisation.
205 2006-05-03 Alan Modra <amodra@bigpond.net.au>
207 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
208 * config/obj-elf.h (obj_sec_set_private_data): Delete.
209 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
210 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
212 2006-05-02 Joseph Myers <joseph@codesourcery.com>
214 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
216 (md_apply_fix3): Multiply offset by 4 here for
217 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
219 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
220 Jan Beulich <jbeulich@novell.com>
222 * config/tc-i386.c (output_invalid_buf): Change size for
224 * config/tc-tic30.c (output_invalid_buf): Likewise.
226 * config/tc-i386.c (output_invalid): Cast none-ascii char to
228 * config/tc-tic30.c (output_invalid): Likewise.
230 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
232 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
233 (TEXI2POD): Use AM_MAKEINFOFLAGS.
234 (asconfig.texi): Don't set top_srcdir.
235 * doc/as.texinfo: Don't use top_srcdir.
236 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
238 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
240 * config/tc-i386.c (output_invalid_buf): Change size to 16.
241 * config/tc-tic30.c (output_invalid_buf): Likewise.
243 * config/tc-i386.c (output_invalid): Use snprintf instead of
245 * config/tc-ia64.c (declare_register_set): Likewise.
246 (emit_one_bundle): Likewise.
247 (check_dependencies): Likewise.
248 * config/tc-tic30.c (output_invalid): Likewise.
250 2006-05-02 Paul Brook <paul@codesourcery.com>
252 * config/tc-arm.c (arm_optimize_expr): New function.
253 * config/tc-arm.h (md_optimize_expr): Define
254 (arm_optimize_expr): Add prototype.
255 (TC_FORCE_RELOCATION_SUB_SAME): Define.
257 2006-05-02 Ben Elliston <bje@au.ibm.com>
259 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
262 * sb.h (sb_list_vector): Move to sb.c.
263 * sb.c (free_list): Use type of sb_list_vector directly.
264 (sb_build): Fix off-by-one error in assertion about `size'.
266 2006-05-01 Ben Elliston <bje@au.ibm.com>
268 * listing.c (listing_listing): Remove useless loop.
269 * macro.c (macro_expand): Remove is_positional local variable.
270 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
271 and simplify surrounding expressions, where possible.
272 (assign_symbol): Likewise.
273 (s_weakref): Likewise.
274 * symbols.c (colon): Likewise.
276 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
278 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
280 2006-04-30 Thiemo Seufer <ths@mips.com>
281 David Ung <davidu@mips.com>
283 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
284 (mips_immed): New table that records various handling of udi
285 instruction patterns.
286 (mips_ip): Adds udi handling.
288 2006-04-28 Alan Modra <amodra@bigpond.net.au>
290 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
291 of list rather than beginning.
293 2006-04-26 Julian Brown <julian@codesourcery.com>
295 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
296 (is_quarter_float): Rename from above. Simplify slightly.
297 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
299 (parse_neon_mov): Parse floating-point constants.
300 (neon_qfloat_bits): Fix encoding.
301 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
302 preference to integer encoding when using the F32 type.
304 2006-04-26 Julian Brown <julian@codesourcery.com>
306 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
307 zero-initialising structures containing it will lead to invalid types).
308 (arm_it): Add vectype to each operand.
309 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
311 (neon_typed_alias): New structure. Extra information for typed
313 (reg_entry): Add neon type info field.
314 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
315 Break out alternative syntax for coprocessor registers, etc. into...
316 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
317 out from arm_reg_parse.
318 (parse_neon_type): Move. Return SUCCESS/FAIL.
319 (first_error): New function. Call to ensure first error which occurs is
321 (parse_neon_operand_type): Parse exactly one type.
322 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
323 (parse_typed_reg_or_scalar): New function. Handle core of both
324 arm_typed_reg_parse and parse_scalar.
325 (arm_typed_reg_parse): Parse a register with an optional type.
326 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
328 (parse_scalar): Parse a Neon scalar with optional type.
329 (parse_reg_list): Use first_error.
330 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
331 (neon_alias_types_same): New function. Return true if two (alias) types
333 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
335 (insert_reg_alias): Return new reg_entry not void.
336 (insert_neon_reg_alias): New function. Insert type/index information as
337 well as register for alias.
338 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
339 make typed register aliases accordingly.
340 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
342 (s_unreq): Delete type information if present.
343 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
344 (s_arm_unwind_save_mmxwcg): Likewise.
345 (s_arm_unwind_movsp): Likewise.
346 (s_arm_unwind_setfp): Likewise.
347 (parse_shift): Likewise.
348 (parse_shifter_operand): Likewise.
349 (parse_address): Likewise.
350 (parse_tb): Likewise.
351 (tc_arm_regname_to_dw2regnum): Likewise.
352 (md_pseudo_table): Add dn, qn.
353 (parse_neon_mov): Handle typed operands.
354 (parse_operands): Likewise.
355 (neon_type_mask): Add N_SIZ.
356 (N_ALLMODS): New macro.
357 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
358 (el_type_of_type_chk): Add some safeguards.
359 (modify_types_allowed): Fix logic bug.
360 (neon_check_type): Handle operands with types.
361 (neon_three_same): Remove redundant optional arg handling.
362 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
363 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
364 (do_neon_step): Adjust accordingly.
365 (neon_cmode_for_logic_imm): Use first_error.
366 (do_neon_bitfield): Call neon_check_type.
367 (neon_dyadic): Rename to...
368 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
369 to allow modification of type of the destination.
370 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
371 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
372 (do_neon_compare): Make destination be an untyped bitfield.
373 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
374 (neon_mul_mac): Return early in case of errors.
375 (neon_move_immediate): Use first_error.
376 (neon_mac_reg_scalar_long): Fix type to include scalar.
377 (do_neon_dup): Likewise.
378 (do_neon_mov): Likewise (in several places).
379 (do_neon_tbl_tbx): Fix type.
380 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
381 (do_neon_ld_dup): Exit early in case of errors and/or use
383 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
384 Handle .dn/.qn directives.
385 (REGDEF): Add zero for reg_entry neon field.
387 2006-04-26 Julian Brown <julian@codesourcery.com>
389 * config/tc-arm.c (limits.h): Include.
390 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
391 (fpu_vfp_v3_or_neon_ext): Declare constants.
392 (neon_el_type): New enumeration of types for Neon vector elements.
393 (neon_type_el): New struct. Define type and size of a vector element.
394 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
396 (neon_type): Define struct. The type of an instruction.
397 (arm_it): Add 'vectype' for the current instruction.
398 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
399 (vfp_sp_reg_pos): Rename to...
400 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
402 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
403 (Neon D or Q register).
404 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
406 (GE_OPT_PREFIX_BIG): Define constant, for use in...
407 (my_get_expression): Allow above constant as argument to accept
408 64-bit constants with optional prefix.
409 (arm_reg_parse): Add extra argument to return the specific type of
410 register in when either a D or Q register (REG_TYPE_NDQ) is
411 requested. Can be NULL.
412 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
413 (parse_reg_list): Update for new arm_reg_parse args.
414 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
415 (parse_neon_el_struct_list): New function. Parse element/structure
416 register lists for VLD<n>/VST<n> instructions.
417 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
418 (s_arm_unwind_save_mmxwr): Likewise.
419 (s_arm_unwind_save_mmxwcg): Likewise.
420 (s_arm_unwind_movsp): Likewise.
421 (s_arm_unwind_setfp): Likewise.
422 (parse_big_immediate): New function. Parse an immediate, which may be
423 64 bits wide. Put results in inst.operands[i].
424 (parse_shift): Update for new arm_reg_parse args.
425 (parse_address): Likewise. Add parsing of alignment specifiers.
426 (parse_neon_mov): Parse the operands of a VMOV instruction.
427 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
428 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
429 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
430 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
431 (parse_operands): Handle new codes above.
432 (encode_arm_vfp_sp_reg): Rename to...
433 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
434 selected VFP version only supports D0-D15.
435 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
436 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
437 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
438 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
439 encode_arm_vfp_reg name, and allow 32 D regs.
440 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
441 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
443 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
444 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
445 constant-load and conversion insns introduced with VFPv3.
446 (neon_tab_entry): New struct.
447 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
448 those which are the targets of pseudo-instructions.
449 (neon_opc): Enumerate opcodes, use as indices into...
450 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
451 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
452 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
453 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
455 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
457 (neon_type_mask): New. Compact type representation for type checking.
458 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
459 permitted type combinations.
460 (N_IGNORE_TYPE): New macro.
461 (neon_check_shape): New function. Check an instruction shape for
462 multiple alternatives. Return the specific shape for the current
464 (neon_modify_type_size): New function. Modify a vector type and size,
465 depending on the bit mask in argument 1.
466 (neon_type_promote): New function. Convert a given "key" type (of an
467 operand) into the correct type for a different operand, based on a bit
469 (type_chk_of_el_type): New function. Convert a type and size into the
470 compact representation used for type checking.
471 (el_type_of_type_ckh): New function. Reverse of above (only when a
472 single bit is set in the bit mask).
473 (modify_types_allowed): New function. Alter a mask of allowed types
474 based on a bit mask of modifications.
475 (neon_check_type): New function. Check the type of the current
476 instruction against the variable argument list. The "key" type of the
477 instruction is returned.
478 (neon_dp_fixup): New function. Fill in and modify instruction bits for
479 a Neon data-processing instruction depending on whether we're in ARM
480 mode or Thumb-2 mode.
481 (neon_logbits): New function.
482 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
483 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
484 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
485 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
486 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
487 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
488 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
489 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
490 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
491 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
492 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
493 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
494 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
495 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
496 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
497 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
498 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
499 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
500 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
501 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
502 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
503 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
504 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
505 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
506 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
508 (parse_neon_type): New function. Parse Neon type specifier.
509 (opcode_lookup): Allow parsing of Neon type specifiers.
510 (REGNUM2, REGSETH, REGSET2): New macros.
511 (reg_names): Add new VFPv3 and Neon registers.
512 (NUF, nUF, NCE, nCE): New macros for opcode table.
513 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
514 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
515 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
516 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
517 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
518 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
519 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
520 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
521 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
522 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
523 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
524 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
525 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
526 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
528 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
529 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
530 (arm_option_cpu_value): Add vfp3 and neon.
531 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
534 2006-04-25 Bob Wilson <bob.wilson@acm.org>
536 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
537 syntax instead of hardcoded opcodes with ".w18" suffixes.
538 (wide_branch_opcode): New.
539 (build_transition): Use it to check for wide branch opcodes with
540 either ".w18" or ".w15" suffixes.
542 2006-04-25 Bob Wilson <bob.wilson@acm.org>
544 * config/tc-xtensa.c (xtensa_create_literal_symbol,
545 xg_assemble_literal, xg_assemble_literal_space): Do not set the
546 frag's is_literal flag.
548 2006-04-25 Bob Wilson <bob.wilson@acm.org>
550 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
552 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
554 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
555 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
556 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
557 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
558 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
560 2005-04-20 Paul Brook <paul@codesourcery.com>
562 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
564 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
566 2006-04-19 Alan Modra <amodra@bigpond.net.au>
568 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
569 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
570 Make some cpus unsupported on ELF. Run "make dep-am".
571 * Makefile.in: Regenerate.
573 2006-04-19 Alan Modra <amodra@bigpond.net.au>
575 * configure.in (--enable-targets): Indent help message.
576 * configure: Regenerate.
578 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
581 * config/tc-i386.c (i386_immediate): Check illegal immediate
584 2006-04-18 Alan Modra <amodra@bigpond.net.au>
586 * config/tc-i386.c: Formatting.
587 (output_disp, output_imm): ISO C90 params.
589 * frags.c (frag_offset_fixed_p): Constify args.
590 * frags.h (frag_offset_fixed_p): Ditto.
592 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
593 (COFF_MAGIC): Delete.
595 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
597 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
599 * po/POTFILES.in: Regenerated.
601 2006-04-16 Mark Mitchell <mark@codesourcery.com>
603 * doc/as.texinfo: Mention that some .type syntaxes are not
604 supported on all architectures.
606 2006-04-14 Sterling Augustine <sterling@tensilica.com>
608 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
609 instructions when such transformations have been disabled.
611 2006-04-10 Sterling Augustine <sterling@tensilica.com>
613 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
614 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
615 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
616 decoding the loop instructions. Remove current_offset variable.
617 (xtensa_fix_short_loop_frags): Likewise.
618 (min_bytes_to_other_loop_end): Remove current_offset argument.
620 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
622 * config/tc-z80.c (z80_optimize_expr): Removed.
623 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
625 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
627 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
628 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
629 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
630 atmega644, atmega329, atmega3290, atmega649, atmega6490,
631 atmega406, atmega640, atmega1280, atmega1281, at90can32,
632 at90can64, at90usb646, at90usb647, at90usb1286 and
634 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
636 2006-04-07 Paul Brook <paul@codesourcery.com>
638 * config/tc-arm.c (parse_operands): Set default error message.
640 2006-04-07 Paul Brook <paul@codesourcery.com>
642 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
644 2006-04-07 Paul Brook <paul@codesourcery.com>
646 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
648 2006-04-07 Paul Brook <paul@codesourcery.com>
650 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
651 (move_or_literal_pool): Handle Thumb-2 instructions.
652 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
654 2006-04-07 Alan Modra <amodra@bigpond.net.au>
657 * config/tc-i386.c (match_template): Move 64-bit operand tests
660 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
662 * po/Make-in: Add install-html target.
663 * Makefile.am: Add install-html and install-html-recursive targets.
664 * Makefile.in: Regenerate.
665 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
666 * configure: Regenerate.
667 * doc/Makefile.am: Add install-html and install-html-am targets.
668 * doc/Makefile.in: Regenerate.
670 2006-04-06 Alan Modra <amodra@bigpond.net.au>
672 * frags.c (frag_offset_fixed_p): Reinitialise offset before
675 2006-04-05 Richard Sandiford <richard@codesourcery.com>
676 Daniel Jacobowitz <dan@codesourcery.com>
678 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
679 (GOTT_BASE, GOTT_INDEX): New.
680 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
681 GOTT_INDEX when generating VxWorks PIC.
682 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
683 use the generic *-*-vxworks* stanza instead.
685 2006-04-04 Alan Modra <amodra@bigpond.net.au>
688 * frags.c (frag_offset_fixed_p): New function.
689 * frags.h (frag_offset_fixed_p): Declare.
690 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
691 (resolve_expression): Likewise.
693 2006-04-03 Sterling Augustine <sterling@tensilica.com>
695 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
696 of the same length but different numbers of slots.
698 2006-03-30 Andreas Schwab <schwab@suse.de>
700 * configure.in: Fix help string for --enable-targets option.
701 * configure: Regenerate.
703 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
705 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
706 (m68k_ip): ... here. Use for all chips. Protect against buffer
707 overrun and avoid excessive copying.
709 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
710 m68020_control_regs, m68040_control_regs, m68060_control_regs,
711 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
712 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
713 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
714 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
715 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
716 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
717 mcf5282_ctrl, mcfv4e_ctrl): ... these.
718 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
719 (struct m68k_cpu): Change chip field to control_regs.
720 (current_chip): Remove.
722 (m68k_archs, m68k_extensions): Adjust.
723 (m68k_cpus): Reorder to be in cpu number order. Adjust.
724 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
725 (find_cf_chip): Reimplement for new organization of cpu table.
726 (select_control_regs): Remove.
728 (struct save_opts): Save control regs, not chip.
729 (s_save, s_restore): Adjust.
730 (m68k_lookup_cpu): Give deprecated warning when necessary.
731 (m68k_init_arch): Adjust.
732 (md_show_usage): Adjust for new cpu table organization.
734 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
736 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
737 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
738 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
740 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
741 (any_gotrel): New rule.
742 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
743 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
745 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
746 (bfin_pic_ptr): New function.
747 (md_pseudo_table): Add it for ".picptr".
748 (OPTION_FDPIC): New macro.
749 (md_longopts): Add -mfdpic.
750 (md_parse_option): Handle it.
751 (md_begin): Set BFD flags.
752 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
753 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
755 * Makefile.am (bfin-parse.o): Update dependencies.
756 (DEPTC_bfin_elf): Likewise.
757 * Makefile.in: Regenerate.
759 2006-03-25 Richard Sandiford <richard@codesourcery.com>
761 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
762 mcfemac instead of mcfmac.
764 2006-03-23 Michael Matz <matz@suse.de>
766 * config/tc-i386.c (type_names): Correct placement of 'static'.
767 (reloc): Map some more relocs to their 64 bit counterpart when
769 (output_insn): Work around breakage if DEBUG386 is defined.
770 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
771 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
772 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
775 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
777 (md_convert_frag): Jumps can now be larger than 2GB away, error
779 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
780 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
782 2006-03-22 Richard Sandiford <richard@codesourcery.com>
783 Daniel Jacobowitz <dan@codesourcery.com>
784 Phil Edwards <phil@codesourcery.com>
785 Zack Weinberg <zack@codesourcery.com>
786 Mark Mitchell <mark@codesourcery.com>
787 Nathan Sidwell <nathan@codesourcery.com>
789 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
790 (md_begin): Complain about -G being used for PIC. Don't change
791 the text, data and bss alignments on VxWorks.
792 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
793 generating VxWorks PIC.
794 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
795 (macro): Likewise, but do not treat la $25 specially for
796 VxWorks PIC, and do not handle jal.
797 (OPTION_MVXWORKS_PIC): New macro.
798 (md_longopts): Add -mvxworks-pic.
799 (md_parse_option): Don't complain about using PIC and -G together here.
800 Handle OPTION_MVXWORKS_PIC.
801 (md_estimate_size_before_relax): Always use the first relaxation
803 * config/tc-mips.h (VXWORKS_PIC): New.
805 2006-03-21 Paul Brook <paul@codesourcery.com>
807 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
809 2006-03-21 Sterling Augustine <sterling@tensilica.com>
811 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
812 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
813 (get_loop_align_size): New.
814 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
815 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
816 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
817 (get_noop_aligned_address): Use get_loop_align_size.
818 (get_aligned_diff): Likewise.
820 2006-03-21 Paul Brook <paul@codesourcery.com>
822 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
824 2006-03-20 Paul Brook <paul@codesourcery.com>
826 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
827 (do_t_branch): Encode branches inside IT blocks as unconditional.
828 (do_t_cps): New function.
829 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
830 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
831 (opcode_lookup): Allow conditional suffixes on all instructions in
833 (md_assemble): Advance condexec state before checking for errors.
834 (insns): Use do_t_cps.
836 2006-03-20 Paul Brook <paul@codesourcery.com>
838 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
841 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
843 * config/tc-vax.c: Update copyright year.
844 * config/tc-vax.h: Likewise.
846 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
848 * config/tc-vax.c (md_chars_to_number): Used only locally, so
850 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
852 2006-03-17 Paul Brook <paul@codesourcery.com>
854 * config/tc-arm.c (insns): Add ldm and stm.
856 2006-03-17 Ben Elliston <bje@au.ibm.com>
859 * doc/as.texinfo (Ident): Document this directive more thoroughly.
861 2006-03-16 Paul Brook <paul@codesourcery.com>
863 * config/tc-arm.c (insns): Add "svc".
865 2006-03-13 Bob Wilson <bob.wilson@acm.org>
867 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
868 flag and avoid double underscore prefixes.
870 2006-03-10 Paul Brook <paul@codesourcery.com>
872 * config/tc-arm.c (md_begin): Handle EABIv5.
873 (arm_eabis): Add EF_ARM_EABI_VER5.
874 * doc/c-arm.texi: Document -meabi=5.
876 2006-03-10 Ben Elliston <bje@au.ibm.com>
878 * app.c (do_scrub_chars): Simplify string handling.
880 2006-03-07 Richard Sandiford <richard@codesourcery.com>
881 Daniel Jacobowitz <dan@codesourcery.com>
882 Zack Weinberg <zack@codesourcery.com>
883 Nathan Sidwell <nathan@codesourcery.com>
884 Paul Brook <paul@codesourcery.com>
885 Ricardo Anguiano <anguiano@codesourcery.com>
886 Phil Edwards <phil@codesourcery.com>
888 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
889 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
891 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
892 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
893 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
895 2006-03-06 Bob Wilson <bob.wilson@acm.org>
897 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
898 even when using the text-section-literals option.
900 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
902 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
904 (m68k_ip): <case 'J'> Check we have some control regs.
905 (md_parse_option): Allow raw arch switch.
906 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
907 whether 68881 or cfloat was meant by -mfloat.
908 (md_show_usage): Adjust extension display.
909 (m68k_elf_final_processing): Adjust.
911 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
913 * config/tc-avr.c (avr_mod_hash_value): New function.
914 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
915 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
916 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
917 instead of int avr_ldi_expression: use avr_mod_hash_value instead
919 (tc_gen_reloc): Handle substractions of symbols, if possible do
920 fixups, abort otherwise.
921 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
922 tc_fix_adjustable): Define.
924 2006-03-02 James E Wilson <wilson@specifix.com>
926 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
927 change the template, then clear md.slot[curr].end_of_insn_group.
929 2006-02-28 Jan Beulich <jbeulich@novell.com>
931 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
933 2006-02-28 Jan Beulich <jbeulich@novell.com>
936 * macro.c (getstring): Don't treat parentheses special anymore.
937 (get_any_string): Don't consider '(' and ')' as quoting anymore.
938 Special-case '(', ')', '[', and ']' when dealing with non-quoting
941 2006-02-28 Mat <mat@csail.mit.edu>
943 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
945 2006-02-27 Jakub Jelinek <jakub@redhat.com>
947 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
949 (CFI_signal_frame): Define.
950 (cfi_pseudo_table): Add .cfi_signal_frame.
951 (dot_cfi): Handle CFI_signal_frame.
952 (output_cie): Handle cie->signal_frame.
953 (select_cie_for_fde): Don't share CIE if signal_frame flag is
954 different. Copy signal_frame from FDE to newly created CIE.
955 * doc/as.texinfo: Document .cfi_signal_frame.
957 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
959 * doc/Makefile.am: Add html target.
960 * doc/Makefile.in: Regenerate.
961 * po/Make-in: Add html target.
963 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
965 * config/tc-i386.c (output_insn): Support Intel Merom New
968 * config/tc-i386.h (CpuMNI): New.
969 (CpuUnknownFlags): Add CpuMNI.
971 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
973 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
974 (hpriv_reg_table): New table for hyperprivileged registers.
975 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
978 2006-02-24 DJ Delorie <dj@redhat.com>
980 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
981 (tc_gen_reloc): Don't define.
982 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
983 (OPTION_LINKRELAX): New.
984 (md_longopts): Add it.
986 (md_parse_options): Set it.
987 (md_assemble): Emit relaxation relocs as needed.
988 (md_convert_frag): Emit relaxation relocs as needed.
989 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
990 (m32c_apply_fix): New.
992 (m32c_force_relocation): Force out jump relocs when relaxing.
993 (m32c_fix_adjustable): Return false if relaxing.
995 2006-02-24 Paul Brook <paul@codesourcery.com>
997 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
998 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
999 (struct asm_barrier_opt): Define.
1000 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1001 (parse_psr): Accept V7M psr names.
1002 (parse_barrier): New function.
1003 (enum operand_parse_code): Add OP_oBARRIER.
1004 (parse_operands): Implement OP_oBARRIER.
1005 (do_barrier): New function.
1006 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1007 (do_t_cpsi): Add V7M restrictions.
1008 (do_t_mrs, do_t_msr): Validate V7M variants.
1009 (md_assemble): Check for NULL variants.
1010 (v7m_psrs, barrier_opt_names): New tables.
1011 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1012 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1013 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1014 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1015 (struct cpu_arch_ver_table): Define.
1016 (cpu_arch_ver): New.
1017 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1018 Tag_CPU_arch_profile.
1019 * doc/c-arm.texi: Document new cpu and arch options.
1021 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1023 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1025 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1027 * config/tc-ia64.c: Update copyright years.
1029 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1031 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1034 2005-02-22 Paul Brook <paul@codesourcery.com>
1036 * config/tc-arm.c (do_pld): Remove incorrect write to
1038 (encode_thumb32_addr_mode): Use correct operand.
1040 2006-02-21 Paul Brook <paul@codesourcery.com>
1042 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1044 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1045 Anil Paranjape <anilp1@kpitcummins.com>
1046 Shilin Shakti <shilins@kpitcummins.com>
1048 * Makefile.am: Add xc16x related entry.
1049 * Makefile.in: Regenerate.
1050 * configure.in: Added xc16x related entry.
1051 * configure: Regenerate.
1052 * config/tc-xc16x.h: New file
1053 * config/tc-xc16x.c: New file
1054 * doc/c-xc16x.texi: New file for xc16x
1055 * doc/all.texi: Entry for xc16x
1056 * doc/Makefile.texi: Added c-xc16x.texi
1057 * NEWS: Announce the support for the new target.
1059 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1061 * configure.tgt: set emulation for mips-*-netbsd*
1063 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1065 * config.in: Rebuilt.
1067 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1069 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1070 from 1, not 0, in error messages.
1071 (md_assemble): Simplify special-case check for ENTRY instructions.
1072 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1073 operand in error message.
1075 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1077 * configure.tgt (arm-*-linux-gnueabi*): Change to
1080 2006-02-10 Nick Clifton <nickc@redhat.com>
1082 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1083 32-bit value is propagated into the upper bits of a 64-bit long.
1085 * config/tc-arc.c (init_opcode_tables): Fix cast.
1086 (arc_extoper, md_operand): Likewise.
1088 2006-02-09 David Heine <dlheine@tensilica.com>
1090 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1091 each relaxation step.
1093 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1095 * configure.in (CHECK_DECLS): Add vsnprintf.
1096 * configure: Regenerate.
1097 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1098 include/declare here, but...
1099 * as.h: Move code detecting VARARGS idiom to the top.
1100 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1101 (vsnprintf): Declare if not already declared.
1103 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1105 * as.c (close_output_file): New.
1106 (main): Register close_output_file with xatexit before
1107 dump_statistics. Don't call output_file_close.
1109 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1111 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1112 mcf5329_control_regs): New.
1113 (not_current_architecture, selected_arch, selected_cpu): New.
1114 (m68k_archs, m68k_extensions): New.
1115 (archs): Renamed to ...
1116 (m68k_cpus): ... here. Adjust.
1118 (md_pseudo_table): Add arch and cpu directives.
1119 (find_cf_chip, m68k_ip): Adjust table scanning.
1120 (no_68851, no_68881): Remove.
1121 (md_assemble): Lazily initialize.
1122 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1123 (md_init_after_args): Move functionality to m68k_init_arch.
1124 (mri_chip): Adjust table scanning.
1125 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1126 options with saner parsing.
1127 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1128 m68k_init_arch): New.
1129 (s_m68k_cpu, s_m68k_arch): New.
1130 (md_show_usage): Adjust.
1131 (m68k_elf_final_processing): Set CF EF flags.
1132 * config/tc-m68k.h (m68k_init_after_args): Remove.
1133 (tc_init_after_args): Remove.
1134 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1135 (M68k-Directives): Document .arch and .cpu directives.
1137 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1139 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1140 synonyms for equ and defl.
1141 (z80_cons_fix_new): New function.
1142 (emit_byte): Disallow relative jumps to absolute locations.
1143 (emit_data): Only handle defb, prototype changed, because defb is
1144 now handled as pseudo-op rather than an instruction.
1145 (instab): Entries for defb,defw,db,dw moved from here...
1146 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1147 Add entries for def24,def32,d24,d32.
1148 (md_assemble): Improved error handling.
1149 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1150 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1151 (z80_cons_fix_new): Declare.
1152 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1153 (def24,d24,def32,d32): New pseudo-ops.
1155 2006-02-02 Paul Brook <paul@codesourcery.com>
1157 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1159 2005-02-02 Paul Brook <paul@codesourcery.com>
1161 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1162 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1163 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1164 T2_OPCODE_RSB): Define.
1165 (thumb32_negate_data_op): New function.
1166 (md_apply_fix): Use it.
1168 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1170 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1172 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1173 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1175 (relaxation_requirements): Add pfinish_frag argument and use it to
1176 replace setting tinsn->record_fix fields.
1177 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1178 and vinsn_to_insnbuf. Remove references to record_fix and
1179 slot_sub_symbols fields.
1180 (xtensa_mark_narrow_branches): Delete unused code.
1181 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1183 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1185 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1186 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1187 of the record_fix field. Simplify error messages for unexpected
1189 (set_expr_symbol_offset_diff): Delete.
1191 2006-01-31 Paul Brook <paul@codesourcery.com>
1193 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1195 2006-01-31 Paul Brook <paul@codesourcery.com>
1196 Richard Earnshaw <rearnsha@arm.com>
1198 * config/tc-arm.c: Use arm_feature_set.
1199 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1200 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1201 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1204 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1205 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1206 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1207 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1209 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1210 (arm_opts): Move old cpu/arch options from here...
1211 (arm_legacy_opts): ... to here.
1212 (md_parse_option): Search arm_legacy_opts.
1213 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1214 (arm_float_abis, arm_eabis): Make const.
1216 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1218 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1220 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1222 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1223 in load immediate intruction.
1225 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1227 * config/bfin-parse.y (value_match): Use correct conversion
1228 specifications in template string for __FILE__ and __LINE__.
1232 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1234 Introduce TLS descriptors for i386 and x86_64.
1235 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1236 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1237 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1238 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1239 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1241 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1242 (lex_got): Handle @tlsdesc and @tlscall.
1243 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1245 2006-01-11 Nick Clifton <nickc@redhat.com>
1247 Fixes for building on 64-bit hosts:
1248 * config/tc-avr.c (mod_index): New union to allow conversion
1249 between pointers and integers.
1250 (md_begin, avr_ldi_expression): Use it.
1251 * config/tc-i370.c (md_assemble): Add cast for argument to print
1253 * config/tc-tic54x.c (subsym_substitute): Likewise.
1254 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1255 opindex field of fr_cgen structure into a pointer so that it can
1256 be stored in a frag.
1257 * config/tc-mn10300.c (md_assemble): Likewise.
1258 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1260 * config/tc-v850.c: Replace uses of (int) casts with correct
1263 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1266 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1268 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1271 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1272 a local-label reference.
1274 For older changes see ChangeLog-2005
1280 version-control: never