1 2006-08-16 Julian Brown <julian@codesourcery.com>
3 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
4 recognized in non-unified syntax mode.
6 2006-08-15 Thiemo Seufer <ths@mips.com>
7 Nigel Stephens <nigel@mips.com>
8 David Ung <davidu@mips.com>
10 * configure.tgt: Handle mips*-sde-elf*.
12 2006-08-12 Thiemo Seufer <ths@networkno.de>
14 * config/tc-mips.c (mips16_ip): Fix argument register handling
15 for restore instruction.
17 2006-08-08 Bob Wilson <bob.wilson@acm.org>
19 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
21 (out_fixed_inc_line_addr): New.
22 (process_entries): Use out_fixed_inc_line_addr when
23 DWARF2_USE_FIXED_ADVANCE_PC is set.
24 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
26 2006-08-08 DJ Delorie <dj@redhat.com>
28 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
29 vs full symbols so that we never have more than one pointer value
30 for any given symbol in our symbol table.
32 2006-08-08 Sterling Augustine <sterling@tensilica.com>
34 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
35 and emit DW_AT_ranges when code in compilation unit is not
37 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
39 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
40 (out_debug_ranges): New function to emit .debug_ranges section
41 when code is not contiguous.
43 2006-08-08 Nick Clifton <nickc@redhat.com>
45 * config/tc-arm.c (WARN_DEPRECATED): Enable.
47 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
49 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
51 (pe_directive_secrel) [TE_PE]: New function.
52 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
54 [TE_PE]: Handle secrel32.
55 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
57 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
58 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
59 (md_section_align): Only round section sizes here for AOUT
61 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
62 (tc_pe_dwarf2_emit_offset): New function.
63 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
64 (cons_fix_new_arm): Handle O_secrel.
65 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
66 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
67 of OBJ_ELF only block.
68 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
69 tc_pe_dwarf2_emit_offset.
71 2006-08-04 Richard Sandiford <richard@codesourcery.com>
73 * config/tc-sh.c (apply_full_field_fix): New function.
74 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
75 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
76 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
77 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
79 2006-08-03 Nick Clifton <nickc@redhat.com>
82 * config.in: Regenerate.
84 2006-08-03 Joseph Myers <joseph@codesourcery.com>
86 * config/tc-arm.c (parse_operands): Handle invalid register name
89 2006-08-03 Joseph Myers <joseph@codesourcery.com>
91 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
92 (parse_operands): Handle it.
93 (insns): Use it for tmcr and tmrc.
95 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
98 * config/tc-i386.c (md_parse_option): Treat any target starting
99 with elf64_x86_64 as a viable target for the -64 switch.
100 (i386_target_format): For 64-bit ELF flavoured output use
102 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
104 2006-08-02 Nick Clifton <nickc@redhat.com>
107 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
109 * configure.in: Run BFD_BINARY_FOPEN.
110 * configure: Regenerate.
111 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
114 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
116 * config/tc-i386.c (md_assemble): Don't update
119 2006-08-01 Thiemo Seufer <ths@mips.com>
121 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
123 2006-08-01 Thiemo Seufer <ths@mips.com>
125 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
126 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
127 BFD_RELOC_32 and BFD_RELOC_16.
128 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
129 md_convert_frag, md_obj_end): Fix comment formatting.
131 2006-07-31 Thiemo Seufer <ths@mips.com>
133 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
134 handling for BFD_RELOC_MIPS16_JMP.
136 2006-07-24 Andreas Schwab <schwab@suse.de>
139 * read.c (read_a_source_file): Ignore unknown text after line
140 comment character. Fix misleading comment.
142 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
144 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
145 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
146 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
147 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
148 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
149 doc/c-z80.texi, doc/internals.texi: Fix some typos.
151 2006-07-21 Nick Clifton <nickc@redhat.com>
153 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
156 2006-07-20 Thiemo Seufer <ths@mips.com>
157 Nigel Stephens <nigel@mips.com>
159 * config/tc-mips.c (md_parse_option): Don't infer optimisation
160 options from debug options.
162 2006-07-20 Thiemo Seufer <ths@mips.com>
164 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
165 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
167 2006-07-19 Paul Brook <paul@codesourcery.com>
169 * config/tc-arm.c (insns): Fix rbit Arm opcode.
171 2006-07-18 Paul Brook <paul@codesourcery.com>
173 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
174 (md_convert_frag): Use correct reloc for add_pc. Use
175 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
176 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
177 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
179 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
181 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
182 when file and line unknown.
184 2006-07-17 Thiemo Seufer <ths@mips.com>
186 * read.c (s_struct): Use IS_ELF.
187 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
188 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
189 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
190 s_mips_mask): Likewise.
192 2006-07-16 Thiemo Seufer <ths@mips.com>
193 David Ung <davidu@mips.com>
195 * read.c (s_struct): Handle ELF section changing.
196 * config/tc-mips.c (s_align): Leave enabling auto-align to the
198 (s_change_sec): Try section changing only if we output ELF.
200 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
202 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
204 (smallest_imm_type): Remove Cpu086.
205 (i386_target_format): Likewise.
207 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
210 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
211 Michael Meissner <michael.meissner@amd.com>
213 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
214 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
215 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
217 (i386_align_code): Ditto.
218 (md_assemble_code): Add support for insertq/extrq instructions,
219 swapping as needed for intel syntax.
220 (swap_imm_operands): New function to swap immediate operands.
221 (swap_operands): Deal with 4 operand instructions.
222 (build_modrm_byte): Add support for insertq instruction.
224 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
226 * config/tc-i386.h (Size64): Fix a typo in comment.
228 2006-07-12 Nick Clifton <nickc@redhat.com>
230 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
231 fixup_segment() to repeat a range check on a value that has
232 already been checked here.
234 2006-07-07 James E Wilson <wilson@specifix.com>
236 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
238 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
239 Nick Clifton <nickc@redhat.com>
242 * doc/as.texi: Fix spelling typo: branchs => branches.
243 * doc/c-m68hc11.texi: Likewise.
244 * config/tc-m68hc11.c: Likewise.
245 Support old spelling of command line switch for backwards
248 2006-07-04 Thiemo Seufer <ths@mips.com>
249 David Ung <davidu@mips.com>
251 * config/tc-mips.c (s_is_linkonce): New function.
252 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
253 weak, external, and linkonce symbols.
254 (pic_need_relax): Use s_is_linkonce.
256 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
258 * doc/as.texinfo (Org): Remove space.
259 (P2align): Add "@var{abs-expr},".
261 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
263 * config/tc-i386.c (cpu_arch_tune_set): New.
264 (cpu_arch_isa): Likewise.
265 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
266 nops with short or long nop sequences based on -march=/.arch
268 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
269 set cpu_arch_tune and cpu_arch_tune_flags.
270 (md_parse_option): For -march=, set cpu_arch_isa and set
271 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
272 0. Set cpu_arch_tune_set to 1 for -mtune=.
273 (i386_target_format): Don't set cpu_arch_tune.
275 2006-06-23 Nigel Stephens <nigel@mips.com>
277 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
278 generated .sbss.* and .gnu.linkonce.sb.*.
280 2006-06-23 Thiemo Seufer <ths@mips.com>
281 David Ung <davidu@mips.com>
283 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
285 * config/tc-mips.c (label_list): Define per-segment label_list.
286 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
287 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
288 mips_from_file_after_relocs, mips_define_label): Use per-segment
291 2006-06-22 Thiemo Seufer <ths@mips.com>
293 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
294 (append_insn): Use it.
295 (md_apply_fix): Whitespace formatting.
296 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
297 mips16_extended_frag): Remove register specifier.
298 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
301 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
303 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
304 a directive saving VFP registers for ARMv6 or later.
305 (s_arm_unwind_save): Add parameter arch_v6 and call
306 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
308 (md_pseudo_table): Add entry for new "vsave" directive.
309 * doc/c-arm.texi: Correct error in example for "save"
310 directive (fstmdf -> fstmdx). Also document "vsave" directive.
312 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
313 Anatoly Sokolov <aesok@post.ru>
315 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
316 and atmega644p devices. Rename atmega164/atmega324 devices to
317 atmega164p/atmega324p.
318 * doc/c-avr.texi: Document new mcu and arch options.
320 2006-06-17 Nick Clifton <nickc@redhat.com>
322 * config/tc-arm.c (enum parse_operand_result): Move outside of
323 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
325 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
327 * config/tc-i386.h (processor_type): New.
328 (arch_entry): Add type.
330 * config/tc-i386.c (cpu_arch_tune): New.
331 (cpu_arch_tune_flags): Likewise.
332 (cpu_arch_isa_flags): Likewise.
334 (set_cpu_arch): Also update cpu_arch_isa_flags.
335 (md_assemble): Update cpu_arch_isa_flags.
337 (OPTION_MTUNE): Likewise.
338 (md_longopts): Add -march= and -mtune=.
339 (md_parse_option): Support -march= and -mtune=.
340 (md_show_usage): Add -march=CPU/-mtune=CPU.
341 (i386_target_format): Also update cpu_arch_isa_flags,
342 cpu_arch_tune and cpu_arch_tune_flags.
344 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
346 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
348 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
350 * config/tc-arm.c (enum parse_operand_result): New.
351 (struct group_reloc_table_entry): New.
352 (enum group_reloc_type): New.
353 (group_reloc_table): New array.
354 (find_group_reloc_table_entry): New function.
355 (parse_shifter_operand_group_reloc): New function.
356 (parse_address_main): New function, incorporating code
357 from the old parse_address function. To be used via...
358 (parse_address): wrapper for parse_address_main; and
359 (parse_address_group_reloc): new function, likewise.
360 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
361 OP_ADDRGLDRS, OP_ADDRGLDC.
362 (parse_operands): Support for these new operand codes.
363 New macro po_misc_or_fail_no_backtrack.
364 (encode_arm_cp_address): Preserve group relocations.
365 (insns): Modify to use the above operand codes where group
366 relocations are permitted.
367 (md_apply_fix): Handle the group relocations
368 ALU_PC_G0_NC through LDC_SB_G2.
369 (tc_gen_reloc): Likewise.
370 (arm_force_relocation): Leave group relocations for the linker.
371 (arm_fix_adjustable): Likewise.
373 2006-06-15 Julian Brown <julian@codesourcery.com>
375 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
376 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
379 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
381 * config/tc-i386.c (process_suffix): Don't add rex64 for
384 2006-06-09 Thiemo Seufer <ths@mips.com>
386 * config/tc-mips.c (mips_ip): Maintain argument count.
388 2006-06-09 Alan Modra <amodra@bigpond.net.au>
390 * config/tc-iq2000.c: Include sb.h.
392 2006-06-08 Nigel Stephens <nigel@mips.com>
394 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
395 aliases for better compatibility with SGI tools.
397 2006-06-08 Alan Modra <amodra@bigpond.net.au>
399 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
400 * Makefile.am (GASLIBS): Expand @BFDLIB@.
402 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
403 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
404 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
406 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
407 * Makefile.in: Regenerate.
408 * doc/Makefile.in: Regenerate.
409 * configure: Regenerate.
411 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
413 * po/Make-in (pdf, ps): New dummy targets.
415 2006-06-07 Julian Brown <julian@codesourcery.com>
417 * config/tc-arm.c (stdarg.h): include.
418 (arm_it): Add uncond_value field. Add isvec and issingle to operand
420 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
421 REG_TYPE_NSDQ (single, double or quad vector reg).
422 (reg_expected_msgs): Update.
423 (BAD_FPU): Add macro for unsupported FPU instruction error.
424 (parse_neon_type): Support 'd' as an alias for .f64.
425 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
427 (parse_vfp_reg_list): Don't update first arg on error.
428 (parse_neon_mov): Support extra syntax for VFP moves.
429 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
430 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
431 (parse_operands): Support isvec, issingle operands fields, new parse
433 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
435 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
436 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
437 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
438 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
440 (neon_shape): Redefine in terms of above.
441 (neon_shape_class): New enumeration, table of shape classes.
442 (neon_shape_el): New enumeration. One element of a shape.
443 (neon_shape_el_size): Register widths of above, where appropriate.
444 (neon_shape_info): New struct. Info for shape table.
445 (neon_shape_tab): New array.
446 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
447 (neon_check_shape): Rewrite as...
448 (neon_select_shape): New function to classify instruction shapes,
449 driven by new table neon_shape_tab array.
450 (neon_quad): New function. Return 1 if shape should set Q flag in
451 instructions (or equivalent), 0 otherwise.
452 (type_chk_of_el_type): Support F64.
453 (el_type_of_type_chk): Likewise.
454 (neon_check_type): Add support for VFP type checking (VFP data
455 elements fill their containing registers).
456 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
457 in thumb mode for VFP instructions.
458 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
459 and encode the current instruction as if it were that opcode.
460 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
461 arguments, call function in PFN.
462 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
463 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
464 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
465 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
466 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
467 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
468 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
469 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
470 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
471 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
472 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
473 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
474 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
475 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
476 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
478 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
479 between VFP and Neon turns out to belong to Neon. Perform
480 architecture check and fill in condition field if appropriate.
481 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
482 (do_neon_cvt): Add support for VFP variants of instructions.
483 (neon_cvt_flavour): Extend to cover VFP conversions.
484 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
486 (do_neon_ldr_str): Handle single-precision VFP load/store.
487 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
488 NS_NULL not NS_IGNORE.
489 (opcode_tag): Add OT_csuffixF for operands which either take a
490 conditional suffix, or have 0xF in the condition field.
491 (md_assemble): Add support for OT_csuffixF.
492 (NCE): Replace macro with...
493 (NCE_tag, NCE, NCEF): New macros.
494 (nCE): Replace macro with...
495 (nCE_tag, nCE, nCEF): New macros.
496 (insns): Add support for VFP insns or VFP versions of insns msr,
497 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
498 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
499 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
500 VFP/Neon insns together.
502 2006-06-07 Alan Modra <amodra@bigpond.net.au>
503 Ladislav Michl <ladis@linux-mips.org>
505 * app.c: Don't include headers already included by as.h.
507 * atof-generic.c: Likewise.
509 * dwarf2dbg.c: Likewise.
511 * input-file.c: Likewise.
512 * input-scrub.c: Likewise.
514 * output-file.c: Likewise.
517 * config/bfin-lex.l: Likewise.
518 * config/obj-coff.h: Likewise.
519 * config/obj-elf.h: Likewise.
520 * config/obj-som.h: Likewise.
521 * config/tc-arc.c: Likewise.
522 * config/tc-arm.c: Likewise.
523 * config/tc-avr.c: Likewise.
524 * config/tc-bfin.c: Likewise.
525 * config/tc-cris.c: Likewise.
526 * config/tc-d10v.c: Likewise.
527 * config/tc-d30v.c: Likewise.
528 * config/tc-dlx.h: Likewise.
529 * config/tc-fr30.c: Likewise.
530 * config/tc-frv.c: Likewise.
531 * config/tc-h8300.c: Likewise.
532 * config/tc-hppa.c: Likewise.
533 * config/tc-i370.c: Likewise.
534 * config/tc-i860.c: Likewise.
535 * config/tc-i960.c: Likewise.
536 * config/tc-ip2k.c: Likewise.
537 * config/tc-iq2000.c: Likewise.
538 * config/tc-m32c.c: Likewise.
539 * config/tc-m32r.c: Likewise.
540 * config/tc-maxq.c: Likewise.
541 * config/tc-mcore.c: Likewise.
542 * config/tc-mips.c: Likewise.
543 * config/tc-mmix.c: Likewise.
544 * config/tc-mn10200.c: Likewise.
545 * config/tc-mn10300.c: Likewise.
546 * config/tc-msp430.c: Likewise.
547 * config/tc-mt.c: Likewise.
548 * config/tc-ns32k.c: Likewise.
549 * config/tc-openrisc.c: Likewise.
550 * config/tc-ppc.c: Likewise.
551 * config/tc-s390.c: Likewise.
552 * config/tc-sh.c: Likewise.
553 * config/tc-sh64.c: Likewise.
554 * config/tc-sparc.c: Likewise.
555 * config/tc-tic30.c: Likewise.
556 * config/tc-tic4x.c: Likewise.
557 * config/tc-tic54x.c: Likewise.
558 * config/tc-v850.c: Likewise.
559 * config/tc-vax.c: Likewise.
560 * config/tc-xc16x.c: Likewise.
561 * config/tc-xstormy16.c: Likewise.
562 * config/tc-xtensa.c: Likewise.
563 * config/tc-z80.c: Likewise.
564 * config/tc-z8k.c: Likewise.
565 * macro.h: Don't include sb.h or ansidecl.h.
566 * sb.h: Don't include stdio.h or ansidecl.h.
567 * cond.c: Include sb.h.
568 * itbl-lex.l: Include as.h instead of other system headers.
569 * itbl-parse.y: Likewise.
570 * itbl-ops.c: Similarly.
571 * itbl-ops.h: Don't include as.h or ansidecl.h.
572 * config/bfin-defs.h: Don't include bfd.h or as.h.
573 * config/bfin-parse.y: Include as.h instead of other system headers.
575 2006-06-06 Ben Elliston <bje@au.ibm.com>
576 Anton Blanchard <anton@samba.org>
578 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
579 (md_show_usage): Document it.
580 (ppc_setup_opcodes): Test power6 opcode flag bits.
581 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
583 2006-06-06 Thiemo Seufer <ths@mips.com>
584 Chao-ying Fu <fu@mips.com>
586 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
587 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
588 (macro_build): Update comment.
589 (mips_ip): Allow DSP64 instructions for MIPS64R2.
590 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
592 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
593 MIPS_CPU_ASE_MDMX flags for sb1.
595 2006-06-05 Thiemo Seufer <ths@mips.com>
597 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
599 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
600 (mips_ip): Make overflowed/underflowed constant arguments in DSP
601 and MT instructions a fatal error. Use INSERT_OPERAND where
602 appropriate. Improve warnings for break and wait code overflows.
603 Use symbolic constant of OP_MASK_COPZ.
604 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
606 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
608 * po/Make-in (top_builddir): Define.
610 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
612 * doc/Makefile.am (TEXI2DVI): Define.
613 * doc/Makefile.in: Regenerate.
614 * doc/c-arc.texi: Fix typo.
616 2006-06-01 Alan Modra <amodra@bigpond.net.au>
618 * config/obj-ieee.c: Delete.
619 * config/obj-ieee.h: Delete.
620 * Makefile.am (OBJ_FORMATS): Remove ieee.
621 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
622 (obj-ieee.o): Remove rule.
623 * Makefile.in: Regenerate.
624 * configure.in (atof): Remove tahoe.
625 (OBJ_MAYBE_IEEE): Don't define.
626 * configure: Regenerate.
627 * config.in: Regenerate.
628 * doc/Makefile.in: Regenerate.
629 * po/POTFILES.in: Regenerate.
631 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
633 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
634 and LIBINTL_DEP everywhere.
636 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
637 * acinclude.m4: Include new gettext macros.
638 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
639 Remove local code for po/Makefile.
640 * Makefile.in, configure, doc/Makefile.in: Regenerated.
642 2006-05-30 Nick Clifton <nickc@redhat.com>
644 * po/es.po: Updated Spanish translation.
646 2006-05-06 Denis Chertykov <denisc@overta.ru>
648 * doc/c-avr.texi: New file.
649 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
650 * doc/all.texi: Set AVR
651 * doc/as.texinfo: Include c-avr.texi
653 2006-05-28 Jie Zhang <jie.zhang@analog.com>
655 * config/bfin-parse.y (check_macfunc): Loose the condition of
656 calling check_multiply_halfregs ().
658 2006-05-25 Jie Zhang <jie.zhang@analog.com>
660 * config/bfin-parse.y (asm_1): Better check and deal with
661 vector and scalar Multiply 16-Bit Operands instructions.
663 2006-05-24 Nick Clifton <nickc@redhat.com>
665 * config/tc-hppa.c: Convert to ISO C90 format.
666 * config/tc-hppa.h: Likewise.
668 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
669 Randolph Chung <randolph@tausq.org>
671 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
672 is_tls_ieoff, is_tls_leoff): Define.
673 (fix_new_hppa): Handle TLS.
674 (cons_fix_new_hppa): Likewise.
676 (md_apply_fix): Handle TLS relocs.
677 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
679 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
681 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
683 2006-05-23 Thiemo Seufer <ths@mips.com>
684 David Ung <davidu@mips.com>
685 Nigel Stephens <nigel@mips.com>
688 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
689 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
690 ISA_HAS_MXHC1): New macros.
691 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
692 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
693 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
694 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
695 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
696 (mips_after_parse_args): Change default handling of float register
697 size to account for 32bit code with 64bit FP. Better sanity checking
698 of ISA/ASE/ABI option combinations.
699 (s_mipsset): Support switching of GPR and FPR sizes via
700 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
702 (mips_elf_final_processing): We should record the use of 64bit FP
703 registers in 32bit code but we don't, because ELF header flags are
705 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
706 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
707 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
708 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
709 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
710 missing -march options. Document .set arch=CPU. Move .set smartmips
711 to ASE page. Use @code for .set FOO examples.
713 2006-05-23 Jie Zhang <jie.zhang@analog.com>
715 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
718 2006-05-23 Jie Zhang <jie.zhang@analog.com>
720 * config/bfin-defs.h (bfin_equals): Remove declaration.
721 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
722 * config/tc-bfin.c (bfin_name_is_register): Remove.
723 (bfin_equals): Remove.
724 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
725 (bfin_name_is_register): Remove declaration.
727 2006-05-19 Thiemo Seufer <ths@mips.com>
728 Nigel Stephens <nigel@mips.com>
730 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
731 (mips_oddfpreg_ok): New function.
734 2006-05-19 Thiemo Seufer <ths@mips.com>
735 David Ung <davidu@mips.com>
737 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
738 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
739 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
740 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
741 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
742 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
743 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
744 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
745 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
746 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
747 reg_names_o32, reg_names_n32n64): Define register classes.
748 (reg_lookup): New function, use register classes.
749 (md_begin): Reserve register names in the symbol table. Simplify
751 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
753 (mips16_ip): Use reg_lookup.
754 (tc_get_register): Likewise.
755 (tc_mips_regname_to_dw2regnum): New function.
757 2006-05-19 Thiemo Seufer <ths@mips.com>
759 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
760 Un-constify string argument.
761 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
763 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
765 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
767 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
769 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
771 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
774 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
776 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
777 cfloat/m68881 to correct architecture before using it.
779 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
781 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
784 2006-05-15 Paul Brook <paul@codesourcery.com>
786 * config/tc-arm.c (arm_adjust_symtab): Use
787 bfd_is_arm_special_symbol_name.
789 2006-05-15 Bob Wilson <bob.wilson@acm.org>
791 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
792 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
793 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
794 Handle errors from calls to xtensa_opcode_is_* functions.
796 2006-05-14 Thiemo Seufer <ths@mips.com>
798 * config/tc-mips.c (macro_build): Test for currently active
800 (mips16_ip): Reject invalid opcodes.
802 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
804 * doc/as.texinfo: Rename "Index" to "AS Index",
805 and "ABORT" to "ABORT (COFF)".
807 2006-05-11 Paul Brook <paul@codesourcery.com>
809 * config/tc-arm.c (parse_half): New function.
810 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
811 (parse_operands): Ditto.
812 (do_mov16): Reject invalid relocations.
813 (do_t_mov16): Ditto. Use Thumb reloc numbers.
814 (insns): Replace Iffff with HALF.
815 (md_apply_fix): Add MOVW and MOVT relocs.
816 (tc_gen_reloc): Ditto.
817 * doc/c-arm.texi: Document relocation operators
819 2006-05-11 Paul Brook <paul@codesourcery.com>
821 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
823 2006-05-11 Thiemo Seufer <ths@mips.com>
825 * config/tc-mips.c (append_insn): Don't check the range of j or
828 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
830 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
831 relocs against external symbols for WinCE targets.
832 (md_apply_fix): Likewise.
834 2006-05-09 David Ung <davidu@mips.com>
836 * config/tc-mips.c (append_insn): Only warn about an out-of-range
839 2006-05-09 Nick Clifton <nickc@redhat.com>
841 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
842 against symbols which are not going to be placed into the symbol
845 2006-05-09 Ben Elliston <bje@au.ibm.com>
847 * expr.c (operand): Remove `if (0 && ..)' statement and
848 subsequently unused target_op label. Collapse `if (1 || ..)'
850 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
851 separately above the switch.
853 2006-05-08 Nick Clifton <nickc@redhat.com>
856 * config/tc-msp430.c (line_separator_character): Define as |.
858 2006-05-08 Thiemo Seufer <ths@mips.com>
859 Nigel Stephens <nigel@mips.com>
860 David Ung <davidu@mips.com>
862 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
863 (mips_opts): Likewise.
864 (file_ase_smartmips): New variable.
865 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
866 (macro_build): Handle SmartMIPS instructions.
868 (md_longopts): Add argument handling for smartmips.
869 (md_parse_options, mips_after_parse_args): Likewise.
870 (s_mipsset): Add .set smartmips support.
871 (md_show_usage): Document -msmartmips/-mno-smartmips.
872 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
874 * doc/c-mips.texi: Likewise.
876 2006-05-08 Alan Modra <amodra@bigpond.net.au>
878 * write.c (relax_segment): Add pass count arg. Don't error on
879 negative org/space on first two passes.
880 (relax_seg_info): New struct.
881 (relax_seg, write_object_file): Adjust.
882 * write.h (relax_segment): Update prototype.
884 2006-05-05 Julian Brown <julian@codesourcery.com>
886 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
888 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
889 architecture version checks.
890 (insns): Allow overlapping instructions to be used in VFP mode.
892 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
895 * config/obj-elf.c (obj_elf_change_section): Allow user
896 specified SHF_ALPHA_GPREL.
898 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
900 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
901 for PMEM related expressions.
903 2006-05-05 Nick Clifton <nickc@redhat.com>
906 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
907 insertion of a directory separator character into a string at a
908 given offset. Uses heuristics to decide when to use a backslash
909 character rather than a forward-slash character.
910 (dwarf2_directive_loc): Use the macro.
911 (out_debug_info): Likewise.
913 2006-05-05 Thiemo Seufer <ths@mips.com>
914 David Ung <davidu@mips.com>
916 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
918 (macro): Add new case M_CACHE_AB.
920 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
922 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
923 (opcode_lookup): Issue a warning for opcode with
924 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
925 identical to OT_cinfix3.
926 (TxC3w, TC3w, tC3w): New.
927 (insns): Use tC3w and TC3w for comparison instructions with
930 2006-05-04 Alan Modra <amodra@bigpond.net.au>
932 * subsegs.h (struct frchain): Delete frch_seg.
933 (frchain_root): Delete.
934 (seg_info): Define as macro.
935 * subsegs.c (frchain_root): Delete.
936 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
937 (subsegs_begin, subseg_change): Adjust for above.
938 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
939 rather than to one big list.
940 (subseg_get): Don't special case abs, und sections.
941 (subseg_new, subseg_force_new): Don't set frchainP here.
943 (subsegs_print_statistics): Adjust frag chain control list traversal.
944 * debug.c (dmp_frags): Likewise.
945 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
946 at frchain_root. Make use of known frchain ordering.
947 (last_frag_for_seg): Likewise.
948 (get_frag_fix): Likewise. Add seg param.
949 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
950 * write.c (chain_frchains_together_1): Adjust for struct frchain.
951 (SUB_SEGMENT_ALIGN): Likewise.
952 (subsegs_finish): Adjust frchain list traversal.
953 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
954 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
955 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
956 (xtensa_fix_b_j_loop_end_frags): Likewise.
957 (xtensa_fix_close_loop_end_frags): Likewise.
958 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
959 (retrieve_segment_info): Delete frch_seg initialisation.
961 2006-05-03 Alan Modra <amodra@bigpond.net.au>
963 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
964 * config/obj-elf.h (obj_sec_set_private_data): Delete.
965 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
966 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
968 2006-05-02 Joseph Myers <joseph@codesourcery.com>
970 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
972 (md_apply_fix3): Multiply offset by 4 here for
973 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
975 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
976 Jan Beulich <jbeulich@novell.com>
978 * config/tc-i386.c (output_invalid_buf): Change size for
980 * config/tc-tic30.c (output_invalid_buf): Likewise.
982 * config/tc-i386.c (output_invalid): Cast none-ascii char to
984 * config/tc-tic30.c (output_invalid): Likewise.
986 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
988 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
989 (TEXI2POD): Use AM_MAKEINFOFLAGS.
990 (asconfig.texi): Don't set top_srcdir.
991 * doc/as.texinfo: Don't use top_srcdir.
992 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
994 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
996 * config/tc-i386.c (output_invalid_buf): Change size to 16.
997 * config/tc-tic30.c (output_invalid_buf): Likewise.
999 * config/tc-i386.c (output_invalid): Use snprintf instead of
1001 * config/tc-ia64.c (declare_register_set): Likewise.
1002 (emit_one_bundle): Likewise.
1003 (check_dependencies): Likewise.
1004 * config/tc-tic30.c (output_invalid): Likewise.
1006 2006-05-02 Paul Brook <paul@codesourcery.com>
1008 * config/tc-arm.c (arm_optimize_expr): New function.
1009 * config/tc-arm.h (md_optimize_expr): Define
1010 (arm_optimize_expr): Add prototype.
1011 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1013 2006-05-02 Ben Elliston <bje@au.ibm.com>
1015 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1018 * sb.h (sb_list_vector): Move to sb.c.
1019 * sb.c (free_list): Use type of sb_list_vector directly.
1020 (sb_build): Fix off-by-one error in assertion about `size'.
1022 2006-05-01 Ben Elliston <bje@au.ibm.com>
1024 * listing.c (listing_listing): Remove useless loop.
1025 * macro.c (macro_expand): Remove is_positional local variable.
1026 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1027 and simplify surrounding expressions, where possible.
1028 (assign_symbol): Likewise.
1029 (s_weakref): Likewise.
1030 * symbols.c (colon): Likewise.
1032 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1034 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1036 2006-04-30 Thiemo Seufer <ths@mips.com>
1037 David Ung <davidu@mips.com>
1039 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1040 (mips_immed): New table that records various handling of udi
1041 instruction patterns.
1042 (mips_ip): Adds udi handling.
1044 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1046 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1047 of list rather than beginning.
1049 2006-04-26 Julian Brown <julian@codesourcery.com>
1051 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1052 (is_quarter_float): Rename from above. Simplify slightly.
1053 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1055 (parse_neon_mov): Parse floating-point constants.
1056 (neon_qfloat_bits): Fix encoding.
1057 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1058 preference to integer encoding when using the F32 type.
1060 2006-04-26 Julian Brown <julian@codesourcery.com>
1062 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1063 zero-initialising structures containing it will lead to invalid types).
1064 (arm_it): Add vectype to each operand.
1065 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1067 (neon_typed_alias): New structure. Extra information for typed
1069 (reg_entry): Add neon type info field.
1070 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1071 Break out alternative syntax for coprocessor registers, etc. into...
1072 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1073 out from arm_reg_parse.
1074 (parse_neon_type): Move. Return SUCCESS/FAIL.
1075 (first_error): New function. Call to ensure first error which occurs is
1077 (parse_neon_operand_type): Parse exactly one type.
1078 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1079 (parse_typed_reg_or_scalar): New function. Handle core of both
1080 arm_typed_reg_parse and parse_scalar.
1081 (arm_typed_reg_parse): Parse a register with an optional type.
1082 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1084 (parse_scalar): Parse a Neon scalar with optional type.
1085 (parse_reg_list): Use first_error.
1086 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1087 (neon_alias_types_same): New function. Return true if two (alias) types
1089 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1091 (insert_reg_alias): Return new reg_entry not void.
1092 (insert_neon_reg_alias): New function. Insert type/index information as
1093 well as register for alias.
1094 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1095 make typed register aliases accordingly.
1096 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1098 (s_unreq): Delete type information if present.
1099 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1100 (s_arm_unwind_save_mmxwcg): Likewise.
1101 (s_arm_unwind_movsp): Likewise.
1102 (s_arm_unwind_setfp): Likewise.
1103 (parse_shift): Likewise.
1104 (parse_shifter_operand): Likewise.
1105 (parse_address): Likewise.
1106 (parse_tb): Likewise.
1107 (tc_arm_regname_to_dw2regnum): Likewise.
1108 (md_pseudo_table): Add dn, qn.
1109 (parse_neon_mov): Handle typed operands.
1110 (parse_operands): Likewise.
1111 (neon_type_mask): Add N_SIZ.
1112 (N_ALLMODS): New macro.
1113 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1114 (el_type_of_type_chk): Add some safeguards.
1115 (modify_types_allowed): Fix logic bug.
1116 (neon_check_type): Handle operands with types.
1117 (neon_three_same): Remove redundant optional arg handling.
1118 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1119 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1120 (do_neon_step): Adjust accordingly.
1121 (neon_cmode_for_logic_imm): Use first_error.
1122 (do_neon_bitfield): Call neon_check_type.
1123 (neon_dyadic): Rename to...
1124 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1125 to allow modification of type of the destination.
1126 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1127 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1128 (do_neon_compare): Make destination be an untyped bitfield.
1129 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1130 (neon_mul_mac): Return early in case of errors.
1131 (neon_move_immediate): Use first_error.
1132 (neon_mac_reg_scalar_long): Fix type to include scalar.
1133 (do_neon_dup): Likewise.
1134 (do_neon_mov): Likewise (in several places).
1135 (do_neon_tbl_tbx): Fix type.
1136 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1137 (do_neon_ld_dup): Exit early in case of errors and/or use
1139 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1140 Handle .dn/.qn directives.
1141 (REGDEF): Add zero for reg_entry neon field.
1143 2006-04-26 Julian Brown <julian@codesourcery.com>
1145 * config/tc-arm.c (limits.h): Include.
1146 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1147 (fpu_vfp_v3_or_neon_ext): Declare constants.
1148 (neon_el_type): New enumeration of types for Neon vector elements.
1149 (neon_type_el): New struct. Define type and size of a vector element.
1150 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1152 (neon_type): Define struct. The type of an instruction.
1153 (arm_it): Add 'vectype' for the current instruction.
1154 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1155 (vfp_sp_reg_pos): Rename to...
1156 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1158 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1159 (Neon D or Q register).
1160 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1162 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1163 (my_get_expression): Allow above constant as argument to accept
1164 64-bit constants with optional prefix.
1165 (arm_reg_parse): Add extra argument to return the specific type of
1166 register in when either a D or Q register (REG_TYPE_NDQ) is
1167 requested. Can be NULL.
1168 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1169 (parse_reg_list): Update for new arm_reg_parse args.
1170 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1171 (parse_neon_el_struct_list): New function. Parse element/structure
1172 register lists for VLD<n>/VST<n> instructions.
1173 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1174 (s_arm_unwind_save_mmxwr): Likewise.
1175 (s_arm_unwind_save_mmxwcg): Likewise.
1176 (s_arm_unwind_movsp): Likewise.
1177 (s_arm_unwind_setfp): Likewise.
1178 (parse_big_immediate): New function. Parse an immediate, which may be
1179 64 bits wide. Put results in inst.operands[i].
1180 (parse_shift): Update for new arm_reg_parse args.
1181 (parse_address): Likewise. Add parsing of alignment specifiers.
1182 (parse_neon_mov): Parse the operands of a VMOV instruction.
1183 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1184 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1185 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1186 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1187 (parse_operands): Handle new codes above.
1188 (encode_arm_vfp_sp_reg): Rename to...
1189 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1190 selected VFP version only supports D0-D15.
1191 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1192 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1193 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1194 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1195 encode_arm_vfp_reg name, and allow 32 D regs.
1196 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1197 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1199 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1200 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1201 constant-load and conversion insns introduced with VFPv3.
1202 (neon_tab_entry): New struct.
1203 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1204 those which are the targets of pseudo-instructions.
1205 (neon_opc): Enumerate opcodes, use as indices into...
1206 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1207 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1208 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1209 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1211 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1213 (neon_type_mask): New. Compact type representation for type checking.
1214 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1215 permitted type combinations.
1216 (N_IGNORE_TYPE): New macro.
1217 (neon_check_shape): New function. Check an instruction shape for
1218 multiple alternatives. Return the specific shape for the current
1220 (neon_modify_type_size): New function. Modify a vector type and size,
1221 depending on the bit mask in argument 1.
1222 (neon_type_promote): New function. Convert a given "key" type (of an
1223 operand) into the correct type for a different operand, based on a bit
1225 (type_chk_of_el_type): New function. Convert a type and size into the
1226 compact representation used for type checking.
1227 (el_type_of_type_ckh): New function. Reverse of above (only when a
1228 single bit is set in the bit mask).
1229 (modify_types_allowed): New function. Alter a mask of allowed types
1230 based on a bit mask of modifications.
1231 (neon_check_type): New function. Check the type of the current
1232 instruction against the variable argument list. The "key" type of the
1233 instruction is returned.
1234 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1235 a Neon data-processing instruction depending on whether we're in ARM
1236 mode or Thumb-2 mode.
1237 (neon_logbits): New function.
1238 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1239 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1240 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1241 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1242 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1243 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1244 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1245 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1246 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1247 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1248 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1249 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1250 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1251 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1252 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1253 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1254 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1255 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1256 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1257 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1258 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1259 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1260 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1261 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1262 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1264 (parse_neon_type): New function. Parse Neon type specifier.
1265 (opcode_lookup): Allow parsing of Neon type specifiers.
1266 (REGNUM2, REGSETH, REGSET2): New macros.
1267 (reg_names): Add new VFPv3 and Neon registers.
1268 (NUF, nUF, NCE, nCE): New macros for opcode table.
1269 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1270 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1271 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1272 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1273 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1274 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1275 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1276 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1277 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1278 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1279 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1280 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1281 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1282 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1284 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1285 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1286 (arm_option_cpu_value): Add vfp3 and neon.
1287 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1290 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1292 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1293 syntax instead of hardcoded opcodes with ".w18" suffixes.
1294 (wide_branch_opcode): New.
1295 (build_transition): Use it to check for wide branch opcodes with
1296 either ".w18" or ".w15" suffixes.
1298 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1300 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1301 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1302 frag's is_literal flag.
1304 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1306 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1308 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1310 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1311 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1312 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1313 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1314 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1316 2005-04-20 Paul Brook <paul@codesourcery.com>
1318 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1320 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1322 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1324 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1325 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1326 Make some cpus unsupported on ELF. Run "make dep-am".
1327 * Makefile.in: Regenerate.
1329 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1331 * configure.in (--enable-targets): Indent help message.
1332 * configure: Regenerate.
1334 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1337 * config/tc-i386.c (i386_immediate): Check illegal immediate
1340 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1342 * config/tc-i386.c: Formatting.
1343 (output_disp, output_imm): ISO C90 params.
1345 * frags.c (frag_offset_fixed_p): Constify args.
1346 * frags.h (frag_offset_fixed_p): Ditto.
1348 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1349 (COFF_MAGIC): Delete.
1351 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1353 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1355 * po/POTFILES.in: Regenerated.
1357 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1359 * doc/as.texinfo: Mention that some .type syntaxes are not
1360 supported on all architectures.
1362 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1364 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1365 instructions when such transformations have been disabled.
1367 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1369 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1370 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1371 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1372 decoding the loop instructions. Remove current_offset variable.
1373 (xtensa_fix_short_loop_frags): Likewise.
1374 (min_bytes_to_other_loop_end): Remove current_offset argument.
1376 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1378 * config/tc-z80.c (z80_optimize_expr): Removed.
1379 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1381 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1383 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1384 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1385 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1386 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1387 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1388 at90can64, at90usb646, at90usb647, at90usb1286 and
1390 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1392 2006-04-07 Paul Brook <paul@codesourcery.com>
1394 * config/tc-arm.c (parse_operands): Set default error message.
1396 2006-04-07 Paul Brook <paul@codesourcery.com>
1398 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1400 2006-04-07 Paul Brook <paul@codesourcery.com>
1402 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1404 2006-04-07 Paul Brook <paul@codesourcery.com>
1406 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1407 (move_or_literal_pool): Handle Thumb-2 instructions.
1408 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1410 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1413 * config/tc-i386.c (match_template): Move 64-bit operand tests
1416 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1418 * po/Make-in: Add install-html target.
1419 * Makefile.am: Add install-html and install-html-recursive targets.
1420 * Makefile.in: Regenerate.
1421 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1422 * configure: Regenerate.
1423 * doc/Makefile.am: Add install-html and install-html-am targets.
1424 * doc/Makefile.in: Regenerate.
1426 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1428 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1431 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1432 Daniel Jacobowitz <dan@codesourcery.com>
1434 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1435 (GOTT_BASE, GOTT_INDEX): New.
1436 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1437 GOTT_INDEX when generating VxWorks PIC.
1438 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1439 use the generic *-*-vxworks* stanza instead.
1441 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1444 * frags.c (frag_offset_fixed_p): New function.
1445 * frags.h (frag_offset_fixed_p): Declare.
1446 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1447 (resolve_expression): Likewise.
1449 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1451 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1452 of the same length but different numbers of slots.
1454 2006-03-30 Andreas Schwab <schwab@suse.de>
1456 * configure.in: Fix help string for --enable-targets option.
1457 * configure: Regenerate.
1459 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1461 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1462 (m68k_ip): ... here. Use for all chips. Protect against buffer
1463 overrun and avoid excessive copying.
1465 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1466 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1467 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1468 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1469 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1470 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1471 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1472 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1473 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1474 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1475 (struct m68k_cpu): Change chip field to control_regs.
1476 (current_chip): Remove.
1477 (control_regs): New.
1478 (m68k_archs, m68k_extensions): Adjust.
1479 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1480 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1481 (find_cf_chip): Reimplement for new organization of cpu table.
1482 (select_control_regs): Remove.
1484 (struct save_opts): Save control regs, not chip.
1485 (s_save, s_restore): Adjust.
1486 (m68k_lookup_cpu): Give deprecated warning when necessary.
1487 (m68k_init_arch): Adjust.
1488 (md_show_usage): Adjust for new cpu table organization.
1490 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1492 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1493 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1494 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1496 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1497 (any_gotrel): New rule.
1498 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1499 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1501 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1502 (bfin_pic_ptr): New function.
1503 (md_pseudo_table): Add it for ".picptr".
1504 (OPTION_FDPIC): New macro.
1505 (md_longopts): Add -mfdpic.
1506 (md_parse_option): Handle it.
1507 (md_begin): Set BFD flags.
1508 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1509 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1511 * Makefile.am (bfin-parse.o): Update dependencies.
1512 (DEPTC_bfin_elf): Likewise.
1513 * Makefile.in: Regenerate.
1515 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1517 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1518 mcfemac instead of mcfmac.
1520 2006-03-23 Michael Matz <matz@suse.de>
1522 * config/tc-i386.c (type_names): Correct placement of 'static'.
1523 (reloc): Map some more relocs to their 64 bit counterpart when
1525 (output_insn): Work around breakage if DEBUG386 is defined.
1526 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1527 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1528 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1529 different from i386.
1530 (output_imm): Ditto.
1531 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1533 (md_convert_frag): Jumps can now be larger than 2GB away, error
1535 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1536 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1538 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1539 Daniel Jacobowitz <dan@codesourcery.com>
1540 Phil Edwards <phil@codesourcery.com>
1541 Zack Weinberg <zack@codesourcery.com>
1542 Mark Mitchell <mark@codesourcery.com>
1543 Nathan Sidwell <nathan@codesourcery.com>
1545 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1546 (md_begin): Complain about -G being used for PIC. Don't change
1547 the text, data and bss alignments on VxWorks.
1548 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1549 generating VxWorks PIC.
1550 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1551 (macro): Likewise, but do not treat la $25 specially for
1552 VxWorks PIC, and do not handle jal.
1553 (OPTION_MVXWORKS_PIC): New macro.
1554 (md_longopts): Add -mvxworks-pic.
1555 (md_parse_option): Don't complain about using PIC and -G together here.
1556 Handle OPTION_MVXWORKS_PIC.
1557 (md_estimate_size_before_relax): Always use the first relaxation
1558 sequence on VxWorks.
1559 * config/tc-mips.h (VXWORKS_PIC): New.
1561 2006-03-21 Paul Brook <paul@codesourcery.com>
1563 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1565 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1567 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1568 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1569 (get_loop_align_size): New.
1570 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1571 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1572 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1573 (get_noop_aligned_address): Use get_loop_align_size.
1574 (get_aligned_diff): Likewise.
1576 2006-03-21 Paul Brook <paul@codesourcery.com>
1578 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1580 2006-03-20 Paul Brook <paul@codesourcery.com>
1582 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1583 (do_t_branch): Encode branches inside IT blocks as unconditional.
1584 (do_t_cps): New function.
1585 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1586 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1587 (opcode_lookup): Allow conditional suffixes on all instructions in
1589 (md_assemble): Advance condexec state before checking for errors.
1590 (insns): Use do_t_cps.
1592 2006-03-20 Paul Brook <paul@codesourcery.com>
1594 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1595 outputting the insn.
1597 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1599 * config/tc-vax.c: Update copyright year.
1600 * config/tc-vax.h: Likewise.
1602 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1604 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1606 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1608 2006-03-17 Paul Brook <paul@codesourcery.com>
1610 * config/tc-arm.c (insns): Add ldm and stm.
1612 2006-03-17 Ben Elliston <bje@au.ibm.com>
1615 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1617 2006-03-16 Paul Brook <paul@codesourcery.com>
1619 * config/tc-arm.c (insns): Add "svc".
1621 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1623 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1624 flag and avoid double underscore prefixes.
1626 2006-03-10 Paul Brook <paul@codesourcery.com>
1628 * config/tc-arm.c (md_begin): Handle EABIv5.
1629 (arm_eabis): Add EF_ARM_EABI_VER5.
1630 * doc/c-arm.texi: Document -meabi=5.
1632 2006-03-10 Ben Elliston <bje@au.ibm.com>
1634 * app.c (do_scrub_chars): Simplify string handling.
1636 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1637 Daniel Jacobowitz <dan@codesourcery.com>
1638 Zack Weinberg <zack@codesourcery.com>
1639 Nathan Sidwell <nathan@codesourcery.com>
1640 Paul Brook <paul@codesourcery.com>
1641 Ricardo Anguiano <anguiano@codesourcery.com>
1642 Phil Edwards <phil@codesourcery.com>
1644 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1645 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1647 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1648 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1649 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1651 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1653 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1654 even when using the text-section-literals option.
1656 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1658 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1660 (m68k_ip): <case 'J'> Check we have some control regs.
1661 (md_parse_option): Allow raw arch switch.
1662 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1663 whether 68881 or cfloat was meant by -mfloat.
1664 (md_show_usage): Adjust extension display.
1665 (m68k_elf_final_processing): Adjust.
1667 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1669 * config/tc-avr.c (avr_mod_hash_value): New function.
1670 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1671 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1672 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1673 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1675 (tc_gen_reloc): Handle substractions of symbols, if possible do
1676 fixups, abort otherwise.
1677 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1678 tc_fix_adjustable): Define.
1680 2006-03-02 James E Wilson <wilson@specifix.com>
1682 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1683 change the template, then clear md.slot[curr].end_of_insn_group.
1685 2006-02-28 Jan Beulich <jbeulich@novell.com>
1687 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1689 2006-02-28 Jan Beulich <jbeulich@novell.com>
1692 * macro.c (getstring): Don't treat parentheses special anymore.
1693 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1694 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1697 2006-02-28 Mat <mat@csail.mit.edu>
1699 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1701 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1703 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1705 (CFI_signal_frame): Define.
1706 (cfi_pseudo_table): Add .cfi_signal_frame.
1707 (dot_cfi): Handle CFI_signal_frame.
1708 (output_cie): Handle cie->signal_frame.
1709 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1710 different. Copy signal_frame from FDE to newly created CIE.
1711 * doc/as.texinfo: Document .cfi_signal_frame.
1713 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1715 * doc/Makefile.am: Add html target.
1716 * doc/Makefile.in: Regenerate.
1717 * po/Make-in: Add html target.
1719 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1721 * config/tc-i386.c (output_insn): Support Intel Merom New
1724 * config/tc-i386.h (CpuMNI): New.
1725 (CpuUnknownFlags): Add CpuMNI.
1727 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1729 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1730 (hpriv_reg_table): New table for hyperprivileged registers.
1731 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1734 2006-02-24 DJ Delorie <dj@redhat.com>
1736 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1737 (tc_gen_reloc): Don't define.
1738 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1739 (OPTION_LINKRELAX): New.
1740 (md_longopts): Add it.
1742 (md_parse_options): Set it.
1743 (md_assemble): Emit relaxation relocs as needed.
1744 (md_convert_frag): Emit relaxation relocs as needed.
1745 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1746 (m32c_apply_fix): New.
1747 (tc_gen_reloc): New.
1748 (m32c_force_relocation): Force out jump relocs when relaxing.
1749 (m32c_fix_adjustable): Return false if relaxing.
1751 2006-02-24 Paul Brook <paul@codesourcery.com>
1753 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1754 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1755 (struct asm_barrier_opt): Define.
1756 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1757 (parse_psr): Accept V7M psr names.
1758 (parse_barrier): New function.
1759 (enum operand_parse_code): Add OP_oBARRIER.
1760 (parse_operands): Implement OP_oBARRIER.
1761 (do_barrier): New function.
1762 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1763 (do_t_cpsi): Add V7M restrictions.
1764 (do_t_mrs, do_t_msr): Validate V7M variants.
1765 (md_assemble): Check for NULL variants.
1766 (v7m_psrs, barrier_opt_names): New tables.
1767 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1768 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1769 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1770 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1771 (struct cpu_arch_ver_table): Define.
1772 (cpu_arch_ver): New.
1773 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1774 Tag_CPU_arch_profile.
1775 * doc/c-arm.texi: Document new cpu and arch options.
1777 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1779 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1781 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1783 * config/tc-ia64.c: Update copyright years.
1785 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1787 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1790 2005-02-22 Paul Brook <paul@codesourcery.com>
1792 * config/tc-arm.c (do_pld): Remove incorrect write to
1794 (encode_thumb32_addr_mode): Use correct operand.
1796 2006-02-21 Paul Brook <paul@codesourcery.com>
1798 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1800 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1801 Anil Paranjape <anilp1@kpitcummins.com>
1802 Shilin Shakti <shilins@kpitcummins.com>
1804 * Makefile.am: Add xc16x related entry.
1805 * Makefile.in: Regenerate.
1806 * configure.in: Added xc16x related entry.
1807 * configure: Regenerate.
1808 * config/tc-xc16x.h: New file
1809 * config/tc-xc16x.c: New file
1810 * doc/c-xc16x.texi: New file for xc16x
1811 * doc/all.texi: Entry for xc16x
1812 * doc/Makefile.texi: Added c-xc16x.texi
1813 * NEWS: Announce the support for the new target.
1815 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1817 * configure.tgt: set emulation for mips-*-netbsd*
1819 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1821 * config.in: Rebuilt.
1823 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1825 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1826 from 1, not 0, in error messages.
1827 (md_assemble): Simplify special-case check for ENTRY instructions.
1828 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1829 operand in error message.
1831 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1833 * configure.tgt (arm-*-linux-gnueabi*): Change to
1836 2006-02-10 Nick Clifton <nickc@redhat.com>
1838 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1839 32-bit value is propagated into the upper bits of a 64-bit long.
1841 * config/tc-arc.c (init_opcode_tables): Fix cast.
1842 (arc_extoper, md_operand): Likewise.
1844 2006-02-09 David Heine <dlheine@tensilica.com>
1846 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1847 each relaxation step.
1849 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1851 * configure.in (CHECK_DECLS): Add vsnprintf.
1852 * configure: Regenerate.
1853 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1854 include/declare here, but...
1855 * as.h: Move code detecting VARARGS idiom to the top.
1856 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1857 (vsnprintf): Declare if not already declared.
1859 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1861 * as.c (close_output_file): New.
1862 (main): Register close_output_file with xatexit before
1863 dump_statistics. Don't call output_file_close.
1865 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1867 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1868 mcf5329_control_regs): New.
1869 (not_current_architecture, selected_arch, selected_cpu): New.
1870 (m68k_archs, m68k_extensions): New.
1871 (archs): Renamed to ...
1872 (m68k_cpus): ... here. Adjust.
1874 (md_pseudo_table): Add arch and cpu directives.
1875 (find_cf_chip, m68k_ip): Adjust table scanning.
1876 (no_68851, no_68881): Remove.
1877 (md_assemble): Lazily initialize.
1878 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1879 (md_init_after_args): Move functionality to m68k_init_arch.
1880 (mri_chip): Adjust table scanning.
1881 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1882 options with saner parsing.
1883 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1884 m68k_init_arch): New.
1885 (s_m68k_cpu, s_m68k_arch): New.
1886 (md_show_usage): Adjust.
1887 (m68k_elf_final_processing): Set CF EF flags.
1888 * config/tc-m68k.h (m68k_init_after_args): Remove.
1889 (tc_init_after_args): Remove.
1890 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1891 (M68k-Directives): Document .arch and .cpu directives.
1893 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1895 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1896 synonyms for equ and defl.
1897 (z80_cons_fix_new): New function.
1898 (emit_byte): Disallow relative jumps to absolute locations.
1899 (emit_data): Only handle defb, prototype changed, because defb is
1900 now handled as pseudo-op rather than an instruction.
1901 (instab): Entries for defb,defw,db,dw moved from here...
1902 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1903 Add entries for def24,def32,d24,d32.
1904 (md_assemble): Improved error handling.
1905 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1906 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1907 (z80_cons_fix_new): Declare.
1908 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1909 (def24,d24,def32,d32): New pseudo-ops.
1911 2006-02-02 Paul Brook <paul@codesourcery.com>
1913 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1915 2005-02-02 Paul Brook <paul@codesourcery.com>
1917 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1918 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1919 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1920 T2_OPCODE_RSB): Define.
1921 (thumb32_negate_data_op): New function.
1922 (md_apply_fix): Use it.
1924 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1926 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1928 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1929 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1931 (relaxation_requirements): Add pfinish_frag argument and use it to
1932 replace setting tinsn->record_fix fields.
1933 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1934 and vinsn_to_insnbuf. Remove references to record_fix and
1935 slot_sub_symbols fields.
1936 (xtensa_mark_narrow_branches): Delete unused code.
1937 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1939 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1941 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1942 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1943 of the record_fix field. Simplify error messages for unexpected
1945 (set_expr_symbol_offset_diff): Delete.
1947 2006-01-31 Paul Brook <paul@codesourcery.com>
1949 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1951 2006-01-31 Paul Brook <paul@codesourcery.com>
1952 Richard Earnshaw <rearnsha@arm.com>
1954 * config/tc-arm.c: Use arm_feature_set.
1955 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1956 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1957 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1960 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1961 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1962 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1963 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1965 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1966 (arm_opts): Move old cpu/arch options from here...
1967 (arm_legacy_opts): ... to here.
1968 (md_parse_option): Search arm_legacy_opts.
1969 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1970 (arm_float_abis, arm_eabis): Make const.
1972 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1974 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1976 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1978 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1979 in load immediate intruction.
1981 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1983 * config/bfin-parse.y (value_match): Use correct conversion
1984 specifications in template string for __FILE__ and __LINE__.
1988 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1990 Introduce TLS descriptors for i386 and x86_64.
1991 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1992 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1993 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1994 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1995 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1997 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1998 (lex_got): Handle @tlsdesc and @tlscall.
1999 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2001 2006-01-11 Nick Clifton <nickc@redhat.com>
2003 Fixes for building on 64-bit hosts:
2004 * config/tc-avr.c (mod_index): New union to allow conversion
2005 between pointers and integers.
2006 (md_begin, avr_ldi_expression): Use it.
2007 * config/tc-i370.c (md_assemble): Add cast for argument to print
2009 * config/tc-tic54x.c (subsym_substitute): Likewise.
2010 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2011 opindex field of fr_cgen structure into a pointer so that it can
2012 be stored in a frag.
2013 * config/tc-mn10300.c (md_assemble): Likewise.
2014 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2016 * config/tc-v850.c: Replace uses of (int) casts with correct
2019 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2022 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2024 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2027 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2028 a local-label reference.
2030 For older changes see ChangeLog-2005
2036 version-control: never