* doc/c-xtensa.texi: Add @group commands in examples.
[binutils-gdb.git] / gas / ChangeLog
1 2006-08-25 Bob Wilson <bob.wilson@acm.org>
2
3 * doc/c-xtensa.texi: Add @group commands in examples.
4
5 2006-08-24 Bob Wilson <bob.wilson@acm.org>
6
7 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
8 (INIT_LITERAL_SECTION_NAME): Delete.
9 (lit_state struct): Remove segment names, init_lit_seg, and
10 fini_lit_seg. Add lit_prefix and current_text_seg.
11 (init_literal_head_h, init_literal_head): Delete.
12 (fini_literal_head_h, fini_literal_head): Delete.
13 (xtensa_begin_directive): Move argument parsing to
14 xtensa_literal_prefix function.
15 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
16 (xtensa_literal_prefix): Parse the directive argument here and
17 record it in the lit_prefix field. Remove code to derive literal
18 section names.
19 (linkonce_len): New.
20 (get_is_linkonce_section): Use linkonce_len. Check for any
21 ".gnu.linkonce.*" section, not just text sections.
22 (md_begin): Remove initialization of deleted lit_state fields.
23 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
24 to init_literal_head and fini_literal_head.
25 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
26 when traversing literal_head list.
27 (match_section_group): New.
28 (cache_literal_section): Rewrite to determine the literal section
29 name on the fly, create the section and return it.
30 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
31 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
32 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
33 Use xtensa_get_property_section from bfd.
34 (retrieve_xtensa_section): Delete.
35 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
36 description to refer to plural literal sections and add xref to
37 the Literal Directive section.
38 (Literal Directive): Describe new rules for deriving literal section
39 names. Add footnote for special case of .init/.fini with
40 --text-section-literals.
41 (Literal Prefix Directive): Replace old naming rules with xref to the
42 Literal Directive section.
43
44 2006-08-21 Joseph Myers <joseph@codesourcery.com>
45
46 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
47 merging with previous long opcode.
48
49 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
50
51 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
52 * Makefile.in: Regenerate.
53 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
54 renamed. Adjust.
55
56 2006-08-16 Julian Brown <julian@codesourcery.com>
57
58 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
59 to use ARM instructions on non-ARM-supporting cores.
60 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
61 mode automatically based on cpu variant.
62 (md_begin): Call above function.
63
64 2006-08-16 Julian Brown <julian@codesourcery.com>
65
66 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
67 recognized in non-unified syntax mode.
68
69 2006-08-15 Thiemo Seufer <ths@mips.com>
70 Nigel Stephens <nigel@mips.com>
71 David Ung <davidu@mips.com>
72
73 * configure.tgt: Handle mips*-sde-elf*.
74
75 2006-08-12 Thiemo Seufer <ths@networkno.de>
76
77 * config/tc-mips.c (mips16_ip): Fix argument register handling
78 for restore instruction.
79
80 2006-08-08 Bob Wilson <bob.wilson@acm.org>
81
82 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
83 (out_sleb128): New.
84 (out_fixed_inc_line_addr): New.
85 (process_entries): Use out_fixed_inc_line_addr when
86 DWARF2_USE_FIXED_ADVANCE_PC is set.
87 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
88
89 2006-08-08 DJ Delorie <dj@redhat.com>
90
91 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
92 vs full symbols so that we never have more than one pointer value
93 for any given symbol in our symbol table.
94
95 2006-08-08 Sterling Augustine <sterling@tensilica.com>
96
97 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
98 and emit DW_AT_ranges when code in compilation unit is not
99 contiguous.
100 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
101 is not contiguous.
102 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
103 (out_debug_ranges): New function to emit .debug_ranges section
104 when code is not contiguous.
105
106 2006-08-08 Nick Clifton <nickc@redhat.com>
107
108 * config/tc-arm.c (WARN_DEPRECATED): Enable.
109
110 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
111
112 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
113 only block.
114 (pe_directive_secrel) [TE_PE]: New function.
115 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
116 loc, loc_mark_labels.
117 [TE_PE]: Handle secrel32.
118 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
119 call.
120 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
121 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
122 (md_section_align): Only round section sizes here for AOUT
123 targets.
124 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
125 (tc_pe_dwarf2_emit_offset): New function.
126 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
127 (cons_fix_new_arm): Handle O_secrel.
128 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
129 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
130 of OBJ_ELF only block.
131 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
132 tc_pe_dwarf2_emit_offset.
133
134 2006-08-04 Richard Sandiford <richard@codesourcery.com>
135
136 * config/tc-sh.c (apply_full_field_fix): New function.
137 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
138 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
139 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
140 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
141
142 2006-08-03 Nick Clifton <nickc@redhat.com>
143
144 PR gas/2991
145 * config.in: Regenerate.
146
147 2006-08-03 Joseph Myers <joseph@codesourcery.com>
148
149 * config/tc-arm.c (parse_operands): Handle invalid register name
150 for OP_RIWR_RIWC.
151
152 2006-08-03 Joseph Myers <joseph@codesourcery.com>
153
154 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
155 (parse_operands): Handle it.
156 (insns): Use it for tmcr and tmrc.
157
158 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
159
160 PR binutils/2983
161 * config/tc-i386.c (md_parse_option): Treat any target starting
162 with elf64_x86_64 as a viable target for the -64 switch.
163 (i386_target_format): For 64-bit ELF flavoured output use
164 ELF_TARGET_FORMAT64.
165 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
166
167 2006-08-02 Nick Clifton <nickc@redhat.com>
168
169 PR gas/2991
170 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
171 bfd/aclocal.m4.
172 * configure.in: Run BFD_BINARY_FOPEN.
173 * configure: Regenerate.
174 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
175 file to include.
176
177 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
178
179 * config/tc-i386.c (md_assemble): Don't update
180 cpu_arch_isa_flags.
181
182 2006-08-01 Thiemo Seufer <ths@mips.com>
183
184 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
185
186 2006-08-01 Thiemo Seufer <ths@mips.com>
187
188 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
189 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
190 BFD_RELOC_32 and BFD_RELOC_16.
191 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
192 md_convert_frag, md_obj_end): Fix comment formatting.
193
194 2006-07-31 Thiemo Seufer <ths@mips.com>
195
196 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
197 handling for BFD_RELOC_MIPS16_JMP.
198
199 2006-07-24 Andreas Schwab <schwab@suse.de>
200
201 PR/2756
202 * read.c (read_a_source_file): Ignore unknown text after line
203 comment character. Fix misleading comment.
204
205 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
206
207 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
208 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
209 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
210 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
211 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
212 doc/c-z80.texi, doc/internals.texi: Fix some typos.
213
214 2006-07-21 Nick Clifton <nickc@redhat.com>
215
216 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
217 linker testsuite.
218
219 2006-07-20 Thiemo Seufer <ths@mips.com>
220 Nigel Stephens <nigel@mips.com>
221
222 * config/tc-mips.c (md_parse_option): Don't infer optimisation
223 options from debug options.
224
225 2006-07-20 Thiemo Seufer <ths@mips.com>
226
227 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
228 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
229
230 2006-07-19 Paul Brook <paul@codesourcery.com>
231
232 * config/tc-arm.c (insns): Fix rbit Arm opcode.
233
234 2006-07-18 Paul Brook <paul@codesourcery.com>
235
236 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
237 (md_convert_frag): Use correct reloc for add_pc. Use
238 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
239 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
240 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
241
242 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
243
244 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
245 when file and line unknown.
246
247 2006-07-17 Thiemo Seufer <ths@mips.com>
248
249 * read.c (s_struct): Use IS_ELF.
250 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
251 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
252 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
253 s_mips_mask): Likewise.
254
255 2006-07-16 Thiemo Seufer <ths@mips.com>
256 David Ung <davidu@mips.com>
257
258 * read.c (s_struct): Handle ELF section changing.
259 * config/tc-mips.c (s_align): Leave enabling auto-align to the
260 generic code.
261 (s_change_sec): Try section changing only if we output ELF.
262
263 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
264
265 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
266 CpuAmdFam10.
267 (smallest_imm_type): Remove Cpu086.
268 (i386_target_format): Likewise.
269
270 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
271 Update CpuXXX.
272
273 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
274 Michael Meissner <michael.meissner@amd.com>
275
276 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
277 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
278 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
279 architecture.
280 (i386_align_code): Ditto.
281 (md_assemble_code): Add support for insertq/extrq instructions,
282 swapping as needed for intel syntax.
283 (swap_imm_operands): New function to swap immediate operands.
284 (swap_operands): Deal with 4 operand instructions.
285 (build_modrm_byte): Add support for insertq instruction.
286
287 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
288
289 * config/tc-i386.h (Size64): Fix a typo in comment.
290
291 2006-07-12 Nick Clifton <nickc@redhat.com>
292
293 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
294 fixup_segment() to repeat a range check on a value that has
295 already been checked here.
296
297 2006-07-07 James E Wilson <wilson@specifix.com>
298
299 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
300
301 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
302 Nick Clifton <nickc@redhat.com>
303
304 PR binutils/2877
305 * doc/as.texi: Fix spelling typo: branchs => branches.
306 * doc/c-m68hc11.texi: Likewise.
307 * config/tc-m68hc11.c: Likewise.
308 Support old spelling of command line switch for backwards
309 compatibility.
310
311 2006-07-04 Thiemo Seufer <ths@mips.com>
312 David Ung <davidu@mips.com>
313
314 * config/tc-mips.c (s_is_linkonce): New function.
315 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
316 weak, external, and linkonce symbols.
317 (pic_need_relax): Use s_is_linkonce.
318
319 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
320
321 * doc/as.texinfo (Org): Remove space.
322 (P2align): Add "@var{abs-expr},".
323
324 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
325
326 * config/tc-i386.c (cpu_arch_tune_set): New.
327 (cpu_arch_isa): Likewise.
328 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
329 nops with short or long nop sequences based on -march=/.arch
330 and -mtune=.
331 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
332 set cpu_arch_tune and cpu_arch_tune_flags.
333 (md_parse_option): For -march=, set cpu_arch_isa and set
334 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
335 0. Set cpu_arch_tune_set to 1 for -mtune=.
336 (i386_target_format): Don't set cpu_arch_tune.
337
338 2006-06-23 Nigel Stephens <nigel@mips.com>
339
340 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
341 generated .sbss.* and .gnu.linkonce.sb.*.
342
343 2006-06-23 Thiemo Seufer <ths@mips.com>
344 David Ung <davidu@mips.com>
345
346 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
347 label_list.
348 * config/tc-mips.c (label_list): Define per-segment label_list.
349 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
350 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
351 mips_from_file_after_relocs, mips_define_label): Use per-segment
352 label_list.
353
354 2006-06-22 Thiemo Seufer <ths@mips.com>
355
356 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
357 (append_insn): Use it.
358 (md_apply_fix): Whitespace formatting.
359 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
360 mips16_extended_frag): Remove register specifier.
361 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
362 constants.
363
364 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
365
366 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
367 a directive saving VFP registers for ARMv6 or later.
368 (s_arm_unwind_save): Add parameter arch_v6 and call
369 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
370 appropriate.
371 (md_pseudo_table): Add entry for new "vsave" directive.
372 * doc/c-arm.texi: Correct error in example for "save"
373 directive (fstmdf -> fstmdx). Also document "vsave" directive.
374
375 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
376 Anatoly Sokolov <aesok@post.ru>
377
378 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
379 and atmega644p devices. Rename atmega164/atmega324 devices to
380 atmega164p/atmega324p.
381 * doc/c-avr.texi: Document new mcu and arch options.
382
383 2006-06-17 Nick Clifton <nickc@redhat.com>
384
385 * config/tc-arm.c (enum parse_operand_result): Move outside of
386 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
387
388 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
389
390 * config/tc-i386.h (processor_type): New.
391 (arch_entry): Add type.
392
393 * config/tc-i386.c (cpu_arch_tune): New.
394 (cpu_arch_tune_flags): Likewise.
395 (cpu_arch_isa_flags): Likewise.
396 (cpu_arch): Updated.
397 (set_cpu_arch): Also update cpu_arch_isa_flags.
398 (md_assemble): Update cpu_arch_isa_flags.
399 (OPTION_MARCH): New.
400 (OPTION_MTUNE): Likewise.
401 (md_longopts): Add -march= and -mtune=.
402 (md_parse_option): Support -march= and -mtune=.
403 (md_show_usage): Add -march=CPU/-mtune=CPU.
404 (i386_target_format): Also update cpu_arch_isa_flags,
405 cpu_arch_tune and cpu_arch_tune_flags.
406
407 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
408
409 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
410
411 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
412
413 * config/tc-arm.c (enum parse_operand_result): New.
414 (struct group_reloc_table_entry): New.
415 (enum group_reloc_type): New.
416 (group_reloc_table): New array.
417 (find_group_reloc_table_entry): New function.
418 (parse_shifter_operand_group_reloc): New function.
419 (parse_address_main): New function, incorporating code
420 from the old parse_address function. To be used via...
421 (parse_address): wrapper for parse_address_main; and
422 (parse_address_group_reloc): new function, likewise.
423 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
424 OP_ADDRGLDRS, OP_ADDRGLDC.
425 (parse_operands): Support for these new operand codes.
426 New macro po_misc_or_fail_no_backtrack.
427 (encode_arm_cp_address): Preserve group relocations.
428 (insns): Modify to use the above operand codes where group
429 relocations are permitted.
430 (md_apply_fix): Handle the group relocations
431 ALU_PC_G0_NC through LDC_SB_G2.
432 (tc_gen_reloc): Likewise.
433 (arm_force_relocation): Leave group relocations for the linker.
434 (arm_fix_adjustable): Likewise.
435
436 2006-06-15 Julian Brown <julian@codesourcery.com>
437
438 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
439 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
440 relocs properly.
441
442 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
443
444 * config/tc-i386.c (process_suffix): Don't add rex64 for
445 "xchg %rax,%rax".
446
447 2006-06-09 Thiemo Seufer <ths@mips.com>
448
449 * config/tc-mips.c (mips_ip): Maintain argument count.
450
451 2006-06-09 Alan Modra <amodra@bigpond.net.au>
452
453 * config/tc-iq2000.c: Include sb.h.
454
455 2006-06-08 Nigel Stephens <nigel@mips.com>
456
457 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
458 aliases for better compatibility with SGI tools.
459
460 2006-06-08 Alan Modra <amodra@bigpond.net.au>
461
462 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
463 * Makefile.am (GASLIBS): Expand @BFDLIB@.
464 (BFDVER_H): Delete.
465 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
466 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
467 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
468 Run "make dep-am".
469 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
470 * Makefile.in: Regenerate.
471 * doc/Makefile.in: Regenerate.
472 * configure: Regenerate.
473
474 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
475
476 * po/Make-in (pdf, ps): New dummy targets.
477
478 2006-06-07 Julian Brown <julian@codesourcery.com>
479
480 * config/tc-arm.c (stdarg.h): include.
481 (arm_it): Add uncond_value field. Add isvec and issingle to operand
482 array.
483 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
484 REG_TYPE_NSDQ (single, double or quad vector reg).
485 (reg_expected_msgs): Update.
486 (BAD_FPU): Add macro for unsupported FPU instruction error.
487 (parse_neon_type): Support 'd' as an alias for .f64.
488 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
489 sets of registers.
490 (parse_vfp_reg_list): Don't update first arg on error.
491 (parse_neon_mov): Support extra syntax for VFP moves.
492 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
493 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
494 (parse_operands): Support isvec, issingle operands fields, new parse
495 codes above.
496 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
497 msr variants.
498 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
499 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
500 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
501 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
502 shapes.
503 (neon_shape): Redefine in terms of above.
504 (neon_shape_class): New enumeration, table of shape classes.
505 (neon_shape_el): New enumeration. One element of a shape.
506 (neon_shape_el_size): Register widths of above, where appropriate.
507 (neon_shape_info): New struct. Info for shape table.
508 (neon_shape_tab): New array.
509 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
510 (neon_check_shape): Rewrite as...
511 (neon_select_shape): New function to classify instruction shapes,
512 driven by new table neon_shape_tab array.
513 (neon_quad): New function. Return 1 if shape should set Q flag in
514 instructions (or equivalent), 0 otherwise.
515 (type_chk_of_el_type): Support F64.
516 (el_type_of_type_chk): Likewise.
517 (neon_check_type): Add support for VFP type checking (VFP data
518 elements fill their containing registers).
519 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
520 in thumb mode for VFP instructions.
521 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
522 and encode the current instruction as if it were that opcode.
523 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
524 arguments, call function in PFN.
525 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
526 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
527 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
528 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
529 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
530 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
531 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
532 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
533 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
534 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
535 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
536 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
537 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
538 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
539 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
540 neon_quad.
541 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
542 between VFP and Neon turns out to belong to Neon. Perform
543 architecture check and fill in condition field if appropriate.
544 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
545 (do_neon_cvt): Add support for VFP variants of instructions.
546 (neon_cvt_flavour): Extend to cover VFP conversions.
547 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
548 vmov variants.
549 (do_neon_ldr_str): Handle single-precision VFP load/store.
550 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
551 NS_NULL not NS_IGNORE.
552 (opcode_tag): Add OT_csuffixF for operands which either take a
553 conditional suffix, or have 0xF in the condition field.
554 (md_assemble): Add support for OT_csuffixF.
555 (NCE): Replace macro with...
556 (NCE_tag, NCE, NCEF): New macros.
557 (nCE): Replace macro with...
558 (nCE_tag, nCE, nCEF): New macros.
559 (insns): Add support for VFP insns or VFP versions of insns msr,
560 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
561 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
562 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
563 VFP/Neon insns together.
564
565 2006-06-07 Alan Modra <amodra@bigpond.net.au>
566 Ladislav Michl <ladis@linux-mips.org>
567
568 * app.c: Don't include headers already included by as.h.
569 * as.c: Likewise.
570 * atof-generic.c: Likewise.
571 * cgen.c: Likewise.
572 * dwarf2dbg.c: Likewise.
573 * expr.c: Likewise.
574 * input-file.c: Likewise.
575 * input-scrub.c: Likewise.
576 * macro.c: Likewise.
577 * output-file.c: Likewise.
578 * read.c: Likewise.
579 * sb.c: Likewise.
580 * config/bfin-lex.l: Likewise.
581 * config/obj-coff.h: Likewise.
582 * config/obj-elf.h: Likewise.
583 * config/obj-som.h: Likewise.
584 * config/tc-arc.c: Likewise.
585 * config/tc-arm.c: Likewise.
586 * config/tc-avr.c: Likewise.
587 * config/tc-bfin.c: Likewise.
588 * config/tc-cris.c: Likewise.
589 * config/tc-d10v.c: Likewise.
590 * config/tc-d30v.c: Likewise.
591 * config/tc-dlx.h: Likewise.
592 * config/tc-fr30.c: Likewise.
593 * config/tc-frv.c: Likewise.
594 * config/tc-h8300.c: Likewise.
595 * config/tc-hppa.c: Likewise.
596 * config/tc-i370.c: Likewise.
597 * config/tc-i860.c: Likewise.
598 * config/tc-i960.c: Likewise.
599 * config/tc-ip2k.c: Likewise.
600 * config/tc-iq2000.c: Likewise.
601 * config/tc-m32c.c: Likewise.
602 * config/tc-m32r.c: Likewise.
603 * config/tc-maxq.c: Likewise.
604 * config/tc-mcore.c: Likewise.
605 * config/tc-mips.c: Likewise.
606 * config/tc-mmix.c: Likewise.
607 * config/tc-mn10200.c: Likewise.
608 * config/tc-mn10300.c: Likewise.
609 * config/tc-msp430.c: Likewise.
610 * config/tc-mt.c: Likewise.
611 * config/tc-ns32k.c: Likewise.
612 * config/tc-openrisc.c: Likewise.
613 * config/tc-ppc.c: Likewise.
614 * config/tc-s390.c: Likewise.
615 * config/tc-sh.c: Likewise.
616 * config/tc-sh64.c: Likewise.
617 * config/tc-sparc.c: Likewise.
618 * config/tc-tic30.c: Likewise.
619 * config/tc-tic4x.c: Likewise.
620 * config/tc-tic54x.c: Likewise.
621 * config/tc-v850.c: Likewise.
622 * config/tc-vax.c: Likewise.
623 * config/tc-xc16x.c: Likewise.
624 * config/tc-xstormy16.c: Likewise.
625 * config/tc-xtensa.c: Likewise.
626 * config/tc-z80.c: Likewise.
627 * config/tc-z8k.c: Likewise.
628 * macro.h: Don't include sb.h or ansidecl.h.
629 * sb.h: Don't include stdio.h or ansidecl.h.
630 * cond.c: Include sb.h.
631 * itbl-lex.l: Include as.h instead of other system headers.
632 * itbl-parse.y: Likewise.
633 * itbl-ops.c: Similarly.
634 * itbl-ops.h: Don't include as.h or ansidecl.h.
635 * config/bfin-defs.h: Don't include bfd.h or as.h.
636 * config/bfin-parse.y: Include as.h instead of other system headers.
637
638 2006-06-06 Ben Elliston <bje@au.ibm.com>
639 Anton Blanchard <anton@samba.org>
640
641 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
642 (md_show_usage): Document it.
643 (ppc_setup_opcodes): Test power6 opcode flag bits.
644 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
645
646 2006-06-06 Thiemo Seufer <ths@mips.com>
647 Chao-ying Fu <fu@mips.com>
648
649 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
650 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
651 (macro_build): Update comment.
652 (mips_ip): Allow DSP64 instructions for MIPS64R2.
653 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
654 CPU_HAS_MDMX.
655 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
656 MIPS_CPU_ASE_MDMX flags for sb1.
657
658 2006-06-05 Thiemo Seufer <ths@mips.com>
659
660 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
661 appropriate.
662 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
663 (mips_ip): Make overflowed/underflowed constant arguments in DSP
664 and MT instructions a fatal error. Use INSERT_OPERAND where
665 appropriate. Improve warnings for break and wait code overflows.
666 Use symbolic constant of OP_MASK_COPZ.
667 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
668
669 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
670
671 * po/Make-in (top_builddir): Define.
672
673 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
674
675 * doc/Makefile.am (TEXI2DVI): Define.
676 * doc/Makefile.in: Regenerate.
677 * doc/c-arc.texi: Fix typo.
678
679 2006-06-01 Alan Modra <amodra@bigpond.net.au>
680
681 * config/obj-ieee.c: Delete.
682 * config/obj-ieee.h: Delete.
683 * Makefile.am (OBJ_FORMATS): Remove ieee.
684 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
685 (obj-ieee.o): Remove rule.
686 * Makefile.in: Regenerate.
687 * configure.in (atof): Remove tahoe.
688 (OBJ_MAYBE_IEEE): Don't define.
689 * configure: Regenerate.
690 * config.in: Regenerate.
691 * doc/Makefile.in: Regenerate.
692 * po/POTFILES.in: Regenerate.
693
694 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
695
696 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
697 and LIBINTL_DEP everywhere.
698 (INTLLIBS): Remove.
699 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
700 * acinclude.m4: Include new gettext macros.
701 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
702 Remove local code for po/Makefile.
703 * Makefile.in, configure, doc/Makefile.in: Regenerated.
704
705 2006-05-30 Nick Clifton <nickc@redhat.com>
706
707 * po/es.po: Updated Spanish translation.
708
709 2006-05-06 Denis Chertykov <denisc@overta.ru>
710
711 * doc/c-avr.texi: New file.
712 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
713 * doc/all.texi: Set AVR
714 * doc/as.texinfo: Include c-avr.texi
715
716 2006-05-28 Jie Zhang <jie.zhang@analog.com>
717
718 * config/bfin-parse.y (check_macfunc): Loose the condition of
719 calling check_multiply_halfregs ().
720
721 2006-05-25 Jie Zhang <jie.zhang@analog.com>
722
723 * config/bfin-parse.y (asm_1): Better check and deal with
724 vector and scalar Multiply 16-Bit Operands instructions.
725
726 2006-05-24 Nick Clifton <nickc@redhat.com>
727
728 * config/tc-hppa.c: Convert to ISO C90 format.
729 * config/tc-hppa.h: Likewise.
730
731 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
732 Randolph Chung <randolph@tausq.org>
733
734 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
735 is_tls_ieoff, is_tls_leoff): Define.
736 (fix_new_hppa): Handle TLS.
737 (cons_fix_new_hppa): Likewise.
738 (pa_ip): Likewise.
739 (md_apply_fix): Handle TLS relocs.
740 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
741
742 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
743
744 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
745
746 2006-05-23 Thiemo Seufer <ths@mips.com>
747 David Ung <davidu@mips.com>
748 Nigel Stephens <nigel@mips.com>
749
750 [ gas/ChangeLog ]
751 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
752 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
753 ISA_HAS_MXHC1): New macros.
754 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
755 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
756 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
757 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
758 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
759 (mips_after_parse_args): Change default handling of float register
760 size to account for 32bit code with 64bit FP. Better sanity checking
761 of ISA/ASE/ABI option combinations.
762 (s_mipsset): Support switching of GPR and FPR sizes via
763 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
764 options.
765 (mips_elf_final_processing): We should record the use of 64bit FP
766 registers in 32bit code but we don't, because ELF header flags are
767 a scarce ressource.
768 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
769 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
770 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
771 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
772 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
773 missing -march options. Document .set arch=CPU. Move .set smartmips
774 to ASE page. Use @code for .set FOO examples.
775
776 2006-05-23 Jie Zhang <jie.zhang@analog.com>
777
778 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
779 if needed.
780
781 2006-05-23 Jie Zhang <jie.zhang@analog.com>
782
783 * config/bfin-defs.h (bfin_equals): Remove declaration.
784 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
785 * config/tc-bfin.c (bfin_name_is_register): Remove.
786 (bfin_equals): Remove.
787 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
788 (bfin_name_is_register): Remove declaration.
789
790 2006-05-19 Thiemo Seufer <ths@mips.com>
791 Nigel Stephens <nigel@mips.com>
792
793 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
794 (mips_oddfpreg_ok): New function.
795 (mips_ip): Use it.
796
797 2006-05-19 Thiemo Seufer <ths@mips.com>
798 David Ung <davidu@mips.com>
799
800 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
801 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
802 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
803 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
804 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
805 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
806 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
807 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
808 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
809 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
810 reg_names_o32, reg_names_n32n64): Define register classes.
811 (reg_lookup): New function, use register classes.
812 (md_begin): Reserve register names in the symbol table. Simplify
813 OBJ_ELF defines.
814 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
815 Use reg_lookup.
816 (mips16_ip): Use reg_lookup.
817 (tc_get_register): Likewise.
818 (tc_mips_regname_to_dw2regnum): New function.
819
820 2006-05-19 Thiemo Seufer <ths@mips.com>
821
822 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
823 Un-constify string argument.
824 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
825 Likewise.
826 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
827 Likewise.
828 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
829 Likewise.
830 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
831 Likewise.
832 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
833 Likewise.
834 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
835 Likewise.
836
837 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
838
839 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
840 cfloat/m68881 to correct architecture before using it.
841
842 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
843
844 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
845 constant values.
846
847 2006-05-15 Paul Brook <paul@codesourcery.com>
848
849 * config/tc-arm.c (arm_adjust_symtab): Use
850 bfd_is_arm_special_symbol_name.
851
852 2006-05-15 Bob Wilson <bob.wilson@acm.org>
853
854 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
855 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
856 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
857 Handle errors from calls to xtensa_opcode_is_* functions.
858
859 2006-05-14 Thiemo Seufer <ths@mips.com>
860
861 * config/tc-mips.c (macro_build): Test for currently active
862 mips16 option.
863 (mips16_ip): Reject invalid opcodes.
864
865 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
866
867 * doc/as.texinfo: Rename "Index" to "AS Index",
868 and "ABORT" to "ABORT (COFF)".
869
870 2006-05-11 Paul Brook <paul@codesourcery.com>
871
872 * config/tc-arm.c (parse_half): New function.
873 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
874 (parse_operands): Ditto.
875 (do_mov16): Reject invalid relocations.
876 (do_t_mov16): Ditto. Use Thumb reloc numbers.
877 (insns): Replace Iffff with HALF.
878 (md_apply_fix): Add MOVW and MOVT relocs.
879 (tc_gen_reloc): Ditto.
880 * doc/c-arm.texi: Document relocation operators
881
882 2006-05-11 Paul Brook <paul@codesourcery.com>
883
884 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
885
886 2006-05-11 Thiemo Seufer <ths@mips.com>
887
888 * config/tc-mips.c (append_insn): Don't check the range of j or
889 jal addresses.
890
891 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
892
893 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
894 relocs against external symbols for WinCE targets.
895 (md_apply_fix): Likewise.
896
897 2006-05-09 David Ung <davidu@mips.com>
898
899 * config/tc-mips.c (append_insn): Only warn about an out-of-range
900 j or jal address.
901
902 2006-05-09 Nick Clifton <nickc@redhat.com>
903
904 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
905 against symbols which are not going to be placed into the symbol
906 table.
907
908 2006-05-09 Ben Elliston <bje@au.ibm.com>
909
910 * expr.c (operand): Remove `if (0 && ..)' statement and
911 subsequently unused target_op label. Collapse `if (1 || ..)'
912 statement.
913 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
914 separately above the switch.
915
916 2006-05-08 Nick Clifton <nickc@redhat.com>
917
918 PR gas/2623
919 * config/tc-msp430.c (line_separator_character): Define as |.
920
921 2006-05-08 Thiemo Seufer <ths@mips.com>
922 Nigel Stephens <nigel@mips.com>
923 David Ung <davidu@mips.com>
924
925 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
926 (mips_opts): Likewise.
927 (file_ase_smartmips): New variable.
928 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
929 (macro_build): Handle SmartMIPS instructions.
930 (mips_ip): Likewise.
931 (md_longopts): Add argument handling for smartmips.
932 (md_parse_options, mips_after_parse_args): Likewise.
933 (s_mipsset): Add .set smartmips support.
934 (md_show_usage): Document -msmartmips/-mno-smartmips.
935 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
936 .set smartmips.
937 * doc/c-mips.texi: Likewise.
938
939 2006-05-08 Alan Modra <amodra@bigpond.net.au>
940
941 * write.c (relax_segment): Add pass count arg. Don't error on
942 negative org/space on first two passes.
943 (relax_seg_info): New struct.
944 (relax_seg, write_object_file): Adjust.
945 * write.h (relax_segment): Update prototype.
946
947 2006-05-05 Julian Brown <julian@codesourcery.com>
948
949 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
950 checking.
951 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
952 architecture version checks.
953 (insns): Allow overlapping instructions to be used in VFP mode.
954
955 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
956
957 PR gas/2598
958 * config/obj-elf.c (obj_elf_change_section): Allow user
959 specified SHF_ALPHA_GPREL.
960
961 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
962
963 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
964 for PMEM related expressions.
965
966 2006-05-05 Nick Clifton <nickc@redhat.com>
967
968 PR gas/2582
969 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
970 insertion of a directory separator character into a string at a
971 given offset. Uses heuristics to decide when to use a backslash
972 character rather than a forward-slash character.
973 (dwarf2_directive_loc): Use the macro.
974 (out_debug_info): Likewise.
975
976 2006-05-05 Thiemo Seufer <ths@mips.com>
977 David Ung <davidu@mips.com>
978
979 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
980 instruction.
981 (macro): Add new case M_CACHE_AB.
982
983 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
984
985 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
986 (opcode_lookup): Issue a warning for opcode with
987 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
988 identical to OT_cinfix3.
989 (TxC3w, TC3w, tC3w): New.
990 (insns): Use tC3w and TC3w for comparison instructions with
991 's' suffix.
992
993 2006-05-04 Alan Modra <amodra@bigpond.net.au>
994
995 * subsegs.h (struct frchain): Delete frch_seg.
996 (frchain_root): Delete.
997 (seg_info): Define as macro.
998 * subsegs.c (frchain_root): Delete.
999 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1000 (subsegs_begin, subseg_change): Adjust for above.
1001 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1002 rather than to one big list.
1003 (subseg_get): Don't special case abs, und sections.
1004 (subseg_new, subseg_force_new): Don't set frchainP here.
1005 (seg_info): Delete.
1006 (subsegs_print_statistics): Adjust frag chain control list traversal.
1007 * debug.c (dmp_frags): Likewise.
1008 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1009 at frchain_root. Make use of known frchain ordering.
1010 (last_frag_for_seg): Likewise.
1011 (get_frag_fix): Likewise. Add seg param.
1012 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1013 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1014 (SUB_SEGMENT_ALIGN): Likewise.
1015 (subsegs_finish): Adjust frchain list traversal.
1016 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1017 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1018 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1019 (xtensa_fix_b_j_loop_end_frags): Likewise.
1020 (xtensa_fix_close_loop_end_frags): Likewise.
1021 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1022 (retrieve_segment_info): Delete frch_seg initialisation.
1023
1024 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1025
1026 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1027 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1028 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1029 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1030
1031 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1032
1033 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1034 here.
1035 (md_apply_fix3): Multiply offset by 4 here for
1036 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1037
1038 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1039 Jan Beulich <jbeulich@novell.com>
1040
1041 * config/tc-i386.c (output_invalid_buf): Change size for
1042 unsigned char.
1043 * config/tc-tic30.c (output_invalid_buf): Likewise.
1044
1045 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1046 unsigned char.
1047 * config/tc-tic30.c (output_invalid): Likewise.
1048
1049 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1050
1051 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1052 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1053 (asconfig.texi): Don't set top_srcdir.
1054 * doc/as.texinfo: Don't use top_srcdir.
1055 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1056
1057 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1058
1059 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1060 * config/tc-tic30.c (output_invalid_buf): Likewise.
1061
1062 * config/tc-i386.c (output_invalid): Use snprintf instead of
1063 sprintf.
1064 * config/tc-ia64.c (declare_register_set): Likewise.
1065 (emit_one_bundle): Likewise.
1066 (check_dependencies): Likewise.
1067 * config/tc-tic30.c (output_invalid): Likewise.
1068
1069 2006-05-02 Paul Brook <paul@codesourcery.com>
1070
1071 * config/tc-arm.c (arm_optimize_expr): New function.
1072 * config/tc-arm.h (md_optimize_expr): Define
1073 (arm_optimize_expr): Add prototype.
1074 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1075
1076 2006-05-02 Ben Elliston <bje@au.ibm.com>
1077
1078 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1079 field unsigned.
1080
1081 * sb.h (sb_list_vector): Move to sb.c.
1082 * sb.c (free_list): Use type of sb_list_vector directly.
1083 (sb_build): Fix off-by-one error in assertion about `size'.
1084
1085 2006-05-01 Ben Elliston <bje@au.ibm.com>
1086
1087 * listing.c (listing_listing): Remove useless loop.
1088 * macro.c (macro_expand): Remove is_positional local variable.
1089 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1090 and simplify surrounding expressions, where possible.
1091 (assign_symbol): Likewise.
1092 (s_weakref): Likewise.
1093 * symbols.c (colon): Likewise.
1094
1095 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1096
1097 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1098
1099 2006-04-30 Thiemo Seufer <ths@mips.com>
1100 David Ung <davidu@mips.com>
1101
1102 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1103 (mips_immed): New table that records various handling of udi
1104 instruction patterns.
1105 (mips_ip): Adds udi handling.
1106
1107 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1108
1109 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1110 of list rather than beginning.
1111
1112 2006-04-26 Julian Brown <julian@codesourcery.com>
1113
1114 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1115 (is_quarter_float): Rename from above. Simplify slightly.
1116 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1117 number.
1118 (parse_neon_mov): Parse floating-point constants.
1119 (neon_qfloat_bits): Fix encoding.
1120 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1121 preference to integer encoding when using the F32 type.
1122
1123 2006-04-26 Julian Brown <julian@codesourcery.com>
1124
1125 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1126 zero-initialising structures containing it will lead to invalid types).
1127 (arm_it): Add vectype to each operand.
1128 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1129 defined field.
1130 (neon_typed_alias): New structure. Extra information for typed
1131 register aliases.
1132 (reg_entry): Add neon type info field.
1133 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1134 Break out alternative syntax for coprocessor registers, etc. into...
1135 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1136 out from arm_reg_parse.
1137 (parse_neon_type): Move. Return SUCCESS/FAIL.
1138 (first_error): New function. Call to ensure first error which occurs is
1139 reported.
1140 (parse_neon_operand_type): Parse exactly one type.
1141 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1142 (parse_typed_reg_or_scalar): New function. Handle core of both
1143 arm_typed_reg_parse and parse_scalar.
1144 (arm_typed_reg_parse): Parse a register with an optional type.
1145 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1146 result.
1147 (parse_scalar): Parse a Neon scalar with optional type.
1148 (parse_reg_list): Use first_error.
1149 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1150 (neon_alias_types_same): New function. Return true if two (alias) types
1151 are the same.
1152 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1153 of elements.
1154 (insert_reg_alias): Return new reg_entry not void.
1155 (insert_neon_reg_alias): New function. Insert type/index information as
1156 well as register for alias.
1157 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1158 make typed register aliases accordingly.
1159 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1160 of line.
1161 (s_unreq): Delete type information if present.
1162 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1163 (s_arm_unwind_save_mmxwcg): Likewise.
1164 (s_arm_unwind_movsp): Likewise.
1165 (s_arm_unwind_setfp): Likewise.
1166 (parse_shift): Likewise.
1167 (parse_shifter_operand): Likewise.
1168 (parse_address): Likewise.
1169 (parse_tb): Likewise.
1170 (tc_arm_regname_to_dw2regnum): Likewise.
1171 (md_pseudo_table): Add dn, qn.
1172 (parse_neon_mov): Handle typed operands.
1173 (parse_operands): Likewise.
1174 (neon_type_mask): Add N_SIZ.
1175 (N_ALLMODS): New macro.
1176 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1177 (el_type_of_type_chk): Add some safeguards.
1178 (modify_types_allowed): Fix logic bug.
1179 (neon_check_type): Handle operands with types.
1180 (neon_three_same): Remove redundant optional arg handling.
1181 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1182 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1183 (do_neon_step): Adjust accordingly.
1184 (neon_cmode_for_logic_imm): Use first_error.
1185 (do_neon_bitfield): Call neon_check_type.
1186 (neon_dyadic): Rename to...
1187 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1188 to allow modification of type of the destination.
1189 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1190 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1191 (do_neon_compare): Make destination be an untyped bitfield.
1192 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1193 (neon_mul_mac): Return early in case of errors.
1194 (neon_move_immediate): Use first_error.
1195 (neon_mac_reg_scalar_long): Fix type to include scalar.
1196 (do_neon_dup): Likewise.
1197 (do_neon_mov): Likewise (in several places).
1198 (do_neon_tbl_tbx): Fix type.
1199 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1200 (do_neon_ld_dup): Exit early in case of errors and/or use
1201 first_error.
1202 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1203 Handle .dn/.qn directives.
1204 (REGDEF): Add zero for reg_entry neon field.
1205
1206 2006-04-26 Julian Brown <julian@codesourcery.com>
1207
1208 * config/tc-arm.c (limits.h): Include.
1209 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1210 (fpu_vfp_v3_or_neon_ext): Declare constants.
1211 (neon_el_type): New enumeration of types for Neon vector elements.
1212 (neon_type_el): New struct. Define type and size of a vector element.
1213 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1214 instruction.
1215 (neon_type): Define struct. The type of an instruction.
1216 (arm_it): Add 'vectype' for the current instruction.
1217 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1218 (vfp_sp_reg_pos): Rename to...
1219 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1220 tags.
1221 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1222 (Neon D or Q register).
1223 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1224 register.
1225 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1226 (my_get_expression): Allow above constant as argument to accept
1227 64-bit constants with optional prefix.
1228 (arm_reg_parse): Add extra argument to return the specific type of
1229 register in when either a D or Q register (REG_TYPE_NDQ) is
1230 requested. Can be NULL.
1231 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1232 (parse_reg_list): Update for new arm_reg_parse args.
1233 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1234 (parse_neon_el_struct_list): New function. Parse element/structure
1235 register lists for VLD<n>/VST<n> instructions.
1236 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1237 (s_arm_unwind_save_mmxwr): Likewise.
1238 (s_arm_unwind_save_mmxwcg): Likewise.
1239 (s_arm_unwind_movsp): Likewise.
1240 (s_arm_unwind_setfp): Likewise.
1241 (parse_big_immediate): New function. Parse an immediate, which may be
1242 64 bits wide. Put results in inst.operands[i].
1243 (parse_shift): Update for new arm_reg_parse args.
1244 (parse_address): Likewise. Add parsing of alignment specifiers.
1245 (parse_neon_mov): Parse the operands of a VMOV instruction.
1246 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1247 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1248 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1249 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1250 (parse_operands): Handle new codes above.
1251 (encode_arm_vfp_sp_reg): Rename to...
1252 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1253 selected VFP version only supports D0-D15.
1254 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1255 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1256 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1257 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1258 encode_arm_vfp_reg name, and allow 32 D regs.
1259 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1260 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1261 regs.
1262 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1263 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1264 constant-load and conversion insns introduced with VFPv3.
1265 (neon_tab_entry): New struct.
1266 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1267 those which are the targets of pseudo-instructions.
1268 (neon_opc): Enumerate opcodes, use as indices into...
1269 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1270 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1271 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1272 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1273 neon_enc_tab.
1274 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1275 Neon instructions.
1276 (neon_type_mask): New. Compact type representation for type checking.
1277 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1278 permitted type combinations.
1279 (N_IGNORE_TYPE): New macro.
1280 (neon_check_shape): New function. Check an instruction shape for
1281 multiple alternatives. Return the specific shape for the current
1282 instruction.
1283 (neon_modify_type_size): New function. Modify a vector type and size,
1284 depending on the bit mask in argument 1.
1285 (neon_type_promote): New function. Convert a given "key" type (of an
1286 operand) into the correct type for a different operand, based on a bit
1287 mask.
1288 (type_chk_of_el_type): New function. Convert a type and size into the
1289 compact representation used for type checking.
1290 (el_type_of_type_ckh): New function. Reverse of above (only when a
1291 single bit is set in the bit mask).
1292 (modify_types_allowed): New function. Alter a mask of allowed types
1293 based on a bit mask of modifications.
1294 (neon_check_type): New function. Check the type of the current
1295 instruction against the variable argument list. The "key" type of the
1296 instruction is returned.
1297 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1298 a Neon data-processing instruction depending on whether we're in ARM
1299 mode or Thumb-2 mode.
1300 (neon_logbits): New function.
1301 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1302 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1303 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1304 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1305 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1306 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1307 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1308 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1309 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1310 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1311 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1312 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1313 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1314 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1315 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1316 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1317 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1318 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1319 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1320 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1321 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1322 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1323 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1324 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1325 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1326 helpers.
1327 (parse_neon_type): New function. Parse Neon type specifier.
1328 (opcode_lookup): Allow parsing of Neon type specifiers.
1329 (REGNUM2, REGSETH, REGSET2): New macros.
1330 (reg_names): Add new VFPv3 and Neon registers.
1331 (NUF, nUF, NCE, nCE): New macros for opcode table.
1332 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1333 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1334 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1335 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1336 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1337 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1338 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1339 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1340 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1341 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1342 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1343 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1344 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1345 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1346 fto[us][lh][sd].
1347 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1348 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1349 (arm_option_cpu_value): Add vfp3 and neon.
1350 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1351 VFPv1 attribute.
1352
1353 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1354
1355 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1356 syntax instead of hardcoded opcodes with ".w18" suffixes.
1357 (wide_branch_opcode): New.
1358 (build_transition): Use it to check for wide branch opcodes with
1359 either ".w18" or ".w15" suffixes.
1360
1361 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1362
1363 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1364 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1365 frag's is_literal flag.
1366
1367 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1368
1369 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1370
1371 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1372
1373 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1374 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1375 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1376 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1377 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1378
1379 2005-04-20 Paul Brook <paul@codesourcery.com>
1380
1381 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1382 all targets.
1383 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1384
1385 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1386
1387 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1388 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1389 Make some cpus unsupported on ELF. Run "make dep-am".
1390 * Makefile.in: Regenerate.
1391
1392 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1393
1394 * configure.in (--enable-targets): Indent help message.
1395 * configure: Regenerate.
1396
1397 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1398
1399 PR gas/2533
1400 * config/tc-i386.c (i386_immediate): Check illegal immediate
1401 register operand.
1402
1403 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1404
1405 * config/tc-i386.c: Formatting.
1406 (output_disp, output_imm): ISO C90 params.
1407
1408 * frags.c (frag_offset_fixed_p): Constify args.
1409 * frags.h (frag_offset_fixed_p): Ditto.
1410
1411 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1412 (COFF_MAGIC): Delete.
1413
1414 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1415
1416 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1417
1418 * po/POTFILES.in: Regenerated.
1419
1420 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1421
1422 * doc/as.texinfo: Mention that some .type syntaxes are not
1423 supported on all architectures.
1424
1425 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1426
1427 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1428 instructions when such transformations have been disabled.
1429
1430 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1431
1432 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1433 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1434 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1435 decoding the loop instructions. Remove current_offset variable.
1436 (xtensa_fix_short_loop_frags): Likewise.
1437 (min_bytes_to_other_loop_end): Remove current_offset argument.
1438
1439 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1440
1441 * config/tc-z80.c (z80_optimize_expr): Removed.
1442 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1443
1444 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1445
1446 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1447 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1448 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1449 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1450 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1451 at90can64, at90usb646, at90usb647, at90usb1286 and
1452 at90usb1287.
1453 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1454
1455 2006-04-07 Paul Brook <paul@codesourcery.com>
1456
1457 * config/tc-arm.c (parse_operands): Set default error message.
1458
1459 2006-04-07 Paul Brook <paul@codesourcery.com>
1460
1461 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1462
1463 2006-04-07 Paul Brook <paul@codesourcery.com>
1464
1465 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1466
1467 2006-04-07 Paul Brook <paul@codesourcery.com>
1468
1469 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1470 (move_or_literal_pool): Handle Thumb-2 instructions.
1471 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1472
1473 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1474
1475 PR 2512.
1476 * config/tc-i386.c (match_template): Move 64-bit operand tests
1477 inside loop.
1478
1479 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1480
1481 * po/Make-in: Add install-html target.
1482 * Makefile.am: Add install-html and install-html-recursive targets.
1483 * Makefile.in: Regenerate.
1484 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1485 * configure: Regenerate.
1486 * doc/Makefile.am: Add install-html and install-html-am targets.
1487 * doc/Makefile.in: Regenerate.
1488
1489 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1490
1491 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1492 second scan.
1493
1494 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1495 Daniel Jacobowitz <dan@codesourcery.com>
1496
1497 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1498 (GOTT_BASE, GOTT_INDEX): New.
1499 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1500 GOTT_INDEX when generating VxWorks PIC.
1501 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1502 use the generic *-*-vxworks* stanza instead.
1503
1504 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1505
1506 PR 997
1507 * frags.c (frag_offset_fixed_p): New function.
1508 * frags.h (frag_offset_fixed_p): Declare.
1509 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1510 (resolve_expression): Likewise.
1511
1512 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1513
1514 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1515 of the same length but different numbers of slots.
1516
1517 2006-03-30 Andreas Schwab <schwab@suse.de>
1518
1519 * configure.in: Fix help string for --enable-targets option.
1520 * configure: Regenerate.
1521
1522 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1523
1524 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1525 (m68k_ip): ... here. Use for all chips. Protect against buffer
1526 overrun and avoid excessive copying.
1527
1528 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1529 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1530 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1531 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1532 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1533 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1534 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1535 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1536 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1537 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1538 (struct m68k_cpu): Change chip field to control_regs.
1539 (current_chip): Remove.
1540 (control_regs): New.
1541 (m68k_archs, m68k_extensions): Adjust.
1542 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1543 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1544 (find_cf_chip): Reimplement for new organization of cpu table.
1545 (select_control_regs): Remove.
1546 (mri_chip): Adjust.
1547 (struct save_opts): Save control regs, not chip.
1548 (s_save, s_restore): Adjust.
1549 (m68k_lookup_cpu): Give deprecated warning when necessary.
1550 (m68k_init_arch): Adjust.
1551 (md_show_usage): Adjust for new cpu table organization.
1552
1553 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1554
1555 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1556 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1557 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1558 "elf/bfin.h".
1559 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1560 (any_gotrel): New rule.
1561 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1562 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1563 "elf/bfin.h".
1564 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1565 (bfin_pic_ptr): New function.
1566 (md_pseudo_table): Add it for ".picptr".
1567 (OPTION_FDPIC): New macro.
1568 (md_longopts): Add -mfdpic.
1569 (md_parse_option): Handle it.
1570 (md_begin): Set BFD flags.
1571 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1572 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1573 us for GOT relocs.
1574 * Makefile.am (bfin-parse.o): Update dependencies.
1575 (DEPTC_bfin_elf): Likewise.
1576 * Makefile.in: Regenerate.
1577
1578 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1579
1580 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1581 mcfemac instead of mcfmac.
1582
1583 2006-03-23 Michael Matz <matz@suse.de>
1584
1585 * config/tc-i386.c (type_names): Correct placement of 'static'.
1586 (reloc): Map some more relocs to their 64 bit counterpart when
1587 size is 8.
1588 (output_insn): Work around breakage if DEBUG386 is defined.
1589 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1590 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1591 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1592 different from i386.
1593 (output_imm): Ditto.
1594 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1595 Imm64.
1596 (md_convert_frag): Jumps can now be larger than 2GB away, error
1597 out in that case.
1598 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1599 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1600
1601 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1602 Daniel Jacobowitz <dan@codesourcery.com>
1603 Phil Edwards <phil@codesourcery.com>
1604 Zack Weinberg <zack@codesourcery.com>
1605 Mark Mitchell <mark@codesourcery.com>
1606 Nathan Sidwell <nathan@codesourcery.com>
1607
1608 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1609 (md_begin): Complain about -G being used for PIC. Don't change
1610 the text, data and bss alignments on VxWorks.
1611 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1612 generating VxWorks PIC.
1613 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1614 (macro): Likewise, but do not treat la $25 specially for
1615 VxWorks PIC, and do not handle jal.
1616 (OPTION_MVXWORKS_PIC): New macro.
1617 (md_longopts): Add -mvxworks-pic.
1618 (md_parse_option): Don't complain about using PIC and -G together here.
1619 Handle OPTION_MVXWORKS_PIC.
1620 (md_estimate_size_before_relax): Always use the first relaxation
1621 sequence on VxWorks.
1622 * config/tc-mips.h (VXWORKS_PIC): New.
1623
1624 2006-03-21 Paul Brook <paul@codesourcery.com>
1625
1626 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1627
1628 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1629
1630 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1631 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1632 (get_loop_align_size): New.
1633 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1634 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1635 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1636 (get_noop_aligned_address): Use get_loop_align_size.
1637 (get_aligned_diff): Likewise.
1638
1639 2006-03-21 Paul Brook <paul@codesourcery.com>
1640
1641 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1642
1643 2006-03-20 Paul Brook <paul@codesourcery.com>
1644
1645 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1646 (do_t_branch): Encode branches inside IT blocks as unconditional.
1647 (do_t_cps): New function.
1648 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1649 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1650 (opcode_lookup): Allow conditional suffixes on all instructions in
1651 Thumb mode.
1652 (md_assemble): Advance condexec state before checking for errors.
1653 (insns): Use do_t_cps.
1654
1655 2006-03-20 Paul Brook <paul@codesourcery.com>
1656
1657 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1658 outputting the insn.
1659
1660 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1661
1662 * config/tc-vax.c: Update copyright year.
1663 * config/tc-vax.h: Likewise.
1664
1665 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1666
1667 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1668 make it static.
1669 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1670
1671 2006-03-17 Paul Brook <paul@codesourcery.com>
1672
1673 * config/tc-arm.c (insns): Add ldm and stm.
1674
1675 2006-03-17 Ben Elliston <bje@au.ibm.com>
1676
1677 PR gas/2446
1678 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1679
1680 2006-03-16 Paul Brook <paul@codesourcery.com>
1681
1682 * config/tc-arm.c (insns): Add "svc".
1683
1684 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1685
1686 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1687 flag and avoid double underscore prefixes.
1688
1689 2006-03-10 Paul Brook <paul@codesourcery.com>
1690
1691 * config/tc-arm.c (md_begin): Handle EABIv5.
1692 (arm_eabis): Add EF_ARM_EABI_VER5.
1693 * doc/c-arm.texi: Document -meabi=5.
1694
1695 2006-03-10 Ben Elliston <bje@au.ibm.com>
1696
1697 * app.c (do_scrub_chars): Simplify string handling.
1698
1699 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1700 Daniel Jacobowitz <dan@codesourcery.com>
1701 Zack Weinberg <zack@codesourcery.com>
1702 Nathan Sidwell <nathan@codesourcery.com>
1703 Paul Brook <paul@codesourcery.com>
1704 Ricardo Anguiano <anguiano@codesourcery.com>
1705 Phil Edwards <phil@codesourcery.com>
1706
1707 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1708 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1709 R_ARM_ABS12 reloc.
1710 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1711 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1712 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1713
1714 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1715
1716 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1717 even when using the text-section-literals option.
1718
1719 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1720
1721 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1722 and cf.
1723 (m68k_ip): <case 'J'> Check we have some control regs.
1724 (md_parse_option): Allow raw arch switch.
1725 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1726 whether 68881 or cfloat was meant by -mfloat.
1727 (md_show_usage): Adjust extension display.
1728 (m68k_elf_final_processing): Adjust.
1729
1730 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1731
1732 * config/tc-avr.c (avr_mod_hash_value): New function.
1733 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1734 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1735 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1736 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1737 of (int).
1738 (tc_gen_reloc): Handle substractions of symbols, if possible do
1739 fixups, abort otherwise.
1740 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1741 tc_fix_adjustable): Define.
1742
1743 2006-03-02 James E Wilson <wilson@specifix.com>
1744
1745 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1746 change the template, then clear md.slot[curr].end_of_insn_group.
1747
1748 2006-02-28 Jan Beulich <jbeulich@novell.com>
1749
1750 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1751
1752 2006-02-28 Jan Beulich <jbeulich@novell.com>
1753
1754 PR/1070
1755 * macro.c (getstring): Don't treat parentheses special anymore.
1756 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1757 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1758 characters.
1759
1760 2006-02-28 Mat <mat@csail.mit.edu>
1761
1762 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1763
1764 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1765
1766 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1767 field.
1768 (CFI_signal_frame): Define.
1769 (cfi_pseudo_table): Add .cfi_signal_frame.
1770 (dot_cfi): Handle CFI_signal_frame.
1771 (output_cie): Handle cie->signal_frame.
1772 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1773 different. Copy signal_frame from FDE to newly created CIE.
1774 * doc/as.texinfo: Document .cfi_signal_frame.
1775
1776 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1777
1778 * doc/Makefile.am: Add html target.
1779 * doc/Makefile.in: Regenerate.
1780 * po/Make-in: Add html target.
1781
1782 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1783
1784 * config/tc-i386.c (output_insn): Support Intel Merom New
1785 Instructions.
1786
1787 * config/tc-i386.h (CpuMNI): New.
1788 (CpuUnknownFlags): Add CpuMNI.
1789
1790 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1791
1792 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1793 (hpriv_reg_table): New table for hyperprivileged registers.
1794 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1795 register encoding.
1796
1797 2006-02-24 DJ Delorie <dj@redhat.com>
1798
1799 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1800 (tc_gen_reloc): Don't define.
1801 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1802 (OPTION_LINKRELAX): New.
1803 (md_longopts): Add it.
1804 (m32c_relax): New.
1805 (md_parse_options): Set it.
1806 (md_assemble): Emit relaxation relocs as needed.
1807 (md_convert_frag): Emit relaxation relocs as needed.
1808 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1809 (m32c_apply_fix): New.
1810 (tc_gen_reloc): New.
1811 (m32c_force_relocation): Force out jump relocs when relaxing.
1812 (m32c_fix_adjustable): Return false if relaxing.
1813
1814 2006-02-24 Paul Brook <paul@codesourcery.com>
1815
1816 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1817 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1818 (struct asm_barrier_opt): Define.
1819 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1820 (parse_psr): Accept V7M psr names.
1821 (parse_barrier): New function.
1822 (enum operand_parse_code): Add OP_oBARRIER.
1823 (parse_operands): Implement OP_oBARRIER.
1824 (do_barrier): New function.
1825 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1826 (do_t_cpsi): Add V7M restrictions.
1827 (do_t_mrs, do_t_msr): Validate V7M variants.
1828 (md_assemble): Check for NULL variants.
1829 (v7m_psrs, barrier_opt_names): New tables.
1830 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1831 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1832 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1833 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1834 (struct cpu_arch_ver_table): Define.
1835 (cpu_arch_ver): New.
1836 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1837 Tag_CPU_arch_profile.
1838 * doc/c-arm.texi: Document new cpu and arch options.
1839
1840 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1841
1842 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1843
1844 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1845
1846 * config/tc-ia64.c: Update copyright years.
1847
1848 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1849
1850 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1851 SDM 2.2.
1852
1853 2005-02-22 Paul Brook <paul@codesourcery.com>
1854
1855 * config/tc-arm.c (do_pld): Remove incorrect write to
1856 inst.instruction.
1857 (encode_thumb32_addr_mode): Use correct operand.
1858
1859 2006-02-21 Paul Brook <paul@codesourcery.com>
1860
1861 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1862
1863 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1864 Anil Paranjape <anilp1@kpitcummins.com>
1865 Shilin Shakti <shilins@kpitcummins.com>
1866
1867 * Makefile.am: Add xc16x related entry.
1868 * Makefile.in: Regenerate.
1869 * configure.in: Added xc16x related entry.
1870 * configure: Regenerate.
1871 * config/tc-xc16x.h: New file
1872 * config/tc-xc16x.c: New file
1873 * doc/c-xc16x.texi: New file for xc16x
1874 * doc/all.texi: Entry for xc16x
1875 * doc/Makefile.texi: Added c-xc16x.texi
1876 * NEWS: Announce the support for the new target.
1877
1878 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1879
1880 * configure.tgt: set emulation for mips-*-netbsd*
1881
1882 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1883
1884 * config.in: Rebuilt.
1885
1886 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1887
1888 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1889 from 1, not 0, in error messages.
1890 (md_assemble): Simplify special-case check for ENTRY instructions.
1891 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1892 operand in error message.
1893
1894 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1895
1896 * configure.tgt (arm-*-linux-gnueabi*): Change to
1897 arm-*-linux-*eabi*.
1898
1899 2006-02-10 Nick Clifton <nickc@redhat.com>
1900
1901 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1902 32-bit value is propagated into the upper bits of a 64-bit long.
1903
1904 * config/tc-arc.c (init_opcode_tables): Fix cast.
1905 (arc_extoper, md_operand): Likewise.
1906
1907 2006-02-09 David Heine <dlheine@tensilica.com>
1908
1909 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1910 each relaxation step.
1911
1912 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1913
1914 * configure.in (CHECK_DECLS): Add vsnprintf.
1915 * configure: Regenerate.
1916 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1917 include/declare here, but...
1918 * as.h: Move code detecting VARARGS idiom to the top.
1919 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1920 (vsnprintf): Declare if not already declared.
1921
1922 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1923
1924 * as.c (close_output_file): New.
1925 (main): Register close_output_file with xatexit before
1926 dump_statistics. Don't call output_file_close.
1927
1928 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1929
1930 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1931 mcf5329_control_regs): New.
1932 (not_current_architecture, selected_arch, selected_cpu): New.
1933 (m68k_archs, m68k_extensions): New.
1934 (archs): Renamed to ...
1935 (m68k_cpus): ... here. Adjust.
1936 (n_arches): Remove.
1937 (md_pseudo_table): Add arch and cpu directives.
1938 (find_cf_chip, m68k_ip): Adjust table scanning.
1939 (no_68851, no_68881): Remove.
1940 (md_assemble): Lazily initialize.
1941 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1942 (md_init_after_args): Move functionality to m68k_init_arch.
1943 (mri_chip): Adjust table scanning.
1944 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1945 options with saner parsing.
1946 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1947 m68k_init_arch): New.
1948 (s_m68k_cpu, s_m68k_arch): New.
1949 (md_show_usage): Adjust.
1950 (m68k_elf_final_processing): Set CF EF flags.
1951 * config/tc-m68k.h (m68k_init_after_args): Remove.
1952 (tc_init_after_args): Remove.
1953 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1954 (M68k-Directives): Document .arch and .cpu directives.
1955
1956 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1957
1958 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1959 synonyms for equ and defl.
1960 (z80_cons_fix_new): New function.
1961 (emit_byte): Disallow relative jumps to absolute locations.
1962 (emit_data): Only handle defb, prototype changed, because defb is
1963 now handled as pseudo-op rather than an instruction.
1964 (instab): Entries for defb,defw,db,dw moved from here...
1965 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1966 Add entries for def24,def32,d24,d32.
1967 (md_assemble): Improved error handling.
1968 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1969 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1970 (z80_cons_fix_new): Declare.
1971 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1972 (def24,d24,def32,d32): New pseudo-ops.
1973
1974 2006-02-02 Paul Brook <paul@codesourcery.com>
1975
1976 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1977
1978 2005-02-02 Paul Brook <paul@codesourcery.com>
1979
1980 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1981 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1982 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1983 T2_OPCODE_RSB): Define.
1984 (thumb32_negate_data_op): New function.
1985 (md_apply_fix): Use it.
1986
1987 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1988
1989 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1990 fields.
1991 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1992 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1993 subtracted symbols.
1994 (relaxation_requirements): Add pfinish_frag argument and use it to
1995 replace setting tinsn->record_fix fields.
1996 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1997 and vinsn_to_insnbuf. Remove references to record_fix and
1998 slot_sub_symbols fields.
1999 (xtensa_mark_narrow_branches): Delete unused code.
2000 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2001 a symbol.
2002 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2003 record_fix fields.
2004 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2005 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2006 of the record_fix field. Simplify error messages for unexpected
2007 symbolic operands.
2008 (set_expr_symbol_offset_diff): Delete.
2009
2010 2006-01-31 Paul Brook <paul@codesourcery.com>
2011
2012 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2013
2014 2006-01-31 Paul Brook <paul@codesourcery.com>
2015 Richard Earnshaw <rearnsha@arm.com>
2016
2017 * config/tc-arm.c: Use arm_feature_set.
2018 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2019 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2020 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2021 New variables.
2022 (insns): Use them.
2023 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2024 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2025 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2026 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2027 feature flags.
2028 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2029 (arm_opts): Move old cpu/arch options from here...
2030 (arm_legacy_opts): ... to here.
2031 (md_parse_option): Search arm_legacy_opts.
2032 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2033 (arm_float_abis, arm_eabis): Make const.
2034
2035 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2036
2037 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2038
2039 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2040
2041 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2042 in load immediate intruction.
2043
2044 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2045
2046 * config/bfin-parse.y (value_match): Use correct conversion
2047 specifications in template string for __FILE__ and __LINE__.
2048 (binary): Ditto.
2049 (unary): Ditto.
2050
2051 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2052
2053 Introduce TLS descriptors for i386 and x86_64.
2054 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2055 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2056 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2057 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2058 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2059 displacement bits.
2060 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2061 (lex_got): Handle @tlsdesc and @tlscall.
2062 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2063
2064 2006-01-11 Nick Clifton <nickc@redhat.com>
2065
2066 Fixes for building on 64-bit hosts:
2067 * config/tc-avr.c (mod_index): New union to allow conversion
2068 between pointers and integers.
2069 (md_begin, avr_ldi_expression): Use it.
2070 * config/tc-i370.c (md_assemble): Add cast for argument to print
2071 statement.
2072 * config/tc-tic54x.c (subsym_substitute): Likewise.
2073 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2074 opindex field of fr_cgen structure into a pointer so that it can
2075 be stored in a frag.
2076 * config/tc-mn10300.c (md_assemble): Likewise.
2077 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2078 types.
2079 * config/tc-v850.c: Replace uses of (int) casts with correct
2080 types.
2081
2082 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2083
2084 PR gas/2117
2085 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2086
2087 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2088
2089 PR gas/2101
2090 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2091 a local-label reference.
2092
2093 For older changes see ChangeLog-2005
2094 \f
2095 Local Variables:
2096 mode: change-log
2097 left-margin: 8
2098 fill-column: 74
2099 version-control: never
2100 End: