1 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
3 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
4 cfloat/m68881 to correct architecture before using it.
6 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
8 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
11 2006-05-15 Paul Brook <paul@codesourcery.com>
13 * config/tc-arm.c (arm_adjust_symtab): Use
14 bfd_is_arm_special_symbol_name.
16 2006-05-15 Bob Wilson <bob.wilson@acm.org>
18 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
19 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
20 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
21 Handle errors from calls to xtensa_opcode_is_* functions.
23 2006-05-14 Thiemo Seufer <ths@mips.com>
25 * config/tc-mips.c (macro_build): Test for currently active
27 (mips16_ip): Reject invalid opcodes.
29 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
31 * doc/as.texinfo: Rename "Index" to "AS Index",
32 and "ABORT" to "ABORT (COFF)".
34 2006-05-11 Paul Brook <paul@codesourcery.com>
36 * config/tc-arm.c (parse_half): New function.
37 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
38 (parse_operands): Ditto.
39 (do_mov16): Reject invalid relocations.
40 (do_t_mov16): Ditto. Use Thumb reloc numbers.
41 (insns): Replace Iffff with HALF.
42 (md_apply_fix): Add MOVW and MOVT relocs.
43 (tc_gen_reloc): Ditto.
44 * doc/c-arm.texi: Document relocation operators
46 2006-05-11 Paul Brook <paul@codesourcery.com>
48 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
50 2006-05-11 Thiemo Seufer <ths@mips.com>
52 * config/tc-mips.c (append_insn): Don't check the range of j or
55 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
57 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
58 relocs against external symbols for WinCE targets.
59 (md_apply_fix): Likewise.
61 2006-05-09 David Ung <davidu@mips.com>
63 * config/tc-mips.c (append_insn): Only warn about an out-of-range
66 2006-05-09 Nick Clifton <nickc@redhat.com>
68 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
69 against symbols which are not going to be placed into the symbol
72 2006-05-09 Ben Elliston <bje@au.ibm.com>
74 * expr.c (operand): Remove `if (0 && ..)' statement and
75 subsequently unused target_op label. Collapse `if (1 || ..)'
77 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
78 separately above the switch.
80 2006-05-08 Nick Clifton <nickc@redhat.com>
83 * config/tc-msp430.c (line_separator_character): Define as |.
85 2006-05-08 Thiemo Seufer <ths@mips.com>
86 Nigel Stephens <nigel@mips.com>
87 David Ung <davidu@mips.com>
89 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
90 (mips_opts): Likewise.
91 (file_ase_smartmips): New variable.
92 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
93 (macro_build): Handle SmartMIPS instructions.
95 (md_longopts): Add argument handling for smartmips.
96 (md_parse_options, mips_after_parse_args): Likewise.
97 (s_mipsset): Add .set smartmips support.
98 (md_show_usage): Document -msmartmips/-mno-smartmips.
99 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
101 * doc/c-mips.texi: Likewise.
103 2006-05-08 Alan Modra <amodra@bigpond.net.au>
105 * write.c (relax_segment): Add pass count arg. Don't error on
106 negative org/space on first two passes.
107 (relax_seg_info): New struct.
108 (relax_seg, write_object_file): Adjust.
109 * write.h (relax_segment): Update prototype.
111 2006-05-05 Julian Brown <julian@codesourcery.com>
113 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
115 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
116 architecture version checks.
117 (insns): Allow overlapping instructions to be used in VFP mode.
119 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
122 * config/obj-elf.c (obj_elf_change_section): Allow user
123 specified SHF_ALPHA_GPREL.
125 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
127 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
128 for PMEM related expressions.
130 2006-05-05 Nick Clifton <nickc@redhat.com>
133 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
134 insertion of a directory separator character into a string at a
135 given offset. Uses heuristics to decide when to use a backslash
136 character rather than a forward-slash character.
137 (dwarf2_directive_loc): Use the macro.
138 (out_debug_info): Likewise.
140 2006-05-05 Thiemo Seufer <ths@mips.com>
141 David Ung <davidu@mips.com>
143 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
145 (macro): Add new case M_CACHE_AB.
147 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
149 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
150 (opcode_lookup): Issue a warning for opcode with
151 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
152 identical to OT_cinfix3.
153 (TxC3w, TC3w, tC3w): New.
154 (insns): Use tC3w and TC3w for comparison instructions with
157 2006-05-04 Alan Modra <amodra@bigpond.net.au>
159 * subsegs.h (struct frchain): Delete frch_seg.
160 (frchain_root): Delete.
161 (seg_info): Define as macro.
162 * subsegs.c (frchain_root): Delete.
163 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
164 (subsegs_begin, subseg_change): Adjust for above.
165 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
166 rather than to one big list.
167 (subseg_get): Don't special case abs, und sections.
168 (subseg_new, subseg_force_new): Don't set frchainP here.
170 (subsegs_print_statistics): Adjust frag chain control list traversal.
171 * debug.c (dmp_frags): Likewise.
172 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
173 at frchain_root. Make use of known frchain ordering.
174 (last_frag_for_seg): Likewise.
175 (get_frag_fix): Likewise. Add seg param.
176 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
177 * write.c (chain_frchains_together_1): Adjust for struct frchain.
178 (SUB_SEGMENT_ALIGN): Likewise.
179 (subsegs_finish): Adjust frchain list traversal.
180 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
181 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
182 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
183 (xtensa_fix_b_j_loop_end_frags): Likewise.
184 (xtensa_fix_close_loop_end_frags): Likewise.
185 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
186 (retrieve_segment_info): Delete frch_seg initialisation.
188 2006-05-03 Alan Modra <amodra@bigpond.net.au>
190 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
191 * config/obj-elf.h (obj_sec_set_private_data): Delete.
192 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
193 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
195 2006-05-02 Joseph Myers <joseph@codesourcery.com>
197 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
199 (md_apply_fix3): Multiply offset by 4 here for
200 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
202 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
203 Jan Beulich <jbeulich@novell.com>
205 * config/tc-i386.c (output_invalid_buf): Change size for
207 * config/tc-tic30.c (output_invalid_buf): Likewise.
209 * config/tc-i386.c (output_invalid): Cast none-ascii char to
211 * config/tc-tic30.c (output_invalid): Likewise.
213 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
215 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
216 (TEXI2POD): Use AM_MAKEINFOFLAGS.
217 (asconfig.texi): Don't set top_srcdir.
218 * doc/as.texinfo: Don't use top_srcdir.
219 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
221 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
223 * config/tc-i386.c (output_invalid_buf): Change size to 16.
224 * config/tc-tic30.c (output_invalid_buf): Likewise.
226 * config/tc-i386.c (output_invalid): Use snprintf instead of
228 * config/tc-ia64.c (declare_register_set): Likewise.
229 (emit_one_bundle): Likewise.
230 (check_dependencies): Likewise.
231 * config/tc-tic30.c (output_invalid): Likewise.
233 2006-05-02 Paul Brook <paul@codesourcery.com>
235 * config/tc-arm.c (arm_optimize_expr): New function.
236 * config/tc-arm.h (md_optimize_expr): Define
237 (arm_optimize_expr): Add prototype.
238 (TC_FORCE_RELOCATION_SUB_SAME): Define.
240 2006-05-02 Ben Elliston <bje@au.ibm.com>
242 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
245 * sb.h (sb_list_vector): Move to sb.c.
246 * sb.c (free_list): Use type of sb_list_vector directly.
247 (sb_build): Fix off-by-one error in assertion about `size'.
249 2006-05-01 Ben Elliston <bje@au.ibm.com>
251 * listing.c (listing_listing): Remove useless loop.
252 * macro.c (macro_expand): Remove is_positional local variable.
253 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
254 and simplify surrounding expressions, where possible.
255 (assign_symbol): Likewise.
256 (s_weakref): Likewise.
257 * symbols.c (colon): Likewise.
259 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
261 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
263 2006-04-30 Thiemo Seufer <ths@mips.com>
264 David Ung <davidu@mips.com>
266 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
267 (mips_immed): New table that records various handling of udi
268 instruction patterns.
269 (mips_ip): Adds udi handling.
271 2006-04-28 Alan Modra <amodra@bigpond.net.au>
273 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
274 of list rather than beginning.
276 2006-04-26 Julian Brown <julian@codesourcery.com>
278 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
279 (is_quarter_float): Rename from above. Simplify slightly.
280 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
282 (parse_neon_mov): Parse floating-point constants.
283 (neon_qfloat_bits): Fix encoding.
284 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
285 preference to integer encoding when using the F32 type.
287 2006-04-26 Julian Brown <julian@codesourcery.com>
289 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
290 zero-initialising structures containing it will lead to invalid types).
291 (arm_it): Add vectype to each operand.
292 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
294 (neon_typed_alias): New structure. Extra information for typed
296 (reg_entry): Add neon type info field.
297 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
298 Break out alternative syntax for coprocessor registers, etc. into...
299 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
300 out from arm_reg_parse.
301 (parse_neon_type): Move. Return SUCCESS/FAIL.
302 (first_error): New function. Call to ensure first error which occurs is
304 (parse_neon_operand_type): Parse exactly one type.
305 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
306 (parse_typed_reg_or_scalar): New function. Handle core of both
307 arm_typed_reg_parse and parse_scalar.
308 (arm_typed_reg_parse): Parse a register with an optional type.
309 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
311 (parse_scalar): Parse a Neon scalar with optional type.
312 (parse_reg_list): Use first_error.
313 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
314 (neon_alias_types_same): New function. Return true if two (alias) types
316 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
318 (insert_reg_alias): Return new reg_entry not void.
319 (insert_neon_reg_alias): New function. Insert type/index information as
320 well as register for alias.
321 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
322 make typed register aliases accordingly.
323 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
325 (s_unreq): Delete type information if present.
326 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
327 (s_arm_unwind_save_mmxwcg): Likewise.
328 (s_arm_unwind_movsp): Likewise.
329 (s_arm_unwind_setfp): Likewise.
330 (parse_shift): Likewise.
331 (parse_shifter_operand): Likewise.
332 (parse_address): Likewise.
333 (parse_tb): Likewise.
334 (tc_arm_regname_to_dw2regnum): Likewise.
335 (md_pseudo_table): Add dn, qn.
336 (parse_neon_mov): Handle typed operands.
337 (parse_operands): Likewise.
338 (neon_type_mask): Add N_SIZ.
339 (N_ALLMODS): New macro.
340 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
341 (el_type_of_type_chk): Add some safeguards.
342 (modify_types_allowed): Fix logic bug.
343 (neon_check_type): Handle operands with types.
344 (neon_three_same): Remove redundant optional arg handling.
345 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
346 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
347 (do_neon_step): Adjust accordingly.
348 (neon_cmode_for_logic_imm): Use first_error.
349 (do_neon_bitfield): Call neon_check_type.
350 (neon_dyadic): Rename to...
351 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
352 to allow modification of type of the destination.
353 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
354 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
355 (do_neon_compare): Make destination be an untyped bitfield.
356 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
357 (neon_mul_mac): Return early in case of errors.
358 (neon_move_immediate): Use first_error.
359 (neon_mac_reg_scalar_long): Fix type to include scalar.
360 (do_neon_dup): Likewise.
361 (do_neon_mov): Likewise (in several places).
362 (do_neon_tbl_tbx): Fix type.
363 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
364 (do_neon_ld_dup): Exit early in case of errors and/or use
366 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
367 Handle .dn/.qn directives.
368 (REGDEF): Add zero for reg_entry neon field.
370 2006-04-26 Julian Brown <julian@codesourcery.com>
372 * config/tc-arm.c (limits.h): Include.
373 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
374 (fpu_vfp_v3_or_neon_ext): Declare constants.
375 (neon_el_type): New enumeration of types for Neon vector elements.
376 (neon_type_el): New struct. Define type and size of a vector element.
377 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
379 (neon_type): Define struct. The type of an instruction.
380 (arm_it): Add 'vectype' for the current instruction.
381 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
382 (vfp_sp_reg_pos): Rename to...
383 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
385 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
386 (Neon D or Q register).
387 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
389 (GE_OPT_PREFIX_BIG): Define constant, for use in...
390 (my_get_expression): Allow above constant as argument to accept
391 64-bit constants with optional prefix.
392 (arm_reg_parse): Add extra argument to return the specific type of
393 register in when either a D or Q register (REG_TYPE_NDQ) is
394 requested. Can be NULL.
395 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
396 (parse_reg_list): Update for new arm_reg_parse args.
397 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
398 (parse_neon_el_struct_list): New function. Parse element/structure
399 register lists for VLD<n>/VST<n> instructions.
400 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
401 (s_arm_unwind_save_mmxwr): Likewise.
402 (s_arm_unwind_save_mmxwcg): Likewise.
403 (s_arm_unwind_movsp): Likewise.
404 (s_arm_unwind_setfp): Likewise.
405 (parse_big_immediate): New function. Parse an immediate, which may be
406 64 bits wide. Put results in inst.operands[i].
407 (parse_shift): Update for new arm_reg_parse args.
408 (parse_address): Likewise. Add parsing of alignment specifiers.
409 (parse_neon_mov): Parse the operands of a VMOV instruction.
410 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
411 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
412 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
413 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
414 (parse_operands): Handle new codes above.
415 (encode_arm_vfp_sp_reg): Rename to...
416 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
417 selected VFP version only supports D0-D15.
418 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
419 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
420 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
421 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
422 encode_arm_vfp_reg name, and allow 32 D regs.
423 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
424 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
426 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
427 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
428 constant-load and conversion insns introduced with VFPv3.
429 (neon_tab_entry): New struct.
430 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
431 those which are the targets of pseudo-instructions.
432 (neon_opc): Enumerate opcodes, use as indices into...
433 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
434 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
435 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
436 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
438 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
440 (neon_type_mask): New. Compact type representation for type checking.
441 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
442 permitted type combinations.
443 (N_IGNORE_TYPE): New macro.
444 (neon_check_shape): New function. Check an instruction shape for
445 multiple alternatives. Return the specific shape for the current
447 (neon_modify_type_size): New function. Modify a vector type and size,
448 depending on the bit mask in argument 1.
449 (neon_type_promote): New function. Convert a given "key" type (of an
450 operand) into the correct type for a different operand, based on a bit
452 (type_chk_of_el_type): New function. Convert a type and size into the
453 compact representation used for type checking.
454 (el_type_of_type_ckh): New function. Reverse of above (only when a
455 single bit is set in the bit mask).
456 (modify_types_allowed): New function. Alter a mask of allowed types
457 based on a bit mask of modifications.
458 (neon_check_type): New function. Check the type of the current
459 instruction against the variable argument list. The "key" type of the
460 instruction is returned.
461 (neon_dp_fixup): New function. Fill in and modify instruction bits for
462 a Neon data-processing instruction depending on whether we're in ARM
463 mode or Thumb-2 mode.
464 (neon_logbits): New function.
465 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
466 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
467 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
468 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
469 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
470 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
471 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
472 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
473 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
474 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
475 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
476 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
477 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
478 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
479 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
480 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
481 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
482 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
483 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
484 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
485 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
486 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
487 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
488 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
489 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
491 (parse_neon_type): New function. Parse Neon type specifier.
492 (opcode_lookup): Allow parsing of Neon type specifiers.
493 (REGNUM2, REGSETH, REGSET2): New macros.
494 (reg_names): Add new VFPv3 and Neon registers.
495 (NUF, nUF, NCE, nCE): New macros for opcode table.
496 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
497 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
498 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
499 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
500 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
501 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
502 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
503 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
504 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
505 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
506 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
507 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
508 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
509 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
511 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
512 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
513 (arm_option_cpu_value): Add vfp3 and neon.
514 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
517 2006-04-25 Bob Wilson <bob.wilson@acm.org>
519 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
520 syntax instead of hardcoded opcodes with ".w18" suffixes.
521 (wide_branch_opcode): New.
522 (build_transition): Use it to check for wide branch opcodes with
523 either ".w18" or ".w15" suffixes.
525 2006-04-25 Bob Wilson <bob.wilson@acm.org>
527 * config/tc-xtensa.c (xtensa_create_literal_symbol,
528 xg_assemble_literal, xg_assemble_literal_space): Do not set the
529 frag's is_literal flag.
531 2006-04-25 Bob Wilson <bob.wilson@acm.org>
533 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
535 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
537 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
538 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
539 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
540 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
541 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
543 2005-04-20 Paul Brook <paul@codesourcery.com>
545 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
547 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
549 2006-04-19 Alan Modra <amodra@bigpond.net.au>
551 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
552 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
553 Make some cpus unsupported on ELF. Run "make dep-am".
554 * Makefile.in: Regenerate.
556 2006-04-19 Alan Modra <amodra@bigpond.net.au>
558 * configure.in (--enable-targets): Indent help message.
559 * configure: Regenerate.
561 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
564 * config/tc-i386.c (i386_immediate): Check illegal immediate
567 2006-04-18 Alan Modra <amodra@bigpond.net.au>
569 * config/tc-i386.c: Formatting.
570 (output_disp, output_imm): ISO C90 params.
572 * frags.c (frag_offset_fixed_p): Constify args.
573 * frags.h (frag_offset_fixed_p): Ditto.
575 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
576 (COFF_MAGIC): Delete.
578 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
580 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
582 * po/POTFILES.in: Regenerated.
584 2006-04-16 Mark Mitchell <mark@codesourcery.com>
586 * doc/as.texinfo: Mention that some .type syntaxes are not
587 supported on all architectures.
589 2006-04-14 Sterling Augustine <sterling@tensilica.com>
591 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
592 instructions when such transformations have been disabled.
594 2006-04-10 Sterling Augustine <sterling@tensilica.com>
596 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
597 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
598 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
599 decoding the loop instructions. Remove current_offset variable.
600 (xtensa_fix_short_loop_frags): Likewise.
601 (min_bytes_to_other_loop_end): Remove current_offset argument.
603 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
605 * config/tc-z80.c (z80_optimize_expr): Removed.
606 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
608 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
610 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
611 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
612 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
613 atmega644, atmega329, atmega3290, atmega649, atmega6490,
614 atmega406, atmega640, atmega1280, atmega1281, at90can32,
615 at90can64, at90usb646, at90usb647, at90usb1286 and
617 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
619 2006-04-07 Paul Brook <paul@codesourcery.com>
621 * config/tc-arm.c (parse_operands): Set default error message.
623 2006-04-07 Paul Brook <paul@codesourcery.com>
625 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
627 2006-04-07 Paul Brook <paul@codesourcery.com>
629 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
631 2006-04-07 Paul Brook <paul@codesourcery.com>
633 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
634 (move_or_literal_pool): Handle Thumb-2 instructions.
635 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
637 2006-04-07 Alan Modra <amodra@bigpond.net.au>
640 * config/tc-i386.c (match_template): Move 64-bit operand tests
643 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
645 * po/Make-in: Add install-html target.
646 * Makefile.am: Add install-html and install-html-recursive targets.
647 * Makefile.in: Regenerate.
648 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
649 * configure: Regenerate.
650 * doc/Makefile.am: Add install-html and install-html-am targets.
651 * doc/Makefile.in: Regenerate.
653 2006-04-06 Alan Modra <amodra@bigpond.net.au>
655 * frags.c (frag_offset_fixed_p): Reinitialise offset before
658 2006-04-05 Richard Sandiford <richard@codesourcery.com>
659 Daniel Jacobowitz <dan@codesourcery.com>
661 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
662 (GOTT_BASE, GOTT_INDEX): New.
663 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
664 GOTT_INDEX when generating VxWorks PIC.
665 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
666 use the generic *-*-vxworks* stanza instead.
668 2006-04-04 Alan Modra <amodra@bigpond.net.au>
671 * frags.c (frag_offset_fixed_p): New function.
672 * frags.h (frag_offset_fixed_p): Declare.
673 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
674 (resolve_expression): Likewise.
676 2006-04-03 Sterling Augustine <sterling@tensilica.com>
678 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
679 of the same length but different numbers of slots.
681 2006-03-30 Andreas Schwab <schwab@suse.de>
683 * configure.in: Fix help string for --enable-targets option.
684 * configure: Regenerate.
686 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
688 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
689 (m68k_ip): ... here. Use for all chips. Protect against buffer
690 overrun and avoid excessive copying.
692 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
693 m68020_control_regs, m68040_control_regs, m68060_control_regs,
694 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
695 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
696 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
697 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
698 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
699 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
700 mcf5282_ctrl, mcfv4e_ctrl): ... these.
701 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
702 (struct m68k_cpu): Change chip field to control_regs.
703 (current_chip): Remove.
705 (m68k_archs, m68k_extensions): Adjust.
706 (m68k_cpus): Reorder to be in cpu number order. Adjust.
707 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
708 (find_cf_chip): Reimplement for new organization of cpu table.
709 (select_control_regs): Remove.
711 (struct save_opts): Save control regs, not chip.
712 (s_save, s_restore): Adjust.
713 (m68k_lookup_cpu): Give deprecated warning when necessary.
714 (m68k_init_arch): Adjust.
715 (md_show_usage): Adjust for new cpu table organization.
717 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
719 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
720 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
721 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
723 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
724 (any_gotrel): New rule.
725 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
726 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
728 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
729 (bfin_pic_ptr): New function.
730 (md_pseudo_table): Add it for ".picptr".
731 (OPTION_FDPIC): New macro.
732 (md_longopts): Add -mfdpic.
733 (md_parse_option): Handle it.
734 (md_begin): Set BFD flags.
735 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
736 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
738 * Makefile.am (bfin-parse.o): Update dependencies.
739 (DEPTC_bfin_elf): Likewise.
740 * Makefile.in: Regenerate.
742 2006-03-25 Richard Sandiford <richard@codesourcery.com>
744 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
745 mcfemac instead of mcfmac.
747 2006-03-23 Michael Matz <matz@suse.de>
749 * config/tc-i386.c (type_names): Correct placement of 'static'.
750 (reloc): Map some more relocs to their 64 bit counterpart when
752 (output_insn): Work around breakage if DEBUG386 is defined.
753 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
754 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
755 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
758 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
760 (md_convert_frag): Jumps can now be larger than 2GB away, error
762 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
763 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
765 2006-03-22 Richard Sandiford <richard@codesourcery.com>
766 Daniel Jacobowitz <dan@codesourcery.com>
767 Phil Edwards <phil@codesourcery.com>
768 Zack Weinberg <zack@codesourcery.com>
769 Mark Mitchell <mark@codesourcery.com>
770 Nathan Sidwell <nathan@codesourcery.com>
772 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
773 (md_begin): Complain about -G being used for PIC. Don't change
774 the text, data and bss alignments on VxWorks.
775 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
776 generating VxWorks PIC.
777 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
778 (macro): Likewise, but do not treat la $25 specially for
779 VxWorks PIC, and do not handle jal.
780 (OPTION_MVXWORKS_PIC): New macro.
781 (md_longopts): Add -mvxworks-pic.
782 (md_parse_option): Don't complain about using PIC and -G together here.
783 Handle OPTION_MVXWORKS_PIC.
784 (md_estimate_size_before_relax): Always use the first relaxation
786 * config/tc-mips.h (VXWORKS_PIC): New.
788 2006-03-21 Paul Brook <paul@codesourcery.com>
790 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
792 2006-03-21 Sterling Augustine <sterling@tensilica.com>
794 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
795 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
796 (get_loop_align_size): New.
797 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
798 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
799 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
800 (get_noop_aligned_address): Use get_loop_align_size.
801 (get_aligned_diff): Likewise.
803 2006-03-21 Paul Brook <paul@codesourcery.com>
805 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
807 2006-03-20 Paul Brook <paul@codesourcery.com>
809 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
810 (do_t_branch): Encode branches inside IT blocks as unconditional.
811 (do_t_cps): New function.
812 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
813 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
814 (opcode_lookup): Allow conditional suffixes on all instructions in
816 (md_assemble): Advance condexec state before checking for errors.
817 (insns): Use do_t_cps.
819 2006-03-20 Paul Brook <paul@codesourcery.com>
821 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
824 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
826 * config/tc-vax.c: Update copyright year.
827 * config/tc-vax.h: Likewise.
829 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
831 * config/tc-vax.c (md_chars_to_number): Used only locally, so
833 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
835 2006-03-17 Paul Brook <paul@codesourcery.com>
837 * config/tc-arm.c (insns): Add ldm and stm.
839 2006-03-17 Ben Elliston <bje@au.ibm.com>
842 * doc/as.texinfo (Ident): Document this directive more thoroughly.
844 2006-03-16 Paul Brook <paul@codesourcery.com>
846 * config/tc-arm.c (insns): Add "svc".
848 2006-03-13 Bob Wilson <bob.wilson@acm.org>
850 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
851 flag and avoid double underscore prefixes.
853 2006-03-10 Paul Brook <paul@codesourcery.com>
855 * config/tc-arm.c (md_begin): Handle EABIv5.
856 (arm_eabis): Add EF_ARM_EABI_VER5.
857 * doc/c-arm.texi: Document -meabi=5.
859 2006-03-10 Ben Elliston <bje@au.ibm.com>
861 * app.c (do_scrub_chars): Simplify string handling.
863 2006-03-07 Richard Sandiford <richard@codesourcery.com>
864 Daniel Jacobowitz <dan@codesourcery.com>
865 Zack Weinberg <zack@codesourcery.com>
866 Nathan Sidwell <nathan@codesourcery.com>
867 Paul Brook <paul@codesourcery.com>
868 Ricardo Anguiano <anguiano@codesourcery.com>
869 Phil Edwards <phil@codesourcery.com>
871 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
872 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
874 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
875 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
876 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
878 2006-03-06 Bob Wilson <bob.wilson@acm.org>
880 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
881 even when using the text-section-literals option.
883 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
885 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
887 (m68k_ip): <case 'J'> Check we have some control regs.
888 (md_parse_option): Allow raw arch switch.
889 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
890 whether 68881 or cfloat was meant by -mfloat.
891 (md_show_usage): Adjust extension display.
892 (m68k_elf_final_processing): Adjust.
894 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
896 * config/tc-avr.c (avr_mod_hash_value): New function.
897 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
898 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
899 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
900 instead of int avr_ldi_expression: use avr_mod_hash_value instead
902 (tc_gen_reloc): Handle substractions of symbols, if possible do
903 fixups, abort otherwise.
904 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
905 tc_fix_adjustable): Define.
907 2006-03-02 James E Wilson <wilson@specifix.com>
909 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
910 change the template, then clear md.slot[curr].end_of_insn_group.
912 2006-02-28 Jan Beulich <jbeulich@novell.com>
914 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
916 2006-02-28 Jan Beulich <jbeulich@novell.com>
919 * macro.c (getstring): Don't treat parentheses special anymore.
920 (get_any_string): Don't consider '(' and ')' as quoting anymore.
921 Special-case '(', ')', '[', and ']' when dealing with non-quoting
924 2006-02-28 Mat <mat@csail.mit.edu>
926 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
928 2006-02-27 Jakub Jelinek <jakub@redhat.com>
930 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
932 (CFI_signal_frame): Define.
933 (cfi_pseudo_table): Add .cfi_signal_frame.
934 (dot_cfi): Handle CFI_signal_frame.
935 (output_cie): Handle cie->signal_frame.
936 (select_cie_for_fde): Don't share CIE if signal_frame flag is
937 different. Copy signal_frame from FDE to newly created CIE.
938 * doc/as.texinfo: Document .cfi_signal_frame.
940 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
942 * doc/Makefile.am: Add html target.
943 * doc/Makefile.in: Regenerate.
944 * po/Make-in: Add html target.
946 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
948 * config/tc-i386.c (output_insn): Support Intel Merom New
951 * config/tc-i386.h (CpuMNI): New.
952 (CpuUnknownFlags): Add CpuMNI.
954 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
956 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
957 (hpriv_reg_table): New table for hyperprivileged registers.
958 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
961 2006-02-24 DJ Delorie <dj@redhat.com>
963 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
964 (tc_gen_reloc): Don't define.
965 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
966 (OPTION_LINKRELAX): New.
967 (md_longopts): Add it.
969 (md_parse_options): Set it.
970 (md_assemble): Emit relaxation relocs as needed.
971 (md_convert_frag): Emit relaxation relocs as needed.
972 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
973 (m32c_apply_fix): New.
975 (m32c_force_relocation): Force out jump relocs when relaxing.
976 (m32c_fix_adjustable): Return false if relaxing.
978 2006-02-24 Paul Brook <paul@codesourcery.com>
980 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
981 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
982 (struct asm_barrier_opt): Define.
983 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
984 (parse_psr): Accept V7M psr names.
985 (parse_barrier): New function.
986 (enum operand_parse_code): Add OP_oBARRIER.
987 (parse_operands): Implement OP_oBARRIER.
988 (do_barrier): New function.
989 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
990 (do_t_cpsi): Add V7M restrictions.
991 (do_t_mrs, do_t_msr): Validate V7M variants.
992 (md_assemble): Check for NULL variants.
993 (v7m_psrs, barrier_opt_names): New tables.
994 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
995 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
996 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
997 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
998 (struct cpu_arch_ver_table): Define.
1000 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1001 Tag_CPU_arch_profile.
1002 * doc/c-arm.texi: Document new cpu and arch options.
1004 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1006 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1008 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1010 * config/tc-ia64.c: Update copyright years.
1012 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1014 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1017 2005-02-22 Paul Brook <paul@codesourcery.com>
1019 * config/tc-arm.c (do_pld): Remove incorrect write to
1021 (encode_thumb32_addr_mode): Use correct operand.
1023 2006-02-21 Paul Brook <paul@codesourcery.com>
1025 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1027 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1028 Anil Paranjape <anilp1@kpitcummins.com>
1029 Shilin Shakti <shilins@kpitcummins.com>
1031 * Makefile.am: Add xc16x related entry.
1032 * Makefile.in: Regenerate.
1033 * configure.in: Added xc16x related entry.
1034 * configure: Regenerate.
1035 * config/tc-xc16x.h: New file
1036 * config/tc-xc16x.c: New file
1037 * doc/c-xc16x.texi: New file for xc16x
1038 * doc/all.texi: Entry for xc16x
1039 * doc/Makefile.texi: Added c-xc16x.texi
1040 * NEWS: Announce the support for the new target.
1042 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1044 * configure.tgt: set emulation for mips-*-netbsd*
1046 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1048 * config.in: Rebuilt.
1050 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1052 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1053 from 1, not 0, in error messages.
1054 (md_assemble): Simplify special-case check for ENTRY instructions.
1055 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1056 operand in error message.
1058 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1060 * configure.tgt (arm-*-linux-gnueabi*): Change to
1063 2006-02-10 Nick Clifton <nickc@redhat.com>
1065 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1066 32-bit value is propagated into the upper bits of a 64-bit long.
1068 * config/tc-arc.c (init_opcode_tables): Fix cast.
1069 (arc_extoper, md_operand): Likewise.
1071 2006-02-09 David Heine <dlheine@tensilica.com>
1073 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1074 each relaxation step.
1076 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1078 * configure.in (CHECK_DECLS): Add vsnprintf.
1079 * configure: Regenerate.
1080 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1081 include/declare here, but...
1082 * as.h: Move code detecting VARARGS idiom to the top.
1083 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1084 (vsnprintf): Declare if not already declared.
1086 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1088 * as.c (close_output_file): New.
1089 (main): Register close_output_file with xatexit before
1090 dump_statistics. Don't call output_file_close.
1092 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1094 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1095 mcf5329_control_regs): New.
1096 (not_current_architecture, selected_arch, selected_cpu): New.
1097 (m68k_archs, m68k_extensions): New.
1098 (archs): Renamed to ...
1099 (m68k_cpus): ... here. Adjust.
1101 (md_pseudo_table): Add arch and cpu directives.
1102 (find_cf_chip, m68k_ip): Adjust table scanning.
1103 (no_68851, no_68881): Remove.
1104 (md_assemble): Lazily initialize.
1105 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1106 (md_init_after_args): Move functionality to m68k_init_arch.
1107 (mri_chip): Adjust table scanning.
1108 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1109 options with saner parsing.
1110 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1111 m68k_init_arch): New.
1112 (s_m68k_cpu, s_m68k_arch): New.
1113 (md_show_usage): Adjust.
1114 (m68k_elf_final_processing): Set CF EF flags.
1115 * config/tc-m68k.h (m68k_init_after_args): Remove.
1116 (tc_init_after_args): Remove.
1117 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1118 (M68k-Directives): Document .arch and .cpu directives.
1120 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1122 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1123 synonyms for equ and defl.
1124 (z80_cons_fix_new): New function.
1125 (emit_byte): Disallow relative jumps to absolute locations.
1126 (emit_data): Only handle defb, prototype changed, because defb is
1127 now handled as pseudo-op rather than an instruction.
1128 (instab): Entries for defb,defw,db,dw moved from here...
1129 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1130 Add entries for def24,def32,d24,d32.
1131 (md_assemble): Improved error handling.
1132 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1133 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1134 (z80_cons_fix_new): Declare.
1135 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1136 (def24,d24,def32,d32): New pseudo-ops.
1138 2006-02-02 Paul Brook <paul@codesourcery.com>
1140 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1142 2005-02-02 Paul Brook <paul@codesourcery.com>
1144 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1145 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1146 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1147 T2_OPCODE_RSB): Define.
1148 (thumb32_negate_data_op): New function.
1149 (md_apply_fix): Use it.
1151 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1153 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1155 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1156 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1158 (relaxation_requirements): Add pfinish_frag argument and use it to
1159 replace setting tinsn->record_fix fields.
1160 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1161 and vinsn_to_insnbuf. Remove references to record_fix and
1162 slot_sub_symbols fields.
1163 (xtensa_mark_narrow_branches): Delete unused code.
1164 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1166 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1168 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1169 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1170 of the record_fix field. Simplify error messages for unexpected
1172 (set_expr_symbol_offset_diff): Delete.
1174 2006-01-31 Paul Brook <paul@codesourcery.com>
1176 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1178 2006-01-31 Paul Brook <paul@codesourcery.com>
1179 Richard Earnshaw <rearnsha@arm.com>
1181 * config/tc-arm.c: Use arm_feature_set.
1182 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1183 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1184 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1187 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1188 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1189 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1190 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1192 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1193 (arm_opts): Move old cpu/arch options from here...
1194 (arm_legacy_opts): ... to here.
1195 (md_parse_option): Search arm_legacy_opts.
1196 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1197 (arm_float_abis, arm_eabis): Make const.
1199 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1201 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1203 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1205 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1206 in load immediate intruction.
1208 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1210 * config/bfin-parse.y (value_match): Use correct conversion
1211 specifications in template string for __FILE__ and __LINE__.
1215 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1217 Introduce TLS descriptors for i386 and x86_64.
1218 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1219 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1220 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1221 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1222 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1224 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1225 (lex_got): Handle @tlsdesc and @tlscall.
1226 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1228 2006-01-11 Nick Clifton <nickc@redhat.com>
1230 Fixes for building on 64-bit hosts:
1231 * config/tc-avr.c (mod_index): New union to allow conversion
1232 between pointers and integers.
1233 (md_begin, avr_ldi_expression): Use it.
1234 * config/tc-i370.c (md_assemble): Add cast for argument to print
1236 * config/tc-tic54x.c (subsym_substitute): Likewise.
1237 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1238 opindex field of fr_cgen structure into a pointer so that it can
1239 be stored in a frag.
1240 * config/tc-mn10300.c (md_assemble): Likewise.
1241 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1243 * config/tc-v850.c: Replace uses of (int) casts with correct
1246 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1249 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1251 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1254 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1255 a local-label reference.
1257 For older changes see ChangeLog-2005
1263 version-control: never