1 2006-05-23 Jie Zhang <jie.zhang@analog.com>
3 * config/bfin-defs.h (bfin_equals): Remove declaration.
4 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
5 * config/tc-bfin.c (bfin_name_is_register): Remove.
7 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
8 (bfin_name_is_register): Remove declaration.
10 2006-05-19 Thiemo Seufer <ths@mips.com>
11 Nigel Stephens <nigel@mips.com>
13 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
14 (mips_oddfpreg_ok): New function.
17 2006-05-19 Thiemo Seufer <ths@mips.com>
18 David Ung <davidu@mips.com>
20 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
21 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
22 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
23 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
24 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
25 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
26 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
27 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
28 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
29 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
30 reg_names_o32, reg_names_n32n64): Define register classes.
31 (reg_lookup): New function, use register classes.
32 (md_begin): Reserve register names in the symbol table. Simplify
34 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
36 (mips16_ip): Use reg_lookup.
37 (tc_get_register): Likewise.
38 (tc_mips_regname_to_dw2regnum): New function.
40 2006-05-19 Thiemo Seufer <ths@mips.com>
42 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
43 Un-constify string argument.
44 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
46 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
48 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
50 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
52 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
54 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
57 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
59 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
60 cfloat/m68881 to correct architecture before using it.
62 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
64 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
67 2006-05-15 Paul Brook <paul@codesourcery.com>
69 * config/tc-arm.c (arm_adjust_symtab): Use
70 bfd_is_arm_special_symbol_name.
72 2006-05-15 Bob Wilson <bob.wilson@acm.org>
74 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
75 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
76 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
77 Handle errors from calls to xtensa_opcode_is_* functions.
79 2006-05-14 Thiemo Seufer <ths@mips.com>
81 * config/tc-mips.c (macro_build): Test for currently active
83 (mips16_ip): Reject invalid opcodes.
85 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
87 * doc/as.texinfo: Rename "Index" to "AS Index",
88 and "ABORT" to "ABORT (COFF)".
90 2006-05-11 Paul Brook <paul@codesourcery.com>
92 * config/tc-arm.c (parse_half): New function.
93 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
94 (parse_operands): Ditto.
95 (do_mov16): Reject invalid relocations.
96 (do_t_mov16): Ditto. Use Thumb reloc numbers.
97 (insns): Replace Iffff with HALF.
98 (md_apply_fix): Add MOVW and MOVT relocs.
99 (tc_gen_reloc): Ditto.
100 * doc/c-arm.texi: Document relocation operators
102 2006-05-11 Paul Brook <paul@codesourcery.com>
104 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
106 2006-05-11 Thiemo Seufer <ths@mips.com>
108 * config/tc-mips.c (append_insn): Don't check the range of j or
111 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
113 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
114 relocs against external symbols for WinCE targets.
115 (md_apply_fix): Likewise.
117 2006-05-09 David Ung <davidu@mips.com>
119 * config/tc-mips.c (append_insn): Only warn about an out-of-range
122 2006-05-09 Nick Clifton <nickc@redhat.com>
124 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
125 against symbols which are not going to be placed into the symbol
128 2006-05-09 Ben Elliston <bje@au.ibm.com>
130 * expr.c (operand): Remove `if (0 && ..)' statement and
131 subsequently unused target_op label. Collapse `if (1 || ..)'
133 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
134 separately above the switch.
136 2006-05-08 Nick Clifton <nickc@redhat.com>
139 * config/tc-msp430.c (line_separator_character): Define as |.
141 2006-05-08 Thiemo Seufer <ths@mips.com>
142 Nigel Stephens <nigel@mips.com>
143 David Ung <davidu@mips.com>
145 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
146 (mips_opts): Likewise.
147 (file_ase_smartmips): New variable.
148 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
149 (macro_build): Handle SmartMIPS instructions.
151 (md_longopts): Add argument handling for smartmips.
152 (md_parse_options, mips_after_parse_args): Likewise.
153 (s_mipsset): Add .set smartmips support.
154 (md_show_usage): Document -msmartmips/-mno-smartmips.
155 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
157 * doc/c-mips.texi: Likewise.
159 2006-05-08 Alan Modra <amodra@bigpond.net.au>
161 * write.c (relax_segment): Add pass count arg. Don't error on
162 negative org/space on first two passes.
163 (relax_seg_info): New struct.
164 (relax_seg, write_object_file): Adjust.
165 * write.h (relax_segment): Update prototype.
167 2006-05-05 Julian Brown <julian@codesourcery.com>
169 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
171 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
172 architecture version checks.
173 (insns): Allow overlapping instructions to be used in VFP mode.
175 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
178 * config/obj-elf.c (obj_elf_change_section): Allow user
179 specified SHF_ALPHA_GPREL.
181 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
183 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
184 for PMEM related expressions.
186 2006-05-05 Nick Clifton <nickc@redhat.com>
189 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
190 insertion of a directory separator character into a string at a
191 given offset. Uses heuristics to decide when to use a backslash
192 character rather than a forward-slash character.
193 (dwarf2_directive_loc): Use the macro.
194 (out_debug_info): Likewise.
196 2006-05-05 Thiemo Seufer <ths@mips.com>
197 David Ung <davidu@mips.com>
199 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
201 (macro): Add new case M_CACHE_AB.
203 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
205 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
206 (opcode_lookup): Issue a warning for opcode with
207 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
208 identical to OT_cinfix3.
209 (TxC3w, TC3w, tC3w): New.
210 (insns): Use tC3w and TC3w for comparison instructions with
213 2006-05-04 Alan Modra <amodra@bigpond.net.au>
215 * subsegs.h (struct frchain): Delete frch_seg.
216 (frchain_root): Delete.
217 (seg_info): Define as macro.
218 * subsegs.c (frchain_root): Delete.
219 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
220 (subsegs_begin, subseg_change): Adjust for above.
221 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
222 rather than to one big list.
223 (subseg_get): Don't special case abs, und sections.
224 (subseg_new, subseg_force_new): Don't set frchainP here.
226 (subsegs_print_statistics): Adjust frag chain control list traversal.
227 * debug.c (dmp_frags): Likewise.
228 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
229 at frchain_root. Make use of known frchain ordering.
230 (last_frag_for_seg): Likewise.
231 (get_frag_fix): Likewise. Add seg param.
232 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
233 * write.c (chain_frchains_together_1): Adjust for struct frchain.
234 (SUB_SEGMENT_ALIGN): Likewise.
235 (subsegs_finish): Adjust frchain list traversal.
236 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
237 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
238 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
239 (xtensa_fix_b_j_loop_end_frags): Likewise.
240 (xtensa_fix_close_loop_end_frags): Likewise.
241 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
242 (retrieve_segment_info): Delete frch_seg initialisation.
244 2006-05-03 Alan Modra <amodra@bigpond.net.au>
246 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
247 * config/obj-elf.h (obj_sec_set_private_data): Delete.
248 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
249 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
251 2006-05-02 Joseph Myers <joseph@codesourcery.com>
253 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
255 (md_apply_fix3): Multiply offset by 4 here for
256 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
258 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
259 Jan Beulich <jbeulich@novell.com>
261 * config/tc-i386.c (output_invalid_buf): Change size for
263 * config/tc-tic30.c (output_invalid_buf): Likewise.
265 * config/tc-i386.c (output_invalid): Cast none-ascii char to
267 * config/tc-tic30.c (output_invalid): Likewise.
269 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
271 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
272 (TEXI2POD): Use AM_MAKEINFOFLAGS.
273 (asconfig.texi): Don't set top_srcdir.
274 * doc/as.texinfo: Don't use top_srcdir.
275 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
277 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
279 * config/tc-i386.c (output_invalid_buf): Change size to 16.
280 * config/tc-tic30.c (output_invalid_buf): Likewise.
282 * config/tc-i386.c (output_invalid): Use snprintf instead of
284 * config/tc-ia64.c (declare_register_set): Likewise.
285 (emit_one_bundle): Likewise.
286 (check_dependencies): Likewise.
287 * config/tc-tic30.c (output_invalid): Likewise.
289 2006-05-02 Paul Brook <paul@codesourcery.com>
291 * config/tc-arm.c (arm_optimize_expr): New function.
292 * config/tc-arm.h (md_optimize_expr): Define
293 (arm_optimize_expr): Add prototype.
294 (TC_FORCE_RELOCATION_SUB_SAME): Define.
296 2006-05-02 Ben Elliston <bje@au.ibm.com>
298 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
301 * sb.h (sb_list_vector): Move to sb.c.
302 * sb.c (free_list): Use type of sb_list_vector directly.
303 (sb_build): Fix off-by-one error in assertion about `size'.
305 2006-05-01 Ben Elliston <bje@au.ibm.com>
307 * listing.c (listing_listing): Remove useless loop.
308 * macro.c (macro_expand): Remove is_positional local variable.
309 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
310 and simplify surrounding expressions, where possible.
311 (assign_symbol): Likewise.
312 (s_weakref): Likewise.
313 * symbols.c (colon): Likewise.
315 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
317 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
319 2006-04-30 Thiemo Seufer <ths@mips.com>
320 David Ung <davidu@mips.com>
322 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
323 (mips_immed): New table that records various handling of udi
324 instruction patterns.
325 (mips_ip): Adds udi handling.
327 2006-04-28 Alan Modra <amodra@bigpond.net.au>
329 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
330 of list rather than beginning.
332 2006-04-26 Julian Brown <julian@codesourcery.com>
334 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
335 (is_quarter_float): Rename from above. Simplify slightly.
336 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
338 (parse_neon_mov): Parse floating-point constants.
339 (neon_qfloat_bits): Fix encoding.
340 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
341 preference to integer encoding when using the F32 type.
343 2006-04-26 Julian Brown <julian@codesourcery.com>
345 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
346 zero-initialising structures containing it will lead to invalid types).
347 (arm_it): Add vectype to each operand.
348 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
350 (neon_typed_alias): New structure. Extra information for typed
352 (reg_entry): Add neon type info field.
353 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
354 Break out alternative syntax for coprocessor registers, etc. into...
355 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
356 out from arm_reg_parse.
357 (parse_neon_type): Move. Return SUCCESS/FAIL.
358 (first_error): New function. Call to ensure first error which occurs is
360 (parse_neon_operand_type): Parse exactly one type.
361 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
362 (parse_typed_reg_or_scalar): New function. Handle core of both
363 arm_typed_reg_parse and parse_scalar.
364 (arm_typed_reg_parse): Parse a register with an optional type.
365 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
367 (parse_scalar): Parse a Neon scalar with optional type.
368 (parse_reg_list): Use first_error.
369 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
370 (neon_alias_types_same): New function. Return true if two (alias) types
372 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
374 (insert_reg_alias): Return new reg_entry not void.
375 (insert_neon_reg_alias): New function. Insert type/index information as
376 well as register for alias.
377 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
378 make typed register aliases accordingly.
379 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
381 (s_unreq): Delete type information if present.
382 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
383 (s_arm_unwind_save_mmxwcg): Likewise.
384 (s_arm_unwind_movsp): Likewise.
385 (s_arm_unwind_setfp): Likewise.
386 (parse_shift): Likewise.
387 (parse_shifter_operand): Likewise.
388 (parse_address): Likewise.
389 (parse_tb): Likewise.
390 (tc_arm_regname_to_dw2regnum): Likewise.
391 (md_pseudo_table): Add dn, qn.
392 (parse_neon_mov): Handle typed operands.
393 (parse_operands): Likewise.
394 (neon_type_mask): Add N_SIZ.
395 (N_ALLMODS): New macro.
396 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
397 (el_type_of_type_chk): Add some safeguards.
398 (modify_types_allowed): Fix logic bug.
399 (neon_check_type): Handle operands with types.
400 (neon_three_same): Remove redundant optional arg handling.
401 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
402 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
403 (do_neon_step): Adjust accordingly.
404 (neon_cmode_for_logic_imm): Use first_error.
405 (do_neon_bitfield): Call neon_check_type.
406 (neon_dyadic): Rename to...
407 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
408 to allow modification of type of the destination.
409 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
410 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
411 (do_neon_compare): Make destination be an untyped bitfield.
412 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
413 (neon_mul_mac): Return early in case of errors.
414 (neon_move_immediate): Use first_error.
415 (neon_mac_reg_scalar_long): Fix type to include scalar.
416 (do_neon_dup): Likewise.
417 (do_neon_mov): Likewise (in several places).
418 (do_neon_tbl_tbx): Fix type.
419 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
420 (do_neon_ld_dup): Exit early in case of errors and/or use
422 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
423 Handle .dn/.qn directives.
424 (REGDEF): Add zero for reg_entry neon field.
426 2006-04-26 Julian Brown <julian@codesourcery.com>
428 * config/tc-arm.c (limits.h): Include.
429 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
430 (fpu_vfp_v3_or_neon_ext): Declare constants.
431 (neon_el_type): New enumeration of types for Neon vector elements.
432 (neon_type_el): New struct. Define type and size of a vector element.
433 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
435 (neon_type): Define struct. The type of an instruction.
436 (arm_it): Add 'vectype' for the current instruction.
437 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
438 (vfp_sp_reg_pos): Rename to...
439 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
441 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
442 (Neon D or Q register).
443 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
445 (GE_OPT_PREFIX_BIG): Define constant, for use in...
446 (my_get_expression): Allow above constant as argument to accept
447 64-bit constants with optional prefix.
448 (arm_reg_parse): Add extra argument to return the specific type of
449 register in when either a D or Q register (REG_TYPE_NDQ) is
450 requested. Can be NULL.
451 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
452 (parse_reg_list): Update for new arm_reg_parse args.
453 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
454 (parse_neon_el_struct_list): New function. Parse element/structure
455 register lists for VLD<n>/VST<n> instructions.
456 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
457 (s_arm_unwind_save_mmxwr): Likewise.
458 (s_arm_unwind_save_mmxwcg): Likewise.
459 (s_arm_unwind_movsp): Likewise.
460 (s_arm_unwind_setfp): Likewise.
461 (parse_big_immediate): New function. Parse an immediate, which may be
462 64 bits wide. Put results in inst.operands[i].
463 (parse_shift): Update for new arm_reg_parse args.
464 (parse_address): Likewise. Add parsing of alignment specifiers.
465 (parse_neon_mov): Parse the operands of a VMOV instruction.
466 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
467 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
468 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
469 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
470 (parse_operands): Handle new codes above.
471 (encode_arm_vfp_sp_reg): Rename to...
472 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
473 selected VFP version only supports D0-D15.
474 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
475 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
476 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
477 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
478 encode_arm_vfp_reg name, and allow 32 D regs.
479 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
480 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
482 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
483 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
484 constant-load and conversion insns introduced with VFPv3.
485 (neon_tab_entry): New struct.
486 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
487 those which are the targets of pseudo-instructions.
488 (neon_opc): Enumerate opcodes, use as indices into...
489 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
490 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
491 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
492 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
494 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
496 (neon_type_mask): New. Compact type representation for type checking.
497 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
498 permitted type combinations.
499 (N_IGNORE_TYPE): New macro.
500 (neon_check_shape): New function. Check an instruction shape for
501 multiple alternatives. Return the specific shape for the current
503 (neon_modify_type_size): New function. Modify a vector type and size,
504 depending on the bit mask in argument 1.
505 (neon_type_promote): New function. Convert a given "key" type (of an
506 operand) into the correct type for a different operand, based on a bit
508 (type_chk_of_el_type): New function. Convert a type and size into the
509 compact representation used for type checking.
510 (el_type_of_type_ckh): New function. Reverse of above (only when a
511 single bit is set in the bit mask).
512 (modify_types_allowed): New function. Alter a mask of allowed types
513 based on a bit mask of modifications.
514 (neon_check_type): New function. Check the type of the current
515 instruction against the variable argument list. The "key" type of the
516 instruction is returned.
517 (neon_dp_fixup): New function. Fill in and modify instruction bits for
518 a Neon data-processing instruction depending on whether we're in ARM
519 mode or Thumb-2 mode.
520 (neon_logbits): New function.
521 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
522 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
523 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
524 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
525 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
526 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
527 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
528 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
529 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
530 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
531 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
532 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
533 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
534 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
535 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
536 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
537 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
538 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
539 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
540 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
541 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
542 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
543 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
544 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
545 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
547 (parse_neon_type): New function. Parse Neon type specifier.
548 (opcode_lookup): Allow parsing of Neon type specifiers.
549 (REGNUM2, REGSETH, REGSET2): New macros.
550 (reg_names): Add new VFPv3 and Neon registers.
551 (NUF, nUF, NCE, nCE): New macros for opcode table.
552 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
553 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
554 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
555 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
556 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
557 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
558 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
559 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
560 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
561 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
562 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
563 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
564 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
565 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
567 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
568 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
569 (arm_option_cpu_value): Add vfp3 and neon.
570 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
573 2006-04-25 Bob Wilson <bob.wilson@acm.org>
575 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
576 syntax instead of hardcoded opcodes with ".w18" suffixes.
577 (wide_branch_opcode): New.
578 (build_transition): Use it to check for wide branch opcodes with
579 either ".w18" or ".w15" suffixes.
581 2006-04-25 Bob Wilson <bob.wilson@acm.org>
583 * config/tc-xtensa.c (xtensa_create_literal_symbol,
584 xg_assemble_literal, xg_assemble_literal_space): Do not set the
585 frag's is_literal flag.
587 2006-04-25 Bob Wilson <bob.wilson@acm.org>
589 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
591 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
593 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
594 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
595 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
596 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
597 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
599 2005-04-20 Paul Brook <paul@codesourcery.com>
601 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
603 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
605 2006-04-19 Alan Modra <amodra@bigpond.net.au>
607 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
608 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
609 Make some cpus unsupported on ELF. Run "make dep-am".
610 * Makefile.in: Regenerate.
612 2006-04-19 Alan Modra <amodra@bigpond.net.au>
614 * configure.in (--enable-targets): Indent help message.
615 * configure: Regenerate.
617 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
620 * config/tc-i386.c (i386_immediate): Check illegal immediate
623 2006-04-18 Alan Modra <amodra@bigpond.net.au>
625 * config/tc-i386.c: Formatting.
626 (output_disp, output_imm): ISO C90 params.
628 * frags.c (frag_offset_fixed_p): Constify args.
629 * frags.h (frag_offset_fixed_p): Ditto.
631 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
632 (COFF_MAGIC): Delete.
634 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
636 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
638 * po/POTFILES.in: Regenerated.
640 2006-04-16 Mark Mitchell <mark@codesourcery.com>
642 * doc/as.texinfo: Mention that some .type syntaxes are not
643 supported on all architectures.
645 2006-04-14 Sterling Augustine <sterling@tensilica.com>
647 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
648 instructions when such transformations have been disabled.
650 2006-04-10 Sterling Augustine <sterling@tensilica.com>
652 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
653 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
654 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
655 decoding the loop instructions. Remove current_offset variable.
656 (xtensa_fix_short_loop_frags): Likewise.
657 (min_bytes_to_other_loop_end): Remove current_offset argument.
659 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
661 * config/tc-z80.c (z80_optimize_expr): Removed.
662 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
664 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
666 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
667 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
668 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
669 atmega644, atmega329, atmega3290, atmega649, atmega6490,
670 atmega406, atmega640, atmega1280, atmega1281, at90can32,
671 at90can64, at90usb646, at90usb647, at90usb1286 and
673 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
675 2006-04-07 Paul Brook <paul@codesourcery.com>
677 * config/tc-arm.c (parse_operands): Set default error message.
679 2006-04-07 Paul Brook <paul@codesourcery.com>
681 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
683 2006-04-07 Paul Brook <paul@codesourcery.com>
685 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
687 2006-04-07 Paul Brook <paul@codesourcery.com>
689 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
690 (move_or_literal_pool): Handle Thumb-2 instructions.
691 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
693 2006-04-07 Alan Modra <amodra@bigpond.net.au>
696 * config/tc-i386.c (match_template): Move 64-bit operand tests
699 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
701 * po/Make-in: Add install-html target.
702 * Makefile.am: Add install-html and install-html-recursive targets.
703 * Makefile.in: Regenerate.
704 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
705 * configure: Regenerate.
706 * doc/Makefile.am: Add install-html and install-html-am targets.
707 * doc/Makefile.in: Regenerate.
709 2006-04-06 Alan Modra <amodra@bigpond.net.au>
711 * frags.c (frag_offset_fixed_p): Reinitialise offset before
714 2006-04-05 Richard Sandiford <richard@codesourcery.com>
715 Daniel Jacobowitz <dan@codesourcery.com>
717 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
718 (GOTT_BASE, GOTT_INDEX): New.
719 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
720 GOTT_INDEX when generating VxWorks PIC.
721 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
722 use the generic *-*-vxworks* stanza instead.
724 2006-04-04 Alan Modra <amodra@bigpond.net.au>
727 * frags.c (frag_offset_fixed_p): New function.
728 * frags.h (frag_offset_fixed_p): Declare.
729 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
730 (resolve_expression): Likewise.
732 2006-04-03 Sterling Augustine <sterling@tensilica.com>
734 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
735 of the same length but different numbers of slots.
737 2006-03-30 Andreas Schwab <schwab@suse.de>
739 * configure.in: Fix help string for --enable-targets option.
740 * configure: Regenerate.
742 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
744 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
745 (m68k_ip): ... here. Use for all chips. Protect against buffer
746 overrun and avoid excessive copying.
748 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
749 m68020_control_regs, m68040_control_regs, m68060_control_regs,
750 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
751 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
752 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
753 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
754 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
755 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
756 mcf5282_ctrl, mcfv4e_ctrl): ... these.
757 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
758 (struct m68k_cpu): Change chip field to control_regs.
759 (current_chip): Remove.
761 (m68k_archs, m68k_extensions): Adjust.
762 (m68k_cpus): Reorder to be in cpu number order. Adjust.
763 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
764 (find_cf_chip): Reimplement for new organization of cpu table.
765 (select_control_regs): Remove.
767 (struct save_opts): Save control regs, not chip.
768 (s_save, s_restore): Adjust.
769 (m68k_lookup_cpu): Give deprecated warning when necessary.
770 (m68k_init_arch): Adjust.
771 (md_show_usage): Adjust for new cpu table organization.
773 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
775 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
776 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
777 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
779 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
780 (any_gotrel): New rule.
781 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
782 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
784 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
785 (bfin_pic_ptr): New function.
786 (md_pseudo_table): Add it for ".picptr".
787 (OPTION_FDPIC): New macro.
788 (md_longopts): Add -mfdpic.
789 (md_parse_option): Handle it.
790 (md_begin): Set BFD flags.
791 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
792 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
794 * Makefile.am (bfin-parse.o): Update dependencies.
795 (DEPTC_bfin_elf): Likewise.
796 * Makefile.in: Regenerate.
798 2006-03-25 Richard Sandiford <richard@codesourcery.com>
800 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
801 mcfemac instead of mcfmac.
803 2006-03-23 Michael Matz <matz@suse.de>
805 * config/tc-i386.c (type_names): Correct placement of 'static'.
806 (reloc): Map some more relocs to their 64 bit counterpart when
808 (output_insn): Work around breakage if DEBUG386 is defined.
809 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
810 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
811 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
814 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
816 (md_convert_frag): Jumps can now be larger than 2GB away, error
818 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
819 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
821 2006-03-22 Richard Sandiford <richard@codesourcery.com>
822 Daniel Jacobowitz <dan@codesourcery.com>
823 Phil Edwards <phil@codesourcery.com>
824 Zack Weinberg <zack@codesourcery.com>
825 Mark Mitchell <mark@codesourcery.com>
826 Nathan Sidwell <nathan@codesourcery.com>
828 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
829 (md_begin): Complain about -G being used for PIC. Don't change
830 the text, data and bss alignments on VxWorks.
831 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
832 generating VxWorks PIC.
833 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
834 (macro): Likewise, but do not treat la $25 specially for
835 VxWorks PIC, and do not handle jal.
836 (OPTION_MVXWORKS_PIC): New macro.
837 (md_longopts): Add -mvxworks-pic.
838 (md_parse_option): Don't complain about using PIC and -G together here.
839 Handle OPTION_MVXWORKS_PIC.
840 (md_estimate_size_before_relax): Always use the first relaxation
842 * config/tc-mips.h (VXWORKS_PIC): New.
844 2006-03-21 Paul Brook <paul@codesourcery.com>
846 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
848 2006-03-21 Sterling Augustine <sterling@tensilica.com>
850 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
851 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
852 (get_loop_align_size): New.
853 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
854 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
855 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
856 (get_noop_aligned_address): Use get_loop_align_size.
857 (get_aligned_diff): Likewise.
859 2006-03-21 Paul Brook <paul@codesourcery.com>
861 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
863 2006-03-20 Paul Brook <paul@codesourcery.com>
865 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
866 (do_t_branch): Encode branches inside IT blocks as unconditional.
867 (do_t_cps): New function.
868 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
869 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
870 (opcode_lookup): Allow conditional suffixes on all instructions in
872 (md_assemble): Advance condexec state before checking for errors.
873 (insns): Use do_t_cps.
875 2006-03-20 Paul Brook <paul@codesourcery.com>
877 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
880 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
882 * config/tc-vax.c: Update copyright year.
883 * config/tc-vax.h: Likewise.
885 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
887 * config/tc-vax.c (md_chars_to_number): Used only locally, so
889 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
891 2006-03-17 Paul Brook <paul@codesourcery.com>
893 * config/tc-arm.c (insns): Add ldm and stm.
895 2006-03-17 Ben Elliston <bje@au.ibm.com>
898 * doc/as.texinfo (Ident): Document this directive more thoroughly.
900 2006-03-16 Paul Brook <paul@codesourcery.com>
902 * config/tc-arm.c (insns): Add "svc".
904 2006-03-13 Bob Wilson <bob.wilson@acm.org>
906 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
907 flag and avoid double underscore prefixes.
909 2006-03-10 Paul Brook <paul@codesourcery.com>
911 * config/tc-arm.c (md_begin): Handle EABIv5.
912 (arm_eabis): Add EF_ARM_EABI_VER5.
913 * doc/c-arm.texi: Document -meabi=5.
915 2006-03-10 Ben Elliston <bje@au.ibm.com>
917 * app.c (do_scrub_chars): Simplify string handling.
919 2006-03-07 Richard Sandiford <richard@codesourcery.com>
920 Daniel Jacobowitz <dan@codesourcery.com>
921 Zack Weinberg <zack@codesourcery.com>
922 Nathan Sidwell <nathan@codesourcery.com>
923 Paul Brook <paul@codesourcery.com>
924 Ricardo Anguiano <anguiano@codesourcery.com>
925 Phil Edwards <phil@codesourcery.com>
927 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
928 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
930 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
931 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
932 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
934 2006-03-06 Bob Wilson <bob.wilson@acm.org>
936 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
937 even when using the text-section-literals option.
939 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
941 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
943 (m68k_ip): <case 'J'> Check we have some control regs.
944 (md_parse_option): Allow raw arch switch.
945 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
946 whether 68881 or cfloat was meant by -mfloat.
947 (md_show_usage): Adjust extension display.
948 (m68k_elf_final_processing): Adjust.
950 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
952 * config/tc-avr.c (avr_mod_hash_value): New function.
953 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
954 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
955 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
956 instead of int avr_ldi_expression: use avr_mod_hash_value instead
958 (tc_gen_reloc): Handle substractions of symbols, if possible do
959 fixups, abort otherwise.
960 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
961 tc_fix_adjustable): Define.
963 2006-03-02 James E Wilson <wilson@specifix.com>
965 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
966 change the template, then clear md.slot[curr].end_of_insn_group.
968 2006-02-28 Jan Beulich <jbeulich@novell.com>
970 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
972 2006-02-28 Jan Beulich <jbeulich@novell.com>
975 * macro.c (getstring): Don't treat parentheses special anymore.
976 (get_any_string): Don't consider '(' and ')' as quoting anymore.
977 Special-case '(', ')', '[', and ']' when dealing with non-quoting
980 2006-02-28 Mat <mat@csail.mit.edu>
982 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
984 2006-02-27 Jakub Jelinek <jakub@redhat.com>
986 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
988 (CFI_signal_frame): Define.
989 (cfi_pseudo_table): Add .cfi_signal_frame.
990 (dot_cfi): Handle CFI_signal_frame.
991 (output_cie): Handle cie->signal_frame.
992 (select_cie_for_fde): Don't share CIE if signal_frame flag is
993 different. Copy signal_frame from FDE to newly created CIE.
994 * doc/as.texinfo: Document .cfi_signal_frame.
996 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
998 * doc/Makefile.am: Add html target.
999 * doc/Makefile.in: Regenerate.
1000 * po/Make-in: Add html target.
1002 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1004 * config/tc-i386.c (output_insn): Support Intel Merom New
1007 * config/tc-i386.h (CpuMNI): New.
1008 (CpuUnknownFlags): Add CpuMNI.
1010 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1012 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1013 (hpriv_reg_table): New table for hyperprivileged registers.
1014 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1017 2006-02-24 DJ Delorie <dj@redhat.com>
1019 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1020 (tc_gen_reloc): Don't define.
1021 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1022 (OPTION_LINKRELAX): New.
1023 (md_longopts): Add it.
1025 (md_parse_options): Set it.
1026 (md_assemble): Emit relaxation relocs as needed.
1027 (md_convert_frag): Emit relaxation relocs as needed.
1028 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1029 (m32c_apply_fix): New.
1030 (tc_gen_reloc): New.
1031 (m32c_force_relocation): Force out jump relocs when relaxing.
1032 (m32c_fix_adjustable): Return false if relaxing.
1034 2006-02-24 Paul Brook <paul@codesourcery.com>
1036 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1037 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1038 (struct asm_barrier_opt): Define.
1039 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1040 (parse_psr): Accept V7M psr names.
1041 (parse_barrier): New function.
1042 (enum operand_parse_code): Add OP_oBARRIER.
1043 (parse_operands): Implement OP_oBARRIER.
1044 (do_barrier): New function.
1045 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1046 (do_t_cpsi): Add V7M restrictions.
1047 (do_t_mrs, do_t_msr): Validate V7M variants.
1048 (md_assemble): Check for NULL variants.
1049 (v7m_psrs, barrier_opt_names): New tables.
1050 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1051 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1052 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1053 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1054 (struct cpu_arch_ver_table): Define.
1055 (cpu_arch_ver): New.
1056 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1057 Tag_CPU_arch_profile.
1058 * doc/c-arm.texi: Document new cpu and arch options.
1060 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1062 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1064 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1066 * config/tc-ia64.c: Update copyright years.
1068 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1070 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1073 2005-02-22 Paul Brook <paul@codesourcery.com>
1075 * config/tc-arm.c (do_pld): Remove incorrect write to
1077 (encode_thumb32_addr_mode): Use correct operand.
1079 2006-02-21 Paul Brook <paul@codesourcery.com>
1081 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1083 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1084 Anil Paranjape <anilp1@kpitcummins.com>
1085 Shilin Shakti <shilins@kpitcummins.com>
1087 * Makefile.am: Add xc16x related entry.
1088 * Makefile.in: Regenerate.
1089 * configure.in: Added xc16x related entry.
1090 * configure: Regenerate.
1091 * config/tc-xc16x.h: New file
1092 * config/tc-xc16x.c: New file
1093 * doc/c-xc16x.texi: New file for xc16x
1094 * doc/all.texi: Entry for xc16x
1095 * doc/Makefile.texi: Added c-xc16x.texi
1096 * NEWS: Announce the support for the new target.
1098 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1100 * configure.tgt: set emulation for mips-*-netbsd*
1102 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1104 * config.in: Rebuilt.
1106 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1108 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1109 from 1, not 0, in error messages.
1110 (md_assemble): Simplify special-case check for ENTRY instructions.
1111 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1112 operand in error message.
1114 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1116 * configure.tgt (arm-*-linux-gnueabi*): Change to
1119 2006-02-10 Nick Clifton <nickc@redhat.com>
1121 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1122 32-bit value is propagated into the upper bits of a 64-bit long.
1124 * config/tc-arc.c (init_opcode_tables): Fix cast.
1125 (arc_extoper, md_operand): Likewise.
1127 2006-02-09 David Heine <dlheine@tensilica.com>
1129 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1130 each relaxation step.
1132 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1134 * configure.in (CHECK_DECLS): Add vsnprintf.
1135 * configure: Regenerate.
1136 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1137 include/declare here, but...
1138 * as.h: Move code detecting VARARGS idiom to the top.
1139 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1140 (vsnprintf): Declare if not already declared.
1142 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1144 * as.c (close_output_file): New.
1145 (main): Register close_output_file with xatexit before
1146 dump_statistics. Don't call output_file_close.
1148 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1150 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1151 mcf5329_control_regs): New.
1152 (not_current_architecture, selected_arch, selected_cpu): New.
1153 (m68k_archs, m68k_extensions): New.
1154 (archs): Renamed to ...
1155 (m68k_cpus): ... here. Adjust.
1157 (md_pseudo_table): Add arch and cpu directives.
1158 (find_cf_chip, m68k_ip): Adjust table scanning.
1159 (no_68851, no_68881): Remove.
1160 (md_assemble): Lazily initialize.
1161 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1162 (md_init_after_args): Move functionality to m68k_init_arch.
1163 (mri_chip): Adjust table scanning.
1164 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1165 options with saner parsing.
1166 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1167 m68k_init_arch): New.
1168 (s_m68k_cpu, s_m68k_arch): New.
1169 (md_show_usage): Adjust.
1170 (m68k_elf_final_processing): Set CF EF flags.
1171 * config/tc-m68k.h (m68k_init_after_args): Remove.
1172 (tc_init_after_args): Remove.
1173 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1174 (M68k-Directives): Document .arch and .cpu directives.
1176 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1178 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1179 synonyms for equ and defl.
1180 (z80_cons_fix_new): New function.
1181 (emit_byte): Disallow relative jumps to absolute locations.
1182 (emit_data): Only handle defb, prototype changed, because defb is
1183 now handled as pseudo-op rather than an instruction.
1184 (instab): Entries for defb,defw,db,dw moved from here...
1185 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1186 Add entries for def24,def32,d24,d32.
1187 (md_assemble): Improved error handling.
1188 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1189 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1190 (z80_cons_fix_new): Declare.
1191 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1192 (def24,d24,def32,d32): New pseudo-ops.
1194 2006-02-02 Paul Brook <paul@codesourcery.com>
1196 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1198 2005-02-02 Paul Brook <paul@codesourcery.com>
1200 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1201 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1202 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1203 T2_OPCODE_RSB): Define.
1204 (thumb32_negate_data_op): New function.
1205 (md_apply_fix): Use it.
1207 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1209 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1211 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1212 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1214 (relaxation_requirements): Add pfinish_frag argument and use it to
1215 replace setting tinsn->record_fix fields.
1216 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1217 and vinsn_to_insnbuf. Remove references to record_fix and
1218 slot_sub_symbols fields.
1219 (xtensa_mark_narrow_branches): Delete unused code.
1220 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1222 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1224 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1225 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1226 of the record_fix field. Simplify error messages for unexpected
1228 (set_expr_symbol_offset_diff): Delete.
1230 2006-01-31 Paul Brook <paul@codesourcery.com>
1232 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1234 2006-01-31 Paul Brook <paul@codesourcery.com>
1235 Richard Earnshaw <rearnsha@arm.com>
1237 * config/tc-arm.c: Use arm_feature_set.
1238 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1239 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1240 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1243 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1244 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1245 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1246 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1248 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1249 (arm_opts): Move old cpu/arch options from here...
1250 (arm_legacy_opts): ... to here.
1251 (md_parse_option): Search arm_legacy_opts.
1252 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1253 (arm_float_abis, arm_eabis): Make const.
1255 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1257 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1259 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1261 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1262 in load immediate intruction.
1264 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1266 * config/bfin-parse.y (value_match): Use correct conversion
1267 specifications in template string for __FILE__ and __LINE__.
1271 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1273 Introduce TLS descriptors for i386 and x86_64.
1274 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1275 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1276 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1277 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1278 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1280 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1281 (lex_got): Handle @tlsdesc and @tlscall.
1282 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1284 2006-01-11 Nick Clifton <nickc@redhat.com>
1286 Fixes for building on 64-bit hosts:
1287 * config/tc-avr.c (mod_index): New union to allow conversion
1288 between pointers and integers.
1289 (md_begin, avr_ldi_expression): Use it.
1290 * config/tc-i370.c (md_assemble): Add cast for argument to print
1292 * config/tc-tic54x.c (subsym_substitute): Likewise.
1293 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1294 opindex field of fr_cgen structure into a pointer so that it can
1295 be stored in a frag.
1296 * config/tc-mn10300.c (md_assemble): Likewise.
1297 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1299 * config/tc-v850.c: Replace uses of (int) casts with correct
1302 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1305 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1307 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1310 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1311 a local-label reference.
1313 For older changes see ChangeLog-2005
1319 version-control: never