1 2006-09-04 Paul Brook <paul@codesourcery.com>
3 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
4 (do_neon_dyadic_if_i_d): Avoid setting U bit.
5 (do_neon_mac_maybe_scalar): Ditto.
6 (do_neon_dyadic_narrow): Force operand type to NT_integer.
7 (insns): Remove out of date comments.
9 2006-08-29 Nick Clifton <nickc@redhat.com>
11 * read.c (s_align): Initialize the 'stopc' variable to prevent
12 compiler complaints about it being used without being
14 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
15 s_float_space, s_struct, cons_worker, equals): Likewise.
17 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
19 * ecoff.c (ecoff_directive_val): Fix message typo.
20 * config/tc-ns32k.c (convert_iif): Likewise.
21 * config/tc-sh64.c (shmedia_check_limits): Likewise.
23 2006-08-25 Sterling Augustine <sterling@tensilica.com>
24 Bob Wilson <bob.wilson@acm.org>
26 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
27 the state of the absolute_literals directive. Remove align frag at
28 the start of the literal pool position.
30 2006-08-25 Bob Wilson <bob.wilson@acm.org>
32 * doc/c-xtensa.texi: Add @group commands in examples.
34 2006-08-24 Bob Wilson <bob.wilson@acm.org>
36 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
37 (INIT_LITERAL_SECTION_NAME): Delete.
38 (lit_state struct): Remove segment names, init_lit_seg, and
39 fini_lit_seg. Add lit_prefix and current_text_seg.
40 (init_literal_head_h, init_literal_head): Delete.
41 (fini_literal_head_h, fini_literal_head): Delete.
42 (xtensa_begin_directive): Move argument parsing to
43 xtensa_literal_prefix function.
44 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
45 (xtensa_literal_prefix): Parse the directive argument here and
46 record it in the lit_prefix field. Remove code to derive literal
49 (get_is_linkonce_section): Use linkonce_len. Check for any
50 ".gnu.linkonce.*" section, not just text sections.
51 (md_begin): Remove initialization of deleted lit_state fields.
52 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
53 to init_literal_head and fini_literal_head.
54 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
55 when traversing literal_head list.
56 (match_section_group): New.
57 (cache_literal_section): Rewrite to determine the literal section
58 name on the fly, create the section and return it.
59 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
60 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
61 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
62 Use xtensa_get_property_section from bfd.
63 (retrieve_xtensa_section): Delete.
64 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
65 description to refer to plural literal sections and add xref to
66 the Literal Directive section.
67 (Literal Directive): Describe new rules for deriving literal section
68 names. Add footnote for special case of .init/.fini with
69 --text-section-literals.
70 (Literal Prefix Directive): Replace old naming rules with xref to the
71 Literal Directive section.
73 2006-08-21 Joseph Myers <joseph@codesourcery.com>
75 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
76 merging with previous long opcode.
78 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
80 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
81 * Makefile.in: Regenerate.
82 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
85 2006-08-16 Julian Brown <julian@codesourcery.com>
87 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
88 to use ARM instructions on non-ARM-supporting cores.
89 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
90 mode automatically based on cpu variant.
91 (md_begin): Call above function.
93 2006-08-16 Julian Brown <julian@codesourcery.com>
95 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
96 recognized in non-unified syntax mode.
98 2006-08-15 Thiemo Seufer <ths@mips.com>
99 Nigel Stephens <nigel@mips.com>
100 David Ung <davidu@mips.com>
102 * configure.tgt: Handle mips*-sde-elf*.
104 2006-08-12 Thiemo Seufer <ths@networkno.de>
106 * config/tc-mips.c (mips16_ip): Fix argument register handling
107 for restore instruction.
109 2006-08-08 Bob Wilson <bob.wilson@acm.org>
111 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
113 (out_fixed_inc_line_addr): New.
114 (process_entries): Use out_fixed_inc_line_addr when
115 DWARF2_USE_FIXED_ADVANCE_PC is set.
116 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
118 2006-08-08 DJ Delorie <dj@redhat.com>
120 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
121 vs full symbols so that we never have more than one pointer value
122 for any given symbol in our symbol table.
124 2006-08-08 Sterling Augustine <sterling@tensilica.com>
126 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
127 and emit DW_AT_ranges when code in compilation unit is not
129 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
131 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
132 (out_debug_ranges): New function to emit .debug_ranges section
133 when code is not contiguous.
135 2006-08-08 Nick Clifton <nickc@redhat.com>
137 * config/tc-arm.c (WARN_DEPRECATED): Enable.
139 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
141 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
143 (pe_directive_secrel) [TE_PE]: New function.
144 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
145 loc, loc_mark_labels.
146 [TE_PE]: Handle secrel32.
147 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
149 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
150 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
151 (md_section_align): Only round section sizes here for AOUT
153 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
154 (tc_pe_dwarf2_emit_offset): New function.
155 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
156 (cons_fix_new_arm): Handle O_secrel.
157 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
158 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
159 of OBJ_ELF only block.
160 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
161 tc_pe_dwarf2_emit_offset.
163 2006-08-04 Richard Sandiford <richard@codesourcery.com>
165 * config/tc-sh.c (apply_full_field_fix): New function.
166 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
167 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
168 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
169 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
171 2006-08-03 Nick Clifton <nickc@redhat.com>
174 * config.in: Regenerate.
176 2006-08-03 Joseph Myers <joseph@codesourcery.com>
178 * config/tc-arm.c (parse_operands): Handle invalid register name
181 2006-08-03 Joseph Myers <joseph@codesourcery.com>
183 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
184 (parse_operands): Handle it.
185 (insns): Use it for tmcr and tmrc.
187 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
190 * config/tc-i386.c (md_parse_option): Treat any target starting
191 with elf64_x86_64 as a viable target for the -64 switch.
192 (i386_target_format): For 64-bit ELF flavoured output use
194 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
196 2006-08-02 Nick Clifton <nickc@redhat.com>
199 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
201 * configure.in: Run BFD_BINARY_FOPEN.
202 * configure: Regenerate.
203 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
206 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
208 * config/tc-i386.c (md_assemble): Don't update
211 2006-08-01 Thiemo Seufer <ths@mips.com>
213 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
215 2006-08-01 Thiemo Seufer <ths@mips.com>
217 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
218 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
219 BFD_RELOC_32 and BFD_RELOC_16.
220 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
221 md_convert_frag, md_obj_end): Fix comment formatting.
223 2006-07-31 Thiemo Seufer <ths@mips.com>
225 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
226 handling for BFD_RELOC_MIPS16_JMP.
228 2006-07-24 Andreas Schwab <schwab@suse.de>
231 * read.c (read_a_source_file): Ignore unknown text after line
232 comment character. Fix misleading comment.
234 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
236 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
237 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
238 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
239 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
240 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
241 doc/c-z80.texi, doc/internals.texi: Fix some typos.
243 2006-07-21 Nick Clifton <nickc@redhat.com>
245 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
248 2006-07-20 Thiemo Seufer <ths@mips.com>
249 Nigel Stephens <nigel@mips.com>
251 * config/tc-mips.c (md_parse_option): Don't infer optimisation
252 options from debug options.
254 2006-07-20 Thiemo Seufer <ths@mips.com>
256 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
257 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
259 2006-07-19 Paul Brook <paul@codesourcery.com>
261 * config/tc-arm.c (insns): Fix rbit Arm opcode.
263 2006-07-18 Paul Brook <paul@codesourcery.com>
265 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
266 (md_convert_frag): Use correct reloc for add_pc. Use
267 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
268 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
269 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
271 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
273 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
274 when file and line unknown.
276 2006-07-17 Thiemo Seufer <ths@mips.com>
278 * read.c (s_struct): Use IS_ELF.
279 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
280 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
281 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
282 s_mips_mask): Likewise.
284 2006-07-16 Thiemo Seufer <ths@mips.com>
285 David Ung <davidu@mips.com>
287 * read.c (s_struct): Handle ELF section changing.
288 * config/tc-mips.c (s_align): Leave enabling auto-align to the
290 (s_change_sec): Try section changing only if we output ELF.
292 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
294 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
296 (smallest_imm_type): Remove Cpu086.
297 (i386_target_format): Likewise.
299 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
302 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
303 Michael Meissner <michael.meissner@amd.com>
305 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
306 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
307 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
309 (i386_align_code): Ditto.
310 (md_assemble_code): Add support for insertq/extrq instructions,
311 swapping as needed for intel syntax.
312 (swap_imm_operands): New function to swap immediate operands.
313 (swap_operands): Deal with 4 operand instructions.
314 (build_modrm_byte): Add support for insertq instruction.
316 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
318 * config/tc-i386.h (Size64): Fix a typo in comment.
320 2006-07-12 Nick Clifton <nickc@redhat.com>
322 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
323 fixup_segment() to repeat a range check on a value that has
324 already been checked here.
326 2006-07-07 James E Wilson <wilson@specifix.com>
328 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
330 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
331 Nick Clifton <nickc@redhat.com>
334 * doc/as.texi: Fix spelling typo: branchs => branches.
335 * doc/c-m68hc11.texi: Likewise.
336 * config/tc-m68hc11.c: Likewise.
337 Support old spelling of command line switch for backwards
340 2006-07-04 Thiemo Seufer <ths@mips.com>
341 David Ung <davidu@mips.com>
343 * config/tc-mips.c (s_is_linkonce): New function.
344 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
345 weak, external, and linkonce symbols.
346 (pic_need_relax): Use s_is_linkonce.
348 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
350 * doc/as.texinfo (Org): Remove space.
351 (P2align): Add "@var{abs-expr},".
353 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
355 * config/tc-i386.c (cpu_arch_tune_set): New.
356 (cpu_arch_isa): Likewise.
357 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
358 nops with short or long nop sequences based on -march=/.arch
360 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
361 set cpu_arch_tune and cpu_arch_tune_flags.
362 (md_parse_option): For -march=, set cpu_arch_isa and set
363 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
364 0. Set cpu_arch_tune_set to 1 for -mtune=.
365 (i386_target_format): Don't set cpu_arch_tune.
367 2006-06-23 Nigel Stephens <nigel@mips.com>
369 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
370 generated .sbss.* and .gnu.linkonce.sb.*.
372 2006-06-23 Thiemo Seufer <ths@mips.com>
373 David Ung <davidu@mips.com>
375 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
377 * config/tc-mips.c (label_list): Define per-segment label_list.
378 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
379 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
380 mips_from_file_after_relocs, mips_define_label): Use per-segment
383 2006-06-22 Thiemo Seufer <ths@mips.com>
385 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
386 (append_insn): Use it.
387 (md_apply_fix): Whitespace formatting.
388 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
389 mips16_extended_frag): Remove register specifier.
390 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
393 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
395 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
396 a directive saving VFP registers for ARMv6 or later.
397 (s_arm_unwind_save): Add parameter arch_v6 and call
398 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
400 (md_pseudo_table): Add entry for new "vsave" directive.
401 * doc/c-arm.texi: Correct error in example for "save"
402 directive (fstmdf -> fstmdx). Also document "vsave" directive.
404 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
405 Anatoly Sokolov <aesok@post.ru>
407 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
408 and atmega644p devices. Rename atmega164/atmega324 devices to
409 atmega164p/atmega324p.
410 * doc/c-avr.texi: Document new mcu and arch options.
412 2006-06-17 Nick Clifton <nickc@redhat.com>
414 * config/tc-arm.c (enum parse_operand_result): Move outside of
415 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
417 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
419 * config/tc-i386.h (processor_type): New.
420 (arch_entry): Add type.
422 * config/tc-i386.c (cpu_arch_tune): New.
423 (cpu_arch_tune_flags): Likewise.
424 (cpu_arch_isa_flags): Likewise.
426 (set_cpu_arch): Also update cpu_arch_isa_flags.
427 (md_assemble): Update cpu_arch_isa_flags.
429 (OPTION_MTUNE): Likewise.
430 (md_longopts): Add -march= and -mtune=.
431 (md_parse_option): Support -march= and -mtune=.
432 (md_show_usage): Add -march=CPU/-mtune=CPU.
433 (i386_target_format): Also update cpu_arch_isa_flags,
434 cpu_arch_tune and cpu_arch_tune_flags.
436 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
438 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
440 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
442 * config/tc-arm.c (enum parse_operand_result): New.
443 (struct group_reloc_table_entry): New.
444 (enum group_reloc_type): New.
445 (group_reloc_table): New array.
446 (find_group_reloc_table_entry): New function.
447 (parse_shifter_operand_group_reloc): New function.
448 (parse_address_main): New function, incorporating code
449 from the old parse_address function. To be used via...
450 (parse_address): wrapper for parse_address_main; and
451 (parse_address_group_reloc): new function, likewise.
452 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
453 OP_ADDRGLDRS, OP_ADDRGLDC.
454 (parse_operands): Support for these new operand codes.
455 New macro po_misc_or_fail_no_backtrack.
456 (encode_arm_cp_address): Preserve group relocations.
457 (insns): Modify to use the above operand codes where group
458 relocations are permitted.
459 (md_apply_fix): Handle the group relocations
460 ALU_PC_G0_NC through LDC_SB_G2.
461 (tc_gen_reloc): Likewise.
462 (arm_force_relocation): Leave group relocations for the linker.
463 (arm_fix_adjustable): Likewise.
465 2006-06-15 Julian Brown <julian@codesourcery.com>
467 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
468 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
471 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
473 * config/tc-i386.c (process_suffix): Don't add rex64 for
476 2006-06-09 Thiemo Seufer <ths@mips.com>
478 * config/tc-mips.c (mips_ip): Maintain argument count.
480 2006-06-09 Alan Modra <amodra@bigpond.net.au>
482 * config/tc-iq2000.c: Include sb.h.
484 2006-06-08 Nigel Stephens <nigel@mips.com>
486 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
487 aliases for better compatibility with SGI tools.
489 2006-06-08 Alan Modra <amodra@bigpond.net.au>
491 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
492 * Makefile.am (GASLIBS): Expand @BFDLIB@.
494 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
495 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
496 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
498 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
499 * Makefile.in: Regenerate.
500 * doc/Makefile.in: Regenerate.
501 * configure: Regenerate.
503 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
505 * po/Make-in (pdf, ps): New dummy targets.
507 2006-06-07 Julian Brown <julian@codesourcery.com>
509 * config/tc-arm.c (stdarg.h): include.
510 (arm_it): Add uncond_value field. Add isvec and issingle to operand
512 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
513 REG_TYPE_NSDQ (single, double or quad vector reg).
514 (reg_expected_msgs): Update.
515 (BAD_FPU): Add macro for unsupported FPU instruction error.
516 (parse_neon_type): Support 'd' as an alias for .f64.
517 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
519 (parse_vfp_reg_list): Don't update first arg on error.
520 (parse_neon_mov): Support extra syntax for VFP moves.
521 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
522 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
523 (parse_operands): Support isvec, issingle operands fields, new parse
525 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
527 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
528 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
529 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
530 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
532 (neon_shape): Redefine in terms of above.
533 (neon_shape_class): New enumeration, table of shape classes.
534 (neon_shape_el): New enumeration. One element of a shape.
535 (neon_shape_el_size): Register widths of above, where appropriate.
536 (neon_shape_info): New struct. Info for shape table.
537 (neon_shape_tab): New array.
538 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
539 (neon_check_shape): Rewrite as...
540 (neon_select_shape): New function to classify instruction shapes,
541 driven by new table neon_shape_tab array.
542 (neon_quad): New function. Return 1 if shape should set Q flag in
543 instructions (or equivalent), 0 otherwise.
544 (type_chk_of_el_type): Support F64.
545 (el_type_of_type_chk): Likewise.
546 (neon_check_type): Add support for VFP type checking (VFP data
547 elements fill their containing registers).
548 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
549 in thumb mode for VFP instructions.
550 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
551 and encode the current instruction as if it were that opcode.
552 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
553 arguments, call function in PFN.
554 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
555 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
556 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
557 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
558 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
559 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
560 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
561 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
562 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
563 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
564 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
565 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
566 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
567 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
568 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
570 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
571 between VFP and Neon turns out to belong to Neon. Perform
572 architecture check and fill in condition field if appropriate.
573 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
574 (do_neon_cvt): Add support for VFP variants of instructions.
575 (neon_cvt_flavour): Extend to cover VFP conversions.
576 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
578 (do_neon_ldr_str): Handle single-precision VFP load/store.
579 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
580 NS_NULL not NS_IGNORE.
581 (opcode_tag): Add OT_csuffixF for operands which either take a
582 conditional suffix, or have 0xF in the condition field.
583 (md_assemble): Add support for OT_csuffixF.
584 (NCE): Replace macro with...
585 (NCE_tag, NCE, NCEF): New macros.
586 (nCE): Replace macro with...
587 (nCE_tag, nCE, nCEF): New macros.
588 (insns): Add support for VFP insns or VFP versions of insns msr,
589 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
590 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
591 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
592 VFP/Neon insns together.
594 2006-06-07 Alan Modra <amodra@bigpond.net.au>
595 Ladislav Michl <ladis@linux-mips.org>
597 * app.c: Don't include headers already included by as.h.
599 * atof-generic.c: Likewise.
601 * dwarf2dbg.c: Likewise.
603 * input-file.c: Likewise.
604 * input-scrub.c: Likewise.
606 * output-file.c: Likewise.
609 * config/bfin-lex.l: Likewise.
610 * config/obj-coff.h: Likewise.
611 * config/obj-elf.h: Likewise.
612 * config/obj-som.h: Likewise.
613 * config/tc-arc.c: Likewise.
614 * config/tc-arm.c: Likewise.
615 * config/tc-avr.c: Likewise.
616 * config/tc-bfin.c: Likewise.
617 * config/tc-cris.c: Likewise.
618 * config/tc-d10v.c: Likewise.
619 * config/tc-d30v.c: Likewise.
620 * config/tc-dlx.h: Likewise.
621 * config/tc-fr30.c: Likewise.
622 * config/tc-frv.c: Likewise.
623 * config/tc-h8300.c: Likewise.
624 * config/tc-hppa.c: Likewise.
625 * config/tc-i370.c: Likewise.
626 * config/tc-i860.c: Likewise.
627 * config/tc-i960.c: Likewise.
628 * config/tc-ip2k.c: Likewise.
629 * config/tc-iq2000.c: Likewise.
630 * config/tc-m32c.c: Likewise.
631 * config/tc-m32r.c: Likewise.
632 * config/tc-maxq.c: Likewise.
633 * config/tc-mcore.c: Likewise.
634 * config/tc-mips.c: Likewise.
635 * config/tc-mmix.c: Likewise.
636 * config/tc-mn10200.c: Likewise.
637 * config/tc-mn10300.c: Likewise.
638 * config/tc-msp430.c: Likewise.
639 * config/tc-mt.c: Likewise.
640 * config/tc-ns32k.c: Likewise.
641 * config/tc-openrisc.c: Likewise.
642 * config/tc-ppc.c: Likewise.
643 * config/tc-s390.c: Likewise.
644 * config/tc-sh.c: Likewise.
645 * config/tc-sh64.c: Likewise.
646 * config/tc-sparc.c: Likewise.
647 * config/tc-tic30.c: Likewise.
648 * config/tc-tic4x.c: Likewise.
649 * config/tc-tic54x.c: Likewise.
650 * config/tc-v850.c: Likewise.
651 * config/tc-vax.c: Likewise.
652 * config/tc-xc16x.c: Likewise.
653 * config/tc-xstormy16.c: Likewise.
654 * config/tc-xtensa.c: Likewise.
655 * config/tc-z80.c: Likewise.
656 * config/tc-z8k.c: Likewise.
657 * macro.h: Don't include sb.h or ansidecl.h.
658 * sb.h: Don't include stdio.h or ansidecl.h.
659 * cond.c: Include sb.h.
660 * itbl-lex.l: Include as.h instead of other system headers.
661 * itbl-parse.y: Likewise.
662 * itbl-ops.c: Similarly.
663 * itbl-ops.h: Don't include as.h or ansidecl.h.
664 * config/bfin-defs.h: Don't include bfd.h or as.h.
665 * config/bfin-parse.y: Include as.h instead of other system headers.
667 2006-06-06 Ben Elliston <bje@au.ibm.com>
668 Anton Blanchard <anton@samba.org>
670 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
671 (md_show_usage): Document it.
672 (ppc_setup_opcodes): Test power6 opcode flag bits.
673 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
675 2006-06-06 Thiemo Seufer <ths@mips.com>
676 Chao-ying Fu <fu@mips.com>
678 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
679 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
680 (macro_build): Update comment.
681 (mips_ip): Allow DSP64 instructions for MIPS64R2.
682 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
684 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
685 MIPS_CPU_ASE_MDMX flags for sb1.
687 2006-06-05 Thiemo Seufer <ths@mips.com>
689 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
691 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
692 (mips_ip): Make overflowed/underflowed constant arguments in DSP
693 and MT instructions a fatal error. Use INSERT_OPERAND where
694 appropriate. Improve warnings for break and wait code overflows.
695 Use symbolic constant of OP_MASK_COPZ.
696 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
698 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
700 * po/Make-in (top_builddir): Define.
702 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
704 * doc/Makefile.am (TEXI2DVI): Define.
705 * doc/Makefile.in: Regenerate.
706 * doc/c-arc.texi: Fix typo.
708 2006-06-01 Alan Modra <amodra@bigpond.net.au>
710 * config/obj-ieee.c: Delete.
711 * config/obj-ieee.h: Delete.
712 * Makefile.am (OBJ_FORMATS): Remove ieee.
713 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
714 (obj-ieee.o): Remove rule.
715 * Makefile.in: Regenerate.
716 * configure.in (atof): Remove tahoe.
717 (OBJ_MAYBE_IEEE): Don't define.
718 * configure: Regenerate.
719 * config.in: Regenerate.
720 * doc/Makefile.in: Regenerate.
721 * po/POTFILES.in: Regenerate.
723 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
725 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
726 and LIBINTL_DEP everywhere.
728 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
729 * acinclude.m4: Include new gettext macros.
730 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
731 Remove local code for po/Makefile.
732 * Makefile.in, configure, doc/Makefile.in: Regenerated.
734 2006-05-30 Nick Clifton <nickc@redhat.com>
736 * po/es.po: Updated Spanish translation.
738 2006-05-06 Denis Chertykov <denisc@overta.ru>
740 * doc/c-avr.texi: New file.
741 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
742 * doc/all.texi: Set AVR
743 * doc/as.texinfo: Include c-avr.texi
745 2006-05-28 Jie Zhang <jie.zhang@analog.com>
747 * config/bfin-parse.y (check_macfunc): Loose the condition of
748 calling check_multiply_halfregs ().
750 2006-05-25 Jie Zhang <jie.zhang@analog.com>
752 * config/bfin-parse.y (asm_1): Better check and deal with
753 vector and scalar Multiply 16-Bit Operands instructions.
755 2006-05-24 Nick Clifton <nickc@redhat.com>
757 * config/tc-hppa.c: Convert to ISO C90 format.
758 * config/tc-hppa.h: Likewise.
760 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
761 Randolph Chung <randolph@tausq.org>
763 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
764 is_tls_ieoff, is_tls_leoff): Define.
765 (fix_new_hppa): Handle TLS.
766 (cons_fix_new_hppa): Likewise.
768 (md_apply_fix): Handle TLS relocs.
769 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
771 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
773 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
775 2006-05-23 Thiemo Seufer <ths@mips.com>
776 David Ung <davidu@mips.com>
777 Nigel Stephens <nigel@mips.com>
780 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
781 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
782 ISA_HAS_MXHC1): New macros.
783 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
784 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
785 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
786 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
787 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
788 (mips_after_parse_args): Change default handling of float register
789 size to account for 32bit code with 64bit FP. Better sanity checking
790 of ISA/ASE/ABI option combinations.
791 (s_mipsset): Support switching of GPR and FPR sizes via
792 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
794 (mips_elf_final_processing): We should record the use of 64bit FP
795 registers in 32bit code but we don't, because ELF header flags are
797 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
798 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
799 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
800 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
801 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
802 missing -march options. Document .set arch=CPU. Move .set smartmips
803 to ASE page. Use @code for .set FOO examples.
805 2006-05-23 Jie Zhang <jie.zhang@analog.com>
807 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
810 2006-05-23 Jie Zhang <jie.zhang@analog.com>
812 * config/bfin-defs.h (bfin_equals): Remove declaration.
813 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
814 * config/tc-bfin.c (bfin_name_is_register): Remove.
815 (bfin_equals): Remove.
816 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
817 (bfin_name_is_register): Remove declaration.
819 2006-05-19 Thiemo Seufer <ths@mips.com>
820 Nigel Stephens <nigel@mips.com>
822 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
823 (mips_oddfpreg_ok): New function.
826 2006-05-19 Thiemo Seufer <ths@mips.com>
827 David Ung <davidu@mips.com>
829 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
830 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
831 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
832 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
833 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
834 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
835 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
836 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
837 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
838 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
839 reg_names_o32, reg_names_n32n64): Define register classes.
840 (reg_lookup): New function, use register classes.
841 (md_begin): Reserve register names in the symbol table. Simplify
843 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
845 (mips16_ip): Use reg_lookup.
846 (tc_get_register): Likewise.
847 (tc_mips_regname_to_dw2regnum): New function.
849 2006-05-19 Thiemo Seufer <ths@mips.com>
851 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
852 Un-constify string argument.
853 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
855 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
857 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
859 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
861 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
863 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
866 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
868 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
869 cfloat/m68881 to correct architecture before using it.
871 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
873 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
876 2006-05-15 Paul Brook <paul@codesourcery.com>
878 * config/tc-arm.c (arm_adjust_symtab): Use
879 bfd_is_arm_special_symbol_name.
881 2006-05-15 Bob Wilson <bob.wilson@acm.org>
883 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
884 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
885 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
886 Handle errors from calls to xtensa_opcode_is_* functions.
888 2006-05-14 Thiemo Seufer <ths@mips.com>
890 * config/tc-mips.c (macro_build): Test for currently active
892 (mips16_ip): Reject invalid opcodes.
894 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
896 * doc/as.texinfo: Rename "Index" to "AS Index",
897 and "ABORT" to "ABORT (COFF)".
899 2006-05-11 Paul Brook <paul@codesourcery.com>
901 * config/tc-arm.c (parse_half): New function.
902 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
903 (parse_operands): Ditto.
904 (do_mov16): Reject invalid relocations.
905 (do_t_mov16): Ditto. Use Thumb reloc numbers.
906 (insns): Replace Iffff with HALF.
907 (md_apply_fix): Add MOVW and MOVT relocs.
908 (tc_gen_reloc): Ditto.
909 * doc/c-arm.texi: Document relocation operators
911 2006-05-11 Paul Brook <paul@codesourcery.com>
913 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
915 2006-05-11 Thiemo Seufer <ths@mips.com>
917 * config/tc-mips.c (append_insn): Don't check the range of j or
920 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
922 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
923 relocs against external symbols for WinCE targets.
924 (md_apply_fix): Likewise.
926 2006-05-09 David Ung <davidu@mips.com>
928 * config/tc-mips.c (append_insn): Only warn about an out-of-range
931 2006-05-09 Nick Clifton <nickc@redhat.com>
933 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
934 against symbols which are not going to be placed into the symbol
937 2006-05-09 Ben Elliston <bje@au.ibm.com>
939 * expr.c (operand): Remove `if (0 && ..)' statement and
940 subsequently unused target_op label. Collapse `if (1 || ..)'
942 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
943 separately above the switch.
945 2006-05-08 Nick Clifton <nickc@redhat.com>
948 * config/tc-msp430.c (line_separator_character): Define as |.
950 2006-05-08 Thiemo Seufer <ths@mips.com>
951 Nigel Stephens <nigel@mips.com>
952 David Ung <davidu@mips.com>
954 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
955 (mips_opts): Likewise.
956 (file_ase_smartmips): New variable.
957 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
958 (macro_build): Handle SmartMIPS instructions.
960 (md_longopts): Add argument handling for smartmips.
961 (md_parse_options, mips_after_parse_args): Likewise.
962 (s_mipsset): Add .set smartmips support.
963 (md_show_usage): Document -msmartmips/-mno-smartmips.
964 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
966 * doc/c-mips.texi: Likewise.
968 2006-05-08 Alan Modra <amodra@bigpond.net.au>
970 * write.c (relax_segment): Add pass count arg. Don't error on
971 negative org/space on first two passes.
972 (relax_seg_info): New struct.
973 (relax_seg, write_object_file): Adjust.
974 * write.h (relax_segment): Update prototype.
976 2006-05-05 Julian Brown <julian@codesourcery.com>
978 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
980 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
981 architecture version checks.
982 (insns): Allow overlapping instructions to be used in VFP mode.
984 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
987 * config/obj-elf.c (obj_elf_change_section): Allow user
988 specified SHF_ALPHA_GPREL.
990 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
992 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
993 for PMEM related expressions.
995 2006-05-05 Nick Clifton <nickc@redhat.com>
998 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
999 insertion of a directory separator character into a string at a
1000 given offset. Uses heuristics to decide when to use a backslash
1001 character rather than a forward-slash character.
1002 (dwarf2_directive_loc): Use the macro.
1003 (out_debug_info): Likewise.
1005 2006-05-05 Thiemo Seufer <ths@mips.com>
1006 David Ung <davidu@mips.com>
1008 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1010 (macro): Add new case M_CACHE_AB.
1012 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1014 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1015 (opcode_lookup): Issue a warning for opcode with
1016 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1017 identical to OT_cinfix3.
1018 (TxC3w, TC3w, tC3w): New.
1019 (insns): Use tC3w and TC3w for comparison instructions with
1022 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1024 * subsegs.h (struct frchain): Delete frch_seg.
1025 (frchain_root): Delete.
1026 (seg_info): Define as macro.
1027 * subsegs.c (frchain_root): Delete.
1028 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1029 (subsegs_begin, subseg_change): Adjust for above.
1030 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1031 rather than to one big list.
1032 (subseg_get): Don't special case abs, und sections.
1033 (subseg_new, subseg_force_new): Don't set frchainP here.
1035 (subsegs_print_statistics): Adjust frag chain control list traversal.
1036 * debug.c (dmp_frags): Likewise.
1037 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1038 at frchain_root. Make use of known frchain ordering.
1039 (last_frag_for_seg): Likewise.
1040 (get_frag_fix): Likewise. Add seg param.
1041 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1042 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1043 (SUB_SEGMENT_ALIGN): Likewise.
1044 (subsegs_finish): Adjust frchain list traversal.
1045 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1046 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1047 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1048 (xtensa_fix_b_j_loop_end_frags): Likewise.
1049 (xtensa_fix_close_loop_end_frags): Likewise.
1050 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1051 (retrieve_segment_info): Delete frch_seg initialisation.
1053 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1055 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1056 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1057 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1058 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1060 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1062 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1064 (md_apply_fix3): Multiply offset by 4 here for
1065 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1067 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1068 Jan Beulich <jbeulich@novell.com>
1070 * config/tc-i386.c (output_invalid_buf): Change size for
1072 * config/tc-tic30.c (output_invalid_buf): Likewise.
1074 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1076 * config/tc-tic30.c (output_invalid): Likewise.
1078 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1080 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1081 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1082 (asconfig.texi): Don't set top_srcdir.
1083 * doc/as.texinfo: Don't use top_srcdir.
1084 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1086 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1088 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1089 * config/tc-tic30.c (output_invalid_buf): Likewise.
1091 * config/tc-i386.c (output_invalid): Use snprintf instead of
1093 * config/tc-ia64.c (declare_register_set): Likewise.
1094 (emit_one_bundle): Likewise.
1095 (check_dependencies): Likewise.
1096 * config/tc-tic30.c (output_invalid): Likewise.
1098 2006-05-02 Paul Brook <paul@codesourcery.com>
1100 * config/tc-arm.c (arm_optimize_expr): New function.
1101 * config/tc-arm.h (md_optimize_expr): Define
1102 (arm_optimize_expr): Add prototype.
1103 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1105 2006-05-02 Ben Elliston <bje@au.ibm.com>
1107 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1110 * sb.h (sb_list_vector): Move to sb.c.
1111 * sb.c (free_list): Use type of sb_list_vector directly.
1112 (sb_build): Fix off-by-one error in assertion about `size'.
1114 2006-05-01 Ben Elliston <bje@au.ibm.com>
1116 * listing.c (listing_listing): Remove useless loop.
1117 * macro.c (macro_expand): Remove is_positional local variable.
1118 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1119 and simplify surrounding expressions, where possible.
1120 (assign_symbol): Likewise.
1121 (s_weakref): Likewise.
1122 * symbols.c (colon): Likewise.
1124 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1126 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1128 2006-04-30 Thiemo Seufer <ths@mips.com>
1129 David Ung <davidu@mips.com>
1131 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1132 (mips_immed): New table that records various handling of udi
1133 instruction patterns.
1134 (mips_ip): Adds udi handling.
1136 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1138 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1139 of list rather than beginning.
1141 2006-04-26 Julian Brown <julian@codesourcery.com>
1143 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1144 (is_quarter_float): Rename from above. Simplify slightly.
1145 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1147 (parse_neon_mov): Parse floating-point constants.
1148 (neon_qfloat_bits): Fix encoding.
1149 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1150 preference to integer encoding when using the F32 type.
1152 2006-04-26 Julian Brown <julian@codesourcery.com>
1154 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1155 zero-initialising structures containing it will lead to invalid types).
1156 (arm_it): Add vectype to each operand.
1157 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1159 (neon_typed_alias): New structure. Extra information for typed
1161 (reg_entry): Add neon type info field.
1162 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1163 Break out alternative syntax for coprocessor registers, etc. into...
1164 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1165 out from arm_reg_parse.
1166 (parse_neon_type): Move. Return SUCCESS/FAIL.
1167 (first_error): New function. Call to ensure first error which occurs is
1169 (parse_neon_operand_type): Parse exactly one type.
1170 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1171 (parse_typed_reg_or_scalar): New function. Handle core of both
1172 arm_typed_reg_parse and parse_scalar.
1173 (arm_typed_reg_parse): Parse a register with an optional type.
1174 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1176 (parse_scalar): Parse a Neon scalar with optional type.
1177 (parse_reg_list): Use first_error.
1178 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1179 (neon_alias_types_same): New function. Return true if two (alias) types
1181 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1183 (insert_reg_alias): Return new reg_entry not void.
1184 (insert_neon_reg_alias): New function. Insert type/index information as
1185 well as register for alias.
1186 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1187 make typed register aliases accordingly.
1188 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1190 (s_unreq): Delete type information if present.
1191 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1192 (s_arm_unwind_save_mmxwcg): Likewise.
1193 (s_arm_unwind_movsp): Likewise.
1194 (s_arm_unwind_setfp): Likewise.
1195 (parse_shift): Likewise.
1196 (parse_shifter_operand): Likewise.
1197 (parse_address): Likewise.
1198 (parse_tb): Likewise.
1199 (tc_arm_regname_to_dw2regnum): Likewise.
1200 (md_pseudo_table): Add dn, qn.
1201 (parse_neon_mov): Handle typed operands.
1202 (parse_operands): Likewise.
1203 (neon_type_mask): Add N_SIZ.
1204 (N_ALLMODS): New macro.
1205 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1206 (el_type_of_type_chk): Add some safeguards.
1207 (modify_types_allowed): Fix logic bug.
1208 (neon_check_type): Handle operands with types.
1209 (neon_three_same): Remove redundant optional arg handling.
1210 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1211 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1212 (do_neon_step): Adjust accordingly.
1213 (neon_cmode_for_logic_imm): Use first_error.
1214 (do_neon_bitfield): Call neon_check_type.
1215 (neon_dyadic): Rename to...
1216 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1217 to allow modification of type of the destination.
1218 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1219 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1220 (do_neon_compare): Make destination be an untyped bitfield.
1221 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1222 (neon_mul_mac): Return early in case of errors.
1223 (neon_move_immediate): Use first_error.
1224 (neon_mac_reg_scalar_long): Fix type to include scalar.
1225 (do_neon_dup): Likewise.
1226 (do_neon_mov): Likewise (in several places).
1227 (do_neon_tbl_tbx): Fix type.
1228 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1229 (do_neon_ld_dup): Exit early in case of errors and/or use
1231 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1232 Handle .dn/.qn directives.
1233 (REGDEF): Add zero for reg_entry neon field.
1235 2006-04-26 Julian Brown <julian@codesourcery.com>
1237 * config/tc-arm.c (limits.h): Include.
1238 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1239 (fpu_vfp_v3_or_neon_ext): Declare constants.
1240 (neon_el_type): New enumeration of types for Neon vector elements.
1241 (neon_type_el): New struct. Define type and size of a vector element.
1242 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1244 (neon_type): Define struct. The type of an instruction.
1245 (arm_it): Add 'vectype' for the current instruction.
1246 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1247 (vfp_sp_reg_pos): Rename to...
1248 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1250 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1251 (Neon D or Q register).
1252 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1254 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1255 (my_get_expression): Allow above constant as argument to accept
1256 64-bit constants with optional prefix.
1257 (arm_reg_parse): Add extra argument to return the specific type of
1258 register in when either a D or Q register (REG_TYPE_NDQ) is
1259 requested. Can be NULL.
1260 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1261 (parse_reg_list): Update for new arm_reg_parse args.
1262 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1263 (parse_neon_el_struct_list): New function. Parse element/structure
1264 register lists for VLD<n>/VST<n> instructions.
1265 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1266 (s_arm_unwind_save_mmxwr): Likewise.
1267 (s_arm_unwind_save_mmxwcg): Likewise.
1268 (s_arm_unwind_movsp): Likewise.
1269 (s_arm_unwind_setfp): Likewise.
1270 (parse_big_immediate): New function. Parse an immediate, which may be
1271 64 bits wide. Put results in inst.operands[i].
1272 (parse_shift): Update for new arm_reg_parse args.
1273 (parse_address): Likewise. Add parsing of alignment specifiers.
1274 (parse_neon_mov): Parse the operands of a VMOV instruction.
1275 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1276 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1277 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1278 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1279 (parse_operands): Handle new codes above.
1280 (encode_arm_vfp_sp_reg): Rename to...
1281 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1282 selected VFP version only supports D0-D15.
1283 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1284 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1285 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1286 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1287 encode_arm_vfp_reg name, and allow 32 D regs.
1288 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1289 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1291 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1292 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1293 constant-load and conversion insns introduced with VFPv3.
1294 (neon_tab_entry): New struct.
1295 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1296 those which are the targets of pseudo-instructions.
1297 (neon_opc): Enumerate opcodes, use as indices into...
1298 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1299 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1300 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1301 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1303 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1305 (neon_type_mask): New. Compact type representation for type checking.
1306 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1307 permitted type combinations.
1308 (N_IGNORE_TYPE): New macro.
1309 (neon_check_shape): New function. Check an instruction shape for
1310 multiple alternatives. Return the specific shape for the current
1312 (neon_modify_type_size): New function. Modify a vector type and size,
1313 depending on the bit mask in argument 1.
1314 (neon_type_promote): New function. Convert a given "key" type (of an
1315 operand) into the correct type for a different operand, based on a bit
1317 (type_chk_of_el_type): New function. Convert a type and size into the
1318 compact representation used for type checking.
1319 (el_type_of_type_ckh): New function. Reverse of above (only when a
1320 single bit is set in the bit mask).
1321 (modify_types_allowed): New function. Alter a mask of allowed types
1322 based on a bit mask of modifications.
1323 (neon_check_type): New function. Check the type of the current
1324 instruction against the variable argument list. The "key" type of the
1325 instruction is returned.
1326 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1327 a Neon data-processing instruction depending on whether we're in ARM
1328 mode or Thumb-2 mode.
1329 (neon_logbits): New function.
1330 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1331 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1332 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1333 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1334 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1335 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1336 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1337 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1338 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1339 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1340 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1341 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1342 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1343 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1344 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1345 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1346 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1347 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1348 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1349 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1350 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1351 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1352 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1353 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1354 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1356 (parse_neon_type): New function. Parse Neon type specifier.
1357 (opcode_lookup): Allow parsing of Neon type specifiers.
1358 (REGNUM2, REGSETH, REGSET2): New macros.
1359 (reg_names): Add new VFPv3 and Neon registers.
1360 (NUF, nUF, NCE, nCE): New macros for opcode table.
1361 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1362 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1363 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1364 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1365 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1366 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1367 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1368 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1369 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1370 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1371 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1372 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1373 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1374 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1376 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1377 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1378 (arm_option_cpu_value): Add vfp3 and neon.
1379 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1382 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1384 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1385 syntax instead of hardcoded opcodes with ".w18" suffixes.
1386 (wide_branch_opcode): New.
1387 (build_transition): Use it to check for wide branch opcodes with
1388 either ".w18" or ".w15" suffixes.
1390 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1392 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1393 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1394 frag's is_literal flag.
1396 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1398 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1400 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1402 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1403 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1404 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1405 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1406 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1408 2005-04-20 Paul Brook <paul@codesourcery.com>
1410 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1412 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1414 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1416 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1417 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1418 Make some cpus unsupported on ELF. Run "make dep-am".
1419 * Makefile.in: Regenerate.
1421 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1423 * configure.in (--enable-targets): Indent help message.
1424 * configure: Regenerate.
1426 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1429 * config/tc-i386.c (i386_immediate): Check illegal immediate
1432 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1434 * config/tc-i386.c: Formatting.
1435 (output_disp, output_imm): ISO C90 params.
1437 * frags.c (frag_offset_fixed_p): Constify args.
1438 * frags.h (frag_offset_fixed_p): Ditto.
1440 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1441 (COFF_MAGIC): Delete.
1443 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1445 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1447 * po/POTFILES.in: Regenerated.
1449 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1451 * doc/as.texinfo: Mention that some .type syntaxes are not
1452 supported on all architectures.
1454 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1456 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1457 instructions when such transformations have been disabled.
1459 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1461 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1462 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1463 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1464 decoding the loop instructions. Remove current_offset variable.
1465 (xtensa_fix_short_loop_frags): Likewise.
1466 (min_bytes_to_other_loop_end): Remove current_offset argument.
1468 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1470 * config/tc-z80.c (z80_optimize_expr): Removed.
1471 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1473 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1475 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1476 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1477 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1478 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1479 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1480 at90can64, at90usb646, at90usb647, at90usb1286 and
1482 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1484 2006-04-07 Paul Brook <paul@codesourcery.com>
1486 * config/tc-arm.c (parse_operands): Set default error message.
1488 2006-04-07 Paul Brook <paul@codesourcery.com>
1490 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1492 2006-04-07 Paul Brook <paul@codesourcery.com>
1494 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1496 2006-04-07 Paul Brook <paul@codesourcery.com>
1498 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1499 (move_or_literal_pool): Handle Thumb-2 instructions.
1500 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1502 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1505 * config/tc-i386.c (match_template): Move 64-bit operand tests
1508 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1510 * po/Make-in: Add install-html target.
1511 * Makefile.am: Add install-html and install-html-recursive targets.
1512 * Makefile.in: Regenerate.
1513 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1514 * configure: Regenerate.
1515 * doc/Makefile.am: Add install-html and install-html-am targets.
1516 * doc/Makefile.in: Regenerate.
1518 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1520 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1523 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1524 Daniel Jacobowitz <dan@codesourcery.com>
1526 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1527 (GOTT_BASE, GOTT_INDEX): New.
1528 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1529 GOTT_INDEX when generating VxWorks PIC.
1530 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1531 use the generic *-*-vxworks* stanza instead.
1533 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1536 * frags.c (frag_offset_fixed_p): New function.
1537 * frags.h (frag_offset_fixed_p): Declare.
1538 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1539 (resolve_expression): Likewise.
1541 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1543 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1544 of the same length but different numbers of slots.
1546 2006-03-30 Andreas Schwab <schwab@suse.de>
1548 * configure.in: Fix help string for --enable-targets option.
1549 * configure: Regenerate.
1551 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1553 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1554 (m68k_ip): ... here. Use for all chips. Protect against buffer
1555 overrun and avoid excessive copying.
1557 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1558 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1559 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1560 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1561 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1562 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1563 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1564 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1565 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1566 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1567 (struct m68k_cpu): Change chip field to control_regs.
1568 (current_chip): Remove.
1569 (control_regs): New.
1570 (m68k_archs, m68k_extensions): Adjust.
1571 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1572 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1573 (find_cf_chip): Reimplement for new organization of cpu table.
1574 (select_control_regs): Remove.
1576 (struct save_opts): Save control regs, not chip.
1577 (s_save, s_restore): Adjust.
1578 (m68k_lookup_cpu): Give deprecated warning when necessary.
1579 (m68k_init_arch): Adjust.
1580 (md_show_usage): Adjust for new cpu table organization.
1582 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1584 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1585 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1586 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1588 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1589 (any_gotrel): New rule.
1590 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1591 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1593 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1594 (bfin_pic_ptr): New function.
1595 (md_pseudo_table): Add it for ".picptr".
1596 (OPTION_FDPIC): New macro.
1597 (md_longopts): Add -mfdpic.
1598 (md_parse_option): Handle it.
1599 (md_begin): Set BFD flags.
1600 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1601 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1603 * Makefile.am (bfin-parse.o): Update dependencies.
1604 (DEPTC_bfin_elf): Likewise.
1605 * Makefile.in: Regenerate.
1607 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1609 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1610 mcfemac instead of mcfmac.
1612 2006-03-23 Michael Matz <matz@suse.de>
1614 * config/tc-i386.c (type_names): Correct placement of 'static'.
1615 (reloc): Map some more relocs to their 64 bit counterpart when
1617 (output_insn): Work around breakage if DEBUG386 is defined.
1618 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1619 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1620 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1621 different from i386.
1622 (output_imm): Ditto.
1623 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1625 (md_convert_frag): Jumps can now be larger than 2GB away, error
1627 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1628 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1630 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1631 Daniel Jacobowitz <dan@codesourcery.com>
1632 Phil Edwards <phil@codesourcery.com>
1633 Zack Weinberg <zack@codesourcery.com>
1634 Mark Mitchell <mark@codesourcery.com>
1635 Nathan Sidwell <nathan@codesourcery.com>
1637 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1638 (md_begin): Complain about -G being used for PIC. Don't change
1639 the text, data and bss alignments on VxWorks.
1640 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1641 generating VxWorks PIC.
1642 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1643 (macro): Likewise, but do not treat la $25 specially for
1644 VxWorks PIC, and do not handle jal.
1645 (OPTION_MVXWORKS_PIC): New macro.
1646 (md_longopts): Add -mvxworks-pic.
1647 (md_parse_option): Don't complain about using PIC and -G together here.
1648 Handle OPTION_MVXWORKS_PIC.
1649 (md_estimate_size_before_relax): Always use the first relaxation
1650 sequence on VxWorks.
1651 * config/tc-mips.h (VXWORKS_PIC): New.
1653 2006-03-21 Paul Brook <paul@codesourcery.com>
1655 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1657 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1659 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1660 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1661 (get_loop_align_size): New.
1662 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1663 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1664 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1665 (get_noop_aligned_address): Use get_loop_align_size.
1666 (get_aligned_diff): Likewise.
1668 2006-03-21 Paul Brook <paul@codesourcery.com>
1670 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1672 2006-03-20 Paul Brook <paul@codesourcery.com>
1674 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1675 (do_t_branch): Encode branches inside IT blocks as unconditional.
1676 (do_t_cps): New function.
1677 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1678 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1679 (opcode_lookup): Allow conditional suffixes on all instructions in
1681 (md_assemble): Advance condexec state before checking for errors.
1682 (insns): Use do_t_cps.
1684 2006-03-20 Paul Brook <paul@codesourcery.com>
1686 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1687 outputting the insn.
1689 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1691 * config/tc-vax.c: Update copyright year.
1692 * config/tc-vax.h: Likewise.
1694 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1696 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1698 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1700 2006-03-17 Paul Brook <paul@codesourcery.com>
1702 * config/tc-arm.c (insns): Add ldm and stm.
1704 2006-03-17 Ben Elliston <bje@au.ibm.com>
1707 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1709 2006-03-16 Paul Brook <paul@codesourcery.com>
1711 * config/tc-arm.c (insns): Add "svc".
1713 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1715 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1716 flag and avoid double underscore prefixes.
1718 2006-03-10 Paul Brook <paul@codesourcery.com>
1720 * config/tc-arm.c (md_begin): Handle EABIv5.
1721 (arm_eabis): Add EF_ARM_EABI_VER5.
1722 * doc/c-arm.texi: Document -meabi=5.
1724 2006-03-10 Ben Elliston <bje@au.ibm.com>
1726 * app.c (do_scrub_chars): Simplify string handling.
1728 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1729 Daniel Jacobowitz <dan@codesourcery.com>
1730 Zack Weinberg <zack@codesourcery.com>
1731 Nathan Sidwell <nathan@codesourcery.com>
1732 Paul Brook <paul@codesourcery.com>
1733 Ricardo Anguiano <anguiano@codesourcery.com>
1734 Phil Edwards <phil@codesourcery.com>
1736 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1737 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1739 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1740 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1741 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1743 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1745 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1746 even when using the text-section-literals option.
1748 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1750 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1752 (m68k_ip): <case 'J'> Check we have some control regs.
1753 (md_parse_option): Allow raw arch switch.
1754 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1755 whether 68881 or cfloat was meant by -mfloat.
1756 (md_show_usage): Adjust extension display.
1757 (m68k_elf_final_processing): Adjust.
1759 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1761 * config/tc-avr.c (avr_mod_hash_value): New function.
1762 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1763 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1764 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1765 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1767 (tc_gen_reloc): Handle substractions of symbols, if possible do
1768 fixups, abort otherwise.
1769 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1770 tc_fix_adjustable): Define.
1772 2006-03-02 James E Wilson <wilson@specifix.com>
1774 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1775 change the template, then clear md.slot[curr].end_of_insn_group.
1777 2006-02-28 Jan Beulich <jbeulich@novell.com>
1779 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1781 2006-02-28 Jan Beulich <jbeulich@novell.com>
1784 * macro.c (getstring): Don't treat parentheses special anymore.
1785 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1786 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1789 2006-02-28 Mat <mat@csail.mit.edu>
1791 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1793 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1795 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1797 (CFI_signal_frame): Define.
1798 (cfi_pseudo_table): Add .cfi_signal_frame.
1799 (dot_cfi): Handle CFI_signal_frame.
1800 (output_cie): Handle cie->signal_frame.
1801 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1802 different. Copy signal_frame from FDE to newly created CIE.
1803 * doc/as.texinfo: Document .cfi_signal_frame.
1805 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1807 * doc/Makefile.am: Add html target.
1808 * doc/Makefile.in: Regenerate.
1809 * po/Make-in: Add html target.
1811 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1813 * config/tc-i386.c (output_insn): Support Intel Merom New
1816 * config/tc-i386.h (CpuMNI): New.
1817 (CpuUnknownFlags): Add CpuMNI.
1819 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1821 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1822 (hpriv_reg_table): New table for hyperprivileged registers.
1823 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1826 2006-02-24 DJ Delorie <dj@redhat.com>
1828 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1829 (tc_gen_reloc): Don't define.
1830 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1831 (OPTION_LINKRELAX): New.
1832 (md_longopts): Add it.
1834 (md_parse_options): Set it.
1835 (md_assemble): Emit relaxation relocs as needed.
1836 (md_convert_frag): Emit relaxation relocs as needed.
1837 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1838 (m32c_apply_fix): New.
1839 (tc_gen_reloc): New.
1840 (m32c_force_relocation): Force out jump relocs when relaxing.
1841 (m32c_fix_adjustable): Return false if relaxing.
1843 2006-02-24 Paul Brook <paul@codesourcery.com>
1845 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1846 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1847 (struct asm_barrier_opt): Define.
1848 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1849 (parse_psr): Accept V7M psr names.
1850 (parse_barrier): New function.
1851 (enum operand_parse_code): Add OP_oBARRIER.
1852 (parse_operands): Implement OP_oBARRIER.
1853 (do_barrier): New function.
1854 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1855 (do_t_cpsi): Add V7M restrictions.
1856 (do_t_mrs, do_t_msr): Validate V7M variants.
1857 (md_assemble): Check for NULL variants.
1858 (v7m_psrs, barrier_opt_names): New tables.
1859 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1860 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1861 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1862 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1863 (struct cpu_arch_ver_table): Define.
1864 (cpu_arch_ver): New.
1865 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1866 Tag_CPU_arch_profile.
1867 * doc/c-arm.texi: Document new cpu and arch options.
1869 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1871 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1873 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1875 * config/tc-ia64.c: Update copyright years.
1877 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1879 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1882 2005-02-22 Paul Brook <paul@codesourcery.com>
1884 * config/tc-arm.c (do_pld): Remove incorrect write to
1886 (encode_thumb32_addr_mode): Use correct operand.
1888 2006-02-21 Paul Brook <paul@codesourcery.com>
1890 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1892 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1893 Anil Paranjape <anilp1@kpitcummins.com>
1894 Shilin Shakti <shilins@kpitcummins.com>
1896 * Makefile.am: Add xc16x related entry.
1897 * Makefile.in: Regenerate.
1898 * configure.in: Added xc16x related entry.
1899 * configure: Regenerate.
1900 * config/tc-xc16x.h: New file
1901 * config/tc-xc16x.c: New file
1902 * doc/c-xc16x.texi: New file for xc16x
1903 * doc/all.texi: Entry for xc16x
1904 * doc/Makefile.texi: Added c-xc16x.texi
1905 * NEWS: Announce the support for the new target.
1907 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1909 * configure.tgt: set emulation for mips-*-netbsd*
1911 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1913 * config.in: Rebuilt.
1915 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1917 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1918 from 1, not 0, in error messages.
1919 (md_assemble): Simplify special-case check for ENTRY instructions.
1920 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1921 operand in error message.
1923 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1925 * configure.tgt (arm-*-linux-gnueabi*): Change to
1928 2006-02-10 Nick Clifton <nickc@redhat.com>
1930 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1931 32-bit value is propagated into the upper bits of a 64-bit long.
1933 * config/tc-arc.c (init_opcode_tables): Fix cast.
1934 (arc_extoper, md_operand): Likewise.
1936 2006-02-09 David Heine <dlheine@tensilica.com>
1938 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1939 each relaxation step.
1941 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1943 * configure.in (CHECK_DECLS): Add vsnprintf.
1944 * configure: Regenerate.
1945 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1946 include/declare here, but...
1947 * as.h: Move code detecting VARARGS idiom to the top.
1948 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1949 (vsnprintf): Declare if not already declared.
1951 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1953 * as.c (close_output_file): New.
1954 (main): Register close_output_file with xatexit before
1955 dump_statistics. Don't call output_file_close.
1957 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1959 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1960 mcf5329_control_regs): New.
1961 (not_current_architecture, selected_arch, selected_cpu): New.
1962 (m68k_archs, m68k_extensions): New.
1963 (archs): Renamed to ...
1964 (m68k_cpus): ... here. Adjust.
1966 (md_pseudo_table): Add arch and cpu directives.
1967 (find_cf_chip, m68k_ip): Adjust table scanning.
1968 (no_68851, no_68881): Remove.
1969 (md_assemble): Lazily initialize.
1970 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1971 (md_init_after_args): Move functionality to m68k_init_arch.
1972 (mri_chip): Adjust table scanning.
1973 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1974 options with saner parsing.
1975 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1976 m68k_init_arch): New.
1977 (s_m68k_cpu, s_m68k_arch): New.
1978 (md_show_usage): Adjust.
1979 (m68k_elf_final_processing): Set CF EF flags.
1980 * config/tc-m68k.h (m68k_init_after_args): Remove.
1981 (tc_init_after_args): Remove.
1982 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1983 (M68k-Directives): Document .arch and .cpu directives.
1985 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1987 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1988 synonyms for equ and defl.
1989 (z80_cons_fix_new): New function.
1990 (emit_byte): Disallow relative jumps to absolute locations.
1991 (emit_data): Only handle defb, prototype changed, because defb is
1992 now handled as pseudo-op rather than an instruction.
1993 (instab): Entries for defb,defw,db,dw moved from here...
1994 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1995 Add entries for def24,def32,d24,d32.
1996 (md_assemble): Improved error handling.
1997 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1998 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1999 (z80_cons_fix_new): Declare.
2000 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2001 (def24,d24,def32,d32): New pseudo-ops.
2003 2006-02-02 Paul Brook <paul@codesourcery.com>
2005 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2007 2005-02-02 Paul Brook <paul@codesourcery.com>
2009 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2010 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2011 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2012 T2_OPCODE_RSB): Define.
2013 (thumb32_negate_data_op): New function.
2014 (md_apply_fix): Use it.
2016 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2018 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2020 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2021 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2023 (relaxation_requirements): Add pfinish_frag argument and use it to
2024 replace setting tinsn->record_fix fields.
2025 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2026 and vinsn_to_insnbuf. Remove references to record_fix and
2027 slot_sub_symbols fields.
2028 (xtensa_mark_narrow_branches): Delete unused code.
2029 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2031 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2033 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2034 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2035 of the record_fix field. Simplify error messages for unexpected
2037 (set_expr_symbol_offset_diff): Delete.
2039 2006-01-31 Paul Brook <paul@codesourcery.com>
2041 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2043 2006-01-31 Paul Brook <paul@codesourcery.com>
2044 Richard Earnshaw <rearnsha@arm.com>
2046 * config/tc-arm.c: Use arm_feature_set.
2047 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2048 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2049 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2052 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2053 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2054 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2055 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2057 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2058 (arm_opts): Move old cpu/arch options from here...
2059 (arm_legacy_opts): ... to here.
2060 (md_parse_option): Search arm_legacy_opts.
2061 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2062 (arm_float_abis, arm_eabis): Make const.
2064 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2066 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2068 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2070 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2071 in load immediate intruction.
2073 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2075 * config/bfin-parse.y (value_match): Use correct conversion
2076 specifications in template string for __FILE__ and __LINE__.
2080 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2082 Introduce TLS descriptors for i386 and x86_64.
2083 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2084 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2085 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2086 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2087 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2089 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2090 (lex_got): Handle @tlsdesc and @tlscall.
2091 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2093 2006-01-11 Nick Clifton <nickc@redhat.com>
2095 Fixes for building on 64-bit hosts:
2096 * config/tc-avr.c (mod_index): New union to allow conversion
2097 between pointers and integers.
2098 (md_begin, avr_ldi_expression): Use it.
2099 * config/tc-i370.c (md_assemble): Add cast for argument to print
2101 * config/tc-tic54x.c (subsym_substitute): Likewise.
2102 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2103 opindex field of fr_cgen structure into a pointer so that it can
2104 be stored in a frag.
2105 * config/tc-mn10300.c (md_assemble): Likewise.
2106 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2108 * config/tc-v850.c: Replace uses of (int) casts with correct
2111 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2114 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2116 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2119 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2120 a local-label reference.
2122 For older changes see ChangeLog-2005
2128 version-control: never