1 2006-08-15 Thiemo Seufer <ths@mips.com>
2 Nigel Stephens <nigel@mips.com>
3 David Ung <davidu@mips.com>
5 * configure.tgt: Handle mips*-sde-elf*.
7 2006-08-12 Thiemo Seufer <ths@networkno.de>
9 * config/tc-mips.c (mips16_ip): Fix argument register handling
10 for restore instruction.
12 2006-08-08 Bob Wilson <bob.wilson@acm.org>
14 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
16 (out_fixed_inc_line_addr): New.
17 (process_entries): Use out_fixed_inc_line_addr when
18 DWARF2_USE_FIXED_ADVANCE_PC is set.
19 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
21 2006-08-08 DJ Delorie <dj@redhat.com>
23 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
24 vs full symbols so that we never have more than one pointer value
25 for any given symbol in our symbol table.
27 2006-08-08 Sterling Augustine <sterling@tensilica.com>
29 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
30 and emit DW_AT_ranges when code in compilation unit is not
32 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
34 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
35 (out_debug_ranges): New function to emit .debug_ranges section
36 when code is not contiguous.
38 2006-08-08 Nick Clifton <nickc@redhat.com>
40 * config/tc-arm.c (WARN_DEPRECATED): Enable.
42 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
44 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
46 (pe_directive_secrel) [TE_PE]: New function.
47 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
49 [TE_PE]: Handle secrel32.
50 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
52 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
53 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
54 (md_section_align): Only round section sizes here for AOUT
56 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
57 (tc_pe_dwarf2_emit_offset): New function.
58 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
59 (cons_fix_new_arm): Handle O_secrel.
60 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
61 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
62 of OBJ_ELF only block.
63 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
64 tc_pe_dwarf2_emit_offset.
66 2006-08-04 Richard Sandiford <richard@codesourcery.com>
68 * config/tc-sh.c (apply_full_field_fix): New function.
69 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
70 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
71 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
72 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
74 2006-08-03 Nick Clifton <nickc@redhat.com>
77 * config.in: Regenerate.
79 2006-08-03 Joseph Myers <joseph@codesourcery.com>
81 * config/tc-arm.c (parse_operands): Handle invalid register name
84 2006-08-03 Joseph Myers <joseph@codesourcery.com>
86 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
87 (parse_operands): Handle it.
88 (insns): Use it for tmcr and tmrc.
90 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
93 * config/tc-i386.c (md_parse_option): Treat any target starting
94 with elf64_x86_64 as a viable target for the -64 switch.
95 (i386_target_format): For 64-bit ELF flavoured output use
97 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
99 2006-08-02 Nick Clifton <nickc@redhat.com>
102 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
104 * configure.in: Run BFD_BINARY_FOPEN.
105 * configure: Regenerate.
106 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
109 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
111 * config/tc-i386.c (md_assemble): Don't update
114 2006-08-01 Thiemo Seufer <ths@mips.com>
116 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
118 2006-08-01 Thiemo Seufer <ths@mips.com>
120 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
121 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
122 BFD_RELOC_32 and BFD_RELOC_16.
123 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
124 md_convert_frag, md_obj_end): Fix comment formatting.
126 2006-07-31 Thiemo Seufer <ths@mips.com>
128 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
129 handling for BFD_RELOC_MIPS16_JMP.
131 2006-07-24 Andreas Schwab <schwab@suse.de>
134 * read.c (read_a_source_file): Ignore unknown text after line
135 comment character. Fix misleading comment.
137 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
139 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
140 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
141 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
142 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
143 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
144 doc/c-z80.texi, doc/internals.texi: Fix some typos.
146 2006-07-21 Nick Clifton <nickc@redhat.com>
148 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
151 2006-07-20 Thiemo Seufer <ths@mips.com>
152 Nigel Stephens <nigel@mips.com>
154 * config/tc-mips.c (md_parse_option): Don't infer optimisation
155 options from debug options.
157 2006-07-20 Thiemo Seufer <ths@mips.com>
159 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
160 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
162 2006-07-19 Paul Brook <paul@codesourcery.com>
164 * config/tc-arm.c (insns): Fix rbit Arm opcode.
166 2006-07-18 Paul Brook <paul@codesourcery.com>
168 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
169 (md_convert_frag): Use correct reloc for add_pc. Use
170 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
171 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
172 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
174 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
176 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
177 when file and line unknown.
179 2006-07-17 Thiemo Seufer <ths@mips.com>
181 * read.c (s_struct): Use IS_ELF.
182 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
183 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
184 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
185 s_mips_mask): Likewise.
187 2006-07-16 Thiemo Seufer <ths@mips.com>
188 David Ung <davidu@mips.com>
190 * read.c (s_struct): Handle ELF section changing.
191 * config/tc-mips.c (s_align): Leave enabling auto-align to the
193 (s_change_sec): Try section changing only if we output ELF.
195 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
197 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
199 (smallest_imm_type): Remove Cpu086.
200 (i386_target_format): Likewise.
202 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
205 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
206 Michael Meissner <michael.meissner@amd.com>
208 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
209 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
210 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
212 (i386_align_code): Ditto.
213 (md_assemble_code): Add support for insertq/extrq instructions,
214 swapping as needed for intel syntax.
215 (swap_imm_operands): New function to swap immediate operands.
216 (swap_operands): Deal with 4 operand instructions.
217 (build_modrm_byte): Add support for insertq instruction.
219 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
221 * config/tc-i386.h (Size64): Fix a typo in comment.
223 2006-07-12 Nick Clifton <nickc@redhat.com>
225 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
226 fixup_segment() to repeat a range check on a value that has
227 already been checked here.
229 2006-07-07 James E Wilson <wilson@specifix.com>
231 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
233 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
234 Nick Clifton <nickc@redhat.com>
237 * doc/as.texi: Fix spelling typo: branchs => branches.
238 * doc/c-m68hc11.texi: Likewise.
239 * config/tc-m68hc11.c: Likewise.
240 Support old spelling of command line switch for backwards
243 2006-07-04 Thiemo Seufer <ths@mips.com>
244 David Ung <davidu@mips.com>
246 * config/tc-mips.c (s_is_linkonce): New function.
247 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
248 weak, external, and linkonce symbols.
249 (pic_need_relax): Use s_is_linkonce.
251 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
253 * doc/as.texinfo (Org): Remove space.
254 (P2align): Add "@var{abs-expr},".
256 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
258 * config/tc-i386.c (cpu_arch_tune_set): New.
259 (cpu_arch_isa): Likewise.
260 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
261 nops with short or long nop sequences based on -march=/.arch
263 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
264 set cpu_arch_tune and cpu_arch_tune_flags.
265 (md_parse_option): For -march=, set cpu_arch_isa and set
266 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
267 0. Set cpu_arch_tune_set to 1 for -mtune=.
268 (i386_target_format): Don't set cpu_arch_tune.
270 2006-06-23 Nigel Stephens <nigel@mips.com>
272 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
273 generated .sbss.* and .gnu.linkonce.sb.*.
275 2006-06-23 Thiemo Seufer <ths@mips.com>
276 David Ung <davidu@mips.com>
278 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
280 * config/tc-mips.c (label_list): Define per-segment label_list.
281 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
282 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
283 mips_from_file_after_relocs, mips_define_label): Use per-segment
286 2006-06-22 Thiemo Seufer <ths@mips.com>
288 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
289 (append_insn): Use it.
290 (md_apply_fix): Whitespace formatting.
291 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
292 mips16_extended_frag): Remove register specifier.
293 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
296 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
298 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
299 a directive saving VFP registers for ARMv6 or later.
300 (s_arm_unwind_save): Add parameter arch_v6 and call
301 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
303 (md_pseudo_table): Add entry for new "vsave" directive.
304 * doc/c-arm.texi: Correct error in example for "save"
305 directive (fstmdf -> fstmdx). Also document "vsave" directive.
307 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
308 Anatoly Sokolov <aesok@post.ru>
310 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
311 and atmega644p devices. Rename atmega164/atmega324 devices to
312 atmega164p/atmega324p.
313 * doc/c-avr.texi: Document new mcu and arch options.
315 2006-06-17 Nick Clifton <nickc@redhat.com>
317 * config/tc-arm.c (enum parse_operand_result): Move outside of
318 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
320 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
322 * config/tc-i386.h (processor_type): New.
323 (arch_entry): Add type.
325 * config/tc-i386.c (cpu_arch_tune): New.
326 (cpu_arch_tune_flags): Likewise.
327 (cpu_arch_isa_flags): Likewise.
329 (set_cpu_arch): Also update cpu_arch_isa_flags.
330 (md_assemble): Update cpu_arch_isa_flags.
332 (OPTION_MTUNE): Likewise.
333 (md_longopts): Add -march= and -mtune=.
334 (md_parse_option): Support -march= and -mtune=.
335 (md_show_usage): Add -march=CPU/-mtune=CPU.
336 (i386_target_format): Also update cpu_arch_isa_flags,
337 cpu_arch_tune and cpu_arch_tune_flags.
339 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
341 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
343 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
345 * config/tc-arm.c (enum parse_operand_result): New.
346 (struct group_reloc_table_entry): New.
347 (enum group_reloc_type): New.
348 (group_reloc_table): New array.
349 (find_group_reloc_table_entry): New function.
350 (parse_shifter_operand_group_reloc): New function.
351 (parse_address_main): New function, incorporating code
352 from the old parse_address function. To be used via...
353 (parse_address): wrapper for parse_address_main; and
354 (parse_address_group_reloc): new function, likewise.
355 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
356 OP_ADDRGLDRS, OP_ADDRGLDC.
357 (parse_operands): Support for these new operand codes.
358 New macro po_misc_or_fail_no_backtrack.
359 (encode_arm_cp_address): Preserve group relocations.
360 (insns): Modify to use the above operand codes where group
361 relocations are permitted.
362 (md_apply_fix): Handle the group relocations
363 ALU_PC_G0_NC through LDC_SB_G2.
364 (tc_gen_reloc): Likewise.
365 (arm_force_relocation): Leave group relocations for the linker.
366 (arm_fix_adjustable): Likewise.
368 2006-06-15 Julian Brown <julian@codesourcery.com>
370 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
371 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
374 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
376 * config/tc-i386.c (process_suffix): Don't add rex64 for
379 2006-06-09 Thiemo Seufer <ths@mips.com>
381 * config/tc-mips.c (mips_ip): Maintain argument count.
383 2006-06-09 Alan Modra <amodra@bigpond.net.au>
385 * config/tc-iq2000.c: Include sb.h.
387 2006-06-08 Nigel Stephens <nigel@mips.com>
389 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
390 aliases for better compatibility with SGI tools.
392 2006-06-08 Alan Modra <amodra@bigpond.net.au>
394 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
395 * Makefile.am (GASLIBS): Expand @BFDLIB@.
397 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
398 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
399 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
401 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
402 * Makefile.in: Regenerate.
403 * doc/Makefile.in: Regenerate.
404 * configure: Regenerate.
406 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
408 * po/Make-in (pdf, ps): New dummy targets.
410 2006-06-07 Julian Brown <julian@codesourcery.com>
412 * config/tc-arm.c (stdarg.h): include.
413 (arm_it): Add uncond_value field. Add isvec and issingle to operand
415 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
416 REG_TYPE_NSDQ (single, double or quad vector reg).
417 (reg_expected_msgs): Update.
418 (BAD_FPU): Add macro for unsupported FPU instruction error.
419 (parse_neon_type): Support 'd' as an alias for .f64.
420 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
422 (parse_vfp_reg_list): Don't update first arg on error.
423 (parse_neon_mov): Support extra syntax for VFP moves.
424 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
425 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
426 (parse_operands): Support isvec, issingle operands fields, new parse
428 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
430 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
431 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
432 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
433 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
435 (neon_shape): Redefine in terms of above.
436 (neon_shape_class): New enumeration, table of shape classes.
437 (neon_shape_el): New enumeration. One element of a shape.
438 (neon_shape_el_size): Register widths of above, where appropriate.
439 (neon_shape_info): New struct. Info for shape table.
440 (neon_shape_tab): New array.
441 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
442 (neon_check_shape): Rewrite as...
443 (neon_select_shape): New function to classify instruction shapes,
444 driven by new table neon_shape_tab array.
445 (neon_quad): New function. Return 1 if shape should set Q flag in
446 instructions (or equivalent), 0 otherwise.
447 (type_chk_of_el_type): Support F64.
448 (el_type_of_type_chk): Likewise.
449 (neon_check_type): Add support for VFP type checking (VFP data
450 elements fill their containing registers).
451 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
452 in thumb mode for VFP instructions.
453 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
454 and encode the current instruction as if it were that opcode.
455 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
456 arguments, call function in PFN.
457 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
458 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
459 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
460 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
461 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
462 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
463 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
464 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
465 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
466 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
467 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
468 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
469 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
470 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
471 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
473 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
474 between VFP and Neon turns out to belong to Neon. Perform
475 architecture check and fill in condition field if appropriate.
476 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
477 (do_neon_cvt): Add support for VFP variants of instructions.
478 (neon_cvt_flavour): Extend to cover VFP conversions.
479 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
481 (do_neon_ldr_str): Handle single-precision VFP load/store.
482 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
483 NS_NULL not NS_IGNORE.
484 (opcode_tag): Add OT_csuffixF for operands which either take a
485 conditional suffix, or have 0xF in the condition field.
486 (md_assemble): Add support for OT_csuffixF.
487 (NCE): Replace macro with...
488 (NCE_tag, NCE, NCEF): New macros.
489 (nCE): Replace macro with...
490 (nCE_tag, nCE, nCEF): New macros.
491 (insns): Add support for VFP insns or VFP versions of insns msr,
492 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
493 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
494 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
495 VFP/Neon insns together.
497 2006-06-07 Alan Modra <amodra@bigpond.net.au>
498 Ladislav Michl <ladis@linux-mips.org>
500 * app.c: Don't include headers already included by as.h.
502 * atof-generic.c: Likewise.
504 * dwarf2dbg.c: Likewise.
506 * input-file.c: Likewise.
507 * input-scrub.c: Likewise.
509 * output-file.c: Likewise.
512 * config/bfin-lex.l: Likewise.
513 * config/obj-coff.h: Likewise.
514 * config/obj-elf.h: Likewise.
515 * config/obj-som.h: Likewise.
516 * config/tc-arc.c: Likewise.
517 * config/tc-arm.c: Likewise.
518 * config/tc-avr.c: Likewise.
519 * config/tc-bfin.c: Likewise.
520 * config/tc-cris.c: Likewise.
521 * config/tc-d10v.c: Likewise.
522 * config/tc-d30v.c: Likewise.
523 * config/tc-dlx.h: Likewise.
524 * config/tc-fr30.c: Likewise.
525 * config/tc-frv.c: Likewise.
526 * config/tc-h8300.c: Likewise.
527 * config/tc-hppa.c: Likewise.
528 * config/tc-i370.c: Likewise.
529 * config/tc-i860.c: Likewise.
530 * config/tc-i960.c: Likewise.
531 * config/tc-ip2k.c: Likewise.
532 * config/tc-iq2000.c: Likewise.
533 * config/tc-m32c.c: Likewise.
534 * config/tc-m32r.c: Likewise.
535 * config/tc-maxq.c: Likewise.
536 * config/tc-mcore.c: Likewise.
537 * config/tc-mips.c: Likewise.
538 * config/tc-mmix.c: Likewise.
539 * config/tc-mn10200.c: Likewise.
540 * config/tc-mn10300.c: Likewise.
541 * config/tc-msp430.c: Likewise.
542 * config/tc-mt.c: Likewise.
543 * config/tc-ns32k.c: Likewise.
544 * config/tc-openrisc.c: Likewise.
545 * config/tc-ppc.c: Likewise.
546 * config/tc-s390.c: Likewise.
547 * config/tc-sh.c: Likewise.
548 * config/tc-sh64.c: Likewise.
549 * config/tc-sparc.c: Likewise.
550 * config/tc-tic30.c: Likewise.
551 * config/tc-tic4x.c: Likewise.
552 * config/tc-tic54x.c: Likewise.
553 * config/tc-v850.c: Likewise.
554 * config/tc-vax.c: Likewise.
555 * config/tc-xc16x.c: Likewise.
556 * config/tc-xstormy16.c: Likewise.
557 * config/tc-xtensa.c: Likewise.
558 * config/tc-z80.c: Likewise.
559 * config/tc-z8k.c: Likewise.
560 * macro.h: Don't include sb.h or ansidecl.h.
561 * sb.h: Don't include stdio.h or ansidecl.h.
562 * cond.c: Include sb.h.
563 * itbl-lex.l: Include as.h instead of other system headers.
564 * itbl-parse.y: Likewise.
565 * itbl-ops.c: Similarly.
566 * itbl-ops.h: Don't include as.h or ansidecl.h.
567 * config/bfin-defs.h: Don't include bfd.h or as.h.
568 * config/bfin-parse.y: Include as.h instead of other system headers.
570 2006-06-06 Ben Elliston <bje@au.ibm.com>
571 Anton Blanchard <anton@samba.org>
573 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
574 (md_show_usage): Document it.
575 (ppc_setup_opcodes): Test power6 opcode flag bits.
576 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
578 2006-06-06 Thiemo Seufer <ths@mips.com>
579 Chao-ying Fu <fu@mips.com>
581 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
582 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
583 (macro_build): Update comment.
584 (mips_ip): Allow DSP64 instructions for MIPS64R2.
585 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
587 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
588 MIPS_CPU_ASE_MDMX flags for sb1.
590 2006-06-05 Thiemo Seufer <ths@mips.com>
592 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
594 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
595 (mips_ip): Make overflowed/underflowed constant arguments in DSP
596 and MT instructions a fatal error. Use INSERT_OPERAND where
597 appropriate. Improve warnings for break and wait code overflows.
598 Use symbolic constant of OP_MASK_COPZ.
599 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
601 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
603 * po/Make-in (top_builddir): Define.
605 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
607 * doc/Makefile.am (TEXI2DVI): Define.
608 * doc/Makefile.in: Regenerate.
609 * doc/c-arc.texi: Fix typo.
611 2006-06-01 Alan Modra <amodra@bigpond.net.au>
613 * config/obj-ieee.c: Delete.
614 * config/obj-ieee.h: Delete.
615 * Makefile.am (OBJ_FORMATS): Remove ieee.
616 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
617 (obj-ieee.o): Remove rule.
618 * Makefile.in: Regenerate.
619 * configure.in (atof): Remove tahoe.
620 (OBJ_MAYBE_IEEE): Don't define.
621 * configure: Regenerate.
622 * config.in: Regenerate.
623 * doc/Makefile.in: Regenerate.
624 * po/POTFILES.in: Regenerate.
626 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
628 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
629 and LIBINTL_DEP everywhere.
631 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
632 * acinclude.m4: Include new gettext macros.
633 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
634 Remove local code for po/Makefile.
635 * Makefile.in, configure, doc/Makefile.in: Regenerated.
637 2006-05-30 Nick Clifton <nickc@redhat.com>
639 * po/es.po: Updated Spanish translation.
641 2006-05-06 Denis Chertykov <denisc@overta.ru>
643 * doc/c-avr.texi: New file.
644 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
645 * doc/all.texi: Set AVR
646 * doc/as.texinfo: Include c-avr.texi
648 2006-05-28 Jie Zhang <jie.zhang@analog.com>
650 * config/bfin-parse.y (check_macfunc): Loose the condition of
651 calling check_multiply_halfregs ().
653 2006-05-25 Jie Zhang <jie.zhang@analog.com>
655 * config/bfin-parse.y (asm_1): Better check and deal with
656 vector and scalar Multiply 16-Bit Operands instructions.
658 2006-05-24 Nick Clifton <nickc@redhat.com>
660 * config/tc-hppa.c: Convert to ISO C90 format.
661 * config/tc-hppa.h: Likewise.
663 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
664 Randolph Chung <randolph@tausq.org>
666 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
667 is_tls_ieoff, is_tls_leoff): Define.
668 (fix_new_hppa): Handle TLS.
669 (cons_fix_new_hppa): Likewise.
671 (md_apply_fix): Handle TLS relocs.
672 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
674 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
676 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
678 2006-05-23 Thiemo Seufer <ths@mips.com>
679 David Ung <davidu@mips.com>
680 Nigel Stephens <nigel@mips.com>
683 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
684 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
685 ISA_HAS_MXHC1): New macros.
686 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
687 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
688 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
689 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
690 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
691 (mips_after_parse_args): Change default handling of float register
692 size to account for 32bit code with 64bit FP. Better sanity checking
693 of ISA/ASE/ABI option combinations.
694 (s_mipsset): Support switching of GPR and FPR sizes via
695 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
697 (mips_elf_final_processing): We should record the use of 64bit FP
698 registers in 32bit code but we don't, because ELF header flags are
700 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
701 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
702 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
703 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
704 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
705 missing -march options. Document .set arch=CPU. Move .set smartmips
706 to ASE page. Use @code for .set FOO examples.
708 2006-05-23 Jie Zhang <jie.zhang@analog.com>
710 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
713 2006-05-23 Jie Zhang <jie.zhang@analog.com>
715 * config/bfin-defs.h (bfin_equals): Remove declaration.
716 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
717 * config/tc-bfin.c (bfin_name_is_register): Remove.
718 (bfin_equals): Remove.
719 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
720 (bfin_name_is_register): Remove declaration.
722 2006-05-19 Thiemo Seufer <ths@mips.com>
723 Nigel Stephens <nigel@mips.com>
725 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
726 (mips_oddfpreg_ok): New function.
729 2006-05-19 Thiemo Seufer <ths@mips.com>
730 David Ung <davidu@mips.com>
732 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
733 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
734 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
735 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
736 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
737 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
738 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
739 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
740 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
741 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
742 reg_names_o32, reg_names_n32n64): Define register classes.
743 (reg_lookup): New function, use register classes.
744 (md_begin): Reserve register names in the symbol table. Simplify
746 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
748 (mips16_ip): Use reg_lookup.
749 (tc_get_register): Likewise.
750 (tc_mips_regname_to_dw2regnum): New function.
752 2006-05-19 Thiemo Seufer <ths@mips.com>
754 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
755 Un-constify string argument.
756 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
758 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
760 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
762 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
764 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
766 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
769 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
771 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
772 cfloat/m68881 to correct architecture before using it.
774 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
776 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
779 2006-05-15 Paul Brook <paul@codesourcery.com>
781 * config/tc-arm.c (arm_adjust_symtab): Use
782 bfd_is_arm_special_symbol_name.
784 2006-05-15 Bob Wilson <bob.wilson@acm.org>
786 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
787 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
788 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
789 Handle errors from calls to xtensa_opcode_is_* functions.
791 2006-05-14 Thiemo Seufer <ths@mips.com>
793 * config/tc-mips.c (macro_build): Test for currently active
795 (mips16_ip): Reject invalid opcodes.
797 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
799 * doc/as.texinfo: Rename "Index" to "AS Index",
800 and "ABORT" to "ABORT (COFF)".
802 2006-05-11 Paul Brook <paul@codesourcery.com>
804 * config/tc-arm.c (parse_half): New function.
805 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
806 (parse_operands): Ditto.
807 (do_mov16): Reject invalid relocations.
808 (do_t_mov16): Ditto. Use Thumb reloc numbers.
809 (insns): Replace Iffff with HALF.
810 (md_apply_fix): Add MOVW and MOVT relocs.
811 (tc_gen_reloc): Ditto.
812 * doc/c-arm.texi: Document relocation operators
814 2006-05-11 Paul Brook <paul@codesourcery.com>
816 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
818 2006-05-11 Thiemo Seufer <ths@mips.com>
820 * config/tc-mips.c (append_insn): Don't check the range of j or
823 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
825 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
826 relocs against external symbols for WinCE targets.
827 (md_apply_fix): Likewise.
829 2006-05-09 David Ung <davidu@mips.com>
831 * config/tc-mips.c (append_insn): Only warn about an out-of-range
834 2006-05-09 Nick Clifton <nickc@redhat.com>
836 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
837 against symbols which are not going to be placed into the symbol
840 2006-05-09 Ben Elliston <bje@au.ibm.com>
842 * expr.c (operand): Remove `if (0 && ..)' statement and
843 subsequently unused target_op label. Collapse `if (1 || ..)'
845 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
846 separately above the switch.
848 2006-05-08 Nick Clifton <nickc@redhat.com>
851 * config/tc-msp430.c (line_separator_character): Define as |.
853 2006-05-08 Thiemo Seufer <ths@mips.com>
854 Nigel Stephens <nigel@mips.com>
855 David Ung <davidu@mips.com>
857 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
858 (mips_opts): Likewise.
859 (file_ase_smartmips): New variable.
860 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
861 (macro_build): Handle SmartMIPS instructions.
863 (md_longopts): Add argument handling for smartmips.
864 (md_parse_options, mips_after_parse_args): Likewise.
865 (s_mipsset): Add .set smartmips support.
866 (md_show_usage): Document -msmartmips/-mno-smartmips.
867 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
869 * doc/c-mips.texi: Likewise.
871 2006-05-08 Alan Modra <amodra@bigpond.net.au>
873 * write.c (relax_segment): Add pass count arg. Don't error on
874 negative org/space on first two passes.
875 (relax_seg_info): New struct.
876 (relax_seg, write_object_file): Adjust.
877 * write.h (relax_segment): Update prototype.
879 2006-05-05 Julian Brown <julian@codesourcery.com>
881 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
883 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
884 architecture version checks.
885 (insns): Allow overlapping instructions to be used in VFP mode.
887 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
890 * config/obj-elf.c (obj_elf_change_section): Allow user
891 specified SHF_ALPHA_GPREL.
893 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
895 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
896 for PMEM related expressions.
898 2006-05-05 Nick Clifton <nickc@redhat.com>
901 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
902 insertion of a directory separator character into a string at a
903 given offset. Uses heuristics to decide when to use a backslash
904 character rather than a forward-slash character.
905 (dwarf2_directive_loc): Use the macro.
906 (out_debug_info): Likewise.
908 2006-05-05 Thiemo Seufer <ths@mips.com>
909 David Ung <davidu@mips.com>
911 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
913 (macro): Add new case M_CACHE_AB.
915 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
917 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
918 (opcode_lookup): Issue a warning for opcode with
919 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
920 identical to OT_cinfix3.
921 (TxC3w, TC3w, tC3w): New.
922 (insns): Use tC3w and TC3w for comparison instructions with
925 2006-05-04 Alan Modra <amodra@bigpond.net.au>
927 * subsegs.h (struct frchain): Delete frch_seg.
928 (frchain_root): Delete.
929 (seg_info): Define as macro.
930 * subsegs.c (frchain_root): Delete.
931 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
932 (subsegs_begin, subseg_change): Adjust for above.
933 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
934 rather than to one big list.
935 (subseg_get): Don't special case abs, und sections.
936 (subseg_new, subseg_force_new): Don't set frchainP here.
938 (subsegs_print_statistics): Adjust frag chain control list traversal.
939 * debug.c (dmp_frags): Likewise.
940 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
941 at frchain_root. Make use of known frchain ordering.
942 (last_frag_for_seg): Likewise.
943 (get_frag_fix): Likewise. Add seg param.
944 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
945 * write.c (chain_frchains_together_1): Adjust for struct frchain.
946 (SUB_SEGMENT_ALIGN): Likewise.
947 (subsegs_finish): Adjust frchain list traversal.
948 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
949 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
950 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
951 (xtensa_fix_b_j_loop_end_frags): Likewise.
952 (xtensa_fix_close_loop_end_frags): Likewise.
953 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
954 (retrieve_segment_info): Delete frch_seg initialisation.
956 2006-05-03 Alan Modra <amodra@bigpond.net.au>
958 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
959 * config/obj-elf.h (obj_sec_set_private_data): Delete.
960 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
961 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
963 2006-05-02 Joseph Myers <joseph@codesourcery.com>
965 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
967 (md_apply_fix3): Multiply offset by 4 here for
968 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
970 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
971 Jan Beulich <jbeulich@novell.com>
973 * config/tc-i386.c (output_invalid_buf): Change size for
975 * config/tc-tic30.c (output_invalid_buf): Likewise.
977 * config/tc-i386.c (output_invalid): Cast none-ascii char to
979 * config/tc-tic30.c (output_invalid): Likewise.
981 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
983 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
984 (TEXI2POD): Use AM_MAKEINFOFLAGS.
985 (asconfig.texi): Don't set top_srcdir.
986 * doc/as.texinfo: Don't use top_srcdir.
987 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
989 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
991 * config/tc-i386.c (output_invalid_buf): Change size to 16.
992 * config/tc-tic30.c (output_invalid_buf): Likewise.
994 * config/tc-i386.c (output_invalid): Use snprintf instead of
996 * config/tc-ia64.c (declare_register_set): Likewise.
997 (emit_one_bundle): Likewise.
998 (check_dependencies): Likewise.
999 * config/tc-tic30.c (output_invalid): Likewise.
1001 2006-05-02 Paul Brook <paul@codesourcery.com>
1003 * config/tc-arm.c (arm_optimize_expr): New function.
1004 * config/tc-arm.h (md_optimize_expr): Define
1005 (arm_optimize_expr): Add prototype.
1006 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1008 2006-05-02 Ben Elliston <bje@au.ibm.com>
1010 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1013 * sb.h (sb_list_vector): Move to sb.c.
1014 * sb.c (free_list): Use type of sb_list_vector directly.
1015 (sb_build): Fix off-by-one error in assertion about `size'.
1017 2006-05-01 Ben Elliston <bje@au.ibm.com>
1019 * listing.c (listing_listing): Remove useless loop.
1020 * macro.c (macro_expand): Remove is_positional local variable.
1021 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1022 and simplify surrounding expressions, where possible.
1023 (assign_symbol): Likewise.
1024 (s_weakref): Likewise.
1025 * symbols.c (colon): Likewise.
1027 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1029 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1031 2006-04-30 Thiemo Seufer <ths@mips.com>
1032 David Ung <davidu@mips.com>
1034 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1035 (mips_immed): New table that records various handling of udi
1036 instruction patterns.
1037 (mips_ip): Adds udi handling.
1039 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1041 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1042 of list rather than beginning.
1044 2006-04-26 Julian Brown <julian@codesourcery.com>
1046 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1047 (is_quarter_float): Rename from above. Simplify slightly.
1048 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1050 (parse_neon_mov): Parse floating-point constants.
1051 (neon_qfloat_bits): Fix encoding.
1052 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1053 preference to integer encoding when using the F32 type.
1055 2006-04-26 Julian Brown <julian@codesourcery.com>
1057 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1058 zero-initialising structures containing it will lead to invalid types).
1059 (arm_it): Add vectype to each operand.
1060 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1062 (neon_typed_alias): New structure. Extra information for typed
1064 (reg_entry): Add neon type info field.
1065 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1066 Break out alternative syntax for coprocessor registers, etc. into...
1067 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1068 out from arm_reg_parse.
1069 (parse_neon_type): Move. Return SUCCESS/FAIL.
1070 (first_error): New function. Call to ensure first error which occurs is
1072 (parse_neon_operand_type): Parse exactly one type.
1073 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1074 (parse_typed_reg_or_scalar): New function. Handle core of both
1075 arm_typed_reg_parse and parse_scalar.
1076 (arm_typed_reg_parse): Parse a register with an optional type.
1077 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1079 (parse_scalar): Parse a Neon scalar with optional type.
1080 (parse_reg_list): Use first_error.
1081 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1082 (neon_alias_types_same): New function. Return true if two (alias) types
1084 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1086 (insert_reg_alias): Return new reg_entry not void.
1087 (insert_neon_reg_alias): New function. Insert type/index information as
1088 well as register for alias.
1089 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1090 make typed register aliases accordingly.
1091 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1093 (s_unreq): Delete type information if present.
1094 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1095 (s_arm_unwind_save_mmxwcg): Likewise.
1096 (s_arm_unwind_movsp): Likewise.
1097 (s_arm_unwind_setfp): Likewise.
1098 (parse_shift): Likewise.
1099 (parse_shifter_operand): Likewise.
1100 (parse_address): Likewise.
1101 (parse_tb): Likewise.
1102 (tc_arm_regname_to_dw2regnum): Likewise.
1103 (md_pseudo_table): Add dn, qn.
1104 (parse_neon_mov): Handle typed operands.
1105 (parse_operands): Likewise.
1106 (neon_type_mask): Add N_SIZ.
1107 (N_ALLMODS): New macro.
1108 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1109 (el_type_of_type_chk): Add some safeguards.
1110 (modify_types_allowed): Fix logic bug.
1111 (neon_check_type): Handle operands with types.
1112 (neon_three_same): Remove redundant optional arg handling.
1113 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1114 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1115 (do_neon_step): Adjust accordingly.
1116 (neon_cmode_for_logic_imm): Use first_error.
1117 (do_neon_bitfield): Call neon_check_type.
1118 (neon_dyadic): Rename to...
1119 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1120 to allow modification of type of the destination.
1121 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1122 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1123 (do_neon_compare): Make destination be an untyped bitfield.
1124 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1125 (neon_mul_mac): Return early in case of errors.
1126 (neon_move_immediate): Use first_error.
1127 (neon_mac_reg_scalar_long): Fix type to include scalar.
1128 (do_neon_dup): Likewise.
1129 (do_neon_mov): Likewise (in several places).
1130 (do_neon_tbl_tbx): Fix type.
1131 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1132 (do_neon_ld_dup): Exit early in case of errors and/or use
1134 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1135 Handle .dn/.qn directives.
1136 (REGDEF): Add zero for reg_entry neon field.
1138 2006-04-26 Julian Brown <julian@codesourcery.com>
1140 * config/tc-arm.c (limits.h): Include.
1141 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1142 (fpu_vfp_v3_or_neon_ext): Declare constants.
1143 (neon_el_type): New enumeration of types for Neon vector elements.
1144 (neon_type_el): New struct. Define type and size of a vector element.
1145 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1147 (neon_type): Define struct. The type of an instruction.
1148 (arm_it): Add 'vectype' for the current instruction.
1149 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1150 (vfp_sp_reg_pos): Rename to...
1151 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1153 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1154 (Neon D or Q register).
1155 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1157 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1158 (my_get_expression): Allow above constant as argument to accept
1159 64-bit constants with optional prefix.
1160 (arm_reg_parse): Add extra argument to return the specific type of
1161 register in when either a D or Q register (REG_TYPE_NDQ) is
1162 requested. Can be NULL.
1163 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1164 (parse_reg_list): Update for new arm_reg_parse args.
1165 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1166 (parse_neon_el_struct_list): New function. Parse element/structure
1167 register lists for VLD<n>/VST<n> instructions.
1168 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1169 (s_arm_unwind_save_mmxwr): Likewise.
1170 (s_arm_unwind_save_mmxwcg): Likewise.
1171 (s_arm_unwind_movsp): Likewise.
1172 (s_arm_unwind_setfp): Likewise.
1173 (parse_big_immediate): New function. Parse an immediate, which may be
1174 64 bits wide. Put results in inst.operands[i].
1175 (parse_shift): Update for new arm_reg_parse args.
1176 (parse_address): Likewise. Add parsing of alignment specifiers.
1177 (parse_neon_mov): Parse the operands of a VMOV instruction.
1178 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1179 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1180 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1181 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1182 (parse_operands): Handle new codes above.
1183 (encode_arm_vfp_sp_reg): Rename to...
1184 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1185 selected VFP version only supports D0-D15.
1186 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1187 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1188 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1189 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1190 encode_arm_vfp_reg name, and allow 32 D regs.
1191 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1192 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1194 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1195 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1196 constant-load and conversion insns introduced with VFPv3.
1197 (neon_tab_entry): New struct.
1198 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1199 those which are the targets of pseudo-instructions.
1200 (neon_opc): Enumerate opcodes, use as indices into...
1201 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1202 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1203 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1204 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1206 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1208 (neon_type_mask): New. Compact type representation for type checking.
1209 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1210 permitted type combinations.
1211 (N_IGNORE_TYPE): New macro.
1212 (neon_check_shape): New function. Check an instruction shape for
1213 multiple alternatives. Return the specific shape for the current
1215 (neon_modify_type_size): New function. Modify a vector type and size,
1216 depending on the bit mask in argument 1.
1217 (neon_type_promote): New function. Convert a given "key" type (of an
1218 operand) into the correct type for a different operand, based on a bit
1220 (type_chk_of_el_type): New function. Convert a type and size into the
1221 compact representation used for type checking.
1222 (el_type_of_type_ckh): New function. Reverse of above (only when a
1223 single bit is set in the bit mask).
1224 (modify_types_allowed): New function. Alter a mask of allowed types
1225 based on a bit mask of modifications.
1226 (neon_check_type): New function. Check the type of the current
1227 instruction against the variable argument list. The "key" type of the
1228 instruction is returned.
1229 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1230 a Neon data-processing instruction depending on whether we're in ARM
1231 mode or Thumb-2 mode.
1232 (neon_logbits): New function.
1233 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1234 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1235 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1236 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1237 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1238 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1239 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1240 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1241 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1242 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1243 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1244 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1245 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1246 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1247 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1248 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1249 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1250 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1251 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1252 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1253 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1254 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1255 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1256 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1257 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1259 (parse_neon_type): New function. Parse Neon type specifier.
1260 (opcode_lookup): Allow parsing of Neon type specifiers.
1261 (REGNUM2, REGSETH, REGSET2): New macros.
1262 (reg_names): Add new VFPv3 and Neon registers.
1263 (NUF, nUF, NCE, nCE): New macros for opcode table.
1264 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1265 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1266 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1267 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1268 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1269 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1270 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1271 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1272 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1273 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1274 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1275 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1276 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1277 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1279 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1280 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1281 (arm_option_cpu_value): Add vfp3 and neon.
1282 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1285 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1287 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1288 syntax instead of hardcoded opcodes with ".w18" suffixes.
1289 (wide_branch_opcode): New.
1290 (build_transition): Use it to check for wide branch opcodes with
1291 either ".w18" or ".w15" suffixes.
1293 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1295 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1296 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1297 frag's is_literal flag.
1299 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1301 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1303 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1305 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1306 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1307 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1308 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1309 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1311 2005-04-20 Paul Brook <paul@codesourcery.com>
1313 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1315 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1317 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1319 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1320 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1321 Make some cpus unsupported on ELF. Run "make dep-am".
1322 * Makefile.in: Regenerate.
1324 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1326 * configure.in (--enable-targets): Indent help message.
1327 * configure: Regenerate.
1329 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1332 * config/tc-i386.c (i386_immediate): Check illegal immediate
1335 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1337 * config/tc-i386.c: Formatting.
1338 (output_disp, output_imm): ISO C90 params.
1340 * frags.c (frag_offset_fixed_p): Constify args.
1341 * frags.h (frag_offset_fixed_p): Ditto.
1343 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1344 (COFF_MAGIC): Delete.
1346 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1348 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1350 * po/POTFILES.in: Regenerated.
1352 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1354 * doc/as.texinfo: Mention that some .type syntaxes are not
1355 supported on all architectures.
1357 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1359 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1360 instructions when such transformations have been disabled.
1362 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1364 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1365 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1366 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1367 decoding the loop instructions. Remove current_offset variable.
1368 (xtensa_fix_short_loop_frags): Likewise.
1369 (min_bytes_to_other_loop_end): Remove current_offset argument.
1371 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1373 * config/tc-z80.c (z80_optimize_expr): Removed.
1374 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1376 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1378 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1379 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1380 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1381 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1382 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1383 at90can64, at90usb646, at90usb647, at90usb1286 and
1385 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1387 2006-04-07 Paul Brook <paul@codesourcery.com>
1389 * config/tc-arm.c (parse_operands): Set default error message.
1391 2006-04-07 Paul Brook <paul@codesourcery.com>
1393 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1395 2006-04-07 Paul Brook <paul@codesourcery.com>
1397 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1399 2006-04-07 Paul Brook <paul@codesourcery.com>
1401 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1402 (move_or_literal_pool): Handle Thumb-2 instructions.
1403 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1405 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1408 * config/tc-i386.c (match_template): Move 64-bit operand tests
1411 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1413 * po/Make-in: Add install-html target.
1414 * Makefile.am: Add install-html and install-html-recursive targets.
1415 * Makefile.in: Regenerate.
1416 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1417 * configure: Regenerate.
1418 * doc/Makefile.am: Add install-html and install-html-am targets.
1419 * doc/Makefile.in: Regenerate.
1421 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1423 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1426 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1427 Daniel Jacobowitz <dan@codesourcery.com>
1429 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1430 (GOTT_BASE, GOTT_INDEX): New.
1431 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1432 GOTT_INDEX when generating VxWorks PIC.
1433 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1434 use the generic *-*-vxworks* stanza instead.
1436 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1439 * frags.c (frag_offset_fixed_p): New function.
1440 * frags.h (frag_offset_fixed_p): Declare.
1441 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1442 (resolve_expression): Likewise.
1444 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1446 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1447 of the same length but different numbers of slots.
1449 2006-03-30 Andreas Schwab <schwab@suse.de>
1451 * configure.in: Fix help string for --enable-targets option.
1452 * configure: Regenerate.
1454 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1456 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1457 (m68k_ip): ... here. Use for all chips. Protect against buffer
1458 overrun and avoid excessive copying.
1460 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1461 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1462 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1463 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1464 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1465 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1466 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1467 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1468 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1469 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1470 (struct m68k_cpu): Change chip field to control_regs.
1471 (current_chip): Remove.
1472 (control_regs): New.
1473 (m68k_archs, m68k_extensions): Adjust.
1474 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1475 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1476 (find_cf_chip): Reimplement for new organization of cpu table.
1477 (select_control_regs): Remove.
1479 (struct save_opts): Save control regs, not chip.
1480 (s_save, s_restore): Adjust.
1481 (m68k_lookup_cpu): Give deprecated warning when necessary.
1482 (m68k_init_arch): Adjust.
1483 (md_show_usage): Adjust for new cpu table organization.
1485 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1487 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1488 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1489 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1491 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1492 (any_gotrel): New rule.
1493 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1494 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1496 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1497 (bfin_pic_ptr): New function.
1498 (md_pseudo_table): Add it for ".picptr".
1499 (OPTION_FDPIC): New macro.
1500 (md_longopts): Add -mfdpic.
1501 (md_parse_option): Handle it.
1502 (md_begin): Set BFD flags.
1503 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1504 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1506 * Makefile.am (bfin-parse.o): Update dependencies.
1507 (DEPTC_bfin_elf): Likewise.
1508 * Makefile.in: Regenerate.
1510 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1512 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1513 mcfemac instead of mcfmac.
1515 2006-03-23 Michael Matz <matz@suse.de>
1517 * config/tc-i386.c (type_names): Correct placement of 'static'.
1518 (reloc): Map some more relocs to their 64 bit counterpart when
1520 (output_insn): Work around breakage if DEBUG386 is defined.
1521 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1522 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1523 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1524 different from i386.
1525 (output_imm): Ditto.
1526 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1528 (md_convert_frag): Jumps can now be larger than 2GB away, error
1530 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1531 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1533 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1534 Daniel Jacobowitz <dan@codesourcery.com>
1535 Phil Edwards <phil@codesourcery.com>
1536 Zack Weinberg <zack@codesourcery.com>
1537 Mark Mitchell <mark@codesourcery.com>
1538 Nathan Sidwell <nathan@codesourcery.com>
1540 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1541 (md_begin): Complain about -G being used for PIC. Don't change
1542 the text, data and bss alignments on VxWorks.
1543 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1544 generating VxWorks PIC.
1545 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1546 (macro): Likewise, but do not treat la $25 specially for
1547 VxWorks PIC, and do not handle jal.
1548 (OPTION_MVXWORKS_PIC): New macro.
1549 (md_longopts): Add -mvxworks-pic.
1550 (md_parse_option): Don't complain about using PIC and -G together here.
1551 Handle OPTION_MVXWORKS_PIC.
1552 (md_estimate_size_before_relax): Always use the first relaxation
1553 sequence on VxWorks.
1554 * config/tc-mips.h (VXWORKS_PIC): New.
1556 2006-03-21 Paul Brook <paul@codesourcery.com>
1558 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1560 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1562 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1563 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1564 (get_loop_align_size): New.
1565 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1566 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1567 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1568 (get_noop_aligned_address): Use get_loop_align_size.
1569 (get_aligned_diff): Likewise.
1571 2006-03-21 Paul Brook <paul@codesourcery.com>
1573 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1575 2006-03-20 Paul Brook <paul@codesourcery.com>
1577 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1578 (do_t_branch): Encode branches inside IT blocks as unconditional.
1579 (do_t_cps): New function.
1580 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1581 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1582 (opcode_lookup): Allow conditional suffixes on all instructions in
1584 (md_assemble): Advance condexec state before checking for errors.
1585 (insns): Use do_t_cps.
1587 2006-03-20 Paul Brook <paul@codesourcery.com>
1589 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1590 outputting the insn.
1592 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1594 * config/tc-vax.c: Update copyright year.
1595 * config/tc-vax.h: Likewise.
1597 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1599 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1601 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1603 2006-03-17 Paul Brook <paul@codesourcery.com>
1605 * config/tc-arm.c (insns): Add ldm and stm.
1607 2006-03-17 Ben Elliston <bje@au.ibm.com>
1610 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1612 2006-03-16 Paul Brook <paul@codesourcery.com>
1614 * config/tc-arm.c (insns): Add "svc".
1616 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1618 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1619 flag and avoid double underscore prefixes.
1621 2006-03-10 Paul Brook <paul@codesourcery.com>
1623 * config/tc-arm.c (md_begin): Handle EABIv5.
1624 (arm_eabis): Add EF_ARM_EABI_VER5.
1625 * doc/c-arm.texi: Document -meabi=5.
1627 2006-03-10 Ben Elliston <bje@au.ibm.com>
1629 * app.c (do_scrub_chars): Simplify string handling.
1631 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1632 Daniel Jacobowitz <dan@codesourcery.com>
1633 Zack Weinberg <zack@codesourcery.com>
1634 Nathan Sidwell <nathan@codesourcery.com>
1635 Paul Brook <paul@codesourcery.com>
1636 Ricardo Anguiano <anguiano@codesourcery.com>
1637 Phil Edwards <phil@codesourcery.com>
1639 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1640 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1642 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1643 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1644 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1646 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1648 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1649 even when using the text-section-literals option.
1651 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1653 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1655 (m68k_ip): <case 'J'> Check we have some control regs.
1656 (md_parse_option): Allow raw arch switch.
1657 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1658 whether 68881 or cfloat was meant by -mfloat.
1659 (md_show_usage): Adjust extension display.
1660 (m68k_elf_final_processing): Adjust.
1662 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1664 * config/tc-avr.c (avr_mod_hash_value): New function.
1665 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1666 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1667 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1668 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1670 (tc_gen_reloc): Handle substractions of symbols, if possible do
1671 fixups, abort otherwise.
1672 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1673 tc_fix_adjustable): Define.
1675 2006-03-02 James E Wilson <wilson@specifix.com>
1677 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1678 change the template, then clear md.slot[curr].end_of_insn_group.
1680 2006-02-28 Jan Beulich <jbeulich@novell.com>
1682 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1684 2006-02-28 Jan Beulich <jbeulich@novell.com>
1687 * macro.c (getstring): Don't treat parentheses special anymore.
1688 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1689 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1692 2006-02-28 Mat <mat@csail.mit.edu>
1694 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1696 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1698 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1700 (CFI_signal_frame): Define.
1701 (cfi_pseudo_table): Add .cfi_signal_frame.
1702 (dot_cfi): Handle CFI_signal_frame.
1703 (output_cie): Handle cie->signal_frame.
1704 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1705 different. Copy signal_frame from FDE to newly created CIE.
1706 * doc/as.texinfo: Document .cfi_signal_frame.
1708 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1710 * doc/Makefile.am: Add html target.
1711 * doc/Makefile.in: Regenerate.
1712 * po/Make-in: Add html target.
1714 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1716 * config/tc-i386.c (output_insn): Support Intel Merom New
1719 * config/tc-i386.h (CpuMNI): New.
1720 (CpuUnknownFlags): Add CpuMNI.
1722 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1724 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1725 (hpriv_reg_table): New table for hyperprivileged registers.
1726 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1729 2006-02-24 DJ Delorie <dj@redhat.com>
1731 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1732 (tc_gen_reloc): Don't define.
1733 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1734 (OPTION_LINKRELAX): New.
1735 (md_longopts): Add it.
1737 (md_parse_options): Set it.
1738 (md_assemble): Emit relaxation relocs as needed.
1739 (md_convert_frag): Emit relaxation relocs as needed.
1740 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1741 (m32c_apply_fix): New.
1742 (tc_gen_reloc): New.
1743 (m32c_force_relocation): Force out jump relocs when relaxing.
1744 (m32c_fix_adjustable): Return false if relaxing.
1746 2006-02-24 Paul Brook <paul@codesourcery.com>
1748 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1749 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1750 (struct asm_barrier_opt): Define.
1751 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1752 (parse_psr): Accept V7M psr names.
1753 (parse_barrier): New function.
1754 (enum operand_parse_code): Add OP_oBARRIER.
1755 (parse_operands): Implement OP_oBARRIER.
1756 (do_barrier): New function.
1757 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1758 (do_t_cpsi): Add V7M restrictions.
1759 (do_t_mrs, do_t_msr): Validate V7M variants.
1760 (md_assemble): Check for NULL variants.
1761 (v7m_psrs, barrier_opt_names): New tables.
1762 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1763 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1764 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1765 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1766 (struct cpu_arch_ver_table): Define.
1767 (cpu_arch_ver): New.
1768 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1769 Tag_CPU_arch_profile.
1770 * doc/c-arm.texi: Document new cpu and arch options.
1772 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1774 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1776 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1778 * config/tc-ia64.c: Update copyright years.
1780 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1782 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1785 2005-02-22 Paul Brook <paul@codesourcery.com>
1787 * config/tc-arm.c (do_pld): Remove incorrect write to
1789 (encode_thumb32_addr_mode): Use correct operand.
1791 2006-02-21 Paul Brook <paul@codesourcery.com>
1793 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1795 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1796 Anil Paranjape <anilp1@kpitcummins.com>
1797 Shilin Shakti <shilins@kpitcummins.com>
1799 * Makefile.am: Add xc16x related entry.
1800 * Makefile.in: Regenerate.
1801 * configure.in: Added xc16x related entry.
1802 * configure: Regenerate.
1803 * config/tc-xc16x.h: New file
1804 * config/tc-xc16x.c: New file
1805 * doc/c-xc16x.texi: New file for xc16x
1806 * doc/all.texi: Entry for xc16x
1807 * doc/Makefile.texi: Added c-xc16x.texi
1808 * NEWS: Announce the support for the new target.
1810 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1812 * configure.tgt: set emulation for mips-*-netbsd*
1814 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1816 * config.in: Rebuilt.
1818 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1820 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1821 from 1, not 0, in error messages.
1822 (md_assemble): Simplify special-case check for ENTRY instructions.
1823 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1824 operand in error message.
1826 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1828 * configure.tgt (arm-*-linux-gnueabi*): Change to
1831 2006-02-10 Nick Clifton <nickc@redhat.com>
1833 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1834 32-bit value is propagated into the upper bits of a 64-bit long.
1836 * config/tc-arc.c (init_opcode_tables): Fix cast.
1837 (arc_extoper, md_operand): Likewise.
1839 2006-02-09 David Heine <dlheine@tensilica.com>
1841 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1842 each relaxation step.
1844 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1846 * configure.in (CHECK_DECLS): Add vsnprintf.
1847 * configure: Regenerate.
1848 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1849 include/declare here, but...
1850 * as.h: Move code detecting VARARGS idiom to the top.
1851 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1852 (vsnprintf): Declare if not already declared.
1854 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1856 * as.c (close_output_file): New.
1857 (main): Register close_output_file with xatexit before
1858 dump_statistics. Don't call output_file_close.
1860 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1862 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1863 mcf5329_control_regs): New.
1864 (not_current_architecture, selected_arch, selected_cpu): New.
1865 (m68k_archs, m68k_extensions): New.
1866 (archs): Renamed to ...
1867 (m68k_cpus): ... here. Adjust.
1869 (md_pseudo_table): Add arch and cpu directives.
1870 (find_cf_chip, m68k_ip): Adjust table scanning.
1871 (no_68851, no_68881): Remove.
1872 (md_assemble): Lazily initialize.
1873 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1874 (md_init_after_args): Move functionality to m68k_init_arch.
1875 (mri_chip): Adjust table scanning.
1876 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1877 options with saner parsing.
1878 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1879 m68k_init_arch): New.
1880 (s_m68k_cpu, s_m68k_arch): New.
1881 (md_show_usage): Adjust.
1882 (m68k_elf_final_processing): Set CF EF flags.
1883 * config/tc-m68k.h (m68k_init_after_args): Remove.
1884 (tc_init_after_args): Remove.
1885 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1886 (M68k-Directives): Document .arch and .cpu directives.
1888 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1890 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1891 synonyms for equ and defl.
1892 (z80_cons_fix_new): New function.
1893 (emit_byte): Disallow relative jumps to absolute locations.
1894 (emit_data): Only handle defb, prototype changed, because defb is
1895 now handled as pseudo-op rather than an instruction.
1896 (instab): Entries for defb,defw,db,dw moved from here...
1897 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1898 Add entries for def24,def32,d24,d32.
1899 (md_assemble): Improved error handling.
1900 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1901 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1902 (z80_cons_fix_new): Declare.
1903 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1904 (def24,d24,def32,d32): New pseudo-ops.
1906 2006-02-02 Paul Brook <paul@codesourcery.com>
1908 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1910 2005-02-02 Paul Brook <paul@codesourcery.com>
1912 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1913 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1914 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1915 T2_OPCODE_RSB): Define.
1916 (thumb32_negate_data_op): New function.
1917 (md_apply_fix): Use it.
1919 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1921 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1923 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1924 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1926 (relaxation_requirements): Add pfinish_frag argument and use it to
1927 replace setting tinsn->record_fix fields.
1928 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1929 and vinsn_to_insnbuf. Remove references to record_fix and
1930 slot_sub_symbols fields.
1931 (xtensa_mark_narrow_branches): Delete unused code.
1932 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1934 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1936 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1937 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1938 of the record_fix field. Simplify error messages for unexpected
1940 (set_expr_symbol_offset_diff): Delete.
1942 2006-01-31 Paul Brook <paul@codesourcery.com>
1944 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1946 2006-01-31 Paul Brook <paul@codesourcery.com>
1947 Richard Earnshaw <rearnsha@arm.com>
1949 * config/tc-arm.c: Use arm_feature_set.
1950 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1951 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1952 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1955 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1956 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1957 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1958 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1960 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1961 (arm_opts): Move old cpu/arch options from here...
1962 (arm_legacy_opts): ... to here.
1963 (md_parse_option): Search arm_legacy_opts.
1964 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1965 (arm_float_abis, arm_eabis): Make const.
1967 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1969 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1971 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1973 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1974 in load immediate intruction.
1976 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1978 * config/bfin-parse.y (value_match): Use correct conversion
1979 specifications in template string for __FILE__ and __LINE__.
1983 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1985 Introduce TLS descriptors for i386 and x86_64.
1986 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1987 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1988 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1989 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1990 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1992 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1993 (lex_got): Handle @tlsdesc and @tlscall.
1994 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1996 2006-01-11 Nick Clifton <nickc@redhat.com>
1998 Fixes for building on 64-bit hosts:
1999 * config/tc-avr.c (mod_index): New union to allow conversion
2000 between pointers and integers.
2001 (md_begin, avr_ldi_expression): Use it.
2002 * config/tc-i370.c (md_assemble): Add cast for argument to print
2004 * config/tc-tic54x.c (subsym_substitute): Likewise.
2005 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2006 opindex field of fr_cgen structure into a pointer so that it can
2007 be stored in a frag.
2008 * config/tc-mn10300.c (md_assemble): Likewise.
2009 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2011 * config/tc-v850.c: Replace uses of (int) casts with correct
2014 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2017 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2019 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2022 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2023 a local-label reference.
2025 For older changes see ChangeLog-2005
2031 version-control: never