gas/ChangeLog

   1 2006-05-09  David Ung  <davidu@mips.com>
   2
   3         * config/tc-mips.c (append_insn): Only warn about an out-of-range
   4         j or jal address.
   5
   6 2006-05-09  Nick Clifton  <nickc@redhat.com>
   7
   8         * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
   9         against symbols which are not going to be placed into the symbol
  10         table.
  11
  12 2006-05-09  Ben Elliston  <bje@au.ibm.com>
  13
  14         * expr.c (operand): Remove `if (0 && ..)' statement and
  15         subsequently unused target_op label.  Collapse `if (1 || ..)'
  16         statement.
  17         * app.c (do_scrub_chars): Remove unused case 0, as it is handled
  18         separately above the switch.
  19
  20 2006-05-08  Nick Clifton  <nickc@redhat.com>
  21
  22         PR gas/2623
  23         * config/tc-msp430.c (line_separator_character): Define as |.
  24
  25 2006-05-08  Thiemo Seufer  <ths@mips.com>
  26             Nigel Stephens  <nigel@mips.com>
  27             David Ung  <davidu@mips.com>
  28
  29         * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
  30         (mips_opts): Likewise.
  31         (file_ase_smartmips): New variable.
  32         (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
  33         (macro_build): Handle SmartMIPS instructions.
  34         (mips_ip): Likewise.
  35         (md_longopts): Add argument handling for smartmips.
  36         (md_parse_options, mips_after_parse_args): Likewise.
  37         (s_mipsset): Add .set smartmips support.
  38         (md_show_usage): Document -msmartmips/-mno-smartmips.
  39         * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
  40         .set smartmips.
  41         * doc/c-mips.texi: Likewise.
  42
  43 2006-05-08  Alan Modra  <amodra@bigpond.net.au>
  44
  45         * write.c (relax_segment): Add pass count arg.  Don't error on
  46         negative org/space on first two passes.
  47         (relax_seg_info): New struct.
  48         (relax_seg, write_object_file): Adjust.
  49         * write.h (relax_segment): Update prototype.
  50
  51 2006-05-05  Julian Brown  <julian@codesourcery.com>
  52
  53         * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
  54         checking.
  55         (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
  56         architecture version checks.
  57         (insns): Allow overlapping instructions to be used in VFP mode.
  58
  59 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
  60
  61         PR gas/2598
  62         * config/obj-elf.c (obj_elf_change_section): Allow user
  63         specified SHF_ALPHA_GPREL.
  64
  65 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
  66
  67         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
  68         for PMEM related expressions.
  69
  70 2006-05-05  Nick Clifton  <nickc@redhat.com>
  71
  72         PR gas/2582
  73         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
  74         insertion of a directory separator character into a string at a
  75         given offset.  Uses heuristics to decide when to use a backslash
  76         character rather than a forward-slash character.
  77         (dwarf2_directive_loc): Use the macro.
  78         (out_debug_info): Likewise.
  79
  80 2006-05-05  Thiemo Seufer  <ths@mips.com>
  81             David Ung  <davidu@mips.com>
  82
  83         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
  84         instruction.
  85         (macro): Add new case M_CACHE_AB.
  86
  87 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
  88
  89         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
  90         (opcode_lookup): Issue a warning for opcode with
  91         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
  92         identical to OT_cinfix3.
  93         (TxC3w, TC3w, tC3w): New.
  94         (insns): Use tC3w and TC3w for comparison instructions with
  95         's' suffix.
  96
  97 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
  98
  99         * subsegs.h (struct frchain): Delete frch_seg.
 100         (frchain_root): Delete.
 101         (seg_info): Define as macro.
 102         * subsegs.c (frchain_root): Delete.
 103         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
 104         (subsegs_begin, subseg_change): Adjust for above.
 105         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
 106         rather than to one big list.
 107         (subseg_get): Don't special case abs, und sections.
 108         (subseg_new, subseg_force_new): Don't set frchainP here.
 109         (seg_info): Delete.
 110         (subsegs_print_statistics): Adjust frag chain control list traversal.
 111         * debug.c (dmp_frags):  Likewise.
 112         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
 113         at frchain_root.  Make use of known frchain ordering.
 114         (last_frag_for_seg): Likewise.
 115         (get_frag_fix): Likewise.  Add seg param.
 116         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
 117         * write.c (chain_frchains_together_1): Adjust for struct frchain.
 118         (SUB_SEGMENT_ALIGN): Likewise.
 119         (subsegs_finish): Adjust frchain list traversal.
 120         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
 121         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
 122         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
 123         (xtensa_fix_b_j_loop_end_frags): Likewise.
 124         (xtensa_fix_close_loop_end_frags): Likewise.
 125         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
 126         (retrieve_segment_info): Delete frch_seg initialisation.
 127
 128 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
 129
 130         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
 131         * config/obj-elf.h (obj_sec_set_private_data): Delete.
 132         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
 133         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
 134
 135 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
 136
 137         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
 138         here.
 139         (md_apply_fix3): Multiply offset by 4 here for
 140         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
 141
 142 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 143             Jan Beulich  <jbeulich@novell.com>
 144
 145         * config/tc-i386.c (output_invalid_buf): Change size for
 146         unsigned char.
 147         * config/tc-tic30.c (output_invalid_buf): Likewise.
 148
 149         * config/tc-i386.c (output_invalid): Cast none-ascii char to
 150         unsigned char.
 151         * config/tc-tic30.c (output_invalid): Likewise.
 152
 153 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
 154
 155         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
 156         (TEXI2POD): Use AM_MAKEINFOFLAGS.
 157         (asconfig.texi): Don't set top_srcdir.
 158         * doc/as.texinfo: Don't use top_srcdir.
 159         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 160
 161 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 162
 163         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 164         * config/tc-tic30.c (output_invalid_buf): Likewise.
 165
 166         * config/tc-i386.c (output_invalid): Use snprintf instead of
 167         sprintf.
 168         * config/tc-ia64.c (declare_register_set): Likewise.
 169         (emit_one_bundle): Likewise.
 170         (check_dependencies): Likewise.
 171         * config/tc-tic30.c (output_invalid): Likewise.
 172
 173 2006-05-02  Paul Brook  <paul@codesourcery.com>
 174
 175         * config/tc-arm.c (arm_optimize_expr): New function.
 176         * config/tc-arm.h (md_optimize_expr): Define
 177         (arm_optimize_expr): Add prototype.
 178         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 179
 180 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 181
 182         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 183         field unsigned.
 184
 185         * sb.h (sb_list_vector): Move to sb.c.
 186         * sb.c (free_list): Use type of sb_list_vector directly.
 187         (sb_build): Fix off-by-one error in assertion about `size'.
 188
 189 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 190
 191         * listing.c (listing_listing): Remove useless loop.
 192         * macro.c (macro_expand): Remove is_positional local variable.
 193         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 194         and simplify surrounding expressions, where possible.
 195         (assign_symbol): Likewise.
 196         (s_weakref): Likewise.
 197         * symbols.c (colon): Likewise.
 198
 199 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 200
 201         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 202
 203 2006-04-30  Thiemo Seufer  <ths@mips.com>
 204             David Ung  <davidu@mips.com>
 205
 206         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 207         (mips_immed): New table that records various handling of udi
 208         instruction patterns.
 209         (mips_ip): Adds udi handling.
 210
 211 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 212
 213         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 214         of list rather than beginning.
 215
 216 2006-04-26  Julian Brown  <julian@codesourcery.com>
 217
 218         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 219         (is_quarter_float): Rename from above. Simplify slightly.
 220         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 221         number.
 222         (parse_neon_mov): Parse floating-point constants.
 223         (neon_qfloat_bits): Fix encoding.
 224         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 225         preference to integer encoding when using the F32 type.
 226
 227 2006-04-26  Julian Brown  <julian@codesourcery.com>
 228
 229         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 230         zero-initialising structures containing it will lead to invalid types).
 231         (arm_it): Add vectype to each operand.
 232         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 233         defined field.
 234         (neon_typed_alias): New structure. Extra information for typed
 235         register aliases.
 236         (reg_entry): Add neon type info field.
 237         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 238         Break out alternative syntax for coprocessor registers, etc. into...
 239         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 240         out from arm_reg_parse.
 241         (parse_neon_type): Move. Return SUCCESS/FAIL.
 242         (first_error): New function. Call to ensure first error which occurs is
 243         reported.
 244         (parse_neon_operand_type): Parse exactly one type.
 245         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 246         (parse_typed_reg_or_scalar): New function. Handle core of both
 247         arm_typed_reg_parse and parse_scalar.
 248         (arm_typed_reg_parse): Parse a register with an optional type.
 249         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 250         result.
 251         (parse_scalar): Parse a Neon scalar with optional type.
 252         (parse_reg_list): Use first_error.
 253         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 254         (neon_alias_types_same): New function. Return true if two (alias) types
 255         are the same.
 256         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 257         of elements.
 258         (insert_reg_alias): Return new reg_entry not void.
 259         (insert_neon_reg_alias): New function. Insert type/index information as
 260         well as register for alias.
 261         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 262         make typed register aliases accordingly.
 263         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 264         of line.
 265         (s_unreq): Delete type information if present.
 266         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 267         (s_arm_unwind_save_mmxwcg): Likewise.
 268         (s_arm_unwind_movsp): Likewise.
 269         (s_arm_unwind_setfp): Likewise.
 270         (parse_shift): Likewise.
 271         (parse_shifter_operand): Likewise.
 272         (parse_address): Likewise.
 273         (parse_tb): Likewise.
 274         (tc_arm_regname_to_dw2regnum): Likewise.
 275         (md_pseudo_table): Add dn, qn.
 276         (parse_neon_mov): Handle typed operands.
 277         (parse_operands): Likewise.
 278         (neon_type_mask): Add N_SIZ.
 279         (N_ALLMODS): New macro.
 280         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 281         (el_type_of_type_chk): Add some safeguards.
 282         (modify_types_allowed): Fix logic bug.
 283         (neon_check_type): Handle operands with types.
 284         (neon_three_same): Remove redundant optional arg handling.
 285         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 286         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 287         (do_neon_step): Adjust accordingly.
 288         (neon_cmode_for_logic_imm): Use first_error.
 289         (do_neon_bitfield): Call neon_check_type.
 290         (neon_dyadic): Rename to...
 291         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 292         to allow modification of type of the destination.
 293         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 294         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 295         (do_neon_compare): Make destination be an untyped bitfield.
 296         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 297         (neon_mul_mac): Return early in case of errors.
 298         (neon_move_immediate): Use first_error.
 299         (neon_mac_reg_scalar_long): Fix type to include scalar.
 300         (do_neon_dup): Likewise.
 301         (do_neon_mov): Likewise (in several places).
 302         (do_neon_tbl_tbx): Fix type.
 303         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 304         (do_neon_ld_dup): Exit early in case of errors and/or use
 305         first_error.
 306         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 307         Handle .dn/.qn directives.
 308         (REGDEF): Add zero for reg_entry neon field.
 309
 310 2006-04-26  Julian Brown  <julian@codesourcery.com>
 311
 312         * config/tc-arm.c (limits.h): Include.
 313         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 314         (fpu_vfp_v3_or_neon_ext): Declare constants.
 315         (neon_el_type): New enumeration of types for Neon vector elements.
 316         (neon_type_el): New struct. Define type and size of a vector element.
 317         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 318         instruction.
 319         (neon_type): Define struct. The type of an instruction.
 320         (arm_it): Add 'vectype' for the current instruction.
 321         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 322         (vfp_sp_reg_pos): Rename to...
 323         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 324         tags.
 325         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 326         (Neon D or Q register).
 327         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 328         register.
 329         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 330         (my_get_expression): Allow above constant as argument to accept
 331         64-bit constants with optional prefix.
 332         (arm_reg_parse): Add extra argument to return the specific type of
 333         register in when either a D or Q register (REG_TYPE_NDQ) is
 334         requested. Can be NULL.
 335         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 336         (parse_reg_list): Update for new arm_reg_parse args.
 337         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 338         (parse_neon_el_struct_list): New function. Parse element/structure
 339         register lists for VLD<n>/VST<n> instructions.
 340         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 341         (s_arm_unwind_save_mmxwr): Likewise.
 342         (s_arm_unwind_save_mmxwcg): Likewise.
 343         (s_arm_unwind_movsp): Likewise.
 344         (s_arm_unwind_setfp): Likewise.
 345         (parse_big_immediate): New function. Parse an immediate, which may be
 346         64 bits wide. Put results in inst.operands[i].
 347         (parse_shift): Update for new arm_reg_parse args.
 348         (parse_address): Likewise. Add parsing of alignment specifiers.
 349         (parse_neon_mov): Parse the operands of a VMOV instruction.
 350         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 351         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 352         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 353         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 354         (parse_operands): Handle new codes above.
 355         (encode_arm_vfp_sp_reg): Rename to...
 356         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 357         selected VFP version only supports D0-D15.
 358         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 359         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 360         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 361         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 362         encode_arm_vfp_reg name, and allow 32 D regs.
 363         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 364         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 365         regs.
 366         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 367         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 368         constant-load and conversion insns introduced with VFPv3.
 369         (neon_tab_entry): New struct.
 370         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 371         those which are the targets of pseudo-instructions.
 372         (neon_opc): Enumerate opcodes, use as indices into...
 373         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 374         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 375         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 376         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 377         neon_enc_tab.
 378         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 379         Neon instructions.
 380         (neon_type_mask): New. Compact type representation for type checking.
 381         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 382         permitted type combinations.
 383         (N_IGNORE_TYPE): New macro.
 384         (neon_check_shape): New function. Check an instruction shape for
 385         multiple alternatives. Return the specific shape for the current
 386         instruction.
 387         (neon_modify_type_size): New function. Modify a vector type and size,
 388         depending on the bit mask in argument 1.
 389         (neon_type_promote): New function. Convert a given "key" type (of an
 390         operand) into the correct type for a different operand, based on a bit
 391         mask.
 392         (type_chk_of_el_type): New function. Convert a type and size into the
 393         compact representation used for type checking.
 394         (el_type_of_type_ckh): New function. Reverse of above (only when a
 395         single bit is set in the bit mask).
 396         (modify_types_allowed): New function. Alter a mask of allowed types
 397         based on a bit mask of modifications.
 398         (neon_check_type): New function. Check the type of the current
 399         instruction against the variable argument list. The "key" type of the
 400         instruction is returned.
 401         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 402         a Neon data-processing instruction depending on whether we're in ARM
 403         mode or Thumb-2 mode.
 404         (neon_logbits): New function.
 405         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 406         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 407         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 408         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 409         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 410         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 411         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 412         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 413         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 414         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 415         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 416         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 417         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 418         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 419         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 420         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 421         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 422         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 423         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 424         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 425         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 426         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 427         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 428         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 429         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 430         helpers.
 431         (parse_neon_type): New function. Parse Neon type specifier.
 432         (opcode_lookup): Allow parsing of Neon type specifiers.
 433         (REGNUM2, REGSETH, REGSET2): New macros.
 434         (reg_names): Add new VFPv3 and Neon registers.
 435         (NUF, nUF, NCE, nCE): New macros for opcode table.
 436         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 437         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 438         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 439         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 440         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 441         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 442         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 443         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 444         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 445         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 446         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 447         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 448         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 449         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 450         fto[us][lh][sd].
 451         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 452         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 453         (arm_option_cpu_value): Add vfp3 and neon.
 454         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 455         VFPv1 attribute.
 456
 457 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 458
 459         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 460         syntax instead of hardcoded opcodes with ".w18" suffixes.
 461         (wide_branch_opcode): New.
 462         (build_transition): Use it to check for wide branch opcodes with
 463         either ".w18" or ".w15" suffixes.
 464
 465 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 466
 467         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 468         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 469         frag's is_literal flag.
 470
 471 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 472
 473         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 474
 475 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 476
 477         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 478         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 479         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 480         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 481         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 482
 483 2005-04-20  Paul Brook  <paul@codesourcery.com>
 484
 485         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 486         all targets.
 487         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 488
 489 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 490
 491         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 492         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 493         Make some cpus unsupported on ELF.  Run "make dep-am".
 494         * Makefile.in: Regenerate.
 495
 496 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 497
 498         * configure.in (--enable-targets): Indent help message.
 499         * configure: Regenerate.
 500
 501 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 502
 503         PR gas/2533
 504         * config/tc-i386.c (i386_immediate): Check illegal immediate
 505         register operand.
 506
 507 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 508
 509         * config/tc-i386.c: Formatting.
 510         (output_disp, output_imm): ISO C90 params.
 511
 512         * frags.c (frag_offset_fixed_p): Constify args.
 513         * frags.h (frag_offset_fixed_p): Ditto.
 514
 515         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 516         (COFF_MAGIC): Delete.
 517
 518         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 519
 520 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 521
 522         * po/POTFILES.in: Regenerated.
 523
 524 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 525
 526         * doc/as.texinfo: Mention that some .type syntaxes are not
 527         supported on all architectures.
 528
 529 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 530
 531         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 532         instructions when such transformations have been disabled.
 533
 534 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 535
 536         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 537         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 538         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 539         decoding the loop instructions.  Remove current_offset variable.
 540         (xtensa_fix_short_loop_frags): Likewise.
 541         (min_bytes_to_other_loop_end): Remove current_offset argument.
 542
 543 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 544
 545         * config/tc-z80.c (z80_optimize_expr): Removed.
 546         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 547
 548 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 549
 550         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 551         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 552         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 553         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 554         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 555         at90can64, at90usb646, at90usb647, at90usb1286 and
 556         at90usb1287.
 557         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 558
 559 2006-04-07  Paul Brook  <paul@codesourcery.com>
 560
 561         * config/tc-arm.c (parse_operands): Set default error message.
 562
 563 2006-04-07  Paul Brook  <paul@codesourcery.com>
 564
 565         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 566
 567 2006-04-07  Paul Brook  <paul@codesourcery.com>
 568
 569         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 570
 571 2006-04-07  Paul Brook  <paul@codesourcery.com>
 572
 573         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 574         (move_or_literal_pool): Handle Thumb-2 instructions.
 575         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 576
 577 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 578
 579         PR 2512.
 580         * config/tc-i386.c (match_template): Move 64-bit operand tests
 581         inside loop.
 582
 583 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 584
 585         * po/Make-in: Add install-html target.
 586         * Makefile.am: Add install-html and install-html-recursive targets.
 587         * Makefile.in: Regenerate.
 588         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 589         * configure: Regenerate.
 590         * doc/Makefile.am: Add install-html and install-html-am targets.
 591         * doc/Makefile.in: Regenerate.
 592
 593 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 594
 595         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 596         second scan.
 597
 598 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 599             Daniel Jacobowitz  <dan@codesourcery.com>
 600
 601         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 602         (GOTT_BASE, GOTT_INDEX): New.
 603         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 604         GOTT_INDEX when generating VxWorks PIC.
 605         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 606         use the generic *-*-vxworks* stanza instead.
 607
 608 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 609
 610         PR 997
 611         * frags.c (frag_offset_fixed_p): New function.
 612         * frags.h (frag_offset_fixed_p): Declare.
 613         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 614         (resolve_expression): Likewise.
 615
 616 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 617
 618         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 619         of the same length but different numbers of slots.
 620
 621 2006-03-30  Andreas Schwab  <schwab@suse.de>
 622
 623         * configure.in: Fix help string for --enable-targets option.
 624         * configure: Regenerate.
 625
 626 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 627
 628         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 629         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 630         overrun and avoid excessive copying.
 631
 632         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 633         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 634         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 635         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 636         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 637         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 638         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 639         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 640         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 641         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 642         (struct m68k_cpu): Change chip field to control_regs.
 643         (current_chip): Remove.
 644         (control_regs): New.
 645         (m68k_archs, m68k_extensions): Adjust.
 646         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 647         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 648         (find_cf_chip): Reimplement for new organization of cpu table.
 649         (select_control_regs): Remove.
 650         (mri_chip): Adjust.
 651         (struct save_opts): Save control regs, not chip.
 652         (s_save, s_restore): Adjust.
 653         (m68k_lookup_cpu): Give deprecated warning when necessary.
 654         (m68k_init_arch): Adjust.
 655         (md_show_usage): Adjust for new cpu table organization.
 656
 657 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 658
 659         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 660         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 661         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 662         "elf/bfin.h".
 663         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 664         (any_gotrel): New rule.
 665         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 666         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 667         "elf/bfin.h".
 668         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 669         (bfin_pic_ptr): New function.
 670         (md_pseudo_table): Add it for ".picptr".
 671         (OPTION_FDPIC): New macro.
 672         (md_longopts): Add -mfdpic.
 673         (md_parse_option): Handle it.
 674         (md_begin): Set BFD flags.
 675         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 676         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 677         us for GOT relocs.
 678         * Makefile.am (bfin-parse.o): Update dependencies.
 679         (DEPTC_bfin_elf): Likewise.
 680         * Makefile.in: Regenerate.
 681
 682 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 683
 684         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 685         mcfemac instead of mcfmac.
 686
 687 2006-03-23  Michael Matz  <matz@suse.de>
 688
 689         * config/tc-i386.c (type_names): Correct placement of 'static'.
 690         (reloc): Map some more relocs to their 64 bit counterpart when
 691         size is 8.
 692         (output_insn): Work around breakage if DEBUG386 is defined.
 693         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 694         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 695         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 696         different from i386.
 697         (output_imm): Ditto.
 698         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 699         Imm64.
 700         (md_convert_frag): Jumps can now be larger than 2GB away, error
 701         out in that case.
 702         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 703         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 704
 705 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 706             Daniel Jacobowitz  <dan@codesourcery.com>
 707             Phil Edwards  <phil@codesourcery.com>
 708             Zack Weinberg  <zack@codesourcery.com>
 709             Mark Mitchell  <mark@codesourcery.com>
 710             Nathan Sidwell  <nathan@codesourcery.com>
 711
 712         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 713         (md_begin): Complain about -G being used for PIC.  Don't change
 714         the text, data and bss alignments on VxWorks.
 715         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 716         generating VxWorks PIC.
 717         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 718         (macro): Likewise, but do not treat la $25 specially for
 719         VxWorks PIC, and do not handle jal.
 720         (OPTION_MVXWORKS_PIC): New macro.
 721         (md_longopts): Add -mvxworks-pic.
 722         (md_parse_option): Don't complain about using PIC and -G together here.
 723         Handle OPTION_MVXWORKS_PIC.
 724         (md_estimate_size_before_relax): Always use the first relaxation
 725         sequence on VxWorks.
 726         * config/tc-mips.h (VXWORKS_PIC): New.
 727
 728 2006-03-21  Paul Brook  <paul@codesourcery.com>
 729
 730         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 731
 732 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 733
 734         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 735         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 736         (get_loop_align_size): New.
 737         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 738         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 739         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 740         (get_noop_aligned_address): Use get_loop_align_size.
 741         (get_aligned_diff): Likewise.
 742
 743 2006-03-21  Paul Brook  <paul@codesourcery.com>
 744
 745         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 746
 747 2006-03-20  Paul Brook  <paul@codesourcery.com>
 748
 749         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 750         (do_t_branch): Encode branches inside IT blocks as unconditional.
 751         (do_t_cps): New function.
 752         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 753         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 754         (opcode_lookup): Allow conditional suffixes on all instructions in
 755         Thumb mode.
 756         (md_assemble): Advance condexec state before checking for errors.
 757         (insns): Use do_t_cps.
 758
 759 2006-03-20  Paul Brook  <paul@codesourcery.com>
 760
 761         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 762         outputting the insn.
 763
 764 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 765
 766         * config/tc-vax.c: Update copyright year.
 767         * config/tc-vax.h: Likewise.
 768
 769 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 770
 771         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 772         make it static.
 773         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 774
 775 2006-03-17  Paul Brook  <paul@codesourcery.com>
 776
 777         * config/tc-arm.c (insns): Add ldm and stm.
 778
 779 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 780
 781         PR gas/2446
 782         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 783
 784 2006-03-16  Paul Brook  <paul@codesourcery.com>
 785
 786         * config/tc-arm.c (insns): Add "svc".
 787
 788 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 789
 790         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 791         flag and avoid double underscore prefixes.
 792
 793 2006-03-10  Paul Brook  <paul@codesourcery.com>
 794
 795         * config/tc-arm.c (md_begin): Handle EABIv5.
 796         (arm_eabis): Add EF_ARM_EABI_VER5.
 797         * doc/c-arm.texi: Document -meabi=5.
 798
 799 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 800
 801         * app.c (do_scrub_chars): Simplify string handling.
 802
 803 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 804             Daniel Jacobowitz  <dan@codesourcery.com>
 805             Zack Weinberg  <zack@codesourcery.com>
 806             Nathan Sidwell  <nathan@codesourcery.com>
 807             Paul Brook  <paul@codesourcery.com>
 808             Ricardo Anguiano  <anguiano@codesourcery.com>
 809             Phil Edwards  <phil@codesourcery.com>
 810
 811         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 812         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 813         R_ARM_ABS12 reloc.
 814         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 815         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 816         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 817
 818 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 819
 820         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 821         even when using the text-section-literals option.
 822
 823 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 824
 825         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 826         and cf.
 827         (m68k_ip): <case 'J'> Check we have some control regs.
 828         (md_parse_option): Allow raw arch switch.
 829         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 830         whether 68881 or cfloat was meant by -mfloat.
 831         (md_show_usage): Adjust extension display.
 832         (m68k_elf_final_processing): Adjust.
 833
 834 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 835
 836         * config/tc-avr.c (avr_mod_hash_value): New function.
 837         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 838         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 839         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 840         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 841         of (int).
 842         (tc_gen_reloc): Handle substractions of symbols, if possible do
 843         fixups, abort otherwise.
 844         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 845         tc_fix_adjustable): Define.
 846
 847 2006-03-02  James E Wilson  <wilson@specifix.com>
 848
 849         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 850         change the template, then clear md.slot[curr].end_of_insn_group.
 851
 852 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 853
 854         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 855
 856 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 857
 858         PR/1070
 859         * macro.c (getstring): Don't treat parentheses special anymore.
 860         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 861         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 862         characters.
 863
 864 2006-02-28  Mat <mat@csail.mit.edu>
 865
 866         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 867
 868 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 869
 870         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 871         field.
 872         (CFI_signal_frame): Define.
 873         (cfi_pseudo_table): Add .cfi_signal_frame.
 874         (dot_cfi): Handle CFI_signal_frame.
 875         (output_cie): Handle cie->signal_frame.
 876         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 877         different.  Copy signal_frame from FDE to newly created CIE.
 878         * doc/as.texinfo: Document .cfi_signal_frame.
 879
 880 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 881
 882         * doc/Makefile.am: Add html target.
 883         * doc/Makefile.in: Regenerate.
 884         * po/Make-in: Add html target.
 885
 886 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 887
 888         * config/tc-i386.c (output_insn): Support Intel Merom New
 889         Instructions.
 890
 891         * config/tc-i386.h (CpuMNI): New.
 892         (CpuUnknownFlags): Add CpuMNI.
 893
 894 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 895
 896         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 897         (hpriv_reg_table): New table for hyperprivileged registers.
 898         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 899         register encoding.
 900
 901 2006-02-24  DJ Delorie  <dj@redhat.com>
 902
 903         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 904         (tc_gen_reloc): Don't define.
 905         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 906         (OPTION_LINKRELAX): New.
 907         (md_longopts): Add it.
 908         (m32c_relax): New.
 909         (md_parse_options): Set it.
 910         (md_assemble): Emit relaxation relocs as needed.
 911         (md_convert_frag): Emit relaxation relocs as needed.
 912         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 913         (m32c_apply_fix): New.
 914         (tc_gen_reloc): New.
 915         (m32c_force_relocation): Force out jump relocs when relaxing.
 916         (m32c_fix_adjustable): Return false if relaxing.
 917
 918 2006-02-24  Paul Brook  <paul@codesourcery.com>
 919
 920         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 921         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 922         (struct asm_barrier_opt): Define.
 923         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 924         (parse_psr): Accept V7M psr names.
 925         (parse_barrier): New function.
 926         (enum operand_parse_code): Add OP_oBARRIER.
 927         (parse_operands): Implement OP_oBARRIER.
 928         (do_barrier): New function.
 929         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 930         (do_t_cpsi): Add V7M restrictions.
 931         (do_t_mrs, do_t_msr): Validate V7M variants.
 932         (md_assemble): Check for NULL variants.
 933         (v7m_psrs, barrier_opt_names): New tables.
 934         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 935         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 936         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 937         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 938         (struct cpu_arch_ver_table): Define.
 939         (cpu_arch_ver): New.
 940         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 941         Tag_CPU_arch_profile.
 942         * doc/c-arm.texi: Document new cpu and arch options.
 943
 944 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 945
 946         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 947
 948 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 949
 950         * config/tc-ia64.c: Update copyright years.
 951
 952 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 953
 954         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 955         SDM 2.2.
 956
 957 2005-02-22  Paul Brook  <paul@codesourcery.com>
 958
 959         * config/tc-arm.c (do_pld): Remove incorrect write to
 960         inst.instruction.
 961         (encode_thumb32_addr_mode): Use correct operand.
 962
 963 2006-02-21  Paul Brook  <paul@codesourcery.com>
 964
 965         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 966
 967 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 968             Anil Paranjape   <anilp1@kpitcummins.com>
 969             Shilin Shakti    <shilins@kpitcummins.com>
 970
 971         * Makefile.am: Add xc16x related entry.
 972         * Makefile.in: Regenerate.
 973         * configure.in: Added xc16x related entry.
 974         * configure: Regenerate.
 975         * config/tc-xc16x.h: New file
 976         * config/tc-xc16x.c: New file
 977         * doc/c-xc16x.texi: New file for xc16x
 978         * doc/all.texi: Entry for xc16x
 979         * doc/Makefile.texi: Added c-xc16x.texi
 980         * NEWS: Announce the support for the new target.
 981
 982 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 983
 984         * configure.tgt: set emulation for mips-*-netbsd*
 985
 986 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 987
 988         * config.in: Rebuilt.
 989
 990 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 991
 992         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 993         from 1, not 0, in error messages.
 994         (md_assemble): Simplify special-case check for ENTRY instructions.
 995         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 996         operand in error message.
 997
 998 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 999
1000         * configure.tgt (arm-*-linux-gnueabi*): Change to
1001         arm-*-linux-*eabi*.
1002
1003 2006-02-10  Nick Clifton  <nickc@redhat.com>
1004
1005         * config/tc-crx.c (check_range): Ensure that the sign bit of a
1006         32-bit value is propagated into the upper bits of a 64-bit long.
1007
1008         * config/tc-arc.c (init_opcode_tables): Fix cast.
1009         (arc_extoper, md_operand): Likewise.
1010
1011 2006-02-09  David Heine  <dlheine@tensilica.com>
1012
1013         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1014         each relaxation step.
1015
1016 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
1017
1018         * configure.in (CHECK_DECLS): Add vsnprintf.
1019         * configure: Regenerate.
1020         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1021         include/declare here, but...
1022         * as.h: Move code detecting VARARGS idiom to the top.
1023         (errno.h, stdarg.h, varargs.h, va_list): ...here.
1024         (vsnprintf): Declare if not already declared.
1025
1026 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
1027
1028         * as.c (close_output_file): New.
1029         (main): Register close_output_file with xatexit before
1030         dump_statistics. Don't call output_file_close.
1031
1032 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
1033
1034         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1035         mcf5329_control_regs): New.
1036         (not_current_architecture, selected_arch, selected_cpu): New.
1037         (m68k_archs, m68k_extensions): New.
1038         (archs): Renamed to ...
1039         (m68k_cpus): ... here.  Adjust.
1040         (n_arches): Remove.
1041         (md_pseudo_table): Add arch and cpu directives.
1042         (find_cf_chip, m68k_ip): Adjust table scanning.
1043         (no_68851, no_68881): Remove.
1044         (md_assemble): Lazily initialize.
1045         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1046         (md_init_after_args): Move functionality to m68k_init_arch.
1047         (mri_chip): Adjust table scanning.
1048         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1049         options with saner parsing.
1050         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1051         m68k_init_arch): New.
1052         (s_m68k_cpu, s_m68k_arch): New.
1053         (md_show_usage): Adjust.
1054         (m68k_elf_final_processing): Set CF EF flags.
1055         * config/tc-m68k.h (m68k_init_after_args): Remove.
1056         (tc_init_after_args): Remove.
1057         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1058         (M68k-Directives): Document .arch and .cpu directives.
1059
1060 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1061
1062         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1063         synonyms for equ and defl.
1064         (z80_cons_fix_new): New function.
1065         (emit_byte): Disallow relative jumps to absolute locations.
1066         (emit_data): Only handle defb, prototype changed, because defb is
1067         now handled as pseudo-op rather than an instruction.
1068         (instab): Entries for defb,defw,db,dw moved from here...
1069         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1070         Add entries for def24,def32,d24,d32.
1071         (md_assemble): Improved error handling.
1072         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1073         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1074         (z80_cons_fix_new): Declare.
1075         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1076         (def24,d24,def32,d32): New pseudo-ops.
1077
1078 2006-02-02  Paul Brook  <paul@codesourcery.com>
1079
1080         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1081
1082 2005-02-02  Paul Brook  <paul@codesourcery.com>
1083
1084         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1085         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1086         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1087         T2_OPCODE_RSB): Define.
1088         (thumb32_negate_data_op): New function.
1089         (md_apply_fix): Use it.
1090
1091 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1092
1093         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1094         fields.
1095         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1096         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1097         subtracted symbols.
1098         (relaxation_requirements): Add pfinish_frag argument and use it to
1099         replace setting tinsn->record_fix fields.
1100         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1101         and vinsn_to_insnbuf.  Remove references to record_fix and
1102         slot_sub_symbols fields.
1103         (xtensa_mark_narrow_branches): Delete unused code.
1104         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1105         a symbol.
1106         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1107         record_fix fields.
1108         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1109         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1110         of the record_fix field.  Simplify error messages for unexpected
1111         symbolic operands.
1112         (set_expr_symbol_offset_diff): Delete.
1113
1114 2006-01-31  Paul Brook  <paul@codesourcery.com>
1115
1116         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1117
1118 2006-01-31  Paul Brook  <paul@codesourcery.com>
1119         Richard Earnshaw <rearnsha@arm.com>
1120
1121         * config/tc-arm.c: Use arm_feature_set.
1122         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1123         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1124         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1125         New variables.
1126         (insns): Use them.
1127         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1128         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1129         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1130         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1131         feature flags.
1132         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1133         (arm_opts): Move old cpu/arch options from here...
1134         (arm_legacy_opts): ... to here.
1135         (md_parse_option): Search arm_legacy_opts.
1136         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1137         (arm_float_abis, arm_eabis): Make const.
1138
1139 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1140
1141         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1142
1143 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1144
1145         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1146         in load immediate intruction.
1147
1148 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1149
1150         * config/bfin-parse.y (value_match): Use correct conversion
1151         specifications in template string for __FILE__ and __LINE__.
1152         (binary): Ditto.
1153         (unary): Ditto.
1154
1155 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1156
1157         Introduce TLS descriptors for i386 and x86_64.
1158         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1159         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1160         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1161         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1162         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1163         displacement bits.
1164         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1165         (lex_got): Handle @tlsdesc and @tlscall.
1166         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1167
1168 2006-01-11  Nick Clifton  <nickc@redhat.com>
1169
1170         Fixes for building on 64-bit hosts:
1171         * config/tc-avr.c (mod_index): New union to allow conversion
1172         between pointers and integers.
1173         (md_begin, avr_ldi_expression): Use it.
1174         * config/tc-i370.c (md_assemble): Add cast for argument to print
1175         statement.
1176         * config/tc-tic54x.c (subsym_substitute): Likewise.
1177         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1178         opindex field of fr_cgen structure into a pointer so that it can
1179         be stored in a frag.
1180         * config/tc-mn10300.c (md_assemble): Likewise.
1181         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1182         types.
1183         * config/tc-v850.c: Replace uses of (int) casts with correct
1184         types.
1185
1186 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1187
1188         PR gas/2117
1189         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1190
1191 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1192
1193         PR gas/2101
1194         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1195         a local-label reference.
1196
1197 For older changes see ChangeLog-2005
1198 \f
1199 Local Variables:
1200 mode: change-log
1201 left-margin: 8
1202 fill-column: 74
1203 version-control: never
1204 End: