Update translation templates
[binutils-gdb.git] / gas / ChangeLog
1 2006-05-22 Nick Clifton <nickc@redhat.com>
2
3 * po/gas.pot: Revised template.
4
5 2006-05-19 Thiemo Seufer <ths@mips.com>
6 Nigel Stephens <nigel@mips.com>
7
8 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
9 (mips_oddfpreg_ok): New function.
10 (mips_ip): Use it.
11
12 2006-05-19 Thiemo Seufer <ths@mips.com>
13 David Ung <davidu@mips.com>
14
15 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
16 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
17 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
18 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
19 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
20 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
21 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
22 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
23 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
24 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
25 reg_names_o32, reg_names_n32n64): Define register classes.
26 (reg_lookup): New function, use register classes.
27 (md_begin): Reserve register names in the symbol table. Simplify
28 OBJ_ELF defines.
29 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
30 Use reg_lookup.
31 (mips16_ip): Use reg_lookup.
32 (tc_get_register): Likewise.
33 (tc_mips_regname_to_dw2regnum): New function.
34
35 2006-05-19 Thiemo Seufer <ths@mips.com>
36
37 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
38 Un-constify string argument.
39 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
40 Likewise.
41 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
42 Likewise.
43 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
44 Likewise.
45 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
46 Likewise.
47 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
48 Likewise.
49 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
50 Likewise.
51
52 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
53
54 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
55 cfloat/m68881 to correct architecture before using it.
56
57 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
58
59 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
60 constant values.
61
62 2006-05-15 Paul Brook <paul@codesourcery.com>
63
64 * config/tc-arm.c (arm_adjust_symtab): Use
65 bfd_is_arm_special_symbol_name.
66
67 2006-05-15 Bob Wilson <bob.wilson@acm.org>
68
69 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
70 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
71 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
72 Handle errors from calls to xtensa_opcode_is_* functions.
73
74 2006-05-14 Thiemo Seufer <ths@mips.com>
75
76 * config/tc-mips.c (macro_build): Test for currently active
77 mips16 option.
78 (mips16_ip): Reject invalid opcodes.
79
80 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
81
82 * doc/as.texinfo: Rename "Index" to "AS Index",
83 and "ABORT" to "ABORT (COFF)".
84
85 2006-05-11 Paul Brook <paul@codesourcery.com>
86
87 * config/tc-arm.c (parse_half): New function.
88 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
89 (parse_operands): Ditto.
90 (do_mov16): Reject invalid relocations.
91 (do_t_mov16): Ditto. Use Thumb reloc numbers.
92 (insns): Replace Iffff with HALF.
93 (md_apply_fix): Add MOVW and MOVT relocs.
94 (tc_gen_reloc): Ditto.
95 * doc/c-arm.texi: Document relocation operators
96
97 2006-05-11 Paul Brook <paul@codesourcery.com>
98
99 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
100
101 2006-05-11 Thiemo Seufer <ths@mips.com>
102
103 * config/tc-mips.c (append_insn): Don't check the range of j or
104 jal addresses.
105
106 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
107
108 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
109 relocs against external symbols for WinCE targets.
110 (md_apply_fix): Likewise.
111
112 2006-05-09 David Ung <davidu@mips.com>
113
114 * config/tc-mips.c (append_insn): Only warn about an out-of-range
115 j or jal address.
116
117 2006-05-09 Nick Clifton <nickc@redhat.com>
118
119 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
120 against symbols which are not going to be placed into the symbol
121 table.
122
123 2006-05-09 Ben Elliston <bje@au.ibm.com>
124
125 * expr.c (operand): Remove `if (0 && ..)' statement and
126 subsequently unused target_op label. Collapse `if (1 || ..)'
127 statement.
128 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
129 separately above the switch.
130
131 2006-05-08 Nick Clifton <nickc@redhat.com>
132
133 PR gas/2623
134 * config/tc-msp430.c (line_separator_character): Define as |.
135
136 2006-05-08 Thiemo Seufer <ths@mips.com>
137 Nigel Stephens <nigel@mips.com>
138 David Ung <davidu@mips.com>
139
140 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
141 (mips_opts): Likewise.
142 (file_ase_smartmips): New variable.
143 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
144 (macro_build): Handle SmartMIPS instructions.
145 (mips_ip): Likewise.
146 (md_longopts): Add argument handling for smartmips.
147 (md_parse_options, mips_after_parse_args): Likewise.
148 (s_mipsset): Add .set smartmips support.
149 (md_show_usage): Document -msmartmips/-mno-smartmips.
150 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
151 .set smartmips.
152 * doc/c-mips.texi: Likewise.
153
154 2006-05-08 Alan Modra <amodra@bigpond.net.au>
155
156 * write.c (relax_segment): Add pass count arg. Don't error on
157 negative org/space on first two passes.
158 (relax_seg_info): New struct.
159 (relax_seg, write_object_file): Adjust.
160 * write.h (relax_segment): Update prototype.
161
162 2006-05-05 Julian Brown <julian@codesourcery.com>
163
164 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
165 checking.
166 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
167 architecture version checks.
168 (insns): Allow overlapping instructions to be used in VFP mode.
169
170 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
171
172 PR gas/2598
173 * config/obj-elf.c (obj_elf_change_section): Allow user
174 specified SHF_ALPHA_GPREL.
175
176 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
177
178 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
179 for PMEM related expressions.
180
181 2006-05-05 Nick Clifton <nickc@redhat.com>
182
183 PR gas/2582
184 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
185 insertion of a directory separator character into a string at a
186 given offset. Uses heuristics to decide when to use a backslash
187 character rather than a forward-slash character.
188 (dwarf2_directive_loc): Use the macro.
189 (out_debug_info): Likewise.
190
191 2006-05-05 Thiemo Seufer <ths@mips.com>
192 David Ung <davidu@mips.com>
193
194 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
195 instruction.
196 (macro): Add new case M_CACHE_AB.
197
198 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
199
200 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
201 (opcode_lookup): Issue a warning for opcode with
202 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
203 identical to OT_cinfix3.
204 (TxC3w, TC3w, tC3w): New.
205 (insns): Use tC3w and TC3w for comparison instructions with
206 's' suffix.
207
208 2006-05-04 Alan Modra <amodra@bigpond.net.au>
209
210 * subsegs.h (struct frchain): Delete frch_seg.
211 (frchain_root): Delete.
212 (seg_info): Define as macro.
213 * subsegs.c (frchain_root): Delete.
214 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
215 (subsegs_begin, subseg_change): Adjust for above.
216 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
217 rather than to one big list.
218 (subseg_get): Don't special case abs, und sections.
219 (subseg_new, subseg_force_new): Don't set frchainP here.
220 (seg_info): Delete.
221 (subsegs_print_statistics): Adjust frag chain control list traversal.
222 * debug.c (dmp_frags): Likewise.
223 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
224 at frchain_root. Make use of known frchain ordering.
225 (last_frag_for_seg): Likewise.
226 (get_frag_fix): Likewise. Add seg param.
227 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
228 * write.c (chain_frchains_together_1): Adjust for struct frchain.
229 (SUB_SEGMENT_ALIGN): Likewise.
230 (subsegs_finish): Adjust frchain list traversal.
231 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
232 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
233 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
234 (xtensa_fix_b_j_loop_end_frags): Likewise.
235 (xtensa_fix_close_loop_end_frags): Likewise.
236 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
237 (retrieve_segment_info): Delete frch_seg initialisation.
238
239 2006-05-03 Alan Modra <amodra@bigpond.net.au>
240
241 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
242 * config/obj-elf.h (obj_sec_set_private_data): Delete.
243 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
244 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
245
246 2006-05-02 Joseph Myers <joseph@codesourcery.com>
247
248 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
249 here.
250 (md_apply_fix3): Multiply offset by 4 here for
251 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
252
253 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
254 Jan Beulich <jbeulich@novell.com>
255
256 * config/tc-i386.c (output_invalid_buf): Change size for
257 unsigned char.
258 * config/tc-tic30.c (output_invalid_buf): Likewise.
259
260 * config/tc-i386.c (output_invalid): Cast none-ascii char to
261 unsigned char.
262 * config/tc-tic30.c (output_invalid): Likewise.
263
264 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
265
266 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
267 (TEXI2POD): Use AM_MAKEINFOFLAGS.
268 (asconfig.texi): Don't set top_srcdir.
269 * doc/as.texinfo: Don't use top_srcdir.
270 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
271
272 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
273
274 * config/tc-i386.c (output_invalid_buf): Change size to 16.
275 * config/tc-tic30.c (output_invalid_buf): Likewise.
276
277 * config/tc-i386.c (output_invalid): Use snprintf instead of
278 sprintf.
279 * config/tc-ia64.c (declare_register_set): Likewise.
280 (emit_one_bundle): Likewise.
281 (check_dependencies): Likewise.
282 * config/tc-tic30.c (output_invalid): Likewise.
283
284 2006-05-02 Paul Brook <paul@codesourcery.com>
285
286 * config/tc-arm.c (arm_optimize_expr): New function.
287 * config/tc-arm.h (md_optimize_expr): Define
288 (arm_optimize_expr): Add prototype.
289 (TC_FORCE_RELOCATION_SUB_SAME): Define.
290
291 2006-05-02 Ben Elliston <bje@au.ibm.com>
292
293 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
294 field unsigned.
295
296 * sb.h (sb_list_vector): Move to sb.c.
297 * sb.c (free_list): Use type of sb_list_vector directly.
298 (sb_build): Fix off-by-one error in assertion about `size'.
299
300 2006-05-01 Ben Elliston <bje@au.ibm.com>
301
302 * listing.c (listing_listing): Remove useless loop.
303 * macro.c (macro_expand): Remove is_positional local variable.
304 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
305 and simplify surrounding expressions, where possible.
306 (assign_symbol): Likewise.
307 (s_weakref): Likewise.
308 * symbols.c (colon): Likewise.
309
310 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
311
312 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
313
314 2006-04-30 Thiemo Seufer <ths@mips.com>
315 David Ung <davidu@mips.com>
316
317 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
318 (mips_immed): New table that records various handling of udi
319 instruction patterns.
320 (mips_ip): Adds udi handling.
321
322 2006-04-28 Alan Modra <amodra@bigpond.net.au>
323
324 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
325 of list rather than beginning.
326
327 2006-04-26 Julian Brown <julian@codesourcery.com>
328
329 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
330 (is_quarter_float): Rename from above. Simplify slightly.
331 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
332 number.
333 (parse_neon_mov): Parse floating-point constants.
334 (neon_qfloat_bits): Fix encoding.
335 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
336 preference to integer encoding when using the F32 type.
337
338 2006-04-26 Julian Brown <julian@codesourcery.com>
339
340 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
341 zero-initialising structures containing it will lead to invalid types).
342 (arm_it): Add vectype to each operand.
343 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
344 defined field.
345 (neon_typed_alias): New structure. Extra information for typed
346 register aliases.
347 (reg_entry): Add neon type info field.
348 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
349 Break out alternative syntax for coprocessor registers, etc. into...
350 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
351 out from arm_reg_parse.
352 (parse_neon_type): Move. Return SUCCESS/FAIL.
353 (first_error): New function. Call to ensure first error which occurs is
354 reported.
355 (parse_neon_operand_type): Parse exactly one type.
356 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
357 (parse_typed_reg_or_scalar): New function. Handle core of both
358 arm_typed_reg_parse and parse_scalar.
359 (arm_typed_reg_parse): Parse a register with an optional type.
360 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
361 result.
362 (parse_scalar): Parse a Neon scalar with optional type.
363 (parse_reg_list): Use first_error.
364 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
365 (neon_alias_types_same): New function. Return true if two (alias) types
366 are the same.
367 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
368 of elements.
369 (insert_reg_alias): Return new reg_entry not void.
370 (insert_neon_reg_alias): New function. Insert type/index information as
371 well as register for alias.
372 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
373 make typed register aliases accordingly.
374 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
375 of line.
376 (s_unreq): Delete type information if present.
377 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
378 (s_arm_unwind_save_mmxwcg): Likewise.
379 (s_arm_unwind_movsp): Likewise.
380 (s_arm_unwind_setfp): Likewise.
381 (parse_shift): Likewise.
382 (parse_shifter_operand): Likewise.
383 (parse_address): Likewise.
384 (parse_tb): Likewise.
385 (tc_arm_regname_to_dw2regnum): Likewise.
386 (md_pseudo_table): Add dn, qn.
387 (parse_neon_mov): Handle typed operands.
388 (parse_operands): Likewise.
389 (neon_type_mask): Add N_SIZ.
390 (N_ALLMODS): New macro.
391 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
392 (el_type_of_type_chk): Add some safeguards.
393 (modify_types_allowed): Fix logic bug.
394 (neon_check_type): Handle operands with types.
395 (neon_three_same): Remove redundant optional arg handling.
396 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
397 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
398 (do_neon_step): Adjust accordingly.
399 (neon_cmode_for_logic_imm): Use first_error.
400 (do_neon_bitfield): Call neon_check_type.
401 (neon_dyadic): Rename to...
402 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
403 to allow modification of type of the destination.
404 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
405 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
406 (do_neon_compare): Make destination be an untyped bitfield.
407 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
408 (neon_mul_mac): Return early in case of errors.
409 (neon_move_immediate): Use first_error.
410 (neon_mac_reg_scalar_long): Fix type to include scalar.
411 (do_neon_dup): Likewise.
412 (do_neon_mov): Likewise (in several places).
413 (do_neon_tbl_tbx): Fix type.
414 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
415 (do_neon_ld_dup): Exit early in case of errors and/or use
416 first_error.
417 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
418 Handle .dn/.qn directives.
419 (REGDEF): Add zero for reg_entry neon field.
420
421 2006-04-26 Julian Brown <julian@codesourcery.com>
422
423 * config/tc-arm.c (limits.h): Include.
424 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
425 (fpu_vfp_v3_or_neon_ext): Declare constants.
426 (neon_el_type): New enumeration of types for Neon vector elements.
427 (neon_type_el): New struct. Define type and size of a vector element.
428 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
429 instruction.
430 (neon_type): Define struct. The type of an instruction.
431 (arm_it): Add 'vectype' for the current instruction.
432 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
433 (vfp_sp_reg_pos): Rename to...
434 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
435 tags.
436 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
437 (Neon D or Q register).
438 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
439 register.
440 (GE_OPT_PREFIX_BIG): Define constant, for use in...
441 (my_get_expression): Allow above constant as argument to accept
442 64-bit constants with optional prefix.
443 (arm_reg_parse): Add extra argument to return the specific type of
444 register in when either a D or Q register (REG_TYPE_NDQ) is
445 requested. Can be NULL.
446 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
447 (parse_reg_list): Update for new arm_reg_parse args.
448 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
449 (parse_neon_el_struct_list): New function. Parse element/structure
450 register lists for VLD<n>/VST<n> instructions.
451 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
452 (s_arm_unwind_save_mmxwr): Likewise.
453 (s_arm_unwind_save_mmxwcg): Likewise.
454 (s_arm_unwind_movsp): Likewise.
455 (s_arm_unwind_setfp): Likewise.
456 (parse_big_immediate): New function. Parse an immediate, which may be
457 64 bits wide. Put results in inst.operands[i].
458 (parse_shift): Update for new arm_reg_parse args.
459 (parse_address): Likewise. Add parsing of alignment specifiers.
460 (parse_neon_mov): Parse the operands of a VMOV instruction.
461 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
462 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
463 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
464 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
465 (parse_operands): Handle new codes above.
466 (encode_arm_vfp_sp_reg): Rename to...
467 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
468 selected VFP version only supports D0-D15.
469 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
470 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
471 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
472 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
473 encode_arm_vfp_reg name, and allow 32 D regs.
474 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
475 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
476 regs.
477 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
478 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
479 constant-load and conversion insns introduced with VFPv3.
480 (neon_tab_entry): New struct.
481 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
482 those which are the targets of pseudo-instructions.
483 (neon_opc): Enumerate opcodes, use as indices into...
484 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
485 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
486 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
487 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
488 neon_enc_tab.
489 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
490 Neon instructions.
491 (neon_type_mask): New. Compact type representation for type checking.
492 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
493 permitted type combinations.
494 (N_IGNORE_TYPE): New macro.
495 (neon_check_shape): New function. Check an instruction shape for
496 multiple alternatives. Return the specific shape for the current
497 instruction.
498 (neon_modify_type_size): New function. Modify a vector type and size,
499 depending on the bit mask in argument 1.
500 (neon_type_promote): New function. Convert a given "key" type (of an
501 operand) into the correct type for a different operand, based on a bit
502 mask.
503 (type_chk_of_el_type): New function. Convert a type and size into the
504 compact representation used for type checking.
505 (el_type_of_type_ckh): New function. Reverse of above (only when a
506 single bit is set in the bit mask).
507 (modify_types_allowed): New function. Alter a mask of allowed types
508 based on a bit mask of modifications.
509 (neon_check_type): New function. Check the type of the current
510 instruction against the variable argument list. The "key" type of the
511 instruction is returned.
512 (neon_dp_fixup): New function. Fill in and modify instruction bits for
513 a Neon data-processing instruction depending on whether we're in ARM
514 mode or Thumb-2 mode.
515 (neon_logbits): New function.
516 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
517 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
518 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
519 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
520 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
521 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
522 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
523 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
524 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
525 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
526 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
527 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
528 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
529 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
530 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
531 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
532 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
533 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
534 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
535 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
536 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
537 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
538 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
539 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
540 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
541 helpers.
542 (parse_neon_type): New function. Parse Neon type specifier.
543 (opcode_lookup): Allow parsing of Neon type specifiers.
544 (REGNUM2, REGSETH, REGSET2): New macros.
545 (reg_names): Add new VFPv3 and Neon registers.
546 (NUF, nUF, NCE, nCE): New macros for opcode table.
547 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
548 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
549 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
550 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
551 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
552 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
553 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
554 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
555 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
556 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
557 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
558 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
559 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
560 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
561 fto[us][lh][sd].
562 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
563 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
564 (arm_option_cpu_value): Add vfp3 and neon.
565 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
566 VFPv1 attribute.
567
568 2006-04-25 Bob Wilson <bob.wilson@acm.org>
569
570 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
571 syntax instead of hardcoded opcodes with ".w18" suffixes.
572 (wide_branch_opcode): New.
573 (build_transition): Use it to check for wide branch opcodes with
574 either ".w18" or ".w15" suffixes.
575
576 2006-04-25 Bob Wilson <bob.wilson@acm.org>
577
578 * config/tc-xtensa.c (xtensa_create_literal_symbol,
579 xg_assemble_literal, xg_assemble_literal_space): Do not set the
580 frag's is_literal flag.
581
582 2006-04-25 Bob Wilson <bob.wilson@acm.org>
583
584 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
585
586 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
587
588 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
589 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
590 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
591 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
592 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
593
594 2005-04-20 Paul Brook <paul@codesourcery.com>
595
596 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
597 all targets.
598 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
599
600 2006-04-19 Alan Modra <amodra@bigpond.net.au>
601
602 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
603 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
604 Make some cpus unsupported on ELF. Run "make dep-am".
605 * Makefile.in: Regenerate.
606
607 2006-04-19 Alan Modra <amodra@bigpond.net.au>
608
609 * configure.in (--enable-targets): Indent help message.
610 * configure: Regenerate.
611
612 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
613
614 PR gas/2533
615 * config/tc-i386.c (i386_immediate): Check illegal immediate
616 register operand.
617
618 2006-04-18 Alan Modra <amodra@bigpond.net.au>
619
620 * config/tc-i386.c: Formatting.
621 (output_disp, output_imm): ISO C90 params.
622
623 * frags.c (frag_offset_fixed_p): Constify args.
624 * frags.h (frag_offset_fixed_p): Ditto.
625
626 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
627 (COFF_MAGIC): Delete.
628
629 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
630
631 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
632
633 * po/POTFILES.in: Regenerated.
634
635 2006-04-16 Mark Mitchell <mark@codesourcery.com>
636
637 * doc/as.texinfo: Mention that some .type syntaxes are not
638 supported on all architectures.
639
640 2006-04-14 Sterling Augustine <sterling@tensilica.com>
641
642 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
643 instructions when such transformations have been disabled.
644
645 2006-04-10 Sterling Augustine <sterling@tensilica.com>
646
647 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
648 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
649 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
650 decoding the loop instructions. Remove current_offset variable.
651 (xtensa_fix_short_loop_frags): Likewise.
652 (min_bytes_to_other_loop_end): Remove current_offset argument.
653
654 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
655
656 * config/tc-z80.c (z80_optimize_expr): Removed.
657 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
658
659 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
660
661 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
662 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
663 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
664 atmega644, atmega329, atmega3290, atmega649, atmega6490,
665 atmega406, atmega640, atmega1280, atmega1281, at90can32,
666 at90can64, at90usb646, at90usb647, at90usb1286 and
667 at90usb1287.
668 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
669
670 2006-04-07 Paul Brook <paul@codesourcery.com>
671
672 * config/tc-arm.c (parse_operands): Set default error message.
673
674 2006-04-07 Paul Brook <paul@codesourcery.com>
675
676 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
677
678 2006-04-07 Paul Brook <paul@codesourcery.com>
679
680 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
681
682 2006-04-07 Paul Brook <paul@codesourcery.com>
683
684 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
685 (move_or_literal_pool): Handle Thumb-2 instructions.
686 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
687
688 2006-04-07 Alan Modra <amodra@bigpond.net.au>
689
690 PR 2512.
691 * config/tc-i386.c (match_template): Move 64-bit operand tests
692 inside loop.
693
694 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
695
696 * po/Make-in: Add install-html target.
697 * Makefile.am: Add install-html and install-html-recursive targets.
698 * Makefile.in: Regenerate.
699 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
700 * configure: Regenerate.
701 * doc/Makefile.am: Add install-html and install-html-am targets.
702 * doc/Makefile.in: Regenerate.
703
704 2006-04-06 Alan Modra <amodra@bigpond.net.au>
705
706 * frags.c (frag_offset_fixed_p): Reinitialise offset before
707 second scan.
708
709 2006-04-05 Richard Sandiford <richard@codesourcery.com>
710 Daniel Jacobowitz <dan@codesourcery.com>
711
712 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
713 (GOTT_BASE, GOTT_INDEX): New.
714 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
715 GOTT_INDEX when generating VxWorks PIC.
716 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
717 use the generic *-*-vxworks* stanza instead.
718
719 2006-04-04 Alan Modra <amodra@bigpond.net.au>
720
721 PR 997
722 * frags.c (frag_offset_fixed_p): New function.
723 * frags.h (frag_offset_fixed_p): Declare.
724 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
725 (resolve_expression): Likewise.
726
727 2006-04-03 Sterling Augustine <sterling@tensilica.com>
728
729 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
730 of the same length but different numbers of slots.
731
732 2006-03-30 Andreas Schwab <schwab@suse.de>
733
734 * configure.in: Fix help string for --enable-targets option.
735 * configure: Regenerate.
736
737 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
738
739 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
740 (m68k_ip): ... here. Use for all chips. Protect against buffer
741 overrun and avoid excessive copying.
742
743 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
744 m68020_control_regs, m68040_control_regs, m68060_control_regs,
745 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
746 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
747 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
748 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
749 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
750 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
751 mcf5282_ctrl, mcfv4e_ctrl): ... these.
752 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
753 (struct m68k_cpu): Change chip field to control_regs.
754 (current_chip): Remove.
755 (control_regs): New.
756 (m68k_archs, m68k_extensions): Adjust.
757 (m68k_cpus): Reorder to be in cpu number order. Adjust.
758 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
759 (find_cf_chip): Reimplement for new organization of cpu table.
760 (select_control_regs): Remove.
761 (mri_chip): Adjust.
762 (struct save_opts): Save control regs, not chip.
763 (s_save, s_restore): Adjust.
764 (m68k_lookup_cpu): Give deprecated warning when necessary.
765 (m68k_init_arch): Adjust.
766 (md_show_usage): Adjust for new cpu table organization.
767
768 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
769
770 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
771 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
772 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
773 "elf/bfin.h".
774 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
775 (any_gotrel): New rule.
776 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
777 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
778 "elf/bfin.h".
779 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
780 (bfin_pic_ptr): New function.
781 (md_pseudo_table): Add it for ".picptr".
782 (OPTION_FDPIC): New macro.
783 (md_longopts): Add -mfdpic.
784 (md_parse_option): Handle it.
785 (md_begin): Set BFD flags.
786 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
787 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
788 us for GOT relocs.
789 * Makefile.am (bfin-parse.o): Update dependencies.
790 (DEPTC_bfin_elf): Likewise.
791 * Makefile.in: Regenerate.
792
793 2006-03-25 Richard Sandiford <richard@codesourcery.com>
794
795 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
796 mcfemac instead of mcfmac.
797
798 2006-03-23 Michael Matz <matz@suse.de>
799
800 * config/tc-i386.c (type_names): Correct placement of 'static'.
801 (reloc): Map some more relocs to their 64 bit counterpart when
802 size is 8.
803 (output_insn): Work around breakage if DEBUG386 is defined.
804 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
805 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
806 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
807 different from i386.
808 (output_imm): Ditto.
809 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
810 Imm64.
811 (md_convert_frag): Jumps can now be larger than 2GB away, error
812 out in that case.
813 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
814 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
815
816 2006-03-22 Richard Sandiford <richard@codesourcery.com>
817 Daniel Jacobowitz <dan@codesourcery.com>
818 Phil Edwards <phil@codesourcery.com>
819 Zack Weinberg <zack@codesourcery.com>
820 Mark Mitchell <mark@codesourcery.com>
821 Nathan Sidwell <nathan@codesourcery.com>
822
823 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
824 (md_begin): Complain about -G being used for PIC. Don't change
825 the text, data and bss alignments on VxWorks.
826 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
827 generating VxWorks PIC.
828 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
829 (macro): Likewise, but do not treat la $25 specially for
830 VxWorks PIC, and do not handle jal.
831 (OPTION_MVXWORKS_PIC): New macro.
832 (md_longopts): Add -mvxworks-pic.
833 (md_parse_option): Don't complain about using PIC and -G together here.
834 Handle OPTION_MVXWORKS_PIC.
835 (md_estimate_size_before_relax): Always use the first relaxation
836 sequence on VxWorks.
837 * config/tc-mips.h (VXWORKS_PIC): New.
838
839 2006-03-21 Paul Brook <paul@codesourcery.com>
840
841 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
842
843 2006-03-21 Sterling Augustine <sterling@tensilica.com>
844
845 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
846 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
847 (get_loop_align_size): New.
848 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
849 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
850 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
851 (get_noop_aligned_address): Use get_loop_align_size.
852 (get_aligned_diff): Likewise.
853
854 2006-03-21 Paul Brook <paul@codesourcery.com>
855
856 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
857
858 2006-03-20 Paul Brook <paul@codesourcery.com>
859
860 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
861 (do_t_branch): Encode branches inside IT blocks as unconditional.
862 (do_t_cps): New function.
863 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
864 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
865 (opcode_lookup): Allow conditional suffixes on all instructions in
866 Thumb mode.
867 (md_assemble): Advance condexec state before checking for errors.
868 (insns): Use do_t_cps.
869
870 2006-03-20 Paul Brook <paul@codesourcery.com>
871
872 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
873 outputting the insn.
874
875 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
876
877 * config/tc-vax.c: Update copyright year.
878 * config/tc-vax.h: Likewise.
879
880 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
881
882 * config/tc-vax.c (md_chars_to_number): Used only locally, so
883 make it static.
884 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
885
886 2006-03-17 Paul Brook <paul@codesourcery.com>
887
888 * config/tc-arm.c (insns): Add ldm and stm.
889
890 2006-03-17 Ben Elliston <bje@au.ibm.com>
891
892 PR gas/2446
893 * doc/as.texinfo (Ident): Document this directive more thoroughly.
894
895 2006-03-16 Paul Brook <paul@codesourcery.com>
896
897 * config/tc-arm.c (insns): Add "svc".
898
899 2006-03-13 Bob Wilson <bob.wilson@acm.org>
900
901 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
902 flag and avoid double underscore prefixes.
903
904 2006-03-10 Paul Brook <paul@codesourcery.com>
905
906 * config/tc-arm.c (md_begin): Handle EABIv5.
907 (arm_eabis): Add EF_ARM_EABI_VER5.
908 * doc/c-arm.texi: Document -meabi=5.
909
910 2006-03-10 Ben Elliston <bje@au.ibm.com>
911
912 * app.c (do_scrub_chars): Simplify string handling.
913
914 2006-03-07 Richard Sandiford <richard@codesourcery.com>
915 Daniel Jacobowitz <dan@codesourcery.com>
916 Zack Weinberg <zack@codesourcery.com>
917 Nathan Sidwell <nathan@codesourcery.com>
918 Paul Brook <paul@codesourcery.com>
919 Ricardo Anguiano <anguiano@codesourcery.com>
920 Phil Edwards <phil@codesourcery.com>
921
922 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
923 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
924 R_ARM_ABS12 reloc.
925 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
926 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
927 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
928
929 2006-03-06 Bob Wilson <bob.wilson@acm.org>
930
931 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
932 even when using the text-section-literals option.
933
934 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
935
936 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
937 and cf.
938 (m68k_ip): <case 'J'> Check we have some control regs.
939 (md_parse_option): Allow raw arch switch.
940 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
941 whether 68881 or cfloat was meant by -mfloat.
942 (md_show_usage): Adjust extension display.
943 (m68k_elf_final_processing): Adjust.
944
945 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
946
947 * config/tc-avr.c (avr_mod_hash_value): New function.
948 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
949 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
950 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
951 instead of int avr_ldi_expression: use avr_mod_hash_value instead
952 of (int).
953 (tc_gen_reloc): Handle substractions of symbols, if possible do
954 fixups, abort otherwise.
955 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
956 tc_fix_adjustable): Define.
957
958 2006-03-02 James E Wilson <wilson@specifix.com>
959
960 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
961 change the template, then clear md.slot[curr].end_of_insn_group.
962
963 2006-02-28 Jan Beulich <jbeulich@novell.com>
964
965 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
966
967 2006-02-28 Jan Beulich <jbeulich@novell.com>
968
969 PR/1070
970 * macro.c (getstring): Don't treat parentheses special anymore.
971 (get_any_string): Don't consider '(' and ')' as quoting anymore.
972 Special-case '(', ')', '[', and ']' when dealing with non-quoting
973 characters.
974
975 2006-02-28 Mat <mat@csail.mit.edu>
976
977 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
978
979 2006-02-27 Jakub Jelinek <jakub@redhat.com>
980
981 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
982 field.
983 (CFI_signal_frame): Define.
984 (cfi_pseudo_table): Add .cfi_signal_frame.
985 (dot_cfi): Handle CFI_signal_frame.
986 (output_cie): Handle cie->signal_frame.
987 (select_cie_for_fde): Don't share CIE if signal_frame flag is
988 different. Copy signal_frame from FDE to newly created CIE.
989 * doc/as.texinfo: Document .cfi_signal_frame.
990
991 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
992
993 * doc/Makefile.am: Add html target.
994 * doc/Makefile.in: Regenerate.
995 * po/Make-in: Add html target.
996
997 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
998
999 * config/tc-i386.c (output_insn): Support Intel Merom New
1000 Instructions.
1001
1002 * config/tc-i386.h (CpuMNI): New.
1003 (CpuUnknownFlags): Add CpuMNI.
1004
1005 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1006
1007 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1008 (hpriv_reg_table): New table for hyperprivileged registers.
1009 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1010 register encoding.
1011
1012 2006-02-24 DJ Delorie <dj@redhat.com>
1013
1014 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1015 (tc_gen_reloc): Don't define.
1016 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1017 (OPTION_LINKRELAX): New.
1018 (md_longopts): Add it.
1019 (m32c_relax): New.
1020 (md_parse_options): Set it.
1021 (md_assemble): Emit relaxation relocs as needed.
1022 (md_convert_frag): Emit relaxation relocs as needed.
1023 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1024 (m32c_apply_fix): New.
1025 (tc_gen_reloc): New.
1026 (m32c_force_relocation): Force out jump relocs when relaxing.
1027 (m32c_fix_adjustable): Return false if relaxing.
1028
1029 2006-02-24 Paul Brook <paul@codesourcery.com>
1030
1031 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1032 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1033 (struct asm_barrier_opt): Define.
1034 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1035 (parse_psr): Accept V7M psr names.
1036 (parse_barrier): New function.
1037 (enum operand_parse_code): Add OP_oBARRIER.
1038 (parse_operands): Implement OP_oBARRIER.
1039 (do_barrier): New function.
1040 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1041 (do_t_cpsi): Add V7M restrictions.
1042 (do_t_mrs, do_t_msr): Validate V7M variants.
1043 (md_assemble): Check for NULL variants.
1044 (v7m_psrs, barrier_opt_names): New tables.
1045 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1046 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1047 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1048 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1049 (struct cpu_arch_ver_table): Define.
1050 (cpu_arch_ver): New.
1051 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1052 Tag_CPU_arch_profile.
1053 * doc/c-arm.texi: Document new cpu and arch options.
1054
1055 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1056
1057 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1058
1059 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1060
1061 * config/tc-ia64.c: Update copyright years.
1062
1063 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1064
1065 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1066 SDM 2.2.
1067
1068 2005-02-22 Paul Brook <paul@codesourcery.com>
1069
1070 * config/tc-arm.c (do_pld): Remove incorrect write to
1071 inst.instruction.
1072 (encode_thumb32_addr_mode): Use correct operand.
1073
1074 2006-02-21 Paul Brook <paul@codesourcery.com>
1075
1076 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1077
1078 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1079 Anil Paranjape <anilp1@kpitcummins.com>
1080 Shilin Shakti <shilins@kpitcummins.com>
1081
1082 * Makefile.am: Add xc16x related entry.
1083 * Makefile.in: Regenerate.
1084 * configure.in: Added xc16x related entry.
1085 * configure: Regenerate.
1086 * config/tc-xc16x.h: New file
1087 * config/tc-xc16x.c: New file
1088 * doc/c-xc16x.texi: New file for xc16x
1089 * doc/all.texi: Entry for xc16x
1090 * doc/Makefile.texi: Added c-xc16x.texi
1091 * NEWS: Announce the support for the new target.
1092
1093 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1094
1095 * configure.tgt: set emulation for mips-*-netbsd*
1096
1097 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1098
1099 * config.in: Rebuilt.
1100
1101 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1102
1103 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1104 from 1, not 0, in error messages.
1105 (md_assemble): Simplify special-case check for ENTRY instructions.
1106 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1107 operand in error message.
1108
1109 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1110
1111 * configure.tgt (arm-*-linux-gnueabi*): Change to
1112 arm-*-linux-*eabi*.
1113
1114 2006-02-10 Nick Clifton <nickc@redhat.com>
1115
1116 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1117 32-bit value is propagated into the upper bits of a 64-bit long.
1118
1119 * config/tc-arc.c (init_opcode_tables): Fix cast.
1120 (arc_extoper, md_operand): Likewise.
1121
1122 2006-02-09 David Heine <dlheine@tensilica.com>
1123
1124 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1125 each relaxation step.
1126
1127 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1128
1129 * configure.in (CHECK_DECLS): Add vsnprintf.
1130 * configure: Regenerate.
1131 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1132 include/declare here, but...
1133 * as.h: Move code detecting VARARGS idiom to the top.
1134 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1135 (vsnprintf): Declare if not already declared.
1136
1137 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1138
1139 * as.c (close_output_file): New.
1140 (main): Register close_output_file with xatexit before
1141 dump_statistics. Don't call output_file_close.
1142
1143 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1144
1145 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1146 mcf5329_control_regs): New.
1147 (not_current_architecture, selected_arch, selected_cpu): New.
1148 (m68k_archs, m68k_extensions): New.
1149 (archs): Renamed to ...
1150 (m68k_cpus): ... here. Adjust.
1151 (n_arches): Remove.
1152 (md_pseudo_table): Add arch and cpu directives.
1153 (find_cf_chip, m68k_ip): Adjust table scanning.
1154 (no_68851, no_68881): Remove.
1155 (md_assemble): Lazily initialize.
1156 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1157 (md_init_after_args): Move functionality to m68k_init_arch.
1158 (mri_chip): Adjust table scanning.
1159 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1160 options with saner parsing.
1161 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1162 m68k_init_arch): New.
1163 (s_m68k_cpu, s_m68k_arch): New.
1164 (md_show_usage): Adjust.
1165 (m68k_elf_final_processing): Set CF EF flags.
1166 * config/tc-m68k.h (m68k_init_after_args): Remove.
1167 (tc_init_after_args): Remove.
1168 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1169 (M68k-Directives): Document .arch and .cpu directives.
1170
1171 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1172
1173 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1174 synonyms for equ and defl.
1175 (z80_cons_fix_new): New function.
1176 (emit_byte): Disallow relative jumps to absolute locations.
1177 (emit_data): Only handle defb, prototype changed, because defb is
1178 now handled as pseudo-op rather than an instruction.
1179 (instab): Entries for defb,defw,db,dw moved from here...
1180 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1181 Add entries for def24,def32,d24,d32.
1182 (md_assemble): Improved error handling.
1183 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1184 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1185 (z80_cons_fix_new): Declare.
1186 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1187 (def24,d24,def32,d32): New pseudo-ops.
1188
1189 2006-02-02 Paul Brook <paul@codesourcery.com>
1190
1191 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1192
1193 2005-02-02 Paul Brook <paul@codesourcery.com>
1194
1195 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1196 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1197 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1198 T2_OPCODE_RSB): Define.
1199 (thumb32_negate_data_op): New function.
1200 (md_apply_fix): Use it.
1201
1202 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1203
1204 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1205 fields.
1206 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1207 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1208 subtracted symbols.
1209 (relaxation_requirements): Add pfinish_frag argument and use it to
1210 replace setting tinsn->record_fix fields.
1211 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1212 and vinsn_to_insnbuf. Remove references to record_fix and
1213 slot_sub_symbols fields.
1214 (xtensa_mark_narrow_branches): Delete unused code.
1215 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1216 a symbol.
1217 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1218 record_fix fields.
1219 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1220 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1221 of the record_fix field. Simplify error messages for unexpected
1222 symbolic operands.
1223 (set_expr_symbol_offset_diff): Delete.
1224
1225 2006-01-31 Paul Brook <paul@codesourcery.com>
1226
1227 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1228
1229 2006-01-31 Paul Brook <paul@codesourcery.com>
1230 Richard Earnshaw <rearnsha@arm.com>
1231
1232 * config/tc-arm.c: Use arm_feature_set.
1233 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1234 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1235 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1236 New variables.
1237 (insns): Use them.
1238 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1239 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1240 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1241 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1242 feature flags.
1243 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1244 (arm_opts): Move old cpu/arch options from here...
1245 (arm_legacy_opts): ... to here.
1246 (md_parse_option): Search arm_legacy_opts.
1247 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1248 (arm_float_abis, arm_eabis): Make const.
1249
1250 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1251
1252 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1253
1254 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1255
1256 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1257 in load immediate intruction.
1258
1259 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1260
1261 * config/bfin-parse.y (value_match): Use correct conversion
1262 specifications in template string for __FILE__ and __LINE__.
1263 (binary): Ditto.
1264 (unary): Ditto.
1265
1266 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1267
1268 Introduce TLS descriptors for i386 and x86_64.
1269 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1270 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1271 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1272 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1273 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1274 displacement bits.
1275 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1276 (lex_got): Handle @tlsdesc and @tlscall.
1277 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1278
1279 2006-01-11 Nick Clifton <nickc@redhat.com>
1280
1281 Fixes for building on 64-bit hosts:
1282 * config/tc-avr.c (mod_index): New union to allow conversion
1283 between pointers and integers.
1284 (md_begin, avr_ldi_expression): Use it.
1285 * config/tc-i370.c (md_assemble): Add cast for argument to print
1286 statement.
1287 * config/tc-tic54x.c (subsym_substitute): Likewise.
1288 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1289 opindex field of fr_cgen structure into a pointer so that it can
1290 be stored in a frag.
1291 * config/tc-mn10300.c (md_assemble): Likewise.
1292 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1293 types.
1294 * config/tc-v850.c: Replace uses of (int) casts with correct
1295 types.
1296
1297 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1298
1299 PR gas/2117
1300 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1301
1302 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1303
1304 PR gas/2101
1305 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1306 a local-label reference.
1307
1308 For older changes see ChangeLog-2005
1309 \f
1310 Local Variables:
1311 mode: change-log
1312 left-margin: 8
1313 fill-column: 74
1314 version-control: never
1315 End: