PR gas/2582
[binutils-gdb.git] / gas / ChangeLog
1 2006-05-05 Nick Clifton <nickc@redhat.com>
2
3 PR gas/2582
4 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
5 insertion of a directory separator character into a string at a
6 given offset. Uses heuristics to decide when to use a backslash
7 character rather than a forward-slash character.
8 (dwarf2_directive_loc): Use the macro.
9 (out_debug_info): Likewise.
10
11 2006-05-05 Thiemo Seufer <ths@mips.com>
12 David Ung <davidu@mips.com>
13
14 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
15 instruction.
16 (macro): Add new case M_CACHE_AB.
17
18 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
19
20 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
21 (opcode_lookup): Issue a warning for opcode with
22 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
23 identical to OT_cinfix3.
24 (TxC3w, TC3w, tC3w): New.
25 (insns): Use tC3w and TC3w for comparison instructions with
26 's' suffix.
27
28 2006-05-04 Alan Modra <amodra@bigpond.net.au>
29
30 * subsegs.h (struct frchain): Delete frch_seg.
31 (frchain_root): Delete.
32 (seg_info): Define as macro.
33 * subsegs.c (frchain_root): Delete.
34 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
35 (subsegs_begin, subseg_change): Adjust for above.
36 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
37 rather than to one big list.
38 (subseg_get): Don't special case abs, und sections.
39 (subseg_new, subseg_force_new): Don't set frchainP here.
40 (seg_info): Delete.
41 (subsegs_print_statistics): Adjust frag chain control list traversal.
42 * debug.c (dmp_frags): Likewise.
43 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
44 at frchain_root. Make use of known frchain ordering.
45 (last_frag_for_seg): Likewise.
46 (get_frag_fix): Likewise. Add seg param.
47 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
48 * write.c (chain_frchains_together_1): Adjust for struct frchain.
49 (SUB_SEGMENT_ALIGN): Likewise.
50 (subsegs_finish): Adjust frchain list traversal.
51 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
52 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
53 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
54 (xtensa_fix_b_j_loop_end_frags): Likewise.
55 (xtensa_fix_close_loop_end_frags): Likewise.
56 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
57 (retrieve_segment_info): Delete frch_seg initialisation.
58
59 2006-05-03 Alan Modra <amodra@bigpond.net.au>
60
61 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
62 * config/obj-elf.h (obj_sec_set_private_data): Delete.
63 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
64 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
65
66 2006-05-02 Joseph Myers <joseph@codesourcery.com>
67
68 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
69 here.
70 (md_apply_fix3): Multiply offset by 4 here for
71 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
72
73 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
74 Jan Beulich <jbeulich@novell.com>
75
76 * config/tc-i386.c (output_invalid_buf): Change size for
77 unsigned char.
78 * config/tc-tic30.c (output_invalid_buf): Likewise.
79
80 * config/tc-i386.c (output_invalid): Cast none-ascii char to
81 unsigned char.
82 * config/tc-tic30.c (output_invalid): Likewise.
83
84 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
85
86 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
87 (TEXI2POD): Use AM_MAKEINFOFLAGS.
88 (asconfig.texi): Don't set top_srcdir.
89 * doc/as.texinfo: Don't use top_srcdir.
90 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
91
92 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
93
94 * config/tc-i386.c (output_invalid_buf): Change size to 16.
95 * config/tc-tic30.c (output_invalid_buf): Likewise.
96
97 * config/tc-i386.c (output_invalid): Use snprintf instead of
98 sprintf.
99 * config/tc-ia64.c (declare_register_set): Likewise.
100 (emit_one_bundle): Likewise.
101 (check_dependencies): Likewise.
102 * config/tc-tic30.c (output_invalid): Likewise.
103
104 2006-05-02 Paul Brook <paul@codesourcery.com>
105
106 * config/tc-arm.c (arm_optimize_expr): New function.
107 * config/tc-arm.h (md_optimize_expr): Define
108 (arm_optimize_expr): Add prototype.
109 (TC_FORCE_RELOCATION_SUB_SAME): Define.
110
111 2006-05-02 Ben Elliston <bje@au.ibm.com>
112
113 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
114 field unsigned.
115
116 * sb.h (sb_list_vector): Move to sb.c.
117 * sb.c (free_list): Use type of sb_list_vector directly.
118 (sb_build): Fix off-by-one error in assertion about `size'.
119
120 2006-05-01 Ben Elliston <bje@au.ibm.com>
121
122 * listing.c (listing_listing): Remove useless loop.
123 * macro.c (macro_expand): Remove is_positional local variable.
124 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
125 and simplify surrounding expressions, where possible.
126 (assign_symbol): Likewise.
127 (s_weakref): Likewise.
128 * symbols.c (colon): Likewise.
129
130 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
131
132 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
133
134 2006-04-30 Thiemo Seufer <ths@mips.com>
135 David Ung <davidu@mips.com>
136
137 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
138 (mips_immed): New table that records various handling of udi
139 instruction patterns.
140 (mips_ip): Adds udi handling.
141
142 2006-04-28 Alan Modra <amodra@bigpond.net.au>
143
144 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
145 of list rather than beginning.
146
147 2006-04-26 Julian Brown <julian@codesourcery.com>
148
149 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
150 (is_quarter_float): Rename from above. Simplify slightly.
151 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
152 number.
153 (parse_neon_mov): Parse floating-point constants.
154 (neon_qfloat_bits): Fix encoding.
155 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
156 preference to integer encoding when using the F32 type.
157
158 2006-04-26 Julian Brown <julian@codesourcery.com>
159
160 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
161 zero-initialising structures containing it will lead to invalid types).
162 (arm_it): Add vectype to each operand.
163 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
164 defined field.
165 (neon_typed_alias): New structure. Extra information for typed
166 register aliases.
167 (reg_entry): Add neon type info field.
168 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
169 Break out alternative syntax for coprocessor registers, etc. into...
170 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
171 out from arm_reg_parse.
172 (parse_neon_type): Move. Return SUCCESS/FAIL.
173 (first_error): New function. Call to ensure first error which occurs is
174 reported.
175 (parse_neon_operand_type): Parse exactly one type.
176 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
177 (parse_typed_reg_or_scalar): New function. Handle core of both
178 arm_typed_reg_parse and parse_scalar.
179 (arm_typed_reg_parse): Parse a register with an optional type.
180 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
181 result.
182 (parse_scalar): Parse a Neon scalar with optional type.
183 (parse_reg_list): Use first_error.
184 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
185 (neon_alias_types_same): New function. Return true if two (alias) types
186 are the same.
187 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
188 of elements.
189 (insert_reg_alias): Return new reg_entry not void.
190 (insert_neon_reg_alias): New function. Insert type/index information as
191 well as register for alias.
192 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
193 make typed register aliases accordingly.
194 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
195 of line.
196 (s_unreq): Delete type information if present.
197 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
198 (s_arm_unwind_save_mmxwcg): Likewise.
199 (s_arm_unwind_movsp): Likewise.
200 (s_arm_unwind_setfp): Likewise.
201 (parse_shift): Likewise.
202 (parse_shifter_operand): Likewise.
203 (parse_address): Likewise.
204 (parse_tb): Likewise.
205 (tc_arm_regname_to_dw2regnum): Likewise.
206 (md_pseudo_table): Add dn, qn.
207 (parse_neon_mov): Handle typed operands.
208 (parse_operands): Likewise.
209 (neon_type_mask): Add N_SIZ.
210 (N_ALLMODS): New macro.
211 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
212 (el_type_of_type_chk): Add some safeguards.
213 (modify_types_allowed): Fix logic bug.
214 (neon_check_type): Handle operands with types.
215 (neon_three_same): Remove redundant optional arg handling.
216 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
217 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
218 (do_neon_step): Adjust accordingly.
219 (neon_cmode_for_logic_imm): Use first_error.
220 (do_neon_bitfield): Call neon_check_type.
221 (neon_dyadic): Rename to...
222 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
223 to allow modification of type of the destination.
224 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
225 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
226 (do_neon_compare): Make destination be an untyped bitfield.
227 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
228 (neon_mul_mac): Return early in case of errors.
229 (neon_move_immediate): Use first_error.
230 (neon_mac_reg_scalar_long): Fix type to include scalar.
231 (do_neon_dup): Likewise.
232 (do_neon_mov): Likewise (in several places).
233 (do_neon_tbl_tbx): Fix type.
234 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
235 (do_neon_ld_dup): Exit early in case of errors and/or use
236 first_error.
237 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
238 Handle .dn/.qn directives.
239 (REGDEF): Add zero for reg_entry neon field.
240
241 2006-04-26 Julian Brown <julian@codesourcery.com>
242
243 * config/tc-arm.c (limits.h): Include.
244 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
245 (fpu_vfp_v3_or_neon_ext): Declare constants.
246 (neon_el_type): New enumeration of types for Neon vector elements.
247 (neon_type_el): New struct. Define type and size of a vector element.
248 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
249 instruction.
250 (neon_type): Define struct. The type of an instruction.
251 (arm_it): Add 'vectype' for the current instruction.
252 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
253 (vfp_sp_reg_pos): Rename to...
254 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
255 tags.
256 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
257 (Neon D or Q register).
258 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
259 register.
260 (GE_OPT_PREFIX_BIG): Define constant, for use in...
261 (my_get_expression): Allow above constant as argument to accept
262 64-bit constants with optional prefix.
263 (arm_reg_parse): Add extra argument to return the specific type of
264 register in when either a D or Q register (REG_TYPE_NDQ) is
265 requested. Can be NULL.
266 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
267 (parse_reg_list): Update for new arm_reg_parse args.
268 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
269 (parse_neon_el_struct_list): New function. Parse element/structure
270 register lists for VLD<n>/VST<n> instructions.
271 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
272 (s_arm_unwind_save_mmxwr): Likewise.
273 (s_arm_unwind_save_mmxwcg): Likewise.
274 (s_arm_unwind_movsp): Likewise.
275 (s_arm_unwind_setfp): Likewise.
276 (parse_big_immediate): New function. Parse an immediate, which may be
277 64 bits wide. Put results in inst.operands[i].
278 (parse_shift): Update for new arm_reg_parse args.
279 (parse_address): Likewise. Add parsing of alignment specifiers.
280 (parse_neon_mov): Parse the operands of a VMOV instruction.
281 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
282 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
283 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
284 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
285 (parse_operands): Handle new codes above.
286 (encode_arm_vfp_sp_reg): Rename to...
287 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
288 selected VFP version only supports D0-D15.
289 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
290 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
291 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
292 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
293 encode_arm_vfp_reg name, and allow 32 D regs.
294 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
295 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
296 regs.
297 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
298 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
299 constant-load and conversion insns introduced with VFPv3.
300 (neon_tab_entry): New struct.
301 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
302 those which are the targets of pseudo-instructions.
303 (neon_opc): Enumerate opcodes, use as indices into...
304 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
305 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
306 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
307 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
308 neon_enc_tab.
309 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
310 Neon instructions.
311 (neon_type_mask): New. Compact type representation for type checking.
312 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
313 permitted type combinations.
314 (N_IGNORE_TYPE): New macro.
315 (neon_check_shape): New function. Check an instruction shape for
316 multiple alternatives. Return the specific shape for the current
317 instruction.
318 (neon_modify_type_size): New function. Modify a vector type and size,
319 depending on the bit mask in argument 1.
320 (neon_type_promote): New function. Convert a given "key" type (of an
321 operand) into the correct type for a different operand, based on a bit
322 mask.
323 (type_chk_of_el_type): New function. Convert a type and size into the
324 compact representation used for type checking.
325 (el_type_of_type_ckh): New function. Reverse of above (only when a
326 single bit is set in the bit mask).
327 (modify_types_allowed): New function. Alter a mask of allowed types
328 based on a bit mask of modifications.
329 (neon_check_type): New function. Check the type of the current
330 instruction against the variable argument list. The "key" type of the
331 instruction is returned.
332 (neon_dp_fixup): New function. Fill in and modify instruction bits for
333 a Neon data-processing instruction depending on whether we're in ARM
334 mode or Thumb-2 mode.
335 (neon_logbits): New function.
336 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
337 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
338 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
339 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
340 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
341 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
342 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
343 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
344 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
345 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
346 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
347 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
348 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
349 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
350 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
351 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
352 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
353 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
354 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
355 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
356 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
357 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
358 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
359 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
360 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
361 helpers.
362 (parse_neon_type): New function. Parse Neon type specifier.
363 (opcode_lookup): Allow parsing of Neon type specifiers.
364 (REGNUM2, REGSETH, REGSET2): New macros.
365 (reg_names): Add new VFPv3 and Neon registers.
366 (NUF, nUF, NCE, nCE): New macros for opcode table.
367 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
368 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
369 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
370 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
371 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
372 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
373 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
374 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
375 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
376 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
377 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
378 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
379 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
380 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
381 fto[us][lh][sd].
382 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
383 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
384 (arm_option_cpu_value): Add vfp3 and neon.
385 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
386 VFPv1 attribute.
387
388 2006-04-25 Bob Wilson <bob.wilson@acm.org>
389
390 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
391 syntax instead of hardcoded opcodes with ".w18" suffixes.
392 (wide_branch_opcode): New.
393 (build_transition): Use it to check for wide branch opcodes with
394 either ".w18" or ".w15" suffixes.
395
396 2006-04-25 Bob Wilson <bob.wilson@acm.org>
397
398 * config/tc-xtensa.c (xtensa_create_literal_symbol,
399 xg_assemble_literal, xg_assemble_literal_space): Do not set the
400 frag's is_literal flag.
401
402 2006-04-25 Bob Wilson <bob.wilson@acm.org>
403
404 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
405
406 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
407
408 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
409 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
410 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
411 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
412 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
413
414 2005-04-20 Paul Brook <paul@codesourcery.com>
415
416 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
417 all targets.
418 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
419
420 2006-04-19 Alan Modra <amodra@bigpond.net.au>
421
422 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
423 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
424 Make some cpus unsupported on ELF. Run "make dep-am".
425 * Makefile.in: Regenerate.
426
427 2006-04-19 Alan Modra <amodra@bigpond.net.au>
428
429 * configure.in (--enable-targets): Indent help message.
430 * configure: Regenerate.
431
432 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
433
434 PR gas/2533
435 * config/tc-i386.c (i386_immediate): Check illegal immediate
436 register operand.
437
438 2006-04-18 Alan Modra <amodra@bigpond.net.au>
439
440 * config/tc-i386.c: Formatting.
441 (output_disp, output_imm): ISO C90 params.
442
443 * frags.c (frag_offset_fixed_p): Constify args.
444 * frags.h (frag_offset_fixed_p): Ditto.
445
446 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
447 (COFF_MAGIC): Delete.
448
449 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
450
451 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
452
453 * po/POTFILES.in: Regenerated.
454
455 2006-04-16 Mark Mitchell <mark@codesourcery.com>
456
457 * doc/as.texinfo: Mention that some .type syntaxes are not
458 supported on all architectures.
459
460 2006-04-14 Sterling Augustine <sterling@tensilica.com>
461
462 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
463 instructions when such transformations have been disabled.
464
465 2006-04-10 Sterling Augustine <sterling@tensilica.com>
466
467 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
468 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
469 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
470 decoding the loop instructions. Remove current_offset variable.
471 (xtensa_fix_short_loop_frags): Likewise.
472 (min_bytes_to_other_loop_end): Remove current_offset argument.
473
474 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
475
476 * config/tc-z80.c (z80_optimize_expr): Removed.
477 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
478
479 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
480
481 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
482 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
483 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
484 atmega644, atmega329, atmega3290, atmega649, atmega6490,
485 atmega406, atmega640, atmega1280, atmega1281, at90can32,
486 at90can64, at90usb646, at90usb647, at90usb1286 and
487 at90usb1287.
488 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
489
490 2006-04-07 Paul Brook <paul@codesourcery.com>
491
492 * config/tc-arm.c (parse_operands): Set default error message.
493
494 2006-04-07 Paul Brook <paul@codesourcery.com>
495
496 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
497
498 2006-04-07 Paul Brook <paul@codesourcery.com>
499
500 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
501
502 2006-04-07 Paul Brook <paul@codesourcery.com>
503
504 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
505 (move_or_literal_pool): Handle Thumb-2 instructions.
506 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
507
508 2006-04-07 Alan Modra <amodra@bigpond.net.au>
509
510 PR 2512.
511 * config/tc-i386.c (match_template): Move 64-bit operand tests
512 inside loop.
513
514 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
515
516 * po/Make-in: Add install-html target.
517 * Makefile.am: Add install-html and install-html-recursive targets.
518 * Makefile.in: Regenerate.
519 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
520 * configure: Regenerate.
521 * doc/Makefile.am: Add install-html and install-html-am targets.
522 * doc/Makefile.in: Regenerate.
523
524 2006-04-06 Alan Modra <amodra@bigpond.net.au>
525
526 * frags.c (frag_offset_fixed_p): Reinitialise offset before
527 second scan.
528
529 2006-04-05 Richard Sandiford <richard@codesourcery.com>
530 Daniel Jacobowitz <dan@codesourcery.com>
531
532 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
533 (GOTT_BASE, GOTT_INDEX): New.
534 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
535 GOTT_INDEX when generating VxWorks PIC.
536 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
537 use the generic *-*-vxworks* stanza instead.
538
539 2006-04-04 Alan Modra <amodra@bigpond.net.au>
540
541 PR 997
542 * frags.c (frag_offset_fixed_p): New function.
543 * frags.h (frag_offset_fixed_p): Declare.
544 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
545 (resolve_expression): Likewise.
546
547 2006-04-03 Sterling Augustine <sterling@tensilica.com>
548
549 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
550 of the same length but different numbers of slots.
551
552 2006-03-30 Andreas Schwab <schwab@suse.de>
553
554 * configure.in: Fix help string for --enable-targets option.
555 * configure: Regenerate.
556
557 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
558
559 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
560 (m68k_ip): ... here. Use for all chips. Protect against buffer
561 overrun and avoid excessive copying.
562
563 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
564 m68020_control_regs, m68040_control_regs, m68060_control_regs,
565 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
566 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
567 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
568 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
569 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
570 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
571 mcf5282_ctrl, mcfv4e_ctrl): ... these.
572 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
573 (struct m68k_cpu): Change chip field to control_regs.
574 (current_chip): Remove.
575 (control_regs): New.
576 (m68k_archs, m68k_extensions): Adjust.
577 (m68k_cpus): Reorder to be in cpu number order. Adjust.
578 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
579 (find_cf_chip): Reimplement for new organization of cpu table.
580 (select_control_regs): Remove.
581 (mri_chip): Adjust.
582 (struct save_opts): Save control regs, not chip.
583 (s_save, s_restore): Adjust.
584 (m68k_lookup_cpu): Give deprecated warning when necessary.
585 (m68k_init_arch): Adjust.
586 (md_show_usage): Adjust for new cpu table organization.
587
588 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
589
590 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
591 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
592 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
593 "elf/bfin.h".
594 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
595 (any_gotrel): New rule.
596 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
597 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
598 "elf/bfin.h".
599 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
600 (bfin_pic_ptr): New function.
601 (md_pseudo_table): Add it for ".picptr".
602 (OPTION_FDPIC): New macro.
603 (md_longopts): Add -mfdpic.
604 (md_parse_option): Handle it.
605 (md_begin): Set BFD flags.
606 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
607 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
608 us for GOT relocs.
609 * Makefile.am (bfin-parse.o): Update dependencies.
610 (DEPTC_bfin_elf): Likewise.
611 * Makefile.in: Regenerate.
612
613 2006-03-25 Richard Sandiford <richard@codesourcery.com>
614
615 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
616 mcfemac instead of mcfmac.
617
618 2006-03-23 Michael Matz <matz@suse.de>
619
620 * config/tc-i386.c (type_names): Correct placement of 'static'.
621 (reloc): Map some more relocs to their 64 bit counterpart when
622 size is 8.
623 (output_insn): Work around breakage if DEBUG386 is defined.
624 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
625 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
626 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
627 different from i386.
628 (output_imm): Ditto.
629 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
630 Imm64.
631 (md_convert_frag): Jumps can now be larger than 2GB away, error
632 out in that case.
633 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
634 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
635
636 2006-03-22 Richard Sandiford <richard@codesourcery.com>
637 Daniel Jacobowitz <dan@codesourcery.com>
638 Phil Edwards <phil@codesourcery.com>
639 Zack Weinberg <zack@codesourcery.com>
640 Mark Mitchell <mark@codesourcery.com>
641 Nathan Sidwell <nathan@codesourcery.com>
642
643 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
644 (md_begin): Complain about -G being used for PIC. Don't change
645 the text, data and bss alignments on VxWorks.
646 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
647 generating VxWorks PIC.
648 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
649 (macro): Likewise, but do not treat la $25 specially for
650 VxWorks PIC, and do not handle jal.
651 (OPTION_MVXWORKS_PIC): New macro.
652 (md_longopts): Add -mvxworks-pic.
653 (md_parse_option): Don't complain about using PIC and -G together here.
654 Handle OPTION_MVXWORKS_PIC.
655 (md_estimate_size_before_relax): Always use the first relaxation
656 sequence on VxWorks.
657 * config/tc-mips.h (VXWORKS_PIC): New.
658
659 2006-03-21 Paul Brook <paul@codesourcery.com>
660
661 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
662
663 2006-03-21 Sterling Augustine <sterling@tensilica.com>
664
665 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
666 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
667 (get_loop_align_size): New.
668 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
669 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
670 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
671 (get_noop_aligned_address): Use get_loop_align_size.
672 (get_aligned_diff): Likewise.
673
674 2006-03-21 Paul Brook <paul@codesourcery.com>
675
676 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
677
678 2006-03-20 Paul Brook <paul@codesourcery.com>
679
680 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
681 (do_t_branch): Encode branches inside IT blocks as unconditional.
682 (do_t_cps): New function.
683 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
684 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
685 (opcode_lookup): Allow conditional suffixes on all instructions in
686 Thumb mode.
687 (md_assemble): Advance condexec state before checking for errors.
688 (insns): Use do_t_cps.
689
690 2006-03-20 Paul Brook <paul@codesourcery.com>
691
692 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
693 outputting the insn.
694
695 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
696
697 * config/tc-vax.c: Update copyright year.
698 * config/tc-vax.h: Likewise.
699
700 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
701
702 * config/tc-vax.c (md_chars_to_number): Used only locally, so
703 make it static.
704 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
705
706 2006-03-17 Paul Brook <paul@codesourcery.com>
707
708 * config/tc-arm.c (insns): Add ldm and stm.
709
710 2006-03-17 Ben Elliston <bje@au.ibm.com>
711
712 PR gas/2446
713 * doc/as.texinfo (Ident): Document this directive more thoroughly.
714
715 2006-03-16 Paul Brook <paul@codesourcery.com>
716
717 * config/tc-arm.c (insns): Add "svc".
718
719 2006-03-13 Bob Wilson <bob.wilson@acm.org>
720
721 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
722 flag and avoid double underscore prefixes.
723
724 2006-03-10 Paul Brook <paul@codesourcery.com>
725
726 * config/tc-arm.c (md_begin): Handle EABIv5.
727 (arm_eabis): Add EF_ARM_EABI_VER5.
728 * doc/c-arm.texi: Document -meabi=5.
729
730 2006-03-10 Ben Elliston <bje@au.ibm.com>
731
732 * app.c (do_scrub_chars): Simplify string handling.
733
734 2006-03-07 Richard Sandiford <richard@codesourcery.com>
735 Daniel Jacobowitz <dan@codesourcery.com>
736 Zack Weinberg <zack@codesourcery.com>
737 Nathan Sidwell <nathan@codesourcery.com>
738 Paul Brook <paul@codesourcery.com>
739 Ricardo Anguiano <anguiano@codesourcery.com>
740 Phil Edwards <phil@codesourcery.com>
741
742 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
743 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
744 R_ARM_ABS12 reloc.
745 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
746 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
747 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
748
749 2006-03-06 Bob Wilson <bob.wilson@acm.org>
750
751 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
752 even when using the text-section-literals option.
753
754 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
755
756 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
757 and cf.
758 (m68k_ip): <case 'J'> Check we have some control regs.
759 (md_parse_option): Allow raw arch switch.
760 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
761 whether 68881 or cfloat was meant by -mfloat.
762 (md_show_usage): Adjust extension display.
763 (m68k_elf_final_processing): Adjust.
764
765 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
766
767 * config/tc-avr.c (avr_mod_hash_value): New function.
768 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
769 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
770 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
771 instead of int avr_ldi_expression: use avr_mod_hash_value instead
772 of (int).
773 (tc_gen_reloc): Handle substractions of symbols, if possible do
774 fixups, abort otherwise.
775 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
776 tc_fix_adjustable): Define.
777
778 2006-03-02 James E Wilson <wilson@specifix.com>
779
780 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
781 change the template, then clear md.slot[curr].end_of_insn_group.
782
783 2006-02-28 Jan Beulich <jbeulich@novell.com>
784
785 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
786
787 2006-02-28 Jan Beulich <jbeulich@novell.com>
788
789 PR/1070
790 * macro.c (getstring): Don't treat parentheses special anymore.
791 (get_any_string): Don't consider '(' and ')' as quoting anymore.
792 Special-case '(', ')', '[', and ']' when dealing with non-quoting
793 characters.
794
795 2006-02-28 Mat <mat@csail.mit.edu>
796
797 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
798
799 2006-02-27 Jakub Jelinek <jakub@redhat.com>
800
801 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
802 field.
803 (CFI_signal_frame): Define.
804 (cfi_pseudo_table): Add .cfi_signal_frame.
805 (dot_cfi): Handle CFI_signal_frame.
806 (output_cie): Handle cie->signal_frame.
807 (select_cie_for_fde): Don't share CIE if signal_frame flag is
808 different. Copy signal_frame from FDE to newly created CIE.
809 * doc/as.texinfo: Document .cfi_signal_frame.
810
811 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
812
813 * doc/Makefile.am: Add html target.
814 * doc/Makefile.in: Regenerate.
815 * po/Make-in: Add html target.
816
817 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
818
819 * config/tc-i386.c (output_insn): Support Intel Merom New
820 Instructions.
821
822 * config/tc-i386.h (CpuMNI): New.
823 (CpuUnknownFlags): Add CpuMNI.
824
825 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
826
827 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
828 (hpriv_reg_table): New table for hyperprivileged registers.
829 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
830 register encoding.
831
832 2006-02-24 DJ Delorie <dj@redhat.com>
833
834 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
835 (tc_gen_reloc): Don't define.
836 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
837 (OPTION_LINKRELAX): New.
838 (md_longopts): Add it.
839 (m32c_relax): New.
840 (md_parse_options): Set it.
841 (md_assemble): Emit relaxation relocs as needed.
842 (md_convert_frag): Emit relaxation relocs as needed.
843 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
844 (m32c_apply_fix): New.
845 (tc_gen_reloc): New.
846 (m32c_force_relocation): Force out jump relocs when relaxing.
847 (m32c_fix_adjustable): Return false if relaxing.
848
849 2006-02-24 Paul Brook <paul@codesourcery.com>
850
851 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
852 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
853 (struct asm_barrier_opt): Define.
854 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
855 (parse_psr): Accept V7M psr names.
856 (parse_barrier): New function.
857 (enum operand_parse_code): Add OP_oBARRIER.
858 (parse_operands): Implement OP_oBARRIER.
859 (do_barrier): New function.
860 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
861 (do_t_cpsi): Add V7M restrictions.
862 (do_t_mrs, do_t_msr): Validate V7M variants.
863 (md_assemble): Check for NULL variants.
864 (v7m_psrs, barrier_opt_names): New tables.
865 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
866 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
867 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
868 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
869 (struct cpu_arch_ver_table): Define.
870 (cpu_arch_ver): New.
871 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
872 Tag_CPU_arch_profile.
873 * doc/c-arm.texi: Document new cpu and arch options.
874
875 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
876
877 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
878
879 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
880
881 * config/tc-ia64.c: Update copyright years.
882
883 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
884
885 * config/tc-ia64.c (specify_resource): Add the rule 17 from
886 SDM 2.2.
887
888 2005-02-22 Paul Brook <paul@codesourcery.com>
889
890 * config/tc-arm.c (do_pld): Remove incorrect write to
891 inst.instruction.
892 (encode_thumb32_addr_mode): Use correct operand.
893
894 2006-02-21 Paul Brook <paul@codesourcery.com>
895
896 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
897
898 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
899 Anil Paranjape <anilp1@kpitcummins.com>
900 Shilin Shakti <shilins@kpitcummins.com>
901
902 * Makefile.am: Add xc16x related entry.
903 * Makefile.in: Regenerate.
904 * configure.in: Added xc16x related entry.
905 * configure: Regenerate.
906 * config/tc-xc16x.h: New file
907 * config/tc-xc16x.c: New file
908 * doc/c-xc16x.texi: New file for xc16x
909 * doc/all.texi: Entry for xc16x
910 * doc/Makefile.texi: Added c-xc16x.texi
911 * NEWS: Announce the support for the new target.
912
913 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
914
915 * configure.tgt: set emulation for mips-*-netbsd*
916
917 2006-02-14 Jakub Jelinek <jakub@redhat.com>
918
919 * config.in: Rebuilt.
920
921 2006-02-13 Bob Wilson <bob.wilson@acm.org>
922
923 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
924 from 1, not 0, in error messages.
925 (md_assemble): Simplify special-case check for ENTRY instructions.
926 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
927 operand in error message.
928
929 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
930
931 * configure.tgt (arm-*-linux-gnueabi*): Change to
932 arm-*-linux-*eabi*.
933
934 2006-02-10 Nick Clifton <nickc@redhat.com>
935
936 * config/tc-crx.c (check_range): Ensure that the sign bit of a
937 32-bit value is propagated into the upper bits of a 64-bit long.
938
939 * config/tc-arc.c (init_opcode_tables): Fix cast.
940 (arc_extoper, md_operand): Likewise.
941
942 2006-02-09 David Heine <dlheine@tensilica.com>
943
944 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
945 each relaxation step.
946
947 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
948
949 * configure.in (CHECK_DECLS): Add vsnprintf.
950 * configure: Regenerate.
951 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
952 include/declare here, but...
953 * as.h: Move code detecting VARARGS idiom to the top.
954 (errno.h, stdarg.h, varargs.h, va_list): ...here.
955 (vsnprintf): Declare if not already declared.
956
957 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
958
959 * as.c (close_output_file): New.
960 (main): Register close_output_file with xatexit before
961 dump_statistics. Don't call output_file_close.
962
963 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
964
965 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
966 mcf5329_control_regs): New.
967 (not_current_architecture, selected_arch, selected_cpu): New.
968 (m68k_archs, m68k_extensions): New.
969 (archs): Renamed to ...
970 (m68k_cpus): ... here. Adjust.
971 (n_arches): Remove.
972 (md_pseudo_table): Add arch and cpu directives.
973 (find_cf_chip, m68k_ip): Adjust table scanning.
974 (no_68851, no_68881): Remove.
975 (md_assemble): Lazily initialize.
976 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
977 (md_init_after_args): Move functionality to m68k_init_arch.
978 (mri_chip): Adjust table scanning.
979 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
980 options with saner parsing.
981 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
982 m68k_init_arch): New.
983 (s_m68k_cpu, s_m68k_arch): New.
984 (md_show_usage): Adjust.
985 (m68k_elf_final_processing): Set CF EF flags.
986 * config/tc-m68k.h (m68k_init_after_args): Remove.
987 (tc_init_after_args): Remove.
988 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
989 (M68k-Directives): Document .arch and .cpu directives.
990
991 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
992
993 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
994 synonyms for equ and defl.
995 (z80_cons_fix_new): New function.
996 (emit_byte): Disallow relative jumps to absolute locations.
997 (emit_data): Only handle defb, prototype changed, because defb is
998 now handled as pseudo-op rather than an instruction.
999 (instab): Entries for defb,defw,db,dw moved from here...
1000 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1001 Add entries for def24,def32,d24,d32.
1002 (md_assemble): Improved error handling.
1003 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1004 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1005 (z80_cons_fix_new): Declare.
1006 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1007 (def24,d24,def32,d32): New pseudo-ops.
1008
1009 2006-02-02 Paul Brook <paul@codesourcery.com>
1010
1011 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1012
1013 2005-02-02 Paul Brook <paul@codesourcery.com>
1014
1015 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1016 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1017 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1018 T2_OPCODE_RSB): Define.
1019 (thumb32_negate_data_op): New function.
1020 (md_apply_fix): Use it.
1021
1022 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1023
1024 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1025 fields.
1026 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1027 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1028 subtracted symbols.
1029 (relaxation_requirements): Add pfinish_frag argument and use it to
1030 replace setting tinsn->record_fix fields.
1031 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1032 and vinsn_to_insnbuf. Remove references to record_fix and
1033 slot_sub_symbols fields.
1034 (xtensa_mark_narrow_branches): Delete unused code.
1035 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1036 a symbol.
1037 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1038 record_fix fields.
1039 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1040 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1041 of the record_fix field. Simplify error messages for unexpected
1042 symbolic operands.
1043 (set_expr_symbol_offset_diff): Delete.
1044
1045 2006-01-31 Paul Brook <paul@codesourcery.com>
1046
1047 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1048
1049 2006-01-31 Paul Brook <paul@codesourcery.com>
1050 Richard Earnshaw <rearnsha@arm.com>
1051
1052 * config/tc-arm.c: Use arm_feature_set.
1053 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1054 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1055 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1056 New variables.
1057 (insns): Use them.
1058 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1059 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1060 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1061 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1062 feature flags.
1063 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1064 (arm_opts): Move old cpu/arch options from here...
1065 (arm_legacy_opts): ... to here.
1066 (md_parse_option): Search arm_legacy_opts.
1067 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1068 (arm_float_abis, arm_eabis): Make const.
1069
1070 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1071
1072 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1073
1074 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1075
1076 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1077 in load immediate intruction.
1078
1079 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1080
1081 * config/bfin-parse.y (value_match): Use correct conversion
1082 specifications in template string for __FILE__ and __LINE__.
1083 (binary): Ditto.
1084 (unary): Ditto.
1085
1086 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1087
1088 Introduce TLS descriptors for i386 and x86_64.
1089 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1090 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1091 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1092 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1093 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1094 displacement bits.
1095 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1096 (lex_got): Handle @tlsdesc and @tlscall.
1097 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1098
1099 2006-01-11 Nick Clifton <nickc@redhat.com>
1100
1101 Fixes for building on 64-bit hosts:
1102 * config/tc-avr.c (mod_index): New union to allow conversion
1103 between pointers and integers.
1104 (md_begin, avr_ldi_expression): Use it.
1105 * config/tc-i370.c (md_assemble): Add cast for argument to print
1106 statement.
1107 * config/tc-tic54x.c (subsym_substitute): Likewise.
1108 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1109 opindex field of fr_cgen structure into a pointer so that it can
1110 be stored in a frag.
1111 * config/tc-mn10300.c (md_assemble): Likewise.
1112 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1113 types.
1114 * config/tc-v850.c: Replace uses of (int) casts with correct
1115 types.
1116
1117 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1118
1119 PR gas/2117
1120 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1121
1122 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1123
1124 PR gas/2101
1125 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1126 a local-label reference.
1127
1128 For older changes see ChangeLog-2005
1129 \f
1130 Local Variables:
1131 mode: change-log
1132 left-margin: 8
1133 fill-column: 74
1134 version-control: never
1135 End: