gas/ChangeLog

   1 2006-05-02  Ben Elliston  <bje@au.ibm.com>
   2
   3         * sb.h (sb_list_vector): Move to sb.c.
   4         * sb.c (free_list): Use type of sb_list_vector directly.
   5         (sb_build): Fix off-by-one error in assertion about `size'.
   6
   7 2006-05-01  Ben Elliston  <bje@au.ibm.com>
   8
   9         * listing.c (listing_listing): Remove useless loop.
  10         * macro.c (macro_expand): Remove is_positional local variable.
  11         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
  12         and simplify surrounding expressions, where possible.
  13         (assign_symbol): Likewise.
  14         (s_weakref): Likewise.
  15         * symbols.c (colon): Likewise.
  16
  17 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
  18
  19         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
  20
  21 2006-04-30  Thiemo Seufer  <ths@mips.com>
  22             David Ung  <davidu@mips.com>
  23
  24         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
  25         (mips_immed): New table that records various handling of udi
  26         instruction patterns.
  27         (mips_ip): Adds udi handling.
  28
  29 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
  30
  31         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
  32         of list rather than beginning.
  33
  34 2006-04-26  Julian Brown  <julian@codesourcery.com>
  35
  36         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
  37         (is_quarter_float): Rename from above. Simplify slightly.
  38         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
  39         number.
  40         (parse_neon_mov): Parse floating-point constants.
  41         (neon_qfloat_bits): Fix encoding.
  42         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
  43         preference to integer encoding when using the F32 type.
  44
  45 2006-04-26  Julian Brown  <julian@codesourcery.com>
  46
  47         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
  48         zero-initialising structures containing it will lead to invalid types).
  49         (arm_it): Add vectype to each operand.
  50         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
  51         defined field.
  52         (neon_typed_alias): New structure. Extra information for typed
  53         register aliases.
  54         (reg_entry): Add neon type info field.
  55         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
  56         Break out alternative syntax for coprocessor registers, etc. into...
  57         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
  58         out from arm_reg_parse.
  59         (parse_neon_type): Move. Return SUCCESS/FAIL.
  60         (first_error): New function. Call to ensure first error which occurs is
  61         reported.
  62         (parse_neon_operand_type): Parse exactly one type.
  63         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
  64         (parse_typed_reg_or_scalar): New function. Handle core of both
  65         arm_typed_reg_parse and parse_scalar.
  66         (arm_typed_reg_parse): Parse a register with an optional type.
  67         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
  68         result.
  69         (parse_scalar): Parse a Neon scalar with optional type.
  70         (parse_reg_list): Use first_error.
  71         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
  72         (neon_alias_types_same): New function. Return true if two (alias) types
  73         are the same.
  74         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
  75         of elements.
  76         (insert_reg_alias): Return new reg_entry not void.
  77         (insert_neon_reg_alias): New function. Insert type/index information as
  78         well as register for alias.
  79         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
  80         make typed register aliases accordingly.
  81         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
  82         of line.
  83         (s_unreq): Delete type information if present.
  84         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
  85         (s_arm_unwind_save_mmxwcg): Likewise.
  86         (s_arm_unwind_movsp): Likewise.
  87         (s_arm_unwind_setfp): Likewise.
  88         (parse_shift): Likewise.
  89         (parse_shifter_operand): Likewise.
  90         (parse_address): Likewise.
  91         (parse_tb): Likewise.
  92         (tc_arm_regname_to_dw2regnum): Likewise.
  93         (md_pseudo_table): Add dn, qn.
  94         (parse_neon_mov): Handle typed operands.
  95         (parse_operands): Likewise.
  96         (neon_type_mask): Add N_SIZ.
  97         (N_ALLMODS): New macro.
  98         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
  99         (el_type_of_type_chk): Add some safeguards.
 100         (modify_types_allowed): Fix logic bug.
 101         (neon_check_type): Handle operands with types.
 102         (neon_three_same): Remove redundant optional arg handling.
 103         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 104         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 105         (do_neon_step): Adjust accordingly.
 106         (neon_cmode_for_logic_imm): Use first_error.
 107         (do_neon_bitfield): Call neon_check_type.
 108         (neon_dyadic): Rename to...
 109         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 110         to allow modification of type of the destination.
 111         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 112         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 113         (do_neon_compare): Make destination be an untyped bitfield.
 114         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 115         (neon_mul_mac): Return early in case of errors.
 116         (neon_move_immediate): Use first_error.
 117         (neon_mac_reg_scalar_long): Fix type to include scalar.
 118         (do_neon_dup): Likewise.
 119         (do_neon_mov): Likewise (in several places).
 120         (do_neon_tbl_tbx): Fix type.
 121         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 122         (do_neon_ld_dup): Exit early in case of errors and/or use
 123         first_error.
 124         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 125         Handle .dn/.qn directives.
 126         (REGDEF): Add zero for reg_entry neon field.
 127
 128 2006-04-26  Julian Brown  <julian@codesourcery.com>
 129
 130         * config/tc-arm.c (limits.h): Include.
 131         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 132         (fpu_vfp_v3_or_neon_ext): Declare constants.
 133         (neon_el_type): New enumeration of types for Neon vector elements.
 134         (neon_type_el): New struct. Define type and size of a vector element.
 135         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 136         instruction.
 137         (neon_type): Define struct. The type of an instruction.
 138         (arm_it): Add 'vectype' for the current instruction.
 139         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 140         (vfp_sp_reg_pos): Rename to...
 141         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 142         tags.
 143         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 144         (Neon D or Q register).
 145         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 146         register.
 147         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 148         (my_get_expression): Allow above constant as argument to accept
 149         64-bit constants with optional prefix.
 150         (arm_reg_parse): Add extra argument to return the specific type of
 151         register in when either a D or Q register (REG_TYPE_NDQ) is
 152         requested. Can be NULL.
 153         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 154         (parse_reg_list): Update for new arm_reg_parse args.
 155         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 156         (parse_neon_el_struct_list): New function. Parse element/structure
 157         register lists for VLD<n>/VST<n> instructions.
 158         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 159         (s_arm_unwind_save_mmxwr): Likewise.
 160         (s_arm_unwind_save_mmxwcg): Likewise.
 161         (s_arm_unwind_movsp): Likewise.
 162         (s_arm_unwind_setfp): Likewise.
 163         (parse_big_immediate): New function. Parse an immediate, which may be
 164         64 bits wide. Put results in inst.operands[i].
 165         (parse_shift): Update for new arm_reg_parse args.
 166         (parse_address): Likewise. Add parsing of alignment specifiers.
 167         (parse_neon_mov): Parse the operands of a VMOV instruction.
 168         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 169         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 170         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 171         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 172         (parse_operands): Handle new codes above.
 173         (encode_arm_vfp_sp_reg): Rename to...
 174         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 175         selected VFP version only supports D0-D15.
 176         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 177         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 178         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 179         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 180         encode_arm_vfp_reg name, and allow 32 D regs.
 181         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 182         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 183         regs.
 184         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 185         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 186         constant-load and conversion insns introduced with VFPv3.
 187         (neon_tab_entry): New struct.
 188         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 189         those which are the targets of pseudo-instructions.
 190         (neon_opc): Enumerate opcodes, use as indices into...
 191         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 192         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 193         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 194         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 195         neon_enc_tab.
 196         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 197         Neon instructions.
 198         (neon_type_mask): New. Compact type representation for type checking.
 199         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 200         permitted type combinations.
 201         (N_IGNORE_TYPE): New macro.
 202         (neon_check_shape): New function. Check an instruction shape for
 203         multiple alternatives. Return the specific shape for the current
 204         instruction.
 205         (neon_modify_type_size): New function. Modify a vector type and size,
 206         depending on the bit mask in argument 1.
 207         (neon_type_promote): New function. Convert a given "key" type (of an
 208         operand) into the correct type for a different operand, based on a bit
 209         mask.
 210         (type_chk_of_el_type): New function. Convert a type and size into the
 211         compact representation used for type checking.
 212         (el_type_of_type_ckh): New function. Reverse of above (only when a
 213         single bit is set in the bit mask).
 214         (modify_types_allowed): New function. Alter a mask of allowed types
 215         based on a bit mask of modifications.
 216         (neon_check_type): New function. Check the type of the current
 217         instruction against the variable argument list. The "key" type of the
 218         instruction is returned.
 219         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 220         a Neon data-processing instruction depending on whether we're in ARM
 221         mode or Thumb-2 mode.
 222         (neon_logbits): New function.
 223         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 224         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 225         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 226         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 227         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 228         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 229         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 230         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 231         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 232         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 233         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 234         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 235         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 236         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 237         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 238         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 239         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 240         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 241         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 242         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 243         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 244         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 245         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 246         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 247         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 248         helpers.
 249         (parse_neon_type): New function. Parse Neon type specifier.
 250         (opcode_lookup): Allow parsing of Neon type specifiers.
 251         (REGNUM2, REGSETH, REGSET2): New macros.
 252         (reg_names): Add new VFPv3 and Neon registers.
 253         (NUF, nUF, NCE, nCE): New macros for opcode table.
 254         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 255         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 256         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 257         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 258         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 259         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 260         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 261         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 262         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 263         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 264         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 265         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 266         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 267         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 268         fto[us][lh][sd].
 269         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 270         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 271         (arm_option_cpu_value): Add vfp3 and neon.
 272         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 273         VFPv1 attribute.
 274
 275 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 276
 277         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 278         syntax instead of hardcoded opcodes with ".w18" suffixes.
 279         (wide_branch_opcode): New.
 280         (build_transition): Use it to check for wide branch opcodes with
 281         either ".w18" or ".w15" suffixes.
 282
 283 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 284
 285         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 286         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 287         frag's is_literal flag.
 288
 289 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 290
 291         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 292
 293 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 294
 295         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 296         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 297         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 298         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 299         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 300
 301 2005-04-20  Paul Brook  <paul@codesourcery.com>
 302
 303         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 304         all targets.
 305         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 306
 307 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 308
 309         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 310         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 311         Make some cpus unsupported on ELF.  Run "make dep-am".
 312         * Makefile.in: Regenerate.
 313
 314 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 315
 316         * configure.in (--enable-targets): Indent help message.
 317         * configure: Regenerate.
 318
 319 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 320
 321         PR gas/2533
 322         * config/tc-i386.c (i386_immediate): Check illegal immediate
 323         register operand.
 324
 325 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 326
 327         * config/tc-i386.c: Formatting.
 328         (output_disp, output_imm): ISO C90 params.
 329
 330         * frags.c (frag_offset_fixed_p): Constify args.
 331         * frags.h (frag_offset_fixed_p): Ditto.
 332
 333         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 334         (COFF_MAGIC): Delete.
 335
 336         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 337
 338 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 339
 340         * po/POTFILES.in: Regenerated.
 341
 342 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 343
 344         * doc/as.texinfo: Mention that some .type syntaxes are not
 345         supported on all architectures.
 346
 347 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 348
 349         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 350         instructions when such transformations have been disabled.
 351
 352 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 353
 354         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 355         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 356         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 357         decoding the loop instructions.  Remove current_offset variable.
 358         (xtensa_fix_short_loop_frags): Likewise.
 359         (min_bytes_to_other_loop_end): Remove current_offset argument.
 360
 361 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 362
 363         * config/tc-z80.c (z80_optimize_expr): Removed.
 364         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 365
 366 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 367
 368         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 369         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 370         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 371         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 372         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 373         at90can64, at90usb646, at90usb647, at90usb1286 and
 374         at90usb1287.
 375         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 376
 377 2006-04-07  Paul Brook  <paul@codesourcery.com>
 378
 379         * config/tc-arm.c (parse_operands): Set default error message.
 380
 381 2006-04-07  Paul Brook  <paul@codesourcery.com>
 382
 383         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 384
 385 2006-04-07  Paul Brook  <paul@codesourcery.com>
 386
 387         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 388
 389 2006-04-07  Paul Brook  <paul@codesourcery.com>
 390
 391         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 392         (move_or_literal_pool): Handle Thumb-2 instructions.
 393         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 394
 395 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 396
 397         PR 2512.
 398         * config/tc-i386.c (match_template): Move 64-bit operand tests
 399         inside loop.
 400
 401 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 402
 403         * po/Make-in: Add install-html target.
 404         * Makefile.am: Add install-html and install-html-recursive targets.
 405         * Makefile.in: Regenerate.
 406         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 407         * configure: Regenerate.
 408         * doc/Makefile.am: Add install-html and install-html-am targets.
 409         * doc/Makefile.in: Regenerate.
 410
 411 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 412
 413         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 414         second scan.
 415
 416 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 417             Daniel Jacobowitz  <dan@codesourcery.com>
 418
 419         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 420         (GOTT_BASE, GOTT_INDEX): New.
 421         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 422         GOTT_INDEX when generating VxWorks PIC.
 423         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 424         use the generic *-*-vxworks* stanza instead.
 425
 426 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 427
 428         PR 997
 429         * frags.c (frag_offset_fixed_p): New function.
 430         * frags.h (frag_offset_fixed_p): Declare.
 431         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 432         (resolve_expression): Likewise.
 433
 434 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 435
 436         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 437         of the same length but different numbers of slots.
 438
 439 2006-03-30  Andreas Schwab  <schwab@suse.de>
 440
 441         * configure.in: Fix help string for --enable-targets option.
 442         * configure: Regenerate.
 443
 444 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 445
 446         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 447         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 448         overrun and avoid excessive copying.
 449
 450         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 451         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 452         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 453         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 454         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 455         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 456         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 457         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 458         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 459         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 460         (struct m68k_cpu): Change chip field to control_regs.
 461         (current_chip): Remove.
 462         (control_regs): New.
 463         (m68k_archs, m68k_extensions): Adjust.
 464         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 465         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 466         (find_cf_chip): Reimplement for new organization of cpu table.
 467         (select_control_regs): Remove.
 468         (mri_chip): Adjust.
 469         (struct save_opts): Save control regs, not chip.
 470         (s_save, s_restore): Adjust.
 471         (m68k_lookup_cpu): Give deprecated warning when necessary.
 472         (m68k_init_arch): Adjust.
 473         (md_show_usage): Adjust for new cpu table organization.
 474
 475 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 476
 477         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 478         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 479         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 480         "elf/bfin.h".
 481         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 482         (any_gotrel): New rule.
 483         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 484         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 485         "elf/bfin.h".
 486         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 487         (bfin_pic_ptr): New function.
 488         (md_pseudo_table): Add it for ".picptr".
 489         (OPTION_FDPIC): New macro.
 490         (md_longopts): Add -mfdpic.
 491         (md_parse_option): Handle it.
 492         (md_begin): Set BFD flags.
 493         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 494         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 495         us for GOT relocs.
 496         * Makefile.am (bfin-parse.o): Update dependencies.
 497         (DEPTC_bfin_elf): Likewise.
 498         * Makefile.in: Regenerate.
 499
 500 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 501
 502         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 503         mcfemac instead of mcfmac.
 504
 505 2006-03-23  Michael Matz  <matz@suse.de>
 506
 507         * config/tc-i386.c (type_names): Correct placement of 'static'.
 508         (reloc): Map some more relocs to their 64 bit counterpart when
 509         size is 8.
 510         (output_insn): Work around breakage if DEBUG386 is defined.
 511         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 512         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 513         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 514         different from i386.
 515         (output_imm): Ditto.
 516         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 517         Imm64.
 518         (md_convert_frag): Jumps can now be larger than 2GB away, error
 519         out in that case.
 520         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 521         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 522
 523 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 524             Daniel Jacobowitz  <dan@codesourcery.com>
 525             Phil Edwards  <phil@codesourcery.com>
 526             Zack Weinberg  <zack@codesourcery.com>
 527             Mark Mitchell  <mark@codesourcery.com>
 528             Nathan Sidwell  <nathan@codesourcery.com>
 529
 530         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 531         (md_begin): Complain about -G being used for PIC.  Don't change
 532         the text, data and bss alignments on VxWorks.
 533         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 534         generating VxWorks PIC.
 535         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 536         (macro): Likewise, but do not treat la $25 specially for
 537         VxWorks PIC, and do not handle jal.
 538         (OPTION_MVXWORKS_PIC): New macro.
 539         (md_longopts): Add -mvxworks-pic.
 540         (md_parse_option): Don't complain about using PIC and -G together here.
 541         Handle OPTION_MVXWORKS_PIC.
 542         (md_estimate_size_before_relax): Always use the first relaxation
 543         sequence on VxWorks.
 544         * config/tc-mips.h (VXWORKS_PIC): New.
 545
 546 2006-03-21  Paul Brook  <paul@codesourcery.com>
 547
 548         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 549
 550 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 551
 552         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 553         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 554         (get_loop_align_size): New.
 555         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 556         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 557         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 558         (get_noop_aligned_address): Use get_loop_align_size.
 559         (get_aligned_diff): Likewise.
 560
 561 2006-03-21  Paul Brook  <paul@codesourcery.com>
 562
 563         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 564
 565 2006-03-20  Paul Brook  <paul@codesourcery.com>
 566
 567         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 568         (do_t_branch): Encode branches inside IT blocks as unconditional.
 569         (do_t_cps): New function.
 570         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 571         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 572         (opcode_lookup): Allow conditional suffixes on all instructions in
 573         Thumb mode.
 574         (md_assemble): Advance condexec state before checking for errors.
 575         (insns): Use do_t_cps.
 576
 577 2006-03-20  Paul Brook  <paul@codesourcery.com>
 578
 579         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 580         outputting the insn.
 581
 582 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 583
 584         * config/tc-vax.c: Update copyright year.
 585         * config/tc-vax.h: Likewise.
 586
 587 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 588
 589         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 590         make it static.
 591         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 592
 593 2006-03-17  Paul Brook  <paul@codesourcery.com>
 594
 595         * config/tc-arm.c (insns): Add ldm and stm.
 596
 597 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 598
 599         PR gas/2446
 600         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 601
 602 2006-03-16  Paul Brook  <paul@codesourcery.com>
 603
 604         * config/tc-arm.c (insns): Add "svc".
 605
 606 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 607
 608         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 609         flag and avoid double underscore prefixes.
 610
 611 2006-03-10  Paul Brook  <paul@codesourcery.com>
 612
 613         * config/tc-arm.c (md_begin): Handle EABIv5.
 614         (arm_eabis): Add EF_ARM_EABI_VER5.
 615         * doc/c-arm.texi: Document -meabi=5.
 616
 617 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 618
 619         * app.c (do_scrub_chars): Simplify string handling.
 620
 621 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 622             Daniel Jacobowitz  <dan@codesourcery.com>
 623             Zack Weinberg  <zack@codesourcery.com>
 624             Nathan Sidwell  <nathan@codesourcery.com>
 625             Paul Brook  <paul@codesourcery.com>
 626             Ricardo Anguiano  <anguiano@codesourcery.com>
 627             Phil Edwards  <phil@codesourcery.com>
 628
 629         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 630         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 631         R_ARM_ABS12 reloc.
 632         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 633         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 634         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 635
 636 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 637
 638         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 639         even when using the text-section-literals option.
 640
 641 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 642
 643         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 644         and cf.
 645         (m68k_ip): <case 'J'> Check we have some control regs.
 646         (md_parse_option): Allow raw arch switch.
 647         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 648         whether 68881 or cfloat was meant by -mfloat.
 649         (md_show_usage): Adjust extension display.
 650         (m68k_elf_final_processing): Adjust.
 651
 652 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 653
 654         * config/tc-avr.c (avr_mod_hash_value): New function.
 655         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 656         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 657         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 658         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 659         of (int).
 660         (tc_gen_reloc): Handle substractions of symbols, if possible do
 661         fixups, abort otherwise.
 662         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 663         tc_fix_adjustable): Define.
 664
 665 2006-03-02  James E Wilson  <wilson@specifix.com>
 666
 667         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 668         change the template, then clear md.slot[curr].end_of_insn_group.
 669
 670 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 671
 672         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 673
 674 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 675
 676         PR/1070
 677         * macro.c (getstring): Don't treat parentheses special anymore.
 678         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 679         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 680         characters.
 681
 682 2006-02-28  Mat <mat@csail.mit.edu>
 683
 684         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 685
 686 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 687
 688         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 689         field.
 690         (CFI_signal_frame): Define.
 691         (cfi_pseudo_table): Add .cfi_signal_frame.
 692         (dot_cfi): Handle CFI_signal_frame.
 693         (output_cie): Handle cie->signal_frame.
 694         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 695         different.  Copy signal_frame from FDE to newly created CIE.
 696         * doc/as.texinfo: Document .cfi_signal_frame.
 697
 698 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 699
 700         * doc/Makefile.am: Add html target.
 701         * doc/Makefile.in: Regenerate.
 702         * po/Make-in: Add html target.
 703
 704 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 705
 706         * config/tc-i386.c (output_insn): Support Intel Merom New
 707         Instructions.
 708
 709         * config/tc-i386.h (CpuMNI): New.
 710         (CpuUnknownFlags): Add CpuMNI.
 711
 712 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 713
 714         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 715         (hpriv_reg_table): New table for hyperprivileged registers.
 716         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 717         register encoding.
 718
 719 2006-02-24  DJ Delorie  <dj@redhat.com>
 720
 721         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 722         (tc_gen_reloc): Don't define.
 723         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 724         (OPTION_LINKRELAX): New.
 725         (md_longopts): Add it.
 726         (m32c_relax): New.
 727         (md_parse_options): Set it.
 728         (md_assemble): Emit relaxation relocs as needed.
 729         (md_convert_frag): Emit relaxation relocs as needed.
 730         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 731         (m32c_apply_fix): New.
 732         (tc_gen_reloc): New.
 733         (m32c_force_relocation): Force out jump relocs when relaxing.
 734         (m32c_fix_adjustable): Return false if relaxing.
 735
 736 2006-02-24  Paul Brook  <paul@codesourcery.com>
 737
 738         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 739         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 740         (struct asm_barrier_opt): Define.
 741         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 742         (parse_psr): Accept V7M psr names.
 743         (parse_barrier): New function.
 744         (enum operand_parse_code): Add OP_oBARRIER.
 745         (parse_operands): Implement OP_oBARRIER.
 746         (do_barrier): New function.
 747         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 748         (do_t_cpsi): Add V7M restrictions.
 749         (do_t_mrs, do_t_msr): Validate V7M variants.
 750         (md_assemble): Check for NULL variants.
 751         (v7m_psrs, barrier_opt_names): New tables.
 752         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 753         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 754         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 755         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 756         (struct cpu_arch_ver_table): Define.
 757         (cpu_arch_ver): New.
 758         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 759         Tag_CPU_arch_profile.
 760         * doc/c-arm.texi: Document new cpu and arch options.
 761
 762 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 763
 764         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 765
 766 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 767
 768         * config/tc-ia64.c: Update copyright years.
 769
 770 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 771
 772         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 773         SDM 2.2.
 774
 775 2005-02-22  Paul Brook  <paul@codesourcery.com>
 776
 777         * config/tc-arm.c (do_pld): Remove incorrect write to
 778         inst.instruction.
 779         (encode_thumb32_addr_mode): Use correct operand.
 780
 781 2006-02-21  Paul Brook  <paul@codesourcery.com>
 782
 783         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 784
 785 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 786             Anil Paranjape   <anilp1@kpitcummins.com>
 787             Shilin Shakti    <shilins@kpitcummins.com>
 788
 789         * Makefile.am: Add xc16x related entry.
 790         * Makefile.in: Regenerate.
 791         * configure.in: Added xc16x related entry.
 792         * configure: Regenerate.
 793         * config/tc-xc16x.h: New file
 794         * config/tc-xc16x.c: New file
 795         * doc/c-xc16x.texi: New file for xc16x
 796         * doc/all.texi: Entry for xc16x
 797         * doc/Makefile.texi: Added c-xc16x.texi
 798         * NEWS: Announce the support for the new target.
 799
 800 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 801
 802         * configure.tgt: set emulation for mips-*-netbsd*
 803
 804 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 805
 806         * config.in: Rebuilt.
 807
 808 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 809
 810         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 811         from 1, not 0, in error messages.
 812         (md_assemble): Simplify special-case check for ENTRY instructions.
 813         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 814         operand in error message.
 815
 816 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 817
 818         * configure.tgt (arm-*-linux-gnueabi*): Change to
 819         arm-*-linux-*eabi*.
 820
 821 2006-02-10  Nick Clifton  <nickc@redhat.com>
 822
 823         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 824         32-bit value is propagated into the upper bits of a 64-bit long.
 825
 826         * config/tc-arc.c (init_opcode_tables): Fix cast.
 827         (arc_extoper, md_operand): Likewise.
 828
 829 2006-02-09  David Heine  <dlheine@tensilica.com>
 830
 831         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 832         each relaxation step.
 833
 834 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 835
 836         * configure.in (CHECK_DECLS): Add vsnprintf.
 837         * configure: Regenerate.
 838         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 839         include/declare here, but...
 840         * as.h: Move code detecting VARARGS idiom to the top.
 841         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 842         (vsnprintf): Declare if not already declared.
 843
 844 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 845
 846         * as.c (close_output_file): New.
 847         (main): Register close_output_file with xatexit before
 848         dump_statistics. Don't call output_file_close.
 849
 850 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 851
 852         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 853         mcf5329_control_regs): New.
 854         (not_current_architecture, selected_arch, selected_cpu): New.
 855         (m68k_archs, m68k_extensions): New.
 856         (archs): Renamed to ...
 857         (m68k_cpus): ... here.  Adjust.
 858         (n_arches): Remove.
 859         (md_pseudo_table): Add arch and cpu directives.
 860         (find_cf_chip, m68k_ip): Adjust table scanning.
 861         (no_68851, no_68881): Remove.
 862         (md_assemble): Lazily initialize.
 863         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 864         (md_init_after_args): Move functionality to m68k_init_arch.
 865         (mri_chip): Adjust table scanning.
 866         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 867         options with saner parsing.
 868         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 869         m68k_init_arch): New.
 870         (s_m68k_cpu, s_m68k_arch): New.
 871         (md_show_usage): Adjust.
 872         (m68k_elf_final_processing): Set CF EF flags.
 873         * config/tc-m68k.h (m68k_init_after_args): Remove.
 874         (tc_init_after_args): Remove.
 875         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 876         (M68k-Directives): Document .arch and .cpu directives.
 877
 878 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 879
 880         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 881         synonyms for equ and defl.
 882         (z80_cons_fix_new): New function.
 883         (emit_byte): Disallow relative jumps to absolute locations.
 884         (emit_data): Only handle defb, prototype changed, because defb is
 885         now handled as pseudo-op rather than an instruction.
 886         (instab): Entries for defb,defw,db,dw moved from here...
 887         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 888         Add entries for def24,def32,d24,d32.
 889         (md_assemble): Improved error handling.
 890         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 891         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 892         (z80_cons_fix_new): Declare.
 893         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 894         (def24,d24,def32,d32): New pseudo-ops.
 895
 896 2006-02-02  Paul Brook  <paul@codesourcery.com>
 897
 898         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 899
 900 2005-02-02  Paul Brook  <paul@codesourcery.com>
 901
 902         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 903         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
 904         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
 905         T2_OPCODE_RSB): Define.
 906         (thumb32_negate_data_op): New function.
 907         (md_apply_fix): Use it.
 908
 909 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
 910
 911         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
 912         fields.
 913         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
 914         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
 915         subtracted symbols.
 916         (relaxation_requirements): Add pfinish_frag argument and use it to
 917         replace setting tinsn->record_fix fields.
 918         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
 919         and vinsn_to_insnbuf.  Remove references to record_fix and
 920         slot_sub_symbols fields.
 921         (xtensa_mark_narrow_branches): Delete unused code.
 922         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
 923         a symbol.
 924         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
 925         record_fix fields.
 926         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
 927         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
 928         of the record_fix field.  Simplify error messages for unexpected
 929         symbolic operands.
 930         (set_expr_symbol_offset_diff): Delete.
 931
 932 2006-01-31  Paul Brook  <paul@codesourcery.com>
 933
 934         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
 935
 936 2006-01-31  Paul Brook  <paul@codesourcery.com>
 937         Richard Earnshaw <rearnsha@arm.com>
 938
 939         * config/tc-arm.c: Use arm_feature_set.
 940         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
 941         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
 942         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
 943         New variables.
 944         (insns): Use them.
 945         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
 946         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
 947         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
 948         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
 949         feature flags.
 950         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
 951         (arm_opts): Move old cpu/arch options from here...
 952         (arm_legacy_opts): ... to here.
 953         (md_parse_option): Search arm_legacy_opts.
 954         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
 955         (arm_float_abis, arm_eabis): Make const.
 956
 957 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
 958
 959         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
 960
 961 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 962
 963         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
 964         in load immediate intruction.
 965
 966 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 967
 968         * config/bfin-parse.y (value_match): Use correct conversion
 969         specifications in template string for __FILE__ and __LINE__.
 970         (binary): Ditto.
 971         (unary): Ditto.
 972
 973 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
 974
 975         Introduce TLS descriptors for i386 and x86_64.
 976         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
 977         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
 978         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
 979         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
 980         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
 981         displacement bits.
 982         (build_modrm_byte): Set up zero modrm for TLS desc calls.
 983         (lex_got): Handle @tlsdesc and @tlscall.
 984         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
 985
 986 2006-01-11  Nick Clifton  <nickc@redhat.com>
 987
 988         Fixes for building on 64-bit hosts:
 989         * config/tc-avr.c (mod_index): New union to allow conversion
 990         between pointers and integers.
 991         (md_begin, avr_ldi_expression): Use it.
 992         * config/tc-i370.c (md_assemble): Add cast for argument to print
 993         statement.
 994         * config/tc-tic54x.c (subsym_substitute): Likewise.
 995         * config/tc-mn10200.c (md_assemble): Use a union to convert the
 996         opindex field of fr_cgen structure into a pointer so that it can
 997         be stored in a frag.
 998         * config/tc-mn10300.c (md_assemble): Likewise.
 999         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1000         types.
1001         * config/tc-v850.c: Replace uses of (int) casts with correct
1002         types.
1003
1004 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1005
1006         PR gas/2117
1007         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1008
1009 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1010
1011         PR gas/2101
1012         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1013         a local-label reference.
1014
1015 For older changes see ChangeLog-2005
1016 \f
1017 Local Variables:
1018 mode: change-log
1019 left-margin: 8
1020 fill-column: 74
1021 version-control: never
1022 End: