1 2006-09-08 Nick Clifton <nickc@redhat.com>
4 * doc/as.texinfo (Macro): Improve documentation about separating
5 macro arguments from following text.
7 2006-09-08 Paul Brook <paul@codesourcery.com>
9 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
11 2006-09-07 Paul Brook <paul@codesourcery.com>
13 * config/tc-arm.c (parse_operands): Mark operand as present.
15 2006-09-04 Paul Brook <paul@codesourcery.com>
17 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
18 (do_neon_dyadic_if_i_d): Avoid setting U bit.
19 (do_neon_mac_maybe_scalar): Ditto.
20 (do_neon_dyadic_narrow): Force operand type to NT_integer.
21 (insns): Remove out of date comments.
23 2006-08-29 Nick Clifton <nickc@redhat.com>
25 * read.c (s_align): Initialize the 'stopc' variable to prevent
26 compiler complaints about it being used without being
28 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
29 s_float_space, s_struct, cons_worker, equals): Likewise.
31 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
33 * ecoff.c (ecoff_directive_val): Fix message typo.
34 * config/tc-ns32k.c (convert_iif): Likewise.
35 * config/tc-sh64.c (shmedia_check_limits): Likewise.
37 2006-08-25 Sterling Augustine <sterling@tensilica.com>
38 Bob Wilson <bob.wilson@acm.org>
40 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
41 the state of the absolute_literals directive. Remove align frag at
42 the start of the literal pool position.
44 2006-08-25 Bob Wilson <bob.wilson@acm.org>
46 * doc/c-xtensa.texi: Add @group commands in examples.
48 2006-08-24 Bob Wilson <bob.wilson@acm.org>
50 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
51 (INIT_LITERAL_SECTION_NAME): Delete.
52 (lit_state struct): Remove segment names, init_lit_seg, and
53 fini_lit_seg. Add lit_prefix and current_text_seg.
54 (init_literal_head_h, init_literal_head): Delete.
55 (fini_literal_head_h, fini_literal_head): Delete.
56 (xtensa_begin_directive): Move argument parsing to
57 xtensa_literal_prefix function.
58 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
59 (xtensa_literal_prefix): Parse the directive argument here and
60 record it in the lit_prefix field. Remove code to derive literal
63 (get_is_linkonce_section): Use linkonce_len. Check for any
64 ".gnu.linkonce.*" section, not just text sections.
65 (md_begin): Remove initialization of deleted lit_state fields.
66 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
67 to init_literal_head and fini_literal_head.
68 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
69 when traversing literal_head list.
70 (match_section_group): New.
71 (cache_literal_section): Rewrite to determine the literal section
72 name on the fly, create the section and return it.
73 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
74 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
75 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
76 Use xtensa_get_property_section from bfd.
77 (retrieve_xtensa_section): Delete.
78 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
79 description to refer to plural literal sections and add xref to
80 the Literal Directive section.
81 (Literal Directive): Describe new rules for deriving literal section
82 names. Add footnote for special case of .init/.fini with
83 --text-section-literals.
84 (Literal Prefix Directive): Replace old naming rules with xref to the
85 Literal Directive section.
87 2006-08-21 Joseph Myers <joseph@codesourcery.com>
89 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
90 merging with previous long opcode.
92 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
94 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
95 * Makefile.in: Regenerate.
96 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
99 2006-08-16 Julian Brown <julian@codesourcery.com>
101 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
102 to use ARM instructions on non-ARM-supporting cores.
103 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
104 mode automatically based on cpu variant.
105 (md_begin): Call above function.
107 2006-08-16 Julian Brown <julian@codesourcery.com>
109 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
110 recognized in non-unified syntax mode.
112 2006-08-15 Thiemo Seufer <ths@mips.com>
113 Nigel Stephens <nigel@mips.com>
114 David Ung <davidu@mips.com>
116 * configure.tgt: Handle mips*-sde-elf*.
118 2006-08-12 Thiemo Seufer <ths@networkno.de>
120 * config/tc-mips.c (mips16_ip): Fix argument register handling
121 for restore instruction.
123 2006-08-08 Bob Wilson <bob.wilson@acm.org>
125 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
127 (out_fixed_inc_line_addr): New.
128 (process_entries): Use out_fixed_inc_line_addr when
129 DWARF2_USE_FIXED_ADVANCE_PC is set.
130 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
132 2006-08-08 DJ Delorie <dj@redhat.com>
134 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
135 vs full symbols so that we never have more than one pointer value
136 for any given symbol in our symbol table.
138 2006-08-08 Sterling Augustine <sterling@tensilica.com>
140 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
141 and emit DW_AT_ranges when code in compilation unit is not
143 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
145 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
146 (out_debug_ranges): New function to emit .debug_ranges section
147 when code is not contiguous.
149 2006-08-08 Nick Clifton <nickc@redhat.com>
151 * config/tc-arm.c (WARN_DEPRECATED): Enable.
153 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
155 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
157 (pe_directive_secrel) [TE_PE]: New function.
158 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
159 loc, loc_mark_labels.
160 [TE_PE]: Handle secrel32.
161 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
163 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
164 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
165 (md_section_align): Only round section sizes here for AOUT
167 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
168 (tc_pe_dwarf2_emit_offset): New function.
169 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
170 (cons_fix_new_arm): Handle O_secrel.
171 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
172 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
173 of OBJ_ELF only block.
174 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
175 tc_pe_dwarf2_emit_offset.
177 2006-08-04 Richard Sandiford <richard@codesourcery.com>
179 * config/tc-sh.c (apply_full_field_fix): New function.
180 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
181 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
182 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
183 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
185 2006-08-03 Nick Clifton <nickc@redhat.com>
188 * config.in: Regenerate.
190 2006-08-03 Joseph Myers <joseph@codesourcery.com>
192 * config/tc-arm.c (parse_operands): Handle invalid register name
195 2006-08-03 Joseph Myers <joseph@codesourcery.com>
197 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
198 (parse_operands): Handle it.
199 (insns): Use it for tmcr and tmrc.
201 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
204 * config/tc-i386.c (md_parse_option): Treat any target starting
205 with elf64_x86_64 as a viable target for the -64 switch.
206 (i386_target_format): For 64-bit ELF flavoured output use
208 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
210 2006-08-02 Nick Clifton <nickc@redhat.com>
213 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
215 * configure.in: Run BFD_BINARY_FOPEN.
216 * configure: Regenerate.
217 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
220 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
222 * config/tc-i386.c (md_assemble): Don't update
225 2006-08-01 Thiemo Seufer <ths@mips.com>
227 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
229 2006-08-01 Thiemo Seufer <ths@mips.com>
231 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
232 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
233 BFD_RELOC_32 and BFD_RELOC_16.
234 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
235 md_convert_frag, md_obj_end): Fix comment formatting.
237 2006-07-31 Thiemo Seufer <ths@mips.com>
239 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
240 handling for BFD_RELOC_MIPS16_JMP.
242 2006-07-24 Andreas Schwab <schwab@suse.de>
245 * read.c (read_a_source_file): Ignore unknown text after line
246 comment character. Fix misleading comment.
248 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
250 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
251 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
252 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
253 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
254 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
255 doc/c-z80.texi, doc/internals.texi: Fix some typos.
257 2006-07-21 Nick Clifton <nickc@redhat.com>
259 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
262 2006-07-20 Thiemo Seufer <ths@mips.com>
263 Nigel Stephens <nigel@mips.com>
265 * config/tc-mips.c (md_parse_option): Don't infer optimisation
266 options from debug options.
268 2006-07-20 Thiemo Seufer <ths@mips.com>
270 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
271 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
273 2006-07-19 Paul Brook <paul@codesourcery.com>
275 * config/tc-arm.c (insns): Fix rbit Arm opcode.
277 2006-07-18 Paul Brook <paul@codesourcery.com>
279 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
280 (md_convert_frag): Use correct reloc for add_pc. Use
281 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
282 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
283 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
285 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
287 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
288 when file and line unknown.
290 2006-07-17 Thiemo Seufer <ths@mips.com>
292 * read.c (s_struct): Use IS_ELF.
293 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
294 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
295 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
296 s_mips_mask): Likewise.
298 2006-07-16 Thiemo Seufer <ths@mips.com>
299 David Ung <davidu@mips.com>
301 * read.c (s_struct): Handle ELF section changing.
302 * config/tc-mips.c (s_align): Leave enabling auto-align to the
304 (s_change_sec): Try section changing only if we output ELF.
306 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
308 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
310 (smallest_imm_type): Remove Cpu086.
311 (i386_target_format): Likewise.
313 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
316 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
317 Michael Meissner <michael.meissner@amd.com>
319 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
320 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
321 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
323 (i386_align_code): Ditto.
324 (md_assemble_code): Add support for insertq/extrq instructions,
325 swapping as needed for intel syntax.
326 (swap_imm_operands): New function to swap immediate operands.
327 (swap_operands): Deal with 4 operand instructions.
328 (build_modrm_byte): Add support for insertq instruction.
330 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
332 * config/tc-i386.h (Size64): Fix a typo in comment.
334 2006-07-12 Nick Clifton <nickc@redhat.com>
336 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
337 fixup_segment() to repeat a range check on a value that has
338 already been checked here.
340 2006-07-07 James E Wilson <wilson@specifix.com>
342 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
344 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
345 Nick Clifton <nickc@redhat.com>
348 * doc/as.texi: Fix spelling typo: branchs => branches.
349 * doc/c-m68hc11.texi: Likewise.
350 * config/tc-m68hc11.c: Likewise.
351 Support old spelling of command line switch for backwards
354 2006-07-04 Thiemo Seufer <ths@mips.com>
355 David Ung <davidu@mips.com>
357 * config/tc-mips.c (s_is_linkonce): New function.
358 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
359 weak, external, and linkonce symbols.
360 (pic_need_relax): Use s_is_linkonce.
362 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
364 * doc/as.texinfo (Org): Remove space.
365 (P2align): Add "@var{abs-expr},".
367 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
369 * config/tc-i386.c (cpu_arch_tune_set): New.
370 (cpu_arch_isa): Likewise.
371 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
372 nops with short or long nop sequences based on -march=/.arch
374 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
375 set cpu_arch_tune and cpu_arch_tune_flags.
376 (md_parse_option): For -march=, set cpu_arch_isa and set
377 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
378 0. Set cpu_arch_tune_set to 1 for -mtune=.
379 (i386_target_format): Don't set cpu_arch_tune.
381 2006-06-23 Nigel Stephens <nigel@mips.com>
383 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
384 generated .sbss.* and .gnu.linkonce.sb.*.
386 2006-06-23 Thiemo Seufer <ths@mips.com>
387 David Ung <davidu@mips.com>
389 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
391 * config/tc-mips.c (label_list): Define per-segment label_list.
392 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
393 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
394 mips_from_file_after_relocs, mips_define_label): Use per-segment
397 2006-06-22 Thiemo Seufer <ths@mips.com>
399 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
400 (append_insn): Use it.
401 (md_apply_fix): Whitespace formatting.
402 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
403 mips16_extended_frag): Remove register specifier.
404 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
407 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
409 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
410 a directive saving VFP registers for ARMv6 or later.
411 (s_arm_unwind_save): Add parameter arch_v6 and call
412 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
414 (md_pseudo_table): Add entry for new "vsave" directive.
415 * doc/c-arm.texi: Correct error in example for "save"
416 directive (fstmdf -> fstmdx). Also document "vsave" directive.
418 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
419 Anatoly Sokolov <aesok@post.ru>
421 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
422 and atmega644p devices. Rename atmega164/atmega324 devices to
423 atmega164p/atmega324p.
424 * doc/c-avr.texi: Document new mcu and arch options.
426 2006-06-17 Nick Clifton <nickc@redhat.com>
428 * config/tc-arm.c (enum parse_operand_result): Move outside of
429 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
431 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
433 * config/tc-i386.h (processor_type): New.
434 (arch_entry): Add type.
436 * config/tc-i386.c (cpu_arch_tune): New.
437 (cpu_arch_tune_flags): Likewise.
438 (cpu_arch_isa_flags): Likewise.
440 (set_cpu_arch): Also update cpu_arch_isa_flags.
441 (md_assemble): Update cpu_arch_isa_flags.
443 (OPTION_MTUNE): Likewise.
444 (md_longopts): Add -march= and -mtune=.
445 (md_parse_option): Support -march= and -mtune=.
446 (md_show_usage): Add -march=CPU/-mtune=CPU.
447 (i386_target_format): Also update cpu_arch_isa_flags,
448 cpu_arch_tune and cpu_arch_tune_flags.
450 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
452 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
454 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
456 * config/tc-arm.c (enum parse_operand_result): New.
457 (struct group_reloc_table_entry): New.
458 (enum group_reloc_type): New.
459 (group_reloc_table): New array.
460 (find_group_reloc_table_entry): New function.
461 (parse_shifter_operand_group_reloc): New function.
462 (parse_address_main): New function, incorporating code
463 from the old parse_address function. To be used via...
464 (parse_address): wrapper for parse_address_main; and
465 (parse_address_group_reloc): new function, likewise.
466 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
467 OP_ADDRGLDRS, OP_ADDRGLDC.
468 (parse_operands): Support for these new operand codes.
469 New macro po_misc_or_fail_no_backtrack.
470 (encode_arm_cp_address): Preserve group relocations.
471 (insns): Modify to use the above operand codes where group
472 relocations are permitted.
473 (md_apply_fix): Handle the group relocations
474 ALU_PC_G0_NC through LDC_SB_G2.
475 (tc_gen_reloc): Likewise.
476 (arm_force_relocation): Leave group relocations for the linker.
477 (arm_fix_adjustable): Likewise.
479 2006-06-15 Julian Brown <julian@codesourcery.com>
481 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
482 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
485 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
487 * config/tc-i386.c (process_suffix): Don't add rex64 for
490 2006-06-09 Thiemo Seufer <ths@mips.com>
492 * config/tc-mips.c (mips_ip): Maintain argument count.
494 2006-06-09 Alan Modra <amodra@bigpond.net.au>
496 * config/tc-iq2000.c: Include sb.h.
498 2006-06-08 Nigel Stephens <nigel@mips.com>
500 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
501 aliases for better compatibility with SGI tools.
503 2006-06-08 Alan Modra <amodra@bigpond.net.au>
505 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
506 * Makefile.am (GASLIBS): Expand @BFDLIB@.
508 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
509 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
510 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
512 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
513 * Makefile.in: Regenerate.
514 * doc/Makefile.in: Regenerate.
515 * configure: Regenerate.
517 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
519 * po/Make-in (pdf, ps): New dummy targets.
521 2006-06-07 Julian Brown <julian@codesourcery.com>
523 * config/tc-arm.c (stdarg.h): include.
524 (arm_it): Add uncond_value field. Add isvec and issingle to operand
526 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
527 REG_TYPE_NSDQ (single, double or quad vector reg).
528 (reg_expected_msgs): Update.
529 (BAD_FPU): Add macro for unsupported FPU instruction error.
530 (parse_neon_type): Support 'd' as an alias for .f64.
531 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
533 (parse_vfp_reg_list): Don't update first arg on error.
534 (parse_neon_mov): Support extra syntax for VFP moves.
535 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
536 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
537 (parse_operands): Support isvec, issingle operands fields, new parse
539 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
541 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
542 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
543 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
544 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
546 (neon_shape): Redefine in terms of above.
547 (neon_shape_class): New enumeration, table of shape classes.
548 (neon_shape_el): New enumeration. One element of a shape.
549 (neon_shape_el_size): Register widths of above, where appropriate.
550 (neon_shape_info): New struct. Info for shape table.
551 (neon_shape_tab): New array.
552 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
553 (neon_check_shape): Rewrite as...
554 (neon_select_shape): New function to classify instruction shapes,
555 driven by new table neon_shape_tab array.
556 (neon_quad): New function. Return 1 if shape should set Q flag in
557 instructions (or equivalent), 0 otherwise.
558 (type_chk_of_el_type): Support F64.
559 (el_type_of_type_chk): Likewise.
560 (neon_check_type): Add support for VFP type checking (VFP data
561 elements fill their containing registers).
562 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
563 in thumb mode for VFP instructions.
564 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
565 and encode the current instruction as if it were that opcode.
566 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
567 arguments, call function in PFN.
568 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
569 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
570 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
571 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
572 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
573 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
574 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
575 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
576 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
577 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
578 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
579 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
580 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
581 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
582 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
584 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
585 between VFP and Neon turns out to belong to Neon. Perform
586 architecture check and fill in condition field if appropriate.
587 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
588 (do_neon_cvt): Add support for VFP variants of instructions.
589 (neon_cvt_flavour): Extend to cover VFP conversions.
590 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
592 (do_neon_ldr_str): Handle single-precision VFP load/store.
593 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
594 NS_NULL not NS_IGNORE.
595 (opcode_tag): Add OT_csuffixF for operands which either take a
596 conditional suffix, or have 0xF in the condition field.
597 (md_assemble): Add support for OT_csuffixF.
598 (NCE): Replace macro with...
599 (NCE_tag, NCE, NCEF): New macros.
600 (nCE): Replace macro with...
601 (nCE_tag, nCE, nCEF): New macros.
602 (insns): Add support for VFP insns or VFP versions of insns msr,
603 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
604 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
605 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
606 VFP/Neon insns together.
608 2006-06-07 Alan Modra <amodra@bigpond.net.au>
609 Ladislav Michl <ladis@linux-mips.org>
611 * app.c: Don't include headers already included by as.h.
613 * atof-generic.c: Likewise.
615 * dwarf2dbg.c: Likewise.
617 * input-file.c: Likewise.
618 * input-scrub.c: Likewise.
620 * output-file.c: Likewise.
623 * config/bfin-lex.l: Likewise.
624 * config/obj-coff.h: Likewise.
625 * config/obj-elf.h: Likewise.
626 * config/obj-som.h: Likewise.
627 * config/tc-arc.c: Likewise.
628 * config/tc-arm.c: Likewise.
629 * config/tc-avr.c: Likewise.
630 * config/tc-bfin.c: Likewise.
631 * config/tc-cris.c: Likewise.
632 * config/tc-d10v.c: Likewise.
633 * config/tc-d30v.c: Likewise.
634 * config/tc-dlx.h: Likewise.
635 * config/tc-fr30.c: Likewise.
636 * config/tc-frv.c: Likewise.
637 * config/tc-h8300.c: Likewise.
638 * config/tc-hppa.c: Likewise.
639 * config/tc-i370.c: Likewise.
640 * config/tc-i860.c: Likewise.
641 * config/tc-i960.c: Likewise.
642 * config/tc-ip2k.c: Likewise.
643 * config/tc-iq2000.c: Likewise.
644 * config/tc-m32c.c: Likewise.
645 * config/tc-m32r.c: Likewise.
646 * config/tc-maxq.c: Likewise.
647 * config/tc-mcore.c: Likewise.
648 * config/tc-mips.c: Likewise.
649 * config/tc-mmix.c: Likewise.
650 * config/tc-mn10200.c: Likewise.
651 * config/tc-mn10300.c: Likewise.
652 * config/tc-msp430.c: Likewise.
653 * config/tc-mt.c: Likewise.
654 * config/tc-ns32k.c: Likewise.
655 * config/tc-openrisc.c: Likewise.
656 * config/tc-ppc.c: Likewise.
657 * config/tc-s390.c: Likewise.
658 * config/tc-sh.c: Likewise.
659 * config/tc-sh64.c: Likewise.
660 * config/tc-sparc.c: Likewise.
661 * config/tc-tic30.c: Likewise.
662 * config/tc-tic4x.c: Likewise.
663 * config/tc-tic54x.c: Likewise.
664 * config/tc-v850.c: Likewise.
665 * config/tc-vax.c: Likewise.
666 * config/tc-xc16x.c: Likewise.
667 * config/tc-xstormy16.c: Likewise.
668 * config/tc-xtensa.c: Likewise.
669 * config/tc-z80.c: Likewise.
670 * config/tc-z8k.c: Likewise.
671 * macro.h: Don't include sb.h or ansidecl.h.
672 * sb.h: Don't include stdio.h or ansidecl.h.
673 * cond.c: Include sb.h.
674 * itbl-lex.l: Include as.h instead of other system headers.
675 * itbl-parse.y: Likewise.
676 * itbl-ops.c: Similarly.
677 * itbl-ops.h: Don't include as.h or ansidecl.h.
678 * config/bfin-defs.h: Don't include bfd.h or as.h.
679 * config/bfin-parse.y: Include as.h instead of other system headers.
681 2006-06-06 Ben Elliston <bje@au.ibm.com>
682 Anton Blanchard <anton@samba.org>
684 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
685 (md_show_usage): Document it.
686 (ppc_setup_opcodes): Test power6 opcode flag bits.
687 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
689 2006-06-06 Thiemo Seufer <ths@mips.com>
690 Chao-ying Fu <fu@mips.com>
692 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
693 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
694 (macro_build): Update comment.
695 (mips_ip): Allow DSP64 instructions for MIPS64R2.
696 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
698 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
699 MIPS_CPU_ASE_MDMX flags for sb1.
701 2006-06-05 Thiemo Seufer <ths@mips.com>
703 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
705 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
706 (mips_ip): Make overflowed/underflowed constant arguments in DSP
707 and MT instructions a fatal error. Use INSERT_OPERAND where
708 appropriate. Improve warnings for break and wait code overflows.
709 Use symbolic constant of OP_MASK_COPZ.
710 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
712 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
714 * po/Make-in (top_builddir): Define.
716 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
718 * doc/Makefile.am (TEXI2DVI): Define.
719 * doc/Makefile.in: Regenerate.
720 * doc/c-arc.texi: Fix typo.
722 2006-06-01 Alan Modra <amodra@bigpond.net.au>
724 * config/obj-ieee.c: Delete.
725 * config/obj-ieee.h: Delete.
726 * Makefile.am (OBJ_FORMATS): Remove ieee.
727 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
728 (obj-ieee.o): Remove rule.
729 * Makefile.in: Regenerate.
730 * configure.in (atof): Remove tahoe.
731 (OBJ_MAYBE_IEEE): Don't define.
732 * configure: Regenerate.
733 * config.in: Regenerate.
734 * doc/Makefile.in: Regenerate.
735 * po/POTFILES.in: Regenerate.
737 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
739 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
740 and LIBINTL_DEP everywhere.
742 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
743 * acinclude.m4: Include new gettext macros.
744 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
745 Remove local code for po/Makefile.
746 * Makefile.in, configure, doc/Makefile.in: Regenerated.
748 2006-05-30 Nick Clifton <nickc@redhat.com>
750 * po/es.po: Updated Spanish translation.
752 2006-05-06 Denis Chertykov <denisc@overta.ru>
754 * doc/c-avr.texi: New file.
755 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
756 * doc/all.texi: Set AVR
757 * doc/as.texinfo: Include c-avr.texi
759 2006-05-28 Jie Zhang <jie.zhang@analog.com>
761 * config/bfin-parse.y (check_macfunc): Loose the condition of
762 calling check_multiply_halfregs ().
764 2006-05-25 Jie Zhang <jie.zhang@analog.com>
766 * config/bfin-parse.y (asm_1): Better check and deal with
767 vector and scalar Multiply 16-Bit Operands instructions.
769 2006-05-24 Nick Clifton <nickc@redhat.com>
771 * config/tc-hppa.c: Convert to ISO C90 format.
772 * config/tc-hppa.h: Likewise.
774 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
775 Randolph Chung <randolph@tausq.org>
777 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
778 is_tls_ieoff, is_tls_leoff): Define.
779 (fix_new_hppa): Handle TLS.
780 (cons_fix_new_hppa): Likewise.
782 (md_apply_fix): Handle TLS relocs.
783 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
785 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
787 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
789 2006-05-23 Thiemo Seufer <ths@mips.com>
790 David Ung <davidu@mips.com>
791 Nigel Stephens <nigel@mips.com>
794 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
795 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
796 ISA_HAS_MXHC1): New macros.
797 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
798 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
799 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
800 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
801 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
802 (mips_after_parse_args): Change default handling of float register
803 size to account for 32bit code with 64bit FP. Better sanity checking
804 of ISA/ASE/ABI option combinations.
805 (s_mipsset): Support switching of GPR and FPR sizes via
806 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
808 (mips_elf_final_processing): We should record the use of 64bit FP
809 registers in 32bit code but we don't, because ELF header flags are
811 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
812 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
813 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
814 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
815 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
816 missing -march options. Document .set arch=CPU. Move .set smartmips
817 to ASE page. Use @code for .set FOO examples.
819 2006-05-23 Jie Zhang <jie.zhang@analog.com>
821 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
824 2006-05-23 Jie Zhang <jie.zhang@analog.com>
826 * config/bfin-defs.h (bfin_equals): Remove declaration.
827 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
828 * config/tc-bfin.c (bfin_name_is_register): Remove.
829 (bfin_equals): Remove.
830 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
831 (bfin_name_is_register): Remove declaration.
833 2006-05-19 Thiemo Seufer <ths@mips.com>
834 Nigel Stephens <nigel@mips.com>
836 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
837 (mips_oddfpreg_ok): New function.
840 2006-05-19 Thiemo Seufer <ths@mips.com>
841 David Ung <davidu@mips.com>
843 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
844 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
845 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
846 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
847 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
848 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
849 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
850 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
851 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
852 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
853 reg_names_o32, reg_names_n32n64): Define register classes.
854 (reg_lookup): New function, use register classes.
855 (md_begin): Reserve register names in the symbol table. Simplify
857 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
859 (mips16_ip): Use reg_lookup.
860 (tc_get_register): Likewise.
861 (tc_mips_regname_to_dw2regnum): New function.
863 2006-05-19 Thiemo Seufer <ths@mips.com>
865 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
866 Un-constify string argument.
867 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
869 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
871 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
873 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
875 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
877 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
880 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
882 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
883 cfloat/m68881 to correct architecture before using it.
885 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
887 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
890 2006-05-15 Paul Brook <paul@codesourcery.com>
892 * config/tc-arm.c (arm_adjust_symtab): Use
893 bfd_is_arm_special_symbol_name.
895 2006-05-15 Bob Wilson <bob.wilson@acm.org>
897 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
898 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
899 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
900 Handle errors from calls to xtensa_opcode_is_* functions.
902 2006-05-14 Thiemo Seufer <ths@mips.com>
904 * config/tc-mips.c (macro_build): Test for currently active
906 (mips16_ip): Reject invalid opcodes.
908 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
910 * doc/as.texinfo: Rename "Index" to "AS Index",
911 and "ABORT" to "ABORT (COFF)".
913 2006-05-11 Paul Brook <paul@codesourcery.com>
915 * config/tc-arm.c (parse_half): New function.
916 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
917 (parse_operands): Ditto.
918 (do_mov16): Reject invalid relocations.
919 (do_t_mov16): Ditto. Use Thumb reloc numbers.
920 (insns): Replace Iffff with HALF.
921 (md_apply_fix): Add MOVW and MOVT relocs.
922 (tc_gen_reloc): Ditto.
923 * doc/c-arm.texi: Document relocation operators
925 2006-05-11 Paul Brook <paul@codesourcery.com>
927 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
929 2006-05-11 Thiemo Seufer <ths@mips.com>
931 * config/tc-mips.c (append_insn): Don't check the range of j or
934 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
936 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
937 relocs against external symbols for WinCE targets.
938 (md_apply_fix): Likewise.
940 2006-05-09 David Ung <davidu@mips.com>
942 * config/tc-mips.c (append_insn): Only warn about an out-of-range
945 2006-05-09 Nick Clifton <nickc@redhat.com>
947 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
948 against symbols which are not going to be placed into the symbol
951 2006-05-09 Ben Elliston <bje@au.ibm.com>
953 * expr.c (operand): Remove `if (0 && ..)' statement and
954 subsequently unused target_op label. Collapse `if (1 || ..)'
956 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
957 separately above the switch.
959 2006-05-08 Nick Clifton <nickc@redhat.com>
962 * config/tc-msp430.c (line_separator_character): Define as |.
964 2006-05-08 Thiemo Seufer <ths@mips.com>
965 Nigel Stephens <nigel@mips.com>
966 David Ung <davidu@mips.com>
968 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
969 (mips_opts): Likewise.
970 (file_ase_smartmips): New variable.
971 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
972 (macro_build): Handle SmartMIPS instructions.
974 (md_longopts): Add argument handling for smartmips.
975 (md_parse_options, mips_after_parse_args): Likewise.
976 (s_mipsset): Add .set smartmips support.
977 (md_show_usage): Document -msmartmips/-mno-smartmips.
978 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
980 * doc/c-mips.texi: Likewise.
982 2006-05-08 Alan Modra <amodra@bigpond.net.au>
984 * write.c (relax_segment): Add pass count arg. Don't error on
985 negative org/space on first two passes.
986 (relax_seg_info): New struct.
987 (relax_seg, write_object_file): Adjust.
988 * write.h (relax_segment): Update prototype.
990 2006-05-05 Julian Brown <julian@codesourcery.com>
992 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
994 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
995 architecture version checks.
996 (insns): Allow overlapping instructions to be used in VFP mode.
998 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1001 * config/obj-elf.c (obj_elf_change_section): Allow user
1002 specified SHF_ALPHA_GPREL.
1004 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1006 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1007 for PMEM related expressions.
1009 2006-05-05 Nick Clifton <nickc@redhat.com>
1012 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1013 insertion of a directory separator character into a string at a
1014 given offset. Uses heuristics to decide when to use a backslash
1015 character rather than a forward-slash character.
1016 (dwarf2_directive_loc): Use the macro.
1017 (out_debug_info): Likewise.
1019 2006-05-05 Thiemo Seufer <ths@mips.com>
1020 David Ung <davidu@mips.com>
1022 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1024 (macro): Add new case M_CACHE_AB.
1026 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1028 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1029 (opcode_lookup): Issue a warning for opcode with
1030 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1031 identical to OT_cinfix3.
1032 (TxC3w, TC3w, tC3w): New.
1033 (insns): Use tC3w and TC3w for comparison instructions with
1036 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1038 * subsegs.h (struct frchain): Delete frch_seg.
1039 (frchain_root): Delete.
1040 (seg_info): Define as macro.
1041 * subsegs.c (frchain_root): Delete.
1042 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1043 (subsegs_begin, subseg_change): Adjust for above.
1044 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1045 rather than to one big list.
1046 (subseg_get): Don't special case abs, und sections.
1047 (subseg_new, subseg_force_new): Don't set frchainP here.
1049 (subsegs_print_statistics): Adjust frag chain control list traversal.
1050 * debug.c (dmp_frags): Likewise.
1051 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1052 at frchain_root. Make use of known frchain ordering.
1053 (last_frag_for_seg): Likewise.
1054 (get_frag_fix): Likewise. Add seg param.
1055 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1056 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1057 (SUB_SEGMENT_ALIGN): Likewise.
1058 (subsegs_finish): Adjust frchain list traversal.
1059 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1060 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1061 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1062 (xtensa_fix_b_j_loop_end_frags): Likewise.
1063 (xtensa_fix_close_loop_end_frags): Likewise.
1064 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1065 (retrieve_segment_info): Delete frch_seg initialisation.
1067 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1069 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1070 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1071 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1072 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1074 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1076 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1078 (md_apply_fix3): Multiply offset by 4 here for
1079 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1081 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1082 Jan Beulich <jbeulich@novell.com>
1084 * config/tc-i386.c (output_invalid_buf): Change size for
1086 * config/tc-tic30.c (output_invalid_buf): Likewise.
1088 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1090 * config/tc-tic30.c (output_invalid): Likewise.
1092 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1094 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1095 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1096 (asconfig.texi): Don't set top_srcdir.
1097 * doc/as.texinfo: Don't use top_srcdir.
1098 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1100 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1102 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1103 * config/tc-tic30.c (output_invalid_buf): Likewise.
1105 * config/tc-i386.c (output_invalid): Use snprintf instead of
1107 * config/tc-ia64.c (declare_register_set): Likewise.
1108 (emit_one_bundle): Likewise.
1109 (check_dependencies): Likewise.
1110 * config/tc-tic30.c (output_invalid): Likewise.
1112 2006-05-02 Paul Brook <paul@codesourcery.com>
1114 * config/tc-arm.c (arm_optimize_expr): New function.
1115 * config/tc-arm.h (md_optimize_expr): Define
1116 (arm_optimize_expr): Add prototype.
1117 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1119 2006-05-02 Ben Elliston <bje@au.ibm.com>
1121 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1124 * sb.h (sb_list_vector): Move to sb.c.
1125 * sb.c (free_list): Use type of sb_list_vector directly.
1126 (sb_build): Fix off-by-one error in assertion about `size'.
1128 2006-05-01 Ben Elliston <bje@au.ibm.com>
1130 * listing.c (listing_listing): Remove useless loop.
1131 * macro.c (macro_expand): Remove is_positional local variable.
1132 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1133 and simplify surrounding expressions, where possible.
1134 (assign_symbol): Likewise.
1135 (s_weakref): Likewise.
1136 * symbols.c (colon): Likewise.
1138 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1140 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1142 2006-04-30 Thiemo Seufer <ths@mips.com>
1143 David Ung <davidu@mips.com>
1145 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1146 (mips_immed): New table that records various handling of udi
1147 instruction patterns.
1148 (mips_ip): Adds udi handling.
1150 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1152 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1153 of list rather than beginning.
1155 2006-04-26 Julian Brown <julian@codesourcery.com>
1157 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1158 (is_quarter_float): Rename from above. Simplify slightly.
1159 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1161 (parse_neon_mov): Parse floating-point constants.
1162 (neon_qfloat_bits): Fix encoding.
1163 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1164 preference to integer encoding when using the F32 type.
1166 2006-04-26 Julian Brown <julian@codesourcery.com>
1168 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1169 zero-initialising structures containing it will lead to invalid types).
1170 (arm_it): Add vectype to each operand.
1171 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1173 (neon_typed_alias): New structure. Extra information for typed
1175 (reg_entry): Add neon type info field.
1176 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1177 Break out alternative syntax for coprocessor registers, etc. into...
1178 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1179 out from arm_reg_parse.
1180 (parse_neon_type): Move. Return SUCCESS/FAIL.
1181 (first_error): New function. Call to ensure first error which occurs is
1183 (parse_neon_operand_type): Parse exactly one type.
1184 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1185 (parse_typed_reg_or_scalar): New function. Handle core of both
1186 arm_typed_reg_parse and parse_scalar.
1187 (arm_typed_reg_parse): Parse a register with an optional type.
1188 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1190 (parse_scalar): Parse a Neon scalar with optional type.
1191 (parse_reg_list): Use first_error.
1192 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1193 (neon_alias_types_same): New function. Return true if two (alias) types
1195 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1197 (insert_reg_alias): Return new reg_entry not void.
1198 (insert_neon_reg_alias): New function. Insert type/index information as
1199 well as register for alias.
1200 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1201 make typed register aliases accordingly.
1202 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1204 (s_unreq): Delete type information if present.
1205 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1206 (s_arm_unwind_save_mmxwcg): Likewise.
1207 (s_arm_unwind_movsp): Likewise.
1208 (s_arm_unwind_setfp): Likewise.
1209 (parse_shift): Likewise.
1210 (parse_shifter_operand): Likewise.
1211 (parse_address): Likewise.
1212 (parse_tb): Likewise.
1213 (tc_arm_regname_to_dw2regnum): Likewise.
1214 (md_pseudo_table): Add dn, qn.
1215 (parse_neon_mov): Handle typed operands.
1216 (parse_operands): Likewise.
1217 (neon_type_mask): Add N_SIZ.
1218 (N_ALLMODS): New macro.
1219 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1220 (el_type_of_type_chk): Add some safeguards.
1221 (modify_types_allowed): Fix logic bug.
1222 (neon_check_type): Handle operands with types.
1223 (neon_three_same): Remove redundant optional arg handling.
1224 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1225 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1226 (do_neon_step): Adjust accordingly.
1227 (neon_cmode_for_logic_imm): Use first_error.
1228 (do_neon_bitfield): Call neon_check_type.
1229 (neon_dyadic): Rename to...
1230 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1231 to allow modification of type of the destination.
1232 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1233 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1234 (do_neon_compare): Make destination be an untyped bitfield.
1235 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1236 (neon_mul_mac): Return early in case of errors.
1237 (neon_move_immediate): Use first_error.
1238 (neon_mac_reg_scalar_long): Fix type to include scalar.
1239 (do_neon_dup): Likewise.
1240 (do_neon_mov): Likewise (in several places).
1241 (do_neon_tbl_tbx): Fix type.
1242 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1243 (do_neon_ld_dup): Exit early in case of errors and/or use
1245 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1246 Handle .dn/.qn directives.
1247 (REGDEF): Add zero for reg_entry neon field.
1249 2006-04-26 Julian Brown <julian@codesourcery.com>
1251 * config/tc-arm.c (limits.h): Include.
1252 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1253 (fpu_vfp_v3_or_neon_ext): Declare constants.
1254 (neon_el_type): New enumeration of types for Neon vector elements.
1255 (neon_type_el): New struct. Define type and size of a vector element.
1256 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1258 (neon_type): Define struct. The type of an instruction.
1259 (arm_it): Add 'vectype' for the current instruction.
1260 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1261 (vfp_sp_reg_pos): Rename to...
1262 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1264 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1265 (Neon D or Q register).
1266 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1268 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1269 (my_get_expression): Allow above constant as argument to accept
1270 64-bit constants with optional prefix.
1271 (arm_reg_parse): Add extra argument to return the specific type of
1272 register in when either a D or Q register (REG_TYPE_NDQ) is
1273 requested. Can be NULL.
1274 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1275 (parse_reg_list): Update for new arm_reg_parse args.
1276 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1277 (parse_neon_el_struct_list): New function. Parse element/structure
1278 register lists for VLD<n>/VST<n> instructions.
1279 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1280 (s_arm_unwind_save_mmxwr): Likewise.
1281 (s_arm_unwind_save_mmxwcg): Likewise.
1282 (s_arm_unwind_movsp): Likewise.
1283 (s_arm_unwind_setfp): Likewise.
1284 (parse_big_immediate): New function. Parse an immediate, which may be
1285 64 bits wide. Put results in inst.operands[i].
1286 (parse_shift): Update for new arm_reg_parse args.
1287 (parse_address): Likewise. Add parsing of alignment specifiers.
1288 (parse_neon_mov): Parse the operands of a VMOV instruction.
1289 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1290 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1291 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1292 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1293 (parse_operands): Handle new codes above.
1294 (encode_arm_vfp_sp_reg): Rename to...
1295 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1296 selected VFP version only supports D0-D15.
1297 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1298 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1299 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1300 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1301 encode_arm_vfp_reg name, and allow 32 D regs.
1302 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1303 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1305 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1306 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1307 constant-load and conversion insns introduced with VFPv3.
1308 (neon_tab_entry): New struct.
1309 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1310 those which are the targets of pseudo-instructions.
1311 (neon_opc): Enumerate opcodes, use as indices into...
1312 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1313 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1314 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1315 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1317 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1319 (neon_type_mask): New. Compact type representation for type checking.
1320 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1321 permitted type combinations.
1322 (N_IGNORE_TYPE): New macro.
1323 (neon_check_shape): New function. Check an instruction shape for
1324 multiple alternatives. Return the specific shape for the current
1326 (neon_modify_type_size): New function. Modify a vector type and size,
1327 depending on the bit mask in argument 1.
1328 (neon_type_promote): New function. Convert a given "key" type (of an
1329 operand) into the correct type for a different operand, based on a bit
1331 (type_chk_of_el_type): New function. Convert a type and size into the
1332 compact representation used for type checking.
1333 (el_type_of_type_ckh): New function. Reverse of above (only when a
1334 single bit is set in the bit mask).
1335 (modify_types_allowed): New function. Alter a mask of allowed types
1336 based on a bit mask of modifications.
1337 (neon_check_type): New function. Check the type of the current
1338 instruction against the variable argument list. The "key" type of the
1339 instruction is returned.
1340 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1341 a Neon data-processing instruction depending on whether we're in ARM
1342 mode or Thumb-2 mode.
1343 (neon_logbits): New function.
1344 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1345 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1346 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1347 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1348 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1349 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1350 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1351 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1352 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1353 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1354 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1355 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1356 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1357 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1358 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1359 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1360 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1361 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1362 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1363 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1364 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1365 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1366 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1367 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1368 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1370 (parse_neon_type): New function. Parse Neon type specifier.
1371 (opcode_lookup): Allow parsing of Neon type specifiers.
1372 (REGNUM2, REGSETH, REGSET2): New macros.
1373 (reg_names): Add new VFPv3 and Neon registers.
1374 (NUF, nUF, NCE, nCE): New macros for opcode table.
1375 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1376 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1377 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1378 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1379 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1380 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1381 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1382 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1383 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1384 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1385 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1386 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1387 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1388 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1390 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1391 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1392 (arm_option_cpu_value): Add vfp3 and neon.
1393 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1396 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1398 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1399 syntax instead of hardcoded opcodes with ".w18" suffixes.
1400 (wide_branch_opcode): New.
1401 (build_transition): Use it to check for wide branch opcodes with
1402 either ".w18" or ".w15" suffixes.
1404 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1406 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1407 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1408 frag's is_literal flag.
1410 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1412 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1414 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1416 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1417 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1418 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1419 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1420 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1422 2005-04-20 Paul Brook <paul@codesourcery.com>
1424 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1426 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1428 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1430 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1431 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1432 Make some cpus unsupported on ELF. Run "make dep-am".
1433 * Makefile.in: Regenerate.
1435 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1437 * configure.in (--enable-targets): Indent help message.
1438 * configure: Regenerate.
1440 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1443 * config/tc-i386.c (i386_immediate): Check illegal immediate
1446 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1448 * config/tc-i386.c: Formatting.
1449 (output_disp, output_imm): ISO C90 params.
1451 * frags.c (frag_offset_fixed_p): Constify args.
1452 * frags.h (frag_offset_fixed_p): Ditto.
1454 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1455 (COFF_MAGIC): Delete.
1457 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1459 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1461 * po/POTFILES.in: Regenerated.
1463 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1465 * doc/as.texinfo: Mention that some .type syntaxes are not
1466 supported on all architectures.
1468 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1470 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1471 instructions when such transformations have been disabled.
1473 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1475 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1476 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1477 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1478 decoding the loop instructions. Remove current_offset variable.
1479 (xtensa_fix_short_loop_frags): Likewise.
1480 (min_bytes_to_other_loop_end): Remove current_offset argument.
1482 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1484 * config/tc-z80.c (z80_optimize_expr): Removed.
1485 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1487 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1489 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1490 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1491 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1492 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1493 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1494 at90can64, at90usb646, at90usb647, at90usb1286 and
1496 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1498 2006-04-07 Paul Brook <paul@codesourcery.com>
1500 * config/tc-arm.c (parse_operands): Set default error message.
1502 2006-04-07 Paul Brook <paul@codesourcery.com>
1504 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1506 2006-04-07 Paul Brook <paul@codesourcery.com>
1508 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1510 2006-04-07 Paul Brook <paul@codesourcery.com>
1512 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1513 (move_or_literal_pool): Handle Thumb-2 instructions.
1514 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1516 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1519 * config/tc-i386.c (match_template): Move 64-bit operand tests
1522 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1524 * po/Make-in: Add install-html target.
1525 * Makefile.am: Add install-html and install-html-recursive targets.
1526 * Makefile.in: Regenerate.
1527 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1528 * configure: Regenerate.
1529 * doc/Makefile.am: Add install-html and install-html-am targets.
1530 * doc/Makefile.in: Regenerate.
1532 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1534 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1537 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1538 Daniel Jacobowitz <dan@codesourcery.com>
1540 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1541 (GOTT_BASE, GOTT_INDEX): New.
1542 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1543 GOTT_INDEX when generating VxWorks PIC.
1544 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1545 use the generic *-*-vxworks* stanza instead.
1547 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1550 * frags.c (frag_offset_fixed_p): New function.
1551 * frags.h (frag_offset_fixed_p): Declare.
1552 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1553 (resolve_expression): Likewise.
1555 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1557 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1558 of the same length but different numbers of slots.
1560 2006-03-30 Andreas Schwab <schwab@suse.de>
1562 * configure.in: Fix help string for --enable-targets option.
1563 * configure: Regenerate.
1565 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1567 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1568 (m68k_ip): ... here. Use for all chips. Protect against buffer
1569 overrun and avoid excessive copying.
1571 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1572 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1573 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1574 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1575 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1576 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1577 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1578 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1579 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1580 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1581 (struct m68k_cpu): Change chip field to control_regs.
1582 (current_chip): Remove.
1583 (control_regs): New.
1584 (m68k_archs, m68k_extensions): Adjust.
1585 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1586 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1587 (find_cf_chip): Reimplement for new organization of cpu table.
1588 (select_control_regs): Remove.
1590 (struct save_opts): Save control regs, not chip.
1591 (s_save, s_restore): Adjust.
1592 (m68k_lookup_cpu): Give deprecated warning when necessary.
1593 (m68k_init_arch): Adjust.
1594 (md_show_usage): Adjust for new cpu table organization.
1596 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1598 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1599 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1600 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1602 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1603 (any_gotrel): New rule.
1604 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1605 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1607 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1608 (bfin_pic_ptr): New function.
1609 (md_pseudo_table): Add it for ".picptr".
1610 (OPTION_FDPIC): New macro.
1611 (md_longopts): Add -mfdpic.
1612 (md_parse_option): Handle it.
1613 (md_begin): Set BFD flags.
1614 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1615 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1617 * Makefile.am (bfin-parse.o): Update dependencies.
1618 (DEPTC_bfin_elf): Likewise.
1619 * Makefile.in: Regenerate.
1621 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1623 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1624 mcfemac instead of mcfmac.
1626 2006-03-23 Michael Matz <matz@suse.de>
1628 * config/tc-i386.c (type_names): Correct placement of 'static'.
1629 (reloc): Map some more relocs to their 64 bit counterpart when
1631 (output_insn): Work around breakage if DEBUG386 is defined.
1632 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1633 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1634 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1635 different from i386.
1636 (output_imm): Ditto.
1637 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1639 (md_convert_frag): Jumps can now be larger than 2GB away, error
1641 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1642 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1644 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1645 Daniel Jacobowitz <dan@codesourcery.com>
1646 Phil Edwards <phil@codesourcery.com>
1647 Zack Weinberg <zack@codesourcery.com>
1648 Mark Mitchell <mark@codesourcery.com>
1649 Nathan Sidwell <nathan@codesourcery.com>
1651 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1652 (md_begin): Complain about -G being used for PIC. Don't change
1653 the text, data and bss alignments on VxWorks.
1654 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1655 generating VxWorks PIC.
1656 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1657 (macro): Likewise, but do not treat la $25 specially for
1658 VxWorks PIC, and do not handle jal.
1659 (OPTION_MVXWORKS_PIC): New macro.
1660 (md_longopts): Add -mvxworks-pic.
1661 (md_parse_option): Don't complain about using PIC and -G together here.
1662 Handle OPTION_MVXWORKS_PIC.
1663 (md_estimate_size_before_relax): Always use the first relaxation
1664 sequence on VxWorks.
1665 * config/tc-mips.h (VXWORKS_PIC): New.
1667 2006-03-21 Paul Brook <paul@codesourcery.com>
1669 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1671 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1673 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1674 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1675 (get_loop_align_size): New.
1676 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1677 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1678 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1679 (get_noop_aligned_address): Use get_loop_align_size.
1680 (get_aligned_diff): Likewise.
1682 2006-03-21 Paul Brook <paul@codesourcery.com>
1684 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1686 2006-03-20 Paul Brook <paul@codesourcery.com>
1688 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1689 (do_t_branch): Encode branches inside IT blocks as unconditional.
1690 (do_t_cps): New function.
1691 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1692 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1693 (opcode_lookup): Allow conditional suffixes on all instructions in
1695 (md_assemble): Advance condexec state before checking for errors.
1696 (insns): Use do_t_cps.
1698 2006-03-20 Paul Brook <paul@codesourcery.com>
1700 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1701 outputting the insn.
1703 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1705 * config/tc-vax.c: Update copyright year.
1706 * config/tc-vax.h: Likewise.
1708 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1710 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1712 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1714 2006-03-17 Paul Brook <paul@codesourcery.com>
1716 * config/tc-arm.c (insns): Add ldm and stm.
1718 2006-03-17 Ben Elliston <bje@au.ibm.com>
1721 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1723 2006-03-16 Paul Brook <paul@codesourcery.com>
1725 * config/tc-arm.c (insns): Add "svc".
1727 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1729 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1730 flag and avoid double underscore prefixes.
1732 2006-03-10 Paul Brook <paul@codesourcery.com>
1734 * config/tc-arm.c (md_begin): Handle EABIv5.
1735 (arm_eabis): Add EF_ARM_EABI_VER5.
1736 * doc/c-arm.texi: Document -meabi=5.
1738 2006-03-10 Ben Elliston <bje@au.ibm.com>
1740 * app.c (do_scrub_chars): Simplify string handling.
1742 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1743 Daniel Jacobowitz <dan@codesourcery.com>
1744 Zack Weinberg <zack@codesourcery.com>
1745 Nathan Sidwell <nathan@codesourcery.com>
1746 Paul Brook <paul@codesourcery.com>
1747 Ricardo Anguiano <anguiano@codesourcery.com>
1748 Phil Edwards <phil@codesourcery.com>
1750 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1751 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1753 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1754 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1755 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1757 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1759 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1760 even when using the text-section-literals option.
1762 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1764 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1766 (m68k_ip): <case 'J'> Check we have some control regs.
1767 (md_parse_option): Allow raw arch switch.
1768 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1769 whether 68881 or cfloat was meant by -mfloat.
1770 (md_show_usage): Adjust extension display.
1771 (m68k_elf_final_processing): Adjust.
1773 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1775 * config/tc-avr.c (avr_mod_hash_value): New function.
1776 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1777 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1778 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1779 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1781 (tc_gen_reloc): Handle substractions of symbols, if possible do
1782 fixups, abort otherwise.
1783 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1784 tc_fix_adjustable): Define.
1786 2006-03-02 James E Wilson <wilson@specifix.com>
1788 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1789 change the template, then clear md.slot[curr].end_of_insn_group.
1791 2006-02-28 Jan Beulich <jbeulich@novell.com>
1793 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1795 2006-02-28 Jan Beulich <jbeulich@novell.com>
1798 * macro.c (getstring): Don't treat parentheses special anymore.
1799 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1800 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1803 2006-02-28 Mat <mat@csail.mit.edu>
1805 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1807 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1809 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1811 (CFI_signal_frame): Define.
1812 (cfi_pseudo_table): Add .cfi_signal_frame.
1813 (dot_cfi): Handle CFI_signal_frame.
1814 (output_cie): Handle cie->signal_frame.
1815 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1816 different. Copy signal_frame from FDE to newly created CIE.
1817 * doc/as.texinfo: Document .cfi_signal_frame.
1819 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1821 * doc/Makefile.am: Add html target.
1822 * doc/Makefile.in: Regenerate.
1823 * po/Make-in: Add html target.
1825 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1827 * config/tc-i386.c (output_insn): Support Intel Merom New
1830 * config/tc-i386.h (CpuMNI): New.
1831 (CpuUnknownFlags): Add CpuMNI.
1833 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1835 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1836 (hpriv_reg_table): New table for hyperprivileged registers.
1837 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1840 2006-02-24 DJ Delorie <dj@redhat.com>
1842 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1843 (tc_gen_reloc): Don't define.
1844 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1845 (OPTION_LINKRELAX): New.
1846 (md_longopts): Add it.
1848 (md_parse_options): Set it.
1849 (md_assemble): Emit relaxation relocs as needed.
1850 (md_convert_frag): Emit relaxation relocs as needed.
1851 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1852 (m32c_apply_fix): New.
1853 (tc_gen_reloc): New.
1854 (m32c_force_relocation): Force out jump relocs when relaxing.
1855 (m32c_fix_adjustable): Return false if relaxing.
1857 2006-02-24 Paul Brook <paul@codesourcery.com>
1859 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1860 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1861 (struct asm_barrier_opt): Define.
1862 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1863 (parse_psr): Accept V7M psr names.
1864 (parse_barrier): New function.
1865 (enum operand_parse_code): Add OP_oBARRIER.
1866 (parse_operands): Implement OP_oBARRIER.
1867 (do_barrier): New function.
1868 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1869 (do_t_cpsi): Add V7M restrictions.
1870 (do_t_mrs, do_t_msr): Validate V7M variants.
1871 (md_assemble): Check for NULL variants.
1872 (v7m_psrs, barrier_opt_names): New tables.
1873 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1874 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1875 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1876 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1877 (struct cpu_arch_ver_table): Define.
1878 (cpu_arch_ver): New.
1879 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1880 Tag_CPU_arch_profile.
1881 * doc/c-arm.texi: Document new cpu and arch options.
1883 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1885 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1887 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1889 * config/tc-ia64.c: Update copyright years.
1891 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1893 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1896 2005-02-22 Paul Brook <paul@codesourcery.com>
1898 * config/tc-arm.c (do_pld): Remove incorrect write to
1900 (encode_thumb32_addr_mode): Use correct operand.
1902 2006-02-21 Paul Brook <paul@codesourcery.com>
1904 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1906 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1907 Anil Paranjape <anilp1@kpitcummins.com>
1908 Shilin Shakti <shilins@kpitcummins.com>
1910 * Makefile.am: Add xc16x related entry.
1911 * Makefile.in: Regenerate.
1912 * configure.in: Added xc16x related entry.
1913 * configure: Regenerate.
1914 * config/tc-xc16x.h: New file
1915 * config/tc-xc16x.c: New file
1916 * doc/c-xc16x.texi: New file for xc16x
1917 * doc/all.texi: Entry for xc16x
1918 * doc/Makefile.texi: Added c-xc16x.texi
1919 * NEWS: Announce the support for the new target.
1921 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1923 * configure.tgt: set emulation for mips-*-netbsd*
1925 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1927 * config.in: Rebuilt.
1929 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1931 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1932 from 1, not 0, in error messages.
1933 (md_assemble): Simplify special-case check for ENTRY instructions.
1934 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1935 operand in error message.
1937 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1939 * configure.tgt (arm-*-linux-gnueabi*): Change to
1942 2006-02-10 Nick Clifton <nickc@redhat.com>
1944 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1945 32-bit value is propagated into the upper bits of a 64-bit long.
1947 * config/tc-arc.c (init_opcode_tables): Fix cast.
1948 (arc_extoper, md_operand): Likewise.
1950 2006-02-09 David Heine <dlheine@tensilica.com>
1952 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1953 each relaxation step.
1955 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1957 * configure.in (CHECK_DECLS): Add vsnprintf.
1958 * configure: Regenerate.
1959 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1960 include/declare here, but...
1961 * as.h: Move code detecting VARARGS idiom to the top.
1962 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1963 (vsnprintf): Declare if not already declared.
1965 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1967 * as.c (close_output_file): New.
1968 (main): Register close_output_file with xatexit before
1969 dump_statistics. Don't call output_file_close.
1971 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1973 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1974 mcf5329_control_regs): New.
1975 (not_current_architecture, selected_arch, selected_cpu): New.
1976 (m68k_archs, m68k_extensions): New.
1977 (archs): Renamed to ...
1978 (m68k_cpus): ... here. Adjust.
1980 (md_pseudo_table): Add arch and cpu directives.
1981 (find_cf_chip, m68k_ip): Adjust table scanning.
1982 (no_68851, no_68881): Remove.
1983 (md_assemble): Lazily initialize.
1984 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1985 (md_init_after_args): Move functionality to m68k_init_arch.
1986 (mri_chip): Adjust table scanning.
1987 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1988 options with saner parsing.
1989 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1990 m68k_init_arch): New.
1991 (s_m68k_cpu, s_m68k_arch): New.
1992 (md_show_usage): Adjust.
1993 (m68k_elf_final_processing): Set CF EF flags.
1994 * config/tc-m68k.h (m68k_init_after_args): Remove.
1995 (tc_init_after_args): Remove.
1996 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1997 (M68k-Directives): Document .arch and .cpu directives.
1999 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2001 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2002 synonyms for equ and defl.
2003 (z80_cons_fix_new): New function.
2004 (emit_byte): Disallow relative jumps to absolute locations.
2005 (emit_data): Only handle defb, prototype changed, because defb is
2006 now handled as pseudo-op rather than an instruction.
2007 (instab): Entries for defb,defw,db,dw moved from here...
2008 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2009 Add entries for def24,def32,d24,d32.
2010 (md_assemble): Improved error handling.
2011 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2012 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2013 (z80_cons_fix_new): Declare.
2014 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2015 (def24,d24,def32,d32): New pseudo-ops.
2017 2006-02-02 Paul Brook <paul@codesourcery.com>
2019 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2021 2005-02-02 Paul Brook <paul@codesourcery.com>
2023 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2024 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2025 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2026 T2_OPCODE_RSB): Define.
2027 (thumb32_negate_data_op): New function.
2028 (md_apply_fix): Use it.
2030 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2032 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2034 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2035 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2037 (relaxation_requirements): Add pfinish_frag argument and use it to
2038 replace setting tinsn->record_fix fields.
2039 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2040 and vinsn_to_insnbuf. Remove references to record_fix and
2041 slot_sub_symbols fields.
2042 (xtensa_mark_narrow_branches): Delete unused code.
2043 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2045 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2047 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2048 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2049 of the record_fix field. Simplify error messages for unexpected
2051 (set_expr_symbol_offset_diff): Delete.
2053 2006-01-31 Paul Brook <paul@codesourcery.com>
2055 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2057 2006-01-31 Paul Brook <paul@codesourcery.com>
2058 Richard Earnshaw <rearnsha@arm.com>
2060 * config/tc-arm.c: Use arm_feature_set.
2061 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2062 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2063 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2066 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2067 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2068 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2069 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2071 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2072 (arm_opts): Move old cpu/arch options from here...
2073 (arm_legacy_opts): ... to here.
2074 (md_parse_option): Search arm_legacy_opts.
2075 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2076 (arm_float_abis, arm_eabis): Make const.
2078 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2080 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2082 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2084 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2085 in load immediate intruction.
2087 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2089 * config/bfin-parse.y (value_match): Use correct conversion
2090 specifications in template string for __FILE__ and __LINE__.
2094 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2096 Introduce TLS descriptors for i386 and x86_64.
2097 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2098 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2099 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2100 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2101 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2103 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2104 (lex_got): Handle @tlsdesc and @tlscall.
2105 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2107 2006-01-11 Nick Clifton <nickc@redhat.com>
2109 Fixes for building on 64-bit hosts:
2110 * config/tc-avr.c (mod_index): New union to allow conversion
2111 between pointers and integers.
2112 (md_begin, avr_ldi_expression): Use it.
2113 * config/tc-i370.c (md_assemble): Add cast for argument to print
2115 * config/tc-tic54x.c (subsym_substitute): Likewise.
2116 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2117 opindex field of fr_cgen structure into a pointer so that it can
2118 be stored in a frag.
2119 * config/tc-mn10300.c (md_assemble): Likewise.
2120 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2122 * config/tc-v850.c: Replace uses of (int) casts with correct
2125 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2128 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2130 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2133 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2134 a local-label reference.
2136 For older changes see ChangeLog-2005
2142 version-control: never
projects / binutils-gdb.git / blob