gas/ChangeLog

   1 2006-05-15  Bob Wilson  <bob.wilson@acm.org>
   2
   3         * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
   4         xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
   5         xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
   6         Handle errors from calls to xtensa_opcode_is_* functions.
   7
   8 2006-05-14  Thiemo Seufer  <ths@mips.com>
   9
  10         * config/tc-mips.c (macro_build): Test for currently active
  11         mips16 option.
  12         (mips16_ip): Reject invalid opcodes.
  13
  14 2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>
  15
  16         * doc/as.texinfo: Rename "Index" to "AS Index",
  17         and "ABORT" to "ABORT (COFF)".
  18
  19 2006-05-11  Paul Brook  <paul@codesourcery.com>
  20
  21         * config/tc-arm.c (parse_half): New function.
  22         (operand_parse_code): Remove OP_Iffff.  Add OP_HALF.
  23         (parse_operands): Ditto.
  24         (do_mov16): Reject invalid relocations.
  25         (do_t_mov16): Ditto.  Use Thumb reloc numbers.
  26         (insns): Replace Iffff with HALF.
  27         (md_apply_fix): Add MOVW and MOVT relocs.
  28         (tc_gen_reloc): Ditto.
  29         * doc/c-arm.texi: Document relocation operators
  30
  31 2006-05-11  Paul Brook  <paul@codesourcery.com>
  32
  33         * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
  34
  35 2006-05-11  Thiemo Seufer  <ths@mips.com>
  36
  37         * config/tc-mips.c (append_insn): Don't check the range of j or
  38         jal addresses.
  39
  40 2006-05-11  Pedro Alves  <pedro_alves@portugalmail.pt>
  41
  42         * config/tc-arm.c (md_pcrel_from_section): Force a bias for
  43         relocs against external symbols for WinCE targets.
  44         (md_apply_fix): Likewise.
  45
  46 2006-05-09  David Ung  <davidu@mips.com>
  47
  48         * config/tc-mips.c (append_insn): Only warn about an out-of-range
  49         j or jal address.
  50
  51 2006-05-09  Nick Clifton  <nickc@redhat.com>
  52
  53         * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
  54         against symbols which are not going to be placed into the symbol
  55         table.
  56
  57 2006-05-09  Ben Elliston  <bje@au.ibm.com>
  58
  59         * expr.c (operand): Remove `if (0 && ..)' statement and
  60         subsequently unused target_op label.  Collapse `if (1 || ..)'
  61         statement.
  62         * app.c (do_scrub_chars): Remove unused case 0, as it is handled
  63         separately above the switch.
  64
  65 2006-05-08  Nick Clifton  <nickc@redhat.com>
  66
  67         PR gas/2623
  68         * config/tc-msp430.c (line_separator_character): Define as |.
  69
  70 2006-05-08  Thiemo Seufer  <ths@mips.com>
  71             Nigel Stephens  <nigel@mips.com>
  72             David Ung  <davidu@mips.com>
  73
  74         * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
  75         (mips_opts): Likewise.
  76         (file_ase_smartmips): New variable.
  77         (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
  78         (macro_build): Handle SmartMIPS instructions.
  79         (mips_ip): Likewise.
  80         (md_longopts): Add argument handling for smartmips.
  81         (md_parse_options, mips_after_parse_args): Likewise.
  82         (s_mipsset): Add .set smartmips support.
  83         (md_show_usage): Document -msmartmips/-mno-smartmips.
  84         * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
  85         .set smartmips.
  86         * doc/c-mips.texi: Likewise.
  87
  88 2006-05-08  Alan Modra  <amodra@bigpond.net.au>
  89
  90         * write.c (relax_segment): Add pass count arg.  Don't error on
  91         negative org/space on first two passes.
  92         (relax_seg_info): New struct.
  93         (relax_seg, write_object_file): Adjust.
  94         * write.h (relax_segment): Update prototype.
  95
  96 2006-05-05  Julian Brown  <julian@codesourcery.com>
  97
  98         * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
  99         checking.
 100         (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
 101         architecture version checks.
 102         (insns): Allow overlapping instructions to be used in VFP mode.
 103
 104 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 105
 106         PR gas/2598
 107         * config/obj-elf.c (obj_elf_change_section): Allow user
 108         specified SHF_ALPHA_GPREL.
 109
 110 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
 111
 112         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
 113         for PMEM related expressions.
 114
 115 2006-05-05  Nick Clifton  <nickc@redhat.com>
 116
 117         PR gas/2582
 118         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
 119         insertion of a directory separator character into a string at a
 120         given offset.  Uses heuristics to decide when to use a backslash
 121         character rather than a forward-slash character.
 122         (dwarf2_directive_loc): Use the macro.
 123         (out_debug_info): Likewise.
 124
 125 2006-05-05  Thiemo Seufer  <ths@mips.com>
 126             David Ung  <davidu@mips.com>
 127
 128         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
 129         instruction.
 130         (macro): Add new case M_CACHE_AB.
 131
 132 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
 133
 134         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
 135         (opcode_lookup): Issue a warning for opcode with
 136         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
 137         identical to OT_cinfix3.
 138         (TxC3w, TC3w, tC3w): New.
 139         (insns): Use tC3w and TC3w for comparison instructions with
 140         's' suffix.
 141
 142 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
 143
 144         * subsegs.h (struct frchain): Delete frch_seg.
 145         (frchain_root): Delete.
 146         (seg_info): Define as macro.
 147         * subsegs.c (frchain_root): Delete.
 148         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
 149         (subsegs_begin, subseg_change): Adjust for above.
 150         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
 151         rather than to one big list.
 152         (subseg_get): Don't special case abs, und sections.
 153         (subseg_new, subseg_force_new): Don't set frchainP here.
 154         (seg_info): Delete.
 155         (subsegs_print_statistics): Adjust frag chain control list traversal.
 156         * debug.c (dmp_frags):  Likewise.
 157         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
 158         at frchain_root.  Make use of known frchain ordering.
 159         (last_frag_for_seg): Likewise.
 160         (get_frag_fix): Likewise.  Add seg param.
 161         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
 162         * write.c (chain_frchains_together_1): Adjust for struct frchain.
 163         (SUB_SEGMENT_ALIGN): Likewise.
 164         (subsegs_finish): Adjust frchain list traversal.
 165         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
 166         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
 167         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
 168         (xtensa_fix_b_j_loop_end_frags): Likewise.
 169         (xtensa_fix_close_loop_end_frags): Likewise.
 170         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
 171         (retrieve_segment_info): Delete frch_seg initialisation.
 172
 173 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
 174
 175         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
 176         * config/obj-elf.h (obj_sec_set_private_data): Delete.
 177         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
 178         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
 179
 180 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
 181
 182         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
 183         here.
 184         (md_apply_fix3): Multiply offset by 4 here for
 185         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
 186
 187 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 188             Jan Beulich  <jbeulich@novell.com>
 189
 190         * config/tc-i386.c (output_invalid_buf): Change size for
 191         unsigned char.
 192         * config/tc-tic30.c (output_invalid_buf): Likewise.
 193
 194         * config/tc-i386.c (output_invalid): Cast none-ascii char to
 195         unsigned char.
 196         * config/tc-tic30.c (output_invalid): Likewise.
 197
 198 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
 199
 200         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
 201         (TEXI2POD): Use AM_MAKEINFOFLAGS.
 202         (asconfig.texi): Don't set top_srcdir.
 203         * doc/as.texinfo: Don't use top_srcdir.
 204         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 205
 206 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 207
 208         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 209         * config/tc-tic30.c (output_invalid_buf): Likewise.
 210
 211         * config/tc-i386.c (output_invalid): Use snprintf instead of
 212         sprintf.
 213         * config/tc-ia64.c (declare_register_set): Likewise.
 214         (emit_one_bundle): Likewise.
 215         (check_dependencies): Likewise.
 216         * config/tc-tic30.c (output_invalid): Likewise.
 217
 218 2006-05-02  Paul Brook  <paul@codesourcery.com>
 219
 220         * config/tc-arm.c (arm_optimize_expr): New function.
 221         * config/tc-arm.h (md_optimize_expr): Define
 222         (arm_optimize_expr): Add prototype.
 223         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 224
 225 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 226
 227         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 228         field unsigned.
 229
 230         * sb.h (sb_list_vector): Move to sb.c.
 231         * sb.c (free_list): Use type of sb_list_vector directly.
 232         (sb_build): Fix off-by-one error in assertion about `size'.
 233
 234 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 235
 236         * listing.c (listing_listing): Remove useless loop.
 237         * macro.c (macro_expand): Remove is_positional local variable.
 238         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 239         and simplify surrounding expressions, where possible.
 240         (assign_symbol): Likewise.
 241         (s_weakref): Likewise.
 242         * symbols.c (colon): Likewise.
 243
 244 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 245
 246         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 247
 248 2006-04-30  Thiemo Seufer  <ths@mips.com>
 249             David Ung  <davidu@mips.com>
 250
 251         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 252         (mips_immed): New table that records various handling of udi
 253         instruction patterns.
 254         (mips_ip): Adds udi handling.
 255
 256 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 257
 258         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 259         of list rather than beginning.
 260
 261 2006-04-26  Julian Brown  <julian@codesourcery.com>
 262
 263         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 264         (is_quarter_float): Rename from above. Simplify slightly.
 265         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 266         number.
 267         (parse_neon_mov): Parse floating-point constants.
 268         (neon_qfloat_bits): Fix encoding.
 269         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 270         preference to integer encoding when using the F32 type.
 271
 272 2006-04-26  Julian Brown  <julian@codesourcery.com>
 273
 274         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 275         zero-initialising structures containing it will lead to invalid types).
 276         (arm_it): Add vectype to each operand.
 277         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 278         defined field.
 279         (neon_typed_alias): New structure. Extra information for typed
 280         register aliases.
 281         (reg_entry): Add neon type info field.
 282         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 283         Break out alternative syntax for coprocessor registers, etc. into...
 284         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 285         out from arm_reg_parse.
 286         (parse_neon_type): Move. Return SUCCESS/FAIL.
 287         (first_error): New function. Call to ensure first error which occurs is
 288         reported.
 289         (parse_neon_operand_type): Parse exactly one type.
 290         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 291         (parse_typed_reg_or_scalar): New function. Handle core of both
 292         arm_typed_reg_parse and parse_scalar.
 293         (arm_typed_reg_parse): Parse a register with an optional type.
 294         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 295         result.
 296         (parse_scalar): Parse a Neon scalar with optional type.
 297         (parse_reg_list): Use first_error.
 298         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 299         (neon_alias_types_same): New function. Return true if two (alias) types
 300         are the same.
 301         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 302         of elements.
 303         (insert_reg_alias): Return new reg_entry not void.
 304         (insert_neon_reg_alias): New function. Insert type/index information as
 305         well as register for alias.
 306         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 307         make typed register aliases accordingly.
 308         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 309         of line.
 310         (s_unreq): Delete type information if present.
 311         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 312         (s_arm_unwind_save_mmxwcg): Likewise.
 313         (s_arm_unwind_movsp): Likewise.
 314         (s_arm_unwind_setfp): Likewise.
 315         (parse_shift): Likewise.
 316         (parse_shifter_operand): Likewise.
 317         (parse_address): Likewise.
 318         (parse_tb): Likewise.
 319         (tc_arm_regname_to_dw2regnum): Likewise.
 320         (md_pseudo_table): Add dn, qn.
 321         (parse_neon_mov): Handle typed operands.
 322         (parse_operands): Likewise.
 323         (neon_type_mask): Add N_SIZ.
 324         (N_ALLMODS): New macro.
 325         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 326         (el_type_of_type_chk): Add some safeguards.
 327         (modify_types_allowed): Fix logic bug.
 328         (neon_check_type): Handle operands with types.
 329         (neon_three_same): Remove redundant optional arg handling.
 330         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 331         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 332         (do_neon_step): Adjust accordingly.
 333         (neon_cmode_for_logic_imm): Use first_error.
 334         (do_neon_bitfield): Call neon_check_type.
 335         (neon_dyadic): Rename to...
 336         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 337         to allow modification of type of the destination.
 338         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 339         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 340         (do_neon_compare): Make destination be an untyped bitfield.
 341         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 342         (neon_mul_mac): Return early in case of errors.
 343         (neon_move_immediate): Use first_error.
 344         (neon_mac_reg_scalar_long): Fix type to include scalar.
 345         (do_neon_dup): Likewise.
 346         (do_neon_mov): Likewise (in several places).
 347         (do_neon_tbl_tbx): Fix type.
 348         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 349         (do_neon_ld_dup): Exit early in case of errors and/or use
 350         first_error.
 351         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 352         Handle .dn/.qn directives.
 353         (REGDEF): Add zero for reg_entry neon field.
 354
 355 2006-04-26  Julian Brown  <julian@codesourcery.com>
 356
 357         * config/tc-arm.c (limits.h): Include.
 358         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 359         (fpu_vfp_v3_or_neon_ext): Declare constants.
 360         (neon_el_type): New enumeration of types for Neon vector elements.
 361         (neon_type_el): New struct. Define type and size of a vector element.
 362         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 363         instruction.
 364         (neon_type): Define struct. The type of an instruction.
 365         (arm_it): Add 'vectype' for the current instruction.
 366         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 367         (vfp_sp_reg_pos): Rename to...
 368         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 369         tags.
 370         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 371         (Neon D or Q register).
 372         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 373         register.
 374         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 375         (my_get_expression): Allow above constant as argument to accept
 376         64-bit constants with optional prefix.
 377         (arm_reg_parse): Add extra argument to return the specific type of
 378         register in when either a D or Q register (REG_TYPE_NDQ) is
 379         requested. Can be NULL.
 380         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 381         (parse_reg_list): Update for new arm_reg_parse args.
 382         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 383         (parse_neon_el_struct_list): New function. Parse element/structure
 384         register lists for VLD<n>/VST<n> instructions.
 385         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 386         (s_arm_unwind_save_mmxwr): Likewise.
 387         (s_arm_unwind_save_mmxwcg): Likewise.
 388         (s_arm_unwind_movsp): Likewise.
 389         (s_arm_unwind_setfp): Likewise.
 390         (parse_big_immediate): New function. Parse an immediate, which may be
 391         64 bits wide. Put results in inst.operands[i].
 392         (parse_shift): Update for new arm_reg_parse args.
 393         (parse_address): Likewise. Add parsing of alignment specifiers.
 394         (parse_neon_mov): Parse the operands of a VMOV instruction.
 395         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 396         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 397         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 398         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 399         (parse_operands): Handle new codes above.
 400         (encode_arm_vfp_sp_reg): Rename to...
 401         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 402         selected VFP version only supports D0-D15.
 403         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 404         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 405         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 406         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 407         encode_arm_vfp_reg name, and allow 32 D regs.
 408         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 409         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 410         regs.
 411         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 412         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 413         constant-load and conversion insns introduced with VFPv3.
 414         (neon_tab_entry): New struct.
 415         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 416         those which are the targets of pseudo-instructions.
 417         (neon_opc): Enumerate opcodes, use as indices into...
 418         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 419         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 420         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 421         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 422         neon_enc_tab.
 423         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 424         Neon instructions.
 425         (neon_type_mask): New. Compact type representation for type checking.
 426         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 427         permitted type combinations.
 428         (N_IGNORE_TYPE): New macro.
 429         (neon_check_shape): New function. Check an instruction shape for
 430         multiple alternatives. Return the specific shape for the current
 431         instruction.
 432         (neon_modify_type_size): New function. Modify a vector type and size,
 433         depending on the bit mask in argument 1.
 434         (neon_type_promote): New function. Convert a given "key" type (of an
 435         operand) into the correct type for a different operand, based on a bit
 436         mask.
 437         (type_chk_of_el_type): New function. Convert a type and size into the
 438         compact representation used for type checking.
 439         (el_type_of_type_ckh): New function. Reverse of above (only when a
 440         single bit is set in the bit mask).
 441         (modify_types_allowed): New function. Alter a mask of allowed types
 442         based on a bit mask of modifications.
 443         (neon_check_type): New function. Check the type of the current
 444         instruction against the variable argument list. The "key" type of the
 445         instruction is returned.
 446         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 447         a Neon data-processing instruction depending on whether we're in ARM
 448         mode or Thumb-2 mode.
 449         (neon_logbits): New function.
 450         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 451         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 452         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 453         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 454         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 455         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 456         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 457         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 458         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 459         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 460         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 461         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 462         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 463         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 464         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 465         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 466         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 467         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 468         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 469         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 470         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 471         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 472         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 473         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 474         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 475         helpers.
 476         (parse_neon_type): New function. Parse Neon type specifier.
 477         (opcode_lookup): Allow parsing of Neon type specifiers.
 478         (REGNUM2, REGSETH, REGSET2): New macros.
 479         (reg_names): Add new VFPv3 and Neon registers.
 480         (NUF, nUF, NCE, nCE): New macros for opcode table.
 481         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 482         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 483         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 484         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 485         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 486         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 487         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 488         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 489         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 490         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 491         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 492         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 493         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 494         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 495         fto[us][lh][sd].
 496         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 497         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 498         (arm_option_cpu_value): Add vfp3 and neon.
 499         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 500         VFPv1 attribute.
 501
 502 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 503
 504         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 505         syntax instead of hardcoded opcodes with ".w18" suffixes.
 506         (wide_branch_opcode): New.
 507         (build_transition): Use it to check for wide branch opcodes with
 508         either ".w18" or ".w15" suffixes.
 509
 510 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 511
 512         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 513         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 514         frag's is_literal flag.
 515
 516 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 517
 518         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 519
 520 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 521
 522         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 523         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 524         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 525         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 526         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 527
 528 2005-04-20  Paul Brook  <paul@codesourcery.com>
 529
 530         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 531         all targets.
 532         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 533
 534 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 535
 536         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 537         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 538         Make some cpus unsupported on ELF.  Run "make dep-am".
 539         * Makefile.in: Regenerate.
 540
 541 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 542
 543         * configure.in (--enable-targets): Indent help message.
 544         * configure: Regenerate.
 545
 546 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 547
 548         PR gas/2533
 549         * config/tc-i386.c (i386_immediate): Check illegal immediate
 550         register operand.
 551
 552 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 553
 554         * config/tc-i386.c: Formatting.
 555         (output_disp, output_imm): ISO C90 params.
 556
 557         * frags.c (frag_offset_fixed_p): Constify args.
 558         * frags.h (frag_offset_fixed_p): Ditto.
 559
 560         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 561         (COFF_MAGIC): Delete.
 562
 563         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 564
 565 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 566
 567         * po/POTFILES.in: Regenerated.
 568
 569 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 570
 571         * doc/as.texinfo: Mention that some .type syntaxes are not
 572         supported on all architectures.
 573
 574 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 575
 576         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 577         instructions when such transformations have been disabled.
 578
 579 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 580
 581         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 582         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 583         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 584         decoding the loop instructions.  Remove current_offset variable.
 585         (xtensa_fix_short_loop_frags): Likewise.
 586         (min_bytes_to_other_loop_end): Remove current_offset argument.
 587
 588 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 589
 590         * config/tc-z80.c (z80_optimize_expr): Removed.
 591         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 592
 593 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 594
 595         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 596         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 597         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 598         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 599         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 600         at90can64, at90usb646, at90usb647, at90usb1286 and
 601         at90usb1287.
 602         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 603
 604 2006-04-07  Paul Brook  <paul@codesourcery.com>
 605
 606         * config/tc-arm.c (parse_operands): Set default error message.
 607
 608 2006-04-07  Paul Brook  <paul@codesourcery.com>
 609
 610         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 611
 612 2006-04-07  Paul Brook  <paul@codesourcery.com>
 613
 614         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 615
 616 2006-04-07  Paul Brook  <paul@codesourcery.com>
 617
 618         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 619         (move_or_literal_pool): Handle Thumb-2 instructions.
 620         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 621
 622 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 623
 624         PR 2512.
 625         * config/tc-i386.c (match_template): Move 64-bit operand tests
 626         inside loop.
 627
 628 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 629
 630         * po/Make-in: Add install-html target.
 631         * Makefile.am: Add install-html and install-html-recursive targets.
 632         * Makefile.in: Regenerate.
 633         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 634         * configure: Regenerate.
 635         * doc/Makefile.am: Add install-html and install-html-am targets.
 636         * doc/Makefile.in: Regenerate.
 637
 638 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 639
 640         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 641         second scan.
 642
 643 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 644             Daniel Jacobowitz  <dan@codesourcery.com>
 645
 646         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 647         (GOTT_BASE, GOTT_INDEX): New.
 648         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 649         GOTT_INDEX when generating VxWorks PIC.
 650         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 651         use the generic *-*-vxworks* stanza instead.
 652
 653 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 654
 655         PR 997
 656         * frags.c (frag_offset_fixed_p): New function.
 657         * frags.h (frag_offset_fixed_p): Declare.
 658         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 659         (resolve_expression): Likewise.
 660
 661 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 662
 663         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 664         of the same length but different numbers of slots.
 665
 666 2006-03-30  Andreas Schwab  <schwab@suse.de>
 667
 668         * configure.in: Fix help string for --enable-targets option.
 669         * configure: Regenerate.
 670
 671 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 672
 673         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 674         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 675         overrun and avoid excessive copying.
 676
 677         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 678         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 679         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 680         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 681         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 682         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 683         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 684         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 685         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 686         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 687         (struct m68k_cpu): Change chip field to control_regs.
 688         (current_chip): Remove.
 689         (control_regs): New.
 690         (m68k_archs, m68k_extensions): Adjust.
 691         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 692         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 693         (find_cf_chip): Reimplement for new organization of cpu table.
 694         (select_control_regs): Remove.
 695         (mri_chip): Adjust.
 696         (struct save_opts): Save control regs, not chip.
 697         (s_save, s_restore): Adjust.
 698         (m68k_lookup_cpu): Give deprecated warning when necessary.
 699         (m68k_init_arch): Adjust.
 700         (md_show_usage): Adjust for new cpu table organization.
 701
 702 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 703
 704         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 705         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 706         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 707         "elf/bfin.h".
 708         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 709         (any_gotrel): New rule.
 710         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 711         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 712         "elf/bfin.h".
 713         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 714         (bfin_pic_ptr): New function.
 715         (md_pseudo_table): Add it for ".picptr".
 716         (OPTION_FDPIC): New macro.
 717         (md_longopts): Add -mfdpic.
 718         (md_parse_option): Handle it.
 719         (md_begin): Set BFD flags.
 720         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 721         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 722         us for GOT relocs.
 723         * Makefile.am (bfin-parse.o): Update dependencies.
 724         (DEPTC_bfin_elf): Likewise.
 725         * Makefile.in: Regenerate.
 726
 727 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 728
 729         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 730         mcfemac instead of mcfmac.
 731
 732 2006-03-23  Michael Matz  <matz@suse.de>
 733
 734         * config/tc-i386.c (type_names): Correct placement of 'static'.
 735         (reloc): Map some more relocs to their 64 bit counterpart when
 736         size is 8.
 737         (output_insn): Work around breakage if DEBUG386 is defined.
 738         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 739         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 740         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 741         different from i386.
 742         (output_imm): Ditto.
 743         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 744         Imm64.
 745         (md_convert_frag): Jumps can now be larger than 2GB away, error
 746         out in that case.
 747         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 748         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 749
 750 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 751             Daniel Jacobowitz  <dan@codesourcery.com>
 752             Phil Edwards  <phil@codesourcery.com>
 753             Zack Weinberg  <zack@codesourcery.com>
 754             Mark Mitchell  <mark@codesourcery.com>
 755             Nathan Sidwell  <nathan@codesourcery.com>
 756
 757         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 758         (md_begin): Complain about -G being used for PIC.  Don't change
 759         the text, data and bss alignments on VxWorks.
 760         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 761         generating VxWorks PIC.
 762         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 763         (macro): Likewise, but do not treat la $25 specially for
 764         VxWorks PIC, and do not handle jal.
 765         (OPTION_MVXWORKS_PIC): New macro.
 766         (md_longopts): Add -mvxworks-pic.
 767         (md_parse_option): Don't complain about using PIC and -G together here.
 768         Handle OPTION_MVXWORKS_PIC.
 769         (md_estimate_size_before_relax): Always use the first relaxation
 770         sequence on VxWorks.
 771         * config/tc-mips.h (VXWORKS_PIC): New.
 772
 773 2006-03-21  Paul Brook  <paul@codesourcery.com>
 774
 775         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 776
 777 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 778
 779         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 780         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 781         (get_loop_align_size): New.
 782         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 783         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 784         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 785         (get_noop_aligned_address): Use get_loop_align_size.
 786         (get_aligned_diff): Likewise.
 787
 788 2006-03-21  Paul Brook  <paul@codesourcery.com>
 789
 790         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 791
 792 2006-03-20  Paul Brook  <paul@codesourcery.com>
 793
 794         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 795         (do_t_branch): Encode branches inside IT blocks as unconditional.
 796         (do_t_cps): New function.
 797         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 798         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 799         (opcode_lookup): Allow conditional suffixes on all instructions in
 800         Thumb mode.
 801         (md_assemble): Advance condexec state before checking for errors.
 802         (insns): Use do_t_cps.
 803
 804 2006-03-20  Paul Brook  <paul@codesourcery.com>
 805
 806         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 807         outputting the insn.
 808
 809 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 810
 811         * config/tc-vax.c: Update copyright year.
 812         * config/tc-vax.h: Likewise.
 813
 814 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 815
 816         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 817         make it static.
 818         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 819
 820 2006-03-17  Paul Brook  <paul@codesourcery.com>
 821
 822         * config/tc-arm.c (insns): Add ldm and stm.
 823
 824 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 825
 826         PR gas/2446
 827         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 828
 829 2006-03-16  Paul Brook  <paul@codesourcery.com>
 830
 831         * config/tc-arm.c (insns): Add "svc".
 832
 833 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 834
 835         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 836         flag and avoid double underscore prefixes.
 837
 838 2006-03-10  Paul Brook  <paul@codesourcery.com>
 839
 840         * config/tc-arm.c (md_begin): Handle EABIv5.
 841         (arm_eabis): Add EF_ARM_EABI_VER5.
 842         * doc/c-arm.texi: Document -meabi=5.
 843
 844 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 845
 846         * app.c (do_scrub_chars): Simplify string handling.
 847
 848 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 849             Daniel Jacobowitz  <dan@codesourcery.com>
 850             Zack Weinberg  <zack@codesourcery.com>
 851             Nathan Sidwell  <nathan@codesourcery.com>
 852             Paul Brook  <paul@codesourcery.com>
 853             Ricardo Anguiano  <anguiano@codesourcery.com>
 854             Phil Edwards  <phil@codesourcery.com>
 855
 856         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 857         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 858         R_ARM_ABS12 reloc.
 859         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 860         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 861         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 862
 863 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 864
 865         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 866         even when using the text-section-literals option.
 867
 868 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 869
 870         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 871         and cf.
 872         (m68k_ip): <case 'J'> Check we have some control regs.
 873         (md_parse_option): Allow raw arch switch.
 874         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 875         whether 68881 or cfloat was meant by -mfloat.
 876         (md_show_usage): Adjust extension display.
 877         (m68k_elf_final_processing): Adjust.
 878
 879 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 880
 881         * config/tc-avr.c (avr_mod_hash_value): New function.
 882         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 883         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 884         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 885         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 886         of (int).
 887         (tc_gen_reloc): Handle substractions of symbols, if possible do
 888         fixups, abort otherwise.
 889         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 890         tc_fix_adjustable): Define.
 891
 892 2006-03-02  James E Wilson  <wilson@specifix.com>
 893
 894         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 895         change the template, then clear md.slot[curr].end_of_insn_group.
 896
 897 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 898
 899         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 900
 901 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 902
 903         PR/1070
 904         * macro.c (getstring): Don't treat parentheses special anymore.
 905         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 906         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 907         characters.
 908
 909 2006-02-28  Mat <mat@csail.mit.edu>
 910
 911         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 912
 913 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 914
 915         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 916         field.
 917         (CFI_signal_frame): Define.
 918         (cfi_pseudo_table): Add .cfi_signal_frame.
 919         (dot_cfi): Handle CFI_signal_frame.
 920         (output_cie): Handle cie->signal_frame.
 921         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 922         different.  Copy signal_frame from FDE to newly created CIE.
 923         * doc/as.texinfo: Document .cfi_signal_frame.
 924
 925 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 926
 927         * doc/Makefile.am: Add html target.
 928         * doc/Makefile.in: Regenerate.
 929         * po/Make-in: Add html target.
 930
 931 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 932
 933         * config/tc-i386.c (output_insn): Support Intel Merom New
 934         Instructions.
 935
 936         * config/tc-i386.h (CpuMNI): New.
 937         (CpuUnknownFlags): Add CpuMNI.
 938
 939 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 940
 941         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 942         (hpriv_reg_table): New table for hyperprivileged registers.
 943         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 944         register encoding.
 945
 946 2006-02-24  DJ Delorie  <dj@redhat.com>
 947
 948         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 949         (tc_gen_reloc): Don't define.
 950         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 951         (OPTION_LINKRELAX): New.
 952         (md_longopts): Add it.
 953         (m32c_relax): New.
 954         (md_parse_options): Set it.
 955         (md_assemble): Emit relaxation relocs as needed.
 956         (md_convert_frag): Emit relaxation relocs as needed.
 957         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 958         (m32c_apply_fix): New.
 959         (tc_gen_reloc): New.
 960         (m32c_force_relocation): Force out jump relocs when relaxing.
 961         (m32c_fix_adjustable): Return false if relaxing.
 962
 963 2006-02-24  Paul Brook  <paul@codesourcery.com>
 964
 965         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 966         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 967         (struct asm_barrier_opt): Define.
 968         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 969         (parse_psr): Accept V7M psr names.
 970         (parse_barrier): New function.
 971         (enum operand_parse_code): Add OP_oBARRIER.
 972         (parse_operands): Implement OP_oBARRIER.
 973         (do_barrier): New function.
 974         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 975         (do_t_cpsi): Add V7M restrictions.
 976         (do_t_mrs, do_t_msr): Validate V7M variants.
 977         (md_assemble): Check for NULL variants.
 978         (v7m_psrs, barrier_opt_names): New tables.
 979         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 980         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 981         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 982         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 983         (struct cpu_arch_ver_table): Define.
 984         (cpu_arch_ver): New.
 985         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 986         Tag_CPU_arch_profile.
 987         * doc/c-arm.texi: Document new cpu and arch options.
 988
 989 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 990
 991         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 992
 993 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 994
 995         * config/tc-ia64.c: Update copyright years.
 996
 997 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 998
 999         * config/tc-ia64.c (specify_resource): Add the rule 17 from
1000         SDM 2.2.
1001
1002 2005-02-22  Paul Brook  <paul@codesourcery.com>
1003
1004         * config/tc-arm.c (do_pld): Remove incorrect write to
1005         inst.instruction.
1006         (encode_thumb32_addr_mode): Use correct operand.
1007
1008 2006-02-21  Paul Brook  <paul@codesourcery.com>
1009
1010         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1011
1012 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
1013             Anil Paranjape   <anilp1@kpitcummins.com>
1014             Shilin Shakti    <shilins@kpitcummins.com>
1015
1016         * Makefile.am: Add xc16x related entry.
1017         * Makefile.in: Regenerate.
1018         * configure.in: Added xc16x related entry.
1019         * configure: Regenerate.
1020         * config/tc-xc16x.h: New file
1021         * config/tc-xc16x.c: New file
1022         * doc/c-xc16x.texi: New file for xc16x
1023         * doc/all.texi: Entry for xc16x
1024         * doc/Makefile.texi: Added c-xc16x.texi
1025         * NEWS: Announce the support for the new target.
1026
1027 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
1028
1029         * configure.tgt: set emulation for mips-*-netbsd*
1030
1031 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
1032
1033         * config.in: Rebuilt.
1034
1035 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
1036
1037         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1038         from 1, not 0, in error messages.
1039         (md_assemble): Simplify special-case check for ENTRY instructions.
1040         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1041         operand in error message.
1042
1043 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
1044
1045         * configure.tgt (arm-*-linux-gnueabi*): Change to
1046         arm-*-linux-*eabi*.
1047
1048 2006-02-10  Nick Clifton  <nickc@redhat.com>
1049
1050         * config/tc-crx.c (check_range): Ensure that the sign bit of a
1051         32-bit value is propagated into the upper bits of a 64-bit long.
1052
1053         * config/tc-arc.c (init_opcode_tables): Fix cast.
1054         (arc_extoper, md_operand): Likewise.
1055
1056 2006-02-09  David Heine  <dlheine@tensilica.com>
1057
1058         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1059         each relaxation step.
1060
1061 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
1062
1063         * configure.in (CHECK_DECLS): Add vsnprintf.
1064         * configure: Regenerate.
1065         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1066         include/declare here, but...
1067         * as.h: Move code detecting VARARGS idiom to the top.
1068         (errno.h, stdarg.h, varargs.h, va_list): ...here.
1069         (vsnprintf): Declare if not already declared.
1070
1071 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
1072
1073         * as.c (close_output_file): New.
1074         (main): Register close_output_file with xatexit before
1075         dump_statistics. Don't call output_file_close.
1076
1077 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
1078
1079         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1080         mcf5329_control_regs): New.
1081         (not_current_architecture, selected_arch, selected_cpu): New.
1082         (m68k_archs, m68k_extensions): New.
1083         (archs): Renamed to ...
1084         (m68k_cpus): ... here.  Adjust.
1085         (n_arches): Remove.
1086         (md_pseudo_table): Add arch and cpu directives.
1087         (find_cf_chip, m68k_ip): Adjust table scanning.
1088         (no_68851, no_68881): Remove.
1089         (md_assemble): Lazily initialize.
1090         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1091         (md_init_after_args): Move functionality to m68k_init_arch.
1092         (mri_chip): Adjust table scanning.
1093         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1094         options with saner parsing.
1095         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1096         m68k_init_arch): New.
1097         (s_m68k_cpu, s_m68k_arch): New.
1098         (md_show_usage): Adjust.
1099         (m68k_elf_final_processing): Set CF EF flags.
1100         * config/tc-m68k.h (m68k_init_after_args): Remove.
1101         (tc_init_after_args): Remove.
1102         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1103         (M68k-Directives): Document .arch and .cpu directives.
1104
1105 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1106
1107         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1108         synonyms for equ and defl.
1109         (z80_cons_fix_new): New function.
1110         (emit_byte): Disallow relative jumps to absolute locations.
1111         (emit_data): Only handle defb, prototype changed, because defb is
1112         now handled as pseudo-op rather than an instruction.
1113         (instab): Entries for defb,defw,db,dw moved from here...
1114         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1115         Add entries for def24,def32,d24,d32.
1116         (md_assemble): Improved error handling.
1117         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1118         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1119         (z80_cons_fix_new): Declare.
1120         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1121         (def24,d24,def32,d32): New pseudo-ops.
1122
1123 2006-02-02  Paul Brook  <paul@codesourcery.com>
1124
1125         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1126
1127 2005-02-02  Paul Brook  <paul@codesourcery.com>
1128
1129         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1130         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1131         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1132         T2_OPCODE_RSB): Define.
1133         (thumb32_negate_data_op): New function.
1134         (md_apply_fix): Use it.
1135
1136 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1137
1138         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1139         fields.
1140         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1141         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1142         subtracted symbols.
1143         (relaxation_requirements): Add pfinish_frag argument and use it to
1144         replace setting tinsn->record_fix fields.
1145         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1146         and vinsn_to_insnbuf.  Remove references to record_fix and
1147         slot_sub_symbols fields.
1148         (xtensa_mark_narrow_branches): Delete unused code.
1149         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1150         a symbol.
1151         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1152         record_fix fields.
1153         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1154         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1155         of the record_fix field.  Simplify error messages for unexpected
1156         symbolic operands.
1157         (set_expr_symbol_offset_diff): Delete.
1158
1159 2006-01-31  Paul Brook  <paul@codesourcery.com>
1160
1161         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1162
1163 2006-01-31  Paul Brook  <paul@codesourcery.com>
1164         Richard Earnshaw <rearnsha@arm.com>
1165
1166         * config/tc-arm.c: Use arm_feature_set.
1167         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1168         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1169         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1170         New variables.
1171         (insns): Use them.
1172         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1173         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1174         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1175         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1176         feature flags.
1177         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1178         (arm_opts): Move old cpu/arch options from here...
1179         (arm_legacy_opts): ... to here.
1180         (md_parse_option): Search arm_legacy_opts.
1181         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1182         (arm_float_abis, arm_eabis): Make const.
1183
1184 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1185
1186         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1187
1188 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1189
1190         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1191         in load immediate intruction.
1192
1193 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1194
1195         * config/bfin-parse.y (value_match): Use correct conversion
1196         specifications in template string for __FILE__ and __LINE__.
1197         (binary): Ditto.
1198         (unary): Ditto.
1199
1200 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1201
1202         Introduce TLS descriptors for i386 and x86_64.
1203         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1204         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1205         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1206         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1207         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1208         displacement bits.
1209         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1210         (lex_got): Handle @tlsdesc and @tlscall.
1211         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1212
1213 2006-01-11  Nick Clifton  <nickc@redhat.com>
1214
1215         Fixes for building on 64-bit hosts:
1216         * config/tc-avr.c (mod_index): New union to allow conversion
1217         between pointers and integers.
1218         (md_begin, avr_ldi_expression): Use it.
1219         * config/tc-i370.c (md_assemble): Add cast for argument to print
1220         statement.
1221         * config/tc-tic54x.c (subsym_substitute): Likewise.
1222         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1223         opindex field of fr_cgen structure into a pointer so that it can
1224         be stored in a frag.
1225         * config/tc-mn10300.c (md_assemble): Likewise.
1226         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1227         types.
1228         * config/tc-v850.c: Replace uses of (int) casts with correct
1229         types.
1230
1231 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1232
1233         PR gas/2117
1234         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1235
1236 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1237
1238         PR gas/2101
1239         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1240         a local-label reference.
1241
1242 For older changes see ChangeLog-2005
1243 \f
1244 Local Variables:
1245 mode: change-log
1246 left-margin: 8
1247 fill-column: 74
1248 version-control: never
1249 End: