* config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
[binutils-gdb.git] / gas / ChangeLog
1 2006-05-19 Thiemo Seufer <ths@mips.com>
2 Nigel Stephens <nigel@mips.com>
3
4 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
5 (mips_oddfpreg_ok): New function.
6 (mips_ip): Use it.
7
8 2006-05-19 Thiemo Seufer <ths@mips.com>
9 David Ung <davidu@mips.com>
10
11 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
12 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
13 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
14 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
15 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
16 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
17 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
18 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
19 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
20 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
21 reg_names_o32, reg_names_n32n64): Define register classes.
22 (reg_lookup): New function, use register classes.
23 (md_begin): Reserve register names in the symbol table. Simplify
24 OBJ_ELF defines.
25 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
26 Use reg_lookup.
27 (mips16_ip): Use reg_lookup.
28 (tc_get_register): Likewise.
29 (tc_mips_regname_to_dw2regnum): New function.
30
31 2006-05-19 Thiemo Seufer <ths@mips.com>
32
33 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
34 Un-constify string argument.
35 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
36 Likewise.
37 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
38 Likewise.
39 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
40 Likewise.
41 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
42 Likewise.
43 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
44 Likewise.
45 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
46 Likewise.
47
48 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
49
50 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
51 cfloat/m68881 to correct architecture before using it.
52
53 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
54
55 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
56 constant values.
57
58 2006-05-15 Paul Brook <paul@codesourcery.com>
59
60 * config/tc-arm.c (arm_adjust_symtab): Use
61 bfd_is_arm_special_symbol_name.
62
63 2006-05-15 Bob Wilson <bob.wilson@acm.org>
64
65 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
66 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
67 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
68 Handle errors from calls to xtensa_opcode_is_* functions.
69
70 2006-05-14 Thiemo Seufer <ths@mips.com>
71
72 * config/tc-mips.c (macro_build): Test for currently active
73 mips16 option.
74 (mips16_ip): Reject invalid opcodes.
75
76 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
77
78 * doc/as.texinfo: Rename "Index" to "AS Index",
79 and "ABORT" to "ABORT (COFF)".
80
81 2006-05-11 Paul Brook <paul@codesourcery.com>
82
83 * config/tc-arm.c (parse_half): New function.
84 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
85 (parse_operands): Ditto.
86 (do_mov16): Reject invalid relocations.
87 (do_t_mov16): Ditto. Use Thumb reloc numbers.
88 (insns): Replace Iffff with HALF.
89 (md_apply_fix): Add MOVW and MOVT relocs.
90 (tc_gen_reloc): Ditto.
91 * doc/c-arm.texi: Document relocation operators
92
93 2006-05-11 Paul Brook <paul@codesourcery.com>
94
95 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
96
97 2006-05-11 Thiemo Seufer <ths@mips.com>
98
99 * config/tc-mips.c (append_insn): Don't check the range of j or
100 jal addresses.
101
102 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
103
104 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
105 relocs against external symbols for WinCE targets.
106 (md_apply_fix): Likewise.
107
108 2006-05-09 David Ung <davidu@mips.com>
109
110 * config/tc-mips.c (append_insn): Only warn about an out-of-range
111 j or jal address.
112
113 2006-05-09 Nick Clifton <nickc@redhat.com>
114
115 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
116 against symbols which are not going to be placed into the symbol
117 table.
118
119 2006-05-09 Ben Elliston <bje@au.ibm.com>
120
121 * expr.c (operand): Remove `if (0 && ..)' statement and
122 subsequently unused target_op label. Collapse `if (1 || ..)'
123 statement.
124 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
125 separately above the switch.
126
127 2006-05-08 Nick Clifton <nickc@redhat.com>
128
129 PR gas/2623
130 * config/tc-msp430.c (line_separator_character): Define as |.
131
132 2006-05-08 Thiemo Seufer <ths@mips.com>
133 Nigel Stephens <nigel@mips.com>
134 David Ung <davidu@mips.com>
135
136 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
137 (mips_opts): Likewise.
138 (file_ase_smartmips): New variable.
139 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
140 (macro_build): Handle SmartMIPS instructions.
141 (mips_ip): Likewise.
142 (md_longopts): Add argument handling for smartmips.
143 (md_parse_options, mips_after_parse_args): Likewise.
144 (s_mipsset): Add .set smartmips support.
145 (md_show_usage): Document -msmartmips/-mno-smartmips.
146 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
147 .set smartmips.
148 * doc/c-mips.texi: Likewise.
149
150 2006-05-08 Alan Modra <amodra@bigpond.net.au>
151
152 * write.c (relax_segment): Add pass count arg. Don't error on
153 negative org/space on first two passes.
154 (relax_seg_info): New struct.
155 (relax_seg, write_object_file): Adjust.
156 * write.h (relax_segment): Update prototype.
157
158 2006-05-05 Julian Brown <julian@codesourcery.com>
159
160 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
161 checking.
162 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
163 architecture version checks.
164 (insns): Allow overlapping instructions to be used in VFP mode.
165
166 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
167
168 PR gas/2598
169 * config/obj-elf.c (obj_elf_change_section): Allow user
170 specified SHF_ALPHA_GPREL.
171
172 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
173
174 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
175 for PMEM related expressions.
176
177 2006-05-05 Nick Clifton <nickc@redhat.com>
178
179 PR gas/2582
180 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
181 insertion of a directory separator character into a string at a
182 given offset. Uses heuristics to decide when to use a backslash
183 character rather than a forward-slash character.
184 (dwarf2_directive_loc): Use the macro.
185 (out_debug_info): Likewise.
186
187 2006-05-05 Thiemo Seufer <ths@mips.com>
188 David Ung <davidu@mips.com>
189
190 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
191 instruction.
192 (macro): Add new case M_CACHE_AB.
193
194 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
195
196 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
197 (opcode_lookup): Issue a warning for opcode with
198 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
199 identical to OT_cinfix3.
200 (TxC3w, TC3w, tC3w): New.
201 (insns): Use tC3w and TC3w for comparison instructions with
202 's' suffix.
203
204 2006-05-04 Alan Modra <amodra@bigpond.net.au>
205
206 * subsegs.h (struct frchain): Delete frch_seg.
207 (frchain_root): Delete.
208 (seg_info): Define as macro.
209 * subsegs.c (frchain_root): Delete.
210 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
211 (subsegs_begin, subseg_change): Adjust for above.
212 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
213 rather than to one big list.
214 (subseg_get): Don't special case abs, und sections.
215 (subseg_new, subseg_force_new): Don't set frchainP here.
216 (seg_info): Delete.
217 (subsegs_print_statistics): Adjust frag chain control list traversal.
218 * debug.c (dmp_frags): Likewise.
219 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
220 at frchain_root. Make use of known frchain ordering.
221 (last_frag_for_seg): Likewise.
222 (get_frag_fix): Likewise. Add seg param.
223 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
224 * write.c (chain_frchains_together_1): Adjust for struct frchain.
225 (SUB_SEGMENT_ALIGN): Likewise.
226 (subsegs_finish): Adjust frchain list traversal.
227 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
228 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
229 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
230 (xtensa_fix_b_j_loop_end_frags): Likewise.
231 (xtensa_fix_close_loop_end_frags): Likewise.
232 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
233 (retrieve_segment_info): Delete frch_seg initialisation.
234
235 2006-05-03 Alan Modra <amodra@bigpond.net.au>
236
237 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
238 * config/obj-elf.h (obj_sec_set_private_data): Delete.
239 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
240 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
241
242 2006-05-02 Joseph Myers <joseph@codesourcery.com>
243
244 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
245 here.
246 (md_apply_fix3): Multiply offset by 4 here for
247 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
248
249 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
250 Jan Beulich <jbeulich@novell.com>
251
252 * config/tc-i386.c (output_invalid_buf): Change size for
253 unsigned char.
254 * config/tc-tic30.c (output_invalid_buf): Likewise.
255
256 * config/tc-i386.c (output_invalid): Cast none-ascii char to
257 unsigned char.
258 * config/tc-tic30.c (output_invalid): Likewise.
259
260 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
261
262 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
263 (TEXI2POD): Use AM_MAKEINFOFLAGS.
264 (asconfig.texi): Don't set top_srcdir.
265 * doc/as.texinfo: Don't use top_srcdir.
266 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
267
268 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
269
270 * config/tc-i386.c (output_invalid_buf): Change size to 16.
271 * config/tc-tic30.c (output_invalid_buf): Likewise.
272
273 * config/tc-i386.c (output_invalid): Use snprintf instead of
274 sprintf.
275 * config/tc-ia64.c (declare_register_set): Likewise.
276 (emit_one_bundle): Likewise.
277 (check_dependencies): Likewise.
278 * config/tc-tic30.c (output_invalid): Likewise.
279
280 2006-05-02 Paul Brook <paul@codesourcery.com>
281
282 * config/tc-arm.c (arm_optimize_expr): New function.
283 * config/tc-arm.h (md_optimize_expr): Define
284 (arm_optimize_expr): Add prototype.
285 (TC_FORCE_RELOCATION_SUB_SAME): Define.
286
287 2006-05-02 Ben Elliston <bje@au.ibm.com>
288
289 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
290 field unsigned.
291
292 * sb.h (sb_list_vector): Move to sb.c.
293 * sb.c (free_list): Use type of sb_list_vector directly.
294 (sb_build): Fix off-by-one error in assertion about `size'.
295
296 2006-05-01 Ben Elliston <bje@au.ibm.com>
297
298 * listing.c (listing_listing): Remove useless loop.
299 * macro.c (macro_expand): Remove is_positional local variable.
300 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
301 and simplify surrounding expressions, where possible.
302 (assign_symbol): Likewise.
303 (s_weakref): Likewise.
304 * symbols.c (colon): Likewise.
305
306 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
307
308 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
309
310 2006-04-30 Thiemo Seufer <ths@mips.com>
311 David Ung <davidu@mips.com>
312
313 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
314 (mips_immed): New table that records various handling of udi
315 instruction patterns.
316 (mips_ip): Adds udi handling.
317
318 2006-04-28 Alan Modra <amodra@bigpond.net.au>
319
320 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
321 of list rather than beginning.
322
323 2006-04-26 Julian Brown <julian@codesourcery.com>
324
325 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
326 (is_quarter_float): Rename from above. Simplify slightly.
327 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
328 number.
329 (parse_neon_mov): Parse floating-point constants.
330 (neon_qfloat_bits): Fix encoding.
331 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
332 preference to integer encoding when using the F32 type.
333
334 2006-04-26 Julian Brown <julian@codesourcery.com>
335
336 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
337 zero-initialising structures containing it will lead to invalid types).
338 (arm_it): Add vectype to each operand.
339 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
340 defined field.
341 (neon_typed_alias): New structure. Extra information for typed
342 register aliases.
343 (reg_entry): Add neon type info field.
344 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
345 Break out alternative syntax for coprocessor registers, etc. into...
346 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
347 out from arm_reg_parse.
348 (parse_neon_type): Move. Return SUCCESS/FAIL.
349 (first_error): New function. Call to ensure first error which occurs is
350 reported.
351 (parse_neon_operand_type): Parse exactly one type.
352 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
353 (parse_typed_reg_or_scalar): New function. Handle core of both
354 arm_typed_reg_parse and parse_scalar.
355 (arm_typed_reg_parse): Parse a register with an optional type.
356 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
357 result.
358 (parse_scalar): Parse a Neon scalar with optional type.
359 (parse_reg_list): Use first_error.
360 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
361 (neon_alias_types_same): New function. Return true if two (alias) types
362 are the same.
363 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
364 of elements.
365 (insert_reg_alias): Return new reg_entry not void.
366 (insert_neon_reg_alias): New function. Insert type/index information as
367 well as register for alias.
368 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
369 make typed register aliases accordingly.
370 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
371 of line.
372 (s_unreq): Delete type information if present.
373 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
374 (s_arm_unwind_save_mmxwcg): Likewise.
375 (s_arm_unwind_movsp): Likewise.
376 (s_arm_unwind_setfp): Likewise.
377 (parse_shift): Likewise.
378 (parse_shifter_operand): Likewise.
379 (parse_address): Likewise.
380 (parse_tb): Likewise.
381 (tc_arm_regname_to_dw2regnum): Likewise.
382 (md_pseudo_table): Add dn, qn.
383 (parse_neon_mov): Handle typed operands.
384 (parse_operands): Likewise.
385 (neon_type_mask): Add N_SIZ.
386 (N_ALLMODS): New macro.
387 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
388 (el_type_of_type_chk): Add some safeguards.
389 (modify_types_allowed): Fix logic bug.
390 (neon_check_type): Handle operands with types.
391 (neon_three_same): Remove redundant optional arg handling.
392 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
393 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
394 (do_neon_step): Adjust accordingly.
395 (neon_cmode_for_logic_imm): Use first_error.
396 (do_neon_bitfield): Call neon_check_type.
397 (neon_dyadic): Rename to...
398 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
399 to allow modification of type of the destination.
400 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
401 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
402 (do_neon_compare): Make destination be an untyped bitfield.
403 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
404 (neon_mul_mac): Return early in case of errors.
405 (neon_move_immediate): Use first_error.
406 (neon_mac_reg_scalar_long): Fix type to include scalar.
407 (do_neon_dup): Likewise.
408 (do_neon_mov): Likewise (in several places).
409 (do_neon_tbl_tbx): Fix type.
410 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
411 (do_neon_ld_dup): Exit early in case of errors and/or use
412 first_error.
413 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
414 Handle .dn/.qn directives.
415 (REGDEF): Add zero for reg_entry neon field.
416
417 2006-04-26 Julian Brown <julian@codesourcery.com>
418
419 * config/tc-arm.c (limits.h): Include.
420 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
421 (fpu_vfp_v3_or_neon_ext): Declare constants.
422 (neon_el_type): New enumeration of types for Neon vector elements.
423 (neon_type_el): New struct. Define type and size of a vector element.
424 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
425 instruction.
426 (neon_type): Define struct. The type of an instruction.
427 (arm_it): Add 'vectype' for the current instruction.
428 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
429 (vfp_sp_reg_pos): Rename to...
430 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
431 tags.
432 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
433 (Neon D or Q register).
434 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
435 register.
436 (GE_OPT_PREFIX_BIG): Define constant, for use in...
437 (my_get_expression): Allow above constant as argument to accept
438 64-bit constants with optional prefix.
439 (arm_reg_parse): Add extra argument to return the specific type of
440 register in when either a D or Q register (REG_TYPE_NDQ) is
441 requested. Can be NULL.
442 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
443 (parse_reg_list): Update for new arm_reg_parse args.
444 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
445 (parse_neon_el_struct_list): New function. Parse element/structure
446 register lists for VLD<n>/VST<n> instructions.
447 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
448 (s_arm_unwind_save_mmxwr): Likewise.
449 (s_arm_unwind_save_mmxwcg): Likewise.
450 (s_arm_unwind_movsp): Likewise.
451 (s_arm_unwind_setfp): Likewise.
452 (parse_big_immediate): New function. Parse an immediate, which may be
453 64 bits wide. Put results in inst.operands[i].
454 (parse_shift): Update for new arm_reg_parse args.
455 (parse_address): Likewise. Add parsing of alignment specifiers.
456 (parse_neon_mov): Parse the operands of a VMOV instruction.
457 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
458 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
459 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
460 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
461 (parse_operands): Handle new codes above.
462 (encode_arm_vfp_sp_reg): Rename to...
463 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
464 selected VFP version only supports D0-D15.
465 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
466 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
467 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
468 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
469 encode_arm_vfp_reg name, and allow 32 D regs.
470 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
471 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
472 regs.
473 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
474 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
475 constant-load and conversion insns introduced with VFPv3.
476 (neon_tab_entry): New struct.
477 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
478 those which are the targets of pseudo-instructions.
479 (neon_opc): Enumerate opcodes, use as indices into...
480 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
481 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
482 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
483 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
484 neon_enc_tab.
485 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
486 Neon instructions.
487 (neon_type_mask): New. Compact type representation for type checking.
488 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
489 permitted type combinations.
490 (N_IGNORE_TYPE): New macro.
491 (neon_check_shape): New function. Check an instruction shape for
492 multiple alternatives. Return the specific shape for the current
493 instruction.
494 (neon_modify_type_size): New function. Modify a vector type and size,
495 depending on the bit mask in argument 1.
496 (neon_type_promote): New function. Convert a given "key" type (of an
497 operand) into the correct type for a different operand, based on a bit
498 mask.
499 (type_chk_of_el_type): New function. Convert a type and size into the
500 compact representation used for type checking.
501 (el_type_of_type_ckh): New function. Reverse of above (only when a
502 single bit is set in the bit mask).
503 (modify_types_allowed): New function. Alter a mask of allowed types
504 based on a bit mask of modifications.
505 (neon_check_type): New function. Check the type of the current
506 instruction against the variable argument list. The "key" type of the
507 instruction is returned.
508 (neon_dp_fixup): New function. Fill in and modify instruction bits for
509 a Neon data-processing instruction depending on whether we're in ARM
510 mode or Thumb-2 mode.
511 (neon_logbits): New function.
512 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
513 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
514 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
515 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
516 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
517 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
518 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
519 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
520 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
521 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
522 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
523 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
524 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
525 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
526 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
527 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
528 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
529 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
530 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
531 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
532 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
533 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
534 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
535 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
536 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
537 helpers.
538 (parse_neon_type): New function. Parse Neon type specifier.
539 (opcode_lookup): Allow parsing of Neon type specifiers.
540 (REGNUM2, REGSETH, REGSET2): New macros.
541 (reg_names): Add new VFPv3 and Neon registers.
542 (NUF, nUF, NCE, nCE): New macros for opcode table.
543 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
544 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
545 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
546 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
547 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
548 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
549 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
550 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
551 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
552 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
553 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
554 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
555 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
556 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
557 fto[us][lh][sd].
558 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
559 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
560 (arm_option_cpu_value): Add vfp3 and neon.
561 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
562 VFPv1 attribute.
563
564 2006-04-25 Bob Wilson <bob.wilson@acm.org>
565
566 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
567 syntax instead of hardcoded opcodes with ".w18" suffixes.
568 (wide_branch_opcode): New.
569 (build_transition): Use it to check for wide branch opcodes with
570 either ".w18" or ".w15" suffixes.
571
572 2006-04-25 Bob Wilson <bob.wilson@acm.org>
573
574 * config/tc-xtensa.c (xtensa_create_literal_symbol,
575 xg_assemble_literal, xg_assemble_literal_space): Do not set the
576 frag's is_literal flag.
577
578 2006-04-25 Bob Wilson <bob.wilson@acm.org>
579
580 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
581
582 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
583
584 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
585 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
586 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
587 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
588 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
589
590 2005-04-20 Paul Brook <paul@codesourcery.com>
591
592 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
593 all targets.
594 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
595
596 2006-04-19 Alan Modra <amodra@bigpond.net.au>
597
598 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
599 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
600 Make some cpus unsupported on ELF. Run "make dep-am".
601 * Makefile.in: Regenerate.
602
603 2006-04-19 Alan Modra <amodra@bigpond.net.au>
604
605 * configure.in (--enable-targets): Indent help message.
606 * configure: Regenerate.
607
608 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
609
610 PR gas/2533
611 * config/tc-i386.c (i386_immediate): Check illegal immediate
612 register operand.
613
614 2006-04-18 Alan Modra <amodra@bigpond.net.au>
615
616 * config/tc-i386.c: Formatting.
617 (output_disp, output_imm): ISO C90 params.
618
619 * frags.c (frag_offset_fixed_p): Constify args.
620 * frags.h (frag_offset_fixed_p): Ditto.
621
622 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
623 (COFF_MAGIC): Delete.
624
625 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
626
627 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
628
629 * po/POTFILES.in: Regenerated.
630
631 2006-04-16 Mark Mitchell <mark@codesourcery.com>
632
633 * doc/as.texinfo: Mention that some .type syntaxes are not
634 supported on all architectures.
635
636 2006-04-14 Sterling Augustine <sterling@tensilica.com>
637
638 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
639 instructions when such transformations have been disabled.
640
641 2006-04-10 Sterling Augustine <sterling@tensilica.com>
642
643 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
644 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
645 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
646 decoding the loop instructions. Remove current_offset variable.
647 (xtensa_fix_short_loop_frags): Likewise.
648 (min_bytes_to_other_loop_end): Remove current_offset argument.
649
650 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
651
652 * config/tc-z80.c (z80_optimize_expr): Removed.
653 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
654
655 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
656
657 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
658 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
659 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
660 atmega644, atmega329, atmega3290, atmega649, atmega6490,
661 atmega406, atmega640, atmega1280, atmega1281, at90can32,
662 at90can64, at90usb646, at90usb647, at90usb1286 and
663 at90usb1287.
664 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
665
666 2006-04-07 Paul Brook <paul@codesourcery.com>
667
668 * config/tc-arm.c (parse_operands): Set default error message.
669
670 2006-04-07 Paul Brook <paul@codesourcery.com>
671
672 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
673
674 2006-04-07 Paul Brook <paul@codesourcery.com>
675
676 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
677
678 2006-04-07 Paul Brook <paul@codesourcery.com>
679
680 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
681 (move_or_literal_pool): Handle Thumb-2 instructions.
682 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
683
684 2006-04-07 Alan Modra <amodra@bigpond.net.au>
685
686 PR 2512.
687 * config/tc-i386.c (match_template): Move 64-bit operand tests
688 inside loop.
689
690 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
691
692 * po/Make-in: Add install-html target.
693 * Makefile.am: Add install-html and install-html-recursive targets.
694 * Makefile.in: Regenerate.
695 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
696 * configure: Regenerate.
697 * doc/Makefile.am: Add install-html and install-html-am targets.
698 * doc/Makefile.in: Regenerate.
699
700 2006-04-06 Alan Modra <amodra@bigpond.net.au>
701
702 * frags.c (frag_offset_fixed_p): Reinitialise offset before
703 second scan.
704
705 2006-04-05 Richard Sandiford <richard@codesourcery.com>
706 Daniel Jacobowitz <dan@codesourcery.com>
707
708 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
709 (GOTT_BASE, GOTT_INDEX): New.
710 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
711 GOTT_INDEX when generating VxWorks PIC.
712 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
713 use the generic *-*-vxworks* stanza instead.
714
715 2006-04-04 Alan Modra <amodra@bigpond.net.au>
716
717 PR 997
718 * frags.c (frag_offset_fixed_p): New function.
719 * frags.h (frag_offset_fixed_p): Declare.
720 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
721 (resolve_expression): Likewise.
722
723 2006-04-03 Sterling Augustine <sterling@tensilica.com>
724
725 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
726 of the same length but different numbers of slots.
727
728 2006-03-30 Andreas Schwab <schwab@suse.de>
729
730 * configure.in: Fix help string for --enable-targets option.
731 * configure: Regenerate.
732
733 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
734
735 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
736 (m68k_ip): ... here. Use for all chips. Protect against buffer
737 overrun and avoid excessive copying.
738
739 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
740 m68020_control_regs, m68040_control_regs, m68060_control_regs,
741 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
742 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
743 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
744 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
745 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
746 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
747 mcf5282_ctrl, mcfv4e_ctrl): ... these.
748 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
749 (struct m68k_cpu): Change chip field to control_regs.
750 (current_chip): Remove.
751 (control_regs): New.
752 (m68k_archs, m68k_extensions): Adjust.
753 (m68k_cpus): Reorder to be in cpu number order. Adjust.
754 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
755 (find_cf_chip): Reimplement for new organization of cpu table.
756 (select_control_regs): Remove.
757 (mri_chip): Adjust.
758 (struct save_opts): Save control regs, not chip.
759 (s_save, s_restore): Adjust.
760 (m68k_lookup_cpu): Give deprecated warning when necessary.
761 (m68k_init_arch): Adjust.
762 (md_show_usage): Adjust for new cpu table organization.
763
764 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
765
766 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
767 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
768 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
769 "elf/bfin.h".
770 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
771 (any_gotrel): New rule.
772 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
773 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
774 "elf/bfin.h".
775 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
776 (bfin_pic_ptr): New function.
777 (md_pseudo_table): Add it for ".picptr".
778 (OPTION_FDPIC): New macro.
779 (md_longopts): Add -mfdpic.
780 (md_parse_option): Handle it.
781 (md_begin): Set BFD flags.
782 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
783 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
784 us for GOT relocs.
785 * Makefile.am (bfin-parse.o): Update dependencies.
786 (DEPTC_bfin_elf): Likewise.
787 * Makefile.in: Regenerate.
788
789 2006-03-25 Richard Sandiford <richard@codesourcery.com>
790
791 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
792 mcfemac instead of mcfmac.
793
794 2006-03-23 Michael Matz <matz@suse.de>
795
796 * config/tc-i386.c (type_names): Correct placement of 'static'.
797 (reloc): Map some more relocs to their 64 bit counterpart when
798 size is 8.
799 (output_insn): Work around breakage if DEBUG386 is defined.
800 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
801 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
802 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
803 different from i386.
804 (output_imm): Ditto.
805 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
806 Imm64.
807 (md_convert_frag): Jumps can now be larger than 2GB away, error
808 out in that case.
809 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
810 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
811
812 2006-03-22 Richard Sandiford <richard@codesourcery.com>
813 Daniel Jacobowitz <dan@codesourcery.com>
814 Phil Edwards <phil@codesourcery.com>
815 Zack Weinberg <zack@codesourcery.com>
816 Mark Mitchell <mark@codesourcery.com>
817 Nathan Sidwell <nathan@codesourcery.com>
818
819 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
820 (md_begin): Complain about -G being used for PIC. Don't change
821 the text, data and bss alignments on VxWorks.
822 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
823 generating VxWorks PIC.
824 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
825 (macro): Likewise, but do not treat la $25 specially for
826 VxWorks PIC, and do not handle jal.
827 (OPTION_MVXWORKS_PIC): New macro.
828 (md_longopts): Add -mvxworks-pic.
829 (md_parse_option): Don't complain about using PIC and -G together here.
830 Handle OPTION_MVXWORKS_PIC.
831 (md_estimate_size_before_relax): Always use the first relaxation
832 sequence on VxWorks.
833 * config/tc-mips.h (VXWORKS_PIC): New.
834
835 2006-03-21 Paul Brook <paul@codesourcery.com>
836
837 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
838
839 2006-03-21 Sterling Augustine <sterling@tensilica.com>
840
841 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
842 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
843 (get_loop_align_size): New.
844 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
845 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
846 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
847 (get_noop_aligned_address): Use get_loop_align_size.
848 (get_aligned_diff): Likewise.
849
850 2006-03-21 Paul Brook <paul@codesourcery.com>
851
852 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
853
854 2006-03-20 Paul Brook <paul@codesourcery.com>
855
856 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
857 (do_t_branch): Encode branches inside IT blocks as unconditional.
858 (do_t_cps): New function.
859 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
860 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
861 (opcode_lookup): Allow conditional suffixes on all instructions in
862 Thumb mode.
863 (md_assemble): Advance condexec state before checking for errors.
864 (insns): Use do_t_cps.
865
866 2006-03-20 Paul Brook <paul@codesourcery.com>
867
868 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
869 outputting the insn.
870
871 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
872
873 * config/tc-vax.c: Update copyright year.
874 * config/tc-vax.h: Likewise.
875
876 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
877
878 * config/tc-vax.c (md_chars_to_number): Used only locally, so
879 make it static.
880 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
881
882 2006-03-17 Paul Brook <paul@codesourcery.com>
883
884 * config/tc-arm.c (insns): Add ldm and stm.
885
886 2006-03-17 Ben Elliston <bje@au.ibm.com>
887
888 PR gas/2446
889 * doc/as.texinfo (Ident): Document this directive more thoroughly.
890
891 2006-03-16 Paul Brook <paul@codesourcery.com>
892
893 * config/tc-arm.c (insns): Add "svc".
894
895 2006-03-13 Bob Wilson <bob.wilson@acm.org>
896
897 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
898 flag and avoid double underscore prefixes.
899
900 2006-03-10 Paul Brook <paul@codesourcery.com>
901
902 * config/tc-arm.c (md_begin): Handle EABIv5.
903 (arm_eabis): Add EF_ARM_EABI_VER5.
904 * doc/c-arm.texi: Document -meabi=5.
905
906 2006-03-10 Ben Elliston <bje@au.ibm.com>
907
908 * app.c (do_scrub_chars): Simplify string handling.
909
910 2006-03-07 Richard Sandiford <richard@codesourcery.com>
911 Daniel Jacobowitz <dan@codesourcery.com>
912 Zack Weinberg <zack@codesourcery.com>
913 Nathan Sidwell <nathan@codesourcery.com>
914 Paul Brook <paul@codesourcery.com>
915 Ricardo Anguiano <anguiano@codesourcery.com>
916 Phil Edwards <phil@codesourcery.com>
917
918 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
919 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
920 R_ARM_ABS12 reloc.
921 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
922 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
923 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
924
925 2006-03-06 Bob Wilson <bob.wilson@acm.org>
926
927 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
928 even when using the text-section-literals option.
929
930 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
931
932 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
933 and cf.
934 (m68k_ip): <case 'J'> Check we have some control regs.
935 (md_parse_option): Allow raw arch switch.
936 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
937 whether 68881 or cfloat was meant by -mfloat.
938 (md_show_usage): Adjust extension display.
939 (m68k_elf_final_processing): Adjust.
940
941 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
942
943 * config/tc-avr.c (avr_mod_hash_value): New function.
944 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
945 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
946 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
947 instead of int avr_ldi_expression: use avr_mod_hash_value instead
948 of (int).
949 (tc_gen_reloc): Handle substractions of symbols, if possible do
950 fixups, abort otherwise.
951 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
952 tc_fix_adjustable): Define.
953
954 2006-03-02 James E Wilson <wilson@specifix.com>
955
956 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
957 change the template, then clear md.slot[curr].end_of_insn_group.
958
959 2006-02-28 Jan Beulich <jbeulich@novell.com>
960
961 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
962
963 2006-02-28 Jan Beulich <jbeulich@novell.com>
964
965 PR/1070
966 * macro.c (getstring): Don't treat parentheses special anymore.
967 (get_any_string): Don't consider '(' and ')' as quoting anymore.
968 Special-case '(', ')', '[', and ']' when dealing with non-quoting
969 characters.
970
971 2006-02-28 Mat <mat@csail.mit.edu>
972
973 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
974
975 2006-02-27 Jakub Jelinek <jakub@redhat.com>
976
977 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
978 field.
979 (CFI_signal_frame): Define.
980 (cfi_pseudo_table): Add .cfi_signal_frame.
981 (dot_cfi): Handle CFI_signal_frame.
982 (output_cie): Handle cie->signal_frame.
983 (select_cie_for_fde): Don't share CIE if signal_frame flag is
984 different. Copy signal_frame from FDE to newly created CIE.
985 * doc/as.texinfo: Document .cfi_signal_frame.
986
987 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
988
989 * doc/Makefile.am: Add html target.
990 * doc/Makefile.in: Regenerate.
991 * po/Make-in: Add html target.
992
993 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
994
995 * config/tc-i386.c (output_insn): Support Intel Merom New
996 Instructions.
997
998 * config/tc-i386.h (CpuMNI): New.
999 (CpuUnknownFlags): Add CpuMNI.
1000
1001 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1002
1003 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1004 (hpriv_reg_table): New table for hyperprivileged registers.
1005 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1006 register encoding.
1007
1008 2006-02-24 DJ Delorie <dj@redhat.com>
1009
1010 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1011 (tc_gen_reloc): Don't define.
1012 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1013 (OPTION_LINKRELAX): New.
1014 (md_longopts): Add it.
1015 (m32c_relax): New.
1016 (md_parse_options): Set it.
1017 (md_assemble): Emit relaxation relocs as needed.
1018 (md_convert_frag): Emit relaxation relocs as needed.
1019 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1020 (m32c_apply_fix): New.
1021 (tc_gen_reloc): New.
1022 (m32c_force_relocation): Force out jump relocs when relaxing.
1023 (m32c_fix_adjustable): Return false if relaxing.
1024
1025 2006-02-24 Paul Brook <paul@codesourcery.com>
1026
1027 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1028 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1029 (struct asm_barrier_opt): Define.
1030 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1031 (parse_psr): Accept V7M psr names.
1032 (parse_barrier): New function.
1033 (enum operand_parse_code): Add OP_oBARRIER.
1034 (parse_operands): Implement OP_oBARRIER.
1035 (do_barrier): New function.
1036 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1037 (do_t_cpsi): Add V7M restrictions.
1038 (do_t_mrs, do_t_msr): Validate V7M variants.
1039 (md_assemble): Check for NULL variants.
1040 (v7m_psrs, barrier_opt_names): New tables.
1041 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1042 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1043 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1044 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1045 (struct cpu_arch_ver_table): Define.
1046 (cpu_arch_ver): New.
1047 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1048 Tag_CPU_arch_profile.
1049 * doc/c-arm.texi: Document new cpu and arch options.
1050
1051 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1052
1053 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1054
1055 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1056
1057 * config/tc-ia64.c: Update copyright years.
1058
1059 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1060
1061 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1062 SDM 2.2.
1063
1064 2005-02-22 Paul Brook <paul@codesourcery.com>
1065
1066 * config/tc-arm.c (do_pld): Remove incorrect write to
1067 inst.instruction.
1068 (encode_thumb32_addr_mode): Use correct operand.
1069
1070 2006-02-21 Paul Brook <paul@codesourcery.com>
1071
1072 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1073
1074 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1075 Anil Paranjape <anilp1@kpitcummins.com>
1076 Shilin Shakti <shilins@kpitcummins.com>
1077
1078 * Makefile.am: Add xc16x related entry.
1079 * Makefile.in: Regenerate.
1080 * configure.in: Added xc16x related entry.
1081 * configure: Regenerate.
1082 * config/tc-xc16x.h: New file
1083 * config/tc-xc16x.c: New file
1084 * doc/c-xc16x.texi: New file for xc16x
1085 * doc/all.texi: Entry for xc16x
1086 * doc/Makefile.texi: Added c-xc16x.texi
1087 * NEWS: Announce the support for the new target.
1088
1089 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1090
1091 * configure.tgt: set emulation for mips-*-netbsd*
1092
1093 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1094
1095 * config.in: Rebuilt.
1096
1097 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1098
1099 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1100 from 1, not 0, in error messages.
1101 (md_assemble): Simplify special-case check for ENTRY instructions.
1102 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1103 operand in error message.
1104
1105 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1106
1107 * configure.tgt (arm-*-linux-gnueabi*): Change to
1108 arm-*-linux-*eabi*.
1109
1110 2006-02-10 Nick Clifton <nickc@redhat.com>
1111
1112 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1113 32-bit value is propagated into the upper bits of a 64-bit long.
1114
1115 * config/tc-arc.c (init_opcode_tables): Fix cast.
1116 (arc_extoper, md_operand): Likewise.
1117
1118 2006-02-09 David Heine <dlheine@tensilica.com>
1119
1120 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1121 each relaxation step.
1122
1123 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1124
1125 * configure.in (CHECK_DECLS): Add vsnprintf.
1126 * configure: Regenerate.
1127 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1128 include/declare here, but...
1129 * as.h: Move code detecting VARARGS idiom to the top.
1130 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1131 (vsnprintf): Declare if not already declared.
1132
1133 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1134
1135 * as.c (close_output_file): New.
1136 (main): Register close_output_file with xatexit before
1137 dump_statistics. Don't call output_file_close.
1138
1139 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1140
1141 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1142 mcf5329_control_regs): New.
1143 (not_current_architecture, selected_arch, selected_cpu): New.
1144 (m68k_archs, m68k_extensions): New.
1145 (archs): Renamed to ...
1146 (m68k_cpus): ... here. Adjust.
1147 (n_arches): Remove.
1148 (md_pseudo_table): Add arch and cpu directives.
1149 (find_cf_chip, m68k_ip): Adjust table scanning.
1150 (no_68851, no_68881): Remove.
1151 (md_assemble): Lazily initialize.
1152 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1153 (md_init_after_args): Move functionality to m68k_init_arch.
1154 (mri_chip): Adjust table scanning.
1155 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1156 options with saner parsing.
1157 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1158 m68k_init_arch): New.
1159 (s_m68k_cpu, s_m68k_arch): New.
1160 (md_show_usage): Adjust.
1161 (m68k_elf_final_processing): Set CF EF flags.
1162 * config/tc-m68k.h (m68k_init_after_args): Remove.
1163 (tc_init_after_args): Remove.
1164 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1165 (M68k-Directives): Document .arch and .cpu directives.
1166
1167 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1168
1169 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1170 synonyms for equ and defl.
1171 (z80_cons_fix_new): New function.
1172 (emit_byte): Disallow relative jumps to absolute locations.
1173 (emit_data): Only handle defb, prototype changed, because defb is
1174 now handled as pseudo-op rather than an instruction.
1175 (instab): Entries for defb,defw,db,dw moved from here...
1176 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1177 Add entries for def24,def32,d24,d32.
1178 (md_assemble): Improved error handling.
1179 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1180 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1181 (z80_cons_fix_new): Declare.
1182 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1183 (def24,d24,def32,d32): New pseudo-ops.
1184
1185 2006-02-02 Paul Brook <paul@codesourcery.com>
1186
1187 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1188
1189 2005-02-02 Paul Brook <paul@codesourcery.com>
1190
1191 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1192 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1193 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1194 T2_OPCODE_RSB): Define.
1195 (thumb32_negate_data_op): New function.
1196 (md_apply_fix): Use it.
1197
1198 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1199
1200 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1201 fields.
1202 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1203 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1204 subtracted symbols.
1205 (relaxation_requirements): Add pfinish_frag argument and use it to
1206 replace setting tinsn->record_fix fields.
1207 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1208 and vinsn_to_insnbuf. Remove references to record_fix and
1209 slot_sub_symbols fields.
1210 (xtensa_mark_narrow_branches): Delete unused code.
1211 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1212 a symbol.
1213 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1214 record_fix fields.
1215 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1216 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1217 of the record_fix field. Simplify error messages for unexpected
1218 symbolic operands.
1219 (set_expr_symbol_offset_diff): Delete.
1220
1221 2006-01-31 Paul Brook <paul@codesourcery.com>
1222
1223 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1224
1225 2006-01-31 Paul Brook <paul@codesourcery.com>
1226 Richard Earnshaw <rearnsha@arm.com>
1227
1228 * config/tc-arm.c: Use arm_feature_set.
1229 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1230 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1231 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1232 New variables.
1233 (insns): Use them.
1234 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1235 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1236 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1237 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1238 feature flags.
1239 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1240 (arm_opts): Move old cpu/arch options from here...
1241 (arm_legacy_opts): ... to here.
1242 (md_parse_option): Search arm_legacy_opts.
1243 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1244 (arm_float_abis, arm_eabis): Make const.
1245
1246 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1247
1248 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1249
1250 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1251
1252 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1253 in load immediate intruction.
1254
1255 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1256
1257 * config/bfin-parse.y (value_match): Use correct conversion
1258 specifications in template string for __FILE__ and __LINE__.
1259 (binary): Ditto.
1260 (unary): Ditto.
1261
1262 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1263
1264 Introduce TLS descriptors for i386 and x86_64.
1265 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1266 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1267 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1268 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1269 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1270 displacement bits.
1271 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1272 (lex_got): Handle @tlsdesc and @tlscall.
1273 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1274
1275 2006-01-11 Nick Clifton <nickc@redhat.com>
1276
1277 Fixes for building on 64-bit hosts:
1278 * config/tc-avr.c (mod_index): New union to allow conversion
1279 between pointers and integers.
1280 (md_begin, avr_ldi_expression): Use it.
1281 * config/tc-i370.c (md_assemble): Add cast for argument to print
1282 statement.
1283 * config/tc-tic54x.c (subsym_substitute): Likewise.
1284 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1285 opindex field of fr_cgen structure into a pointer so that it can
1286 be stored in a frag.
1287 * config/tc-mn10300.c (md_assemble): Likewise.
1288 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1289 types.
1290 * config/tc-v850.c: Replace uses of (int) casts with correct
1291 types.
1292
1293 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1294
1295 PR gas/2117
1296 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1297
1298 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1299
1300 PR gas/2101
1301 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1302 a local-label reference.
1303
1304 For older changes see ChangeLog-2005
1305 \f
1306 Local Variables:
1307 mode: change-log
1308 left-margin: 8
1309 fill-column: 74
1310 version-control: never
1311 End: