gas/ChangeLog

   1 2006-05-09  Ben Elliston  <bje@au.ibm.com>
   2
   3         * expr.c (operand): Remove `if (0 && ..)' statement and
   4         subsequently unused target_op label.  Collapse `if (1 || ..)'
   5         statement.
   6         * app.c (do_scrub_chars): Remove unused case 0, as it is handled
   7         separately above the switch.
   8
   9 2006-05-08  Nick Clifton  <nickc@redhat.com>
  10
  11         PR gas/2623
  12         * config/tc-msp430.c (line_separator_character): Define as |.
  13
  14 2006-05-08  Thiemo Seufer  <ths@mips.com>
  15             Nigel Stephens  <nigel@mips.com>
  16             David Ung  <davidu@mips.com>
  17
  18         * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
  19         (mips_opts): Likewise.
  20         (file_ase_smartmips): New variable.
  21         (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
  22         (macro_build): Handle SmartMIPS instructions.
  23         (mips_ip): Likewise.
  24         (md_longopts): Add argument handling for smartmips.
  25         (md_parse_options, mips_after_parse_args): Likewise.
  26         (s_mipsset): Add .set smartmips support.
  27         (md_show_usage): Document -msmartmips/-mno-smartmips.
  28         * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
  29         .set smartmips.
  30         * doc/c-mips.texi: Likewise.
  31
  32 2006-05-08  Alan Modra  <amodra@bigpond.net.au>
  33
  34         * write.c (relax_segment): Add pass count arg.  Don't error on
  35         negative org/space on first two passes.
  36         (relax_seg_info): New struct.
  37         (relax_seg, write_object_file): Adjust.
  38         * write.h (relax_segment): Update prototype.
  39
  40 2006-05-05  Julian Brown  <julian@codesourcery.com>
  41
  42         * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
  43         checking.
  44         (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
  45         architecture version checks.
  46         (insns): Allow overlapping instructions to be used in VFP mode.
  47
  48 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
  49
  50         PR gas/2598
  51         * config/obj-elf.c (obj_elf_change_section): Allow user
  52         specified SHF_ALPHA_GPREL.
  53
  54 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
  55
  56         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
  57         for PMEM related expressions.
  58
  59 2006-05-05  Nick Clifton  <nickc@redhat.com>
  60
  61         PR gas/2582
  62         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
  63         insertion of a directory separator character into a string at a
  64         given offset.  Uses heuristics to decide when to use a backslash
  65         character rather than a forward-slash character.
  66         (dwarf2_directive_loc): Use the macro.
  67         (out_debug_info): Likewise.
  68
  69 2006-05-05  Thiemo Seufer  <ths@mips.com>
  70             David Ung  <davidu@mips.com>
  71
  72         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
  73         instruction.
  74         (macro): Add new case M_CACHE_AB.
  75
  76 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
  77
  78         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
  79         (opcode_lookup): Issue a warning for opcode with
  80         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
  81         identical to OT_cinfix3.
  82         (TxC3w, TC3w, tC3w): New.
  83         (insns): Use tC3w and TC3w for comparison instructions with
  84         's' suffix.
  85
  86 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
  87
  88         * subsegs.h (struct frchain): Delete frch_seg.
  89         (frchain_root): Delete.
  90         (seg_info): Define as macro.
  91         * subsegs.c (frchain_root): Delete.
  92         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
  93         (subsegs_begin, subseg_change): Adjust for above.
  94         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
  95         rather than to one big list.
  96         (subseg_get): Don't special case abs, und sections.
  97         (subseg_new, subseg_force_new): Don't set frchainP here.
  98         (seg_info): Delete.
  99         (subsegs_print_statistics): Adjust frag chain control list traversal.
 100         * debug.c (dmp_frags):  Likewise.
 101         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
 102         at frchain_root.  Make use of known frchain ordering.
 103         (last_frag_for_seg): Likewise.
 104         (get_frag_fix): Likewise.  Add seg param.
 105         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
 106         * write.c (chain_frchains_together_1): Adjust for struct frchain.
 107         (SUB_SEGMENT_ALIGN): Likewise.
 108         (subsegs_finish): Adjust frchain list traversal.
 109         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
 110         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
 111         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
 112         (xtensa_fix_b_j_loop_end_frags): Likewise.
 113         (xtensa_fix_close_loop_end_frags): Likewise.
 114         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
 115         (retrieve_segment_info): Delete frch_seg initialisation.
 116
 117 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
 118
 119         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
 120         * config/obj-elf.h (obj_sec_set_private_data): Delete.
 121         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
 122         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
 123
 124 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
 125
 126         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
 127         here.
 128         (md_apply_fix3): Multiply offset by 4 here for
 129         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
 130
 131 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 132             Jan Beulich  <jbeulich@novell.com>
 133
 134         * config/tc-i386.c (output_invalid_buf): Change size for
 135         unsigned char.
 136         * config/tc-tic30.c (output_invalid_buf): Likewise.
 137
 138         * config/tc-i386.c (output_invalid): Cast none-ascii char to
 139         unsigned char.
 140         * config/tc-tic30.c (output_invalid): Likewise.
 141
 142 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
 143
 144         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
 145         (TEXI2POD): Use AM_MAKEINFOFLAGS.
 146         (asconfig.texi): Don't set top_srcdir.
 147         * doc/as.texinfo: Don't use top_srcdir.
 148         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 149
 150 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 151
 152         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 153         * config/tc-tic30.c (output_invalid_buf): Likewise.
 154
 155         * config/tc-i386.c (output_invalid): Use snprintf instead of
 156         sprintf.
 157         * config/tc-ia64.c (declare_register_set): Likewise.
 158         (emit_one_bundle): Likewise.
 159         (check_dependencies): Likewise.
 160         * config/tc-tic30.c (output_invalid): Likewise.
 161
 162 2006-05-02  Paul Brook  <paul@codesourcery.com>
 163
 164         * config/tc-arm.c (arm_optimize_expr): New function.
 165         * config/tc-arm.h (md_optimize_expr): Define
 166         (arm_optimize_expr): Add prototype.
 167         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 168
 169 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 170
 171         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 172         field unsigned.
 173
 174         * sb.h (sb_list_vector): Move to sb.c.
 175         * sb.c (free_list): Use type of sb_list_vector directly.
 176         (sb_build): Fix off-by-one error in assertion about `size'.
 177
 178 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 179
 180         * listing.c (listing_listing): Remove useless loop.
 181         * macro.c (macro_expand): Remove is_positional local variable.
 182         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 183         and simplify surrounding expressions, where possible.
 184         (assign_symbol): Likewise.
 185         (s_weakref): Likewise.
 186         * symbols.c (colon): Likewise.
 187
 188 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 189
 190         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 191
 192 2006-04-30  Thiemo Seufer  <ths@mips.com>
 193             David Ung  <davidu@mips.com>
 194
 195         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 196         (mips_immed): New table that records various handling of udi
 197         instruction patterns.
 198         (mips_ip): Adds udi handling.
 199
 200 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 201
 202         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 203         of list rather than beginning.
 204
 205 2006-04-26  Julian Brown  <julian@codesourcery.com>
 206
 207         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 208         (is_quarter_float): Rename from above. Simplify slightly.
 209         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 210         number.
 211         (parse_neon_mov): Parse floating-point constants.
 212         (neon_qfloat_bits): Fix encoding.
 213         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 214         preference to integer encoding when using the F32 type.
 215
 216 2006-04-26  Julian Brown  <julian@codesourcery.com>
 217
 218         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 219         zero-initialising structures containing it will lead to invalid types).
 220         (arm_it): Add vectype to each operand.
 221         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 222         defined field.
 223         (neon_typed_alias): New structure. Extra information for typed
 224         register aliases.
 225         (reg_entry): Add neon type info field.
 226         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 227         Break out alternative syntax for coprocessor registers, etc. into...
 228         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 229         out from arm_reg_parse.
 230         (parse_neon_type): Move. Return SUCCESS/FAIL.
 231         (first_error): New function. Call to ensure first error which occurs is
 232         reported.
 233         (parse_neon_operand_type): Parse exactly one type.
 234         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 235         (parse_typed_reg_or_scalar): New function. Handle core of both
 236         arm_typed_reg_parse and parse_scalar.
 237         (arm_typed_reg_parse): Parse a register with an optional type.
 238         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 239         result.
 240         (parse_scalar): Parse a Neon scalar with optional type.
 241         (parse_reg_list): Use first_error.
 242         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 243         (neon_alias_types_same): New function. Return true if two (alias) types
 244         are the same.
 245         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 246         of elements.
 247         (insert_reg_alias): Return new reg_entry not void.
 248         (insert_neon_reg_alias): New function. Insert type/index information as
 249         well as register for alias.
 250         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 251         make typed register aliases accordingly.
 252         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 253         of line.
 254         (s_unreq): Delete type information if present.
 255         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 256         (s_arm_unwind_save_mmxwcg): Likewise.
 257         (s_arm_unwind_movsp): Likewise.
 258         (s_arm_unwind_setfp): Likewise.
 259         (parse_shift): Likewise.
 260         (parse_shifter_operand): Likewise.
 261         (parse_address): Likewise.
 262         (parse_tb): Likewise.
 263         (tc_arm_regname_to_dw2regnum): Likewise.
 264         (md_pseudo_table): Add dn, qn.
 265         (parse_neon_mov): Handle typed operands.
 266         (parse_operands): Likewise.
 267         (neon_type_mask): Add N_SIZ.
 268         (N_ALLMODS): New macro.
 269         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 270         (el_type_of_type_chk): Add some safeguards.
 271         (modify_types_allowed): Fix logic bug.
 272         (neon_check_type): Handle operands with types.
 273         (neon_three_same): Remove redundant optional arg handling.
 274         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 275         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 276         (do_neon_step): Adjust accordingly.
 277         (neon_cmode_for_logic_imm): Use first_error.
 278         (do_neon_bitfield): Call neon_check_type.
 279         (neon_dyadic): Rename to...
 280         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 281         to allow modification of type of the destination.
 282         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 283         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 284         (do_neon_compare): Make destination be an untyped bitfield.
 285         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 286         (neon_mul_mac): Return early in case of errors.
 287         (neon_move_immediate): Use first_error.
 288         (neon_mac_reg_scalar_long): Fix type to include scalar.
 289         (do_neon_dup): Likewise.
 290         (do_neon_mov): Likewise (in several places).
 291         (do_neon_tbl_tbx): Fix type.
 292         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 293         (do_neon_ld_dup): Exit early in case of errors and/or use
 294         first_error.
 295         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 296         Handle .dn/.qn directives.
 297         (REGDEF): Add zero for reg_entry neon field.
 298
 299 2006-04-26  Julian Brown  <julian@codesourcery.com>
 300
 301         * config/tc-arm.c (limits.h): Include.
 302         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 303         (fpu_vfp_v3_or_neon_ext): Declare constants.
 304         (neon_el_type): New enumeration of types for Neon vector elements.
 305         (neon_type_el): New struct. Define type and size of a vector element.
 306         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 307         instruction.
 308         (neon_type): Define struct. The type of an instruction.
 309         (arm_it): Add 'vectype' for the current instruction.
 310         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 311         (vfp_sp_reg_pos): Rename to...
 312         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 313         tags.
 314         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 315         (Neon D or Q register).
 316         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 317         register.
 318         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 319         (my_get_expression): Allow above constant as argument to accept
 320         64-bit constants with optional prefix.
 321         (arm_reg_parse): Add extra argument to return the specific type of
 322         register in when either a D or Q register (REG_TYPE_NDQ) is
 323         requested. Can be NULL.
 324         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 325         (parse_reg_list): Update for new arm_reg_parse args.
 326         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 327         (parse_neon_el_struct_list): New function. Parse element/structure
 328         register lists for VLD<n>/VST<n> instructions.
 329         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 330         (s_arm_unwind_save_mmxwr): Likewise.
 331         (s_arm_unwind_save_mmxwcg): Likewise.
 332         (s_arm_unwind_movsp): Likewise.
 333         (s_arm_unwind_setfp): Likewise.
 334         (parse_big_immediate): New function. Parse an immediate, which may be
 335         64 bits wide. Put results in inst.operands[i].
 336         (parse_shift): Update for new arm_reg_parse args.
 337         (parse_address): Likewise. Add parsing of alignment specifiers.
 338         (parse_neon_mov): Parse the operands of a VMOV instruction.
 339         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 340         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 341         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 342         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 343         (parse_operands): Handle new codes above.
 344         (encode_arm_vfp_sp_reg): Rename to...
 345         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 346         selected VFP version only supports D0-D15.
 347         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 348         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 349         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 350         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 351         encode_arm_vfp_reg name, and allow 32 D regs.
 352         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 353         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 354         regs.
 355         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 356         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 357         constant-load and conversion insns introduced with VFPv3.
 358         (neon_tab_entry): New struct.
 359         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 360         those which are the targets of pseudo-instructions.
 361         (neon_opc): Enumerate opcodes, use as indices into...
 362         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 363         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 364         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 365         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 366         neon_enc_tab.
 367         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 368         Neon instructions.
 369         (neon_type_mask): New. Compact type representation for type checking.
 370         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 371         permitted type combinations.
 372         (N_IGNORE_TYPE): New macro.
 373         (neon_check_shape): New function. Check an instruction shape for
 374         multiple alternatives. Return the specific shape for the current
 375         instruction.
 376         (neon_modify_type_size): New function. Modify a vector type and size,
 377         depending on the bit mask in argument 1.
 378         (neon_type_promote): New function. Convert a given "key" type (of an
 379         operand) into the correct type for a different operand, based on a bit
 380         mask.
 381         (type_chk_of_el_type): New function. Convert a type and size into the
 382         compact representation used for type checking.
 383         (el_type_of_type_ckh): New function. Reverse of above (only when a
 384         single bit is set in the bit mask).
 385         (modify_types_allowed): New function. Alter a mask of allowed types
 386         based on a bit mask of modifications.
 387         (neon_check_type): New function. Check the type of the current
 388         instruction against the variable argument list. The "key" type of the
 389         instruction is returned.
 390         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 391         a Neon data-processing instruction depending on whether we're in ARM
 392         mode or Thumb-2 mode.
 393         (neon_logbits): New function.
 394         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 395         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 396         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 397         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 398         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 399         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 400         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 401         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 402         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 403         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 404         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 405         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 406         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 407         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 408         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 409         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 410         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 411         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 412         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 413         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 414         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 415         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 416         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 417         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 418         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 419         helpers.
 420         (parse_neon_type): New function. Parse Neon type specifier.
 421         (opcode_lookup): Allow parsing of Neon type specifiers.
 422         (REGNUM2, REGSETH, REGSET2): New macros.
 423         (reg_names): Add new VFPv3 and Neon registers.
 424         (NUF, nUF, NCE, nCE): New macros for opcode table.
 425         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 426         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 427         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 428         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 429         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 430         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 431         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 432         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 433         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 434         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 435         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 436         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 437         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 438         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 439         fto[us][lh][sd].
 440         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 441         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 442         (arm_option_cpu_value): Add vfp3 and neon.
 443         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 444         VFPv1 attribute.
 445
 446 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 447
 448         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 449         syntax instead of hardcoded opcodes with ".w18" suffixes.
 450         (wide_branch_opcode): New.
 451         (build_transition): Use it to check for wide branch opcodes with
 452         either ".w18" or ".w15" suffixes.
 453
 454 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 455
 456         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 457         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 458         frag's is_literal flag.
 459
 460 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 461
 462         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 463
 464 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 465
 466         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 467         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 468         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 469         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 470         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 471
 472 2005-04-20  Paul Brook  <paul@codesourcery.com>
 473
 474         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 475         all targets.
 476         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 477
 478 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 479
 480         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 481         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 482         Make some cpus unsupported on ELF.  Run "make dep-am".
 483         * Makefile.in: Regenerate.
 484
 485 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 486
 487         * configure.in (--enable-targets): Indent help message.
 488         * configure: Regenerate.
 489
 490 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 491
 492         PR gas/2533
 493         * config/tc-i386.c (i386_immediate): Check illegal immediate
 494         register operand.
 495
 496 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 497
 498         * config/tc-i386.c: Formatting.
 499         (output_disp, output_imm): ISO C90 params.
 500
 501         * frags.c (frag_offset_fixed_p): Constify args.
 502         * frags.h (frag_offset_fixed_p): Ditto.
 503
 504         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 505         (COFF_MAGIC): Delete.
 506
 507         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 508
 509 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 510
 511         * po/POTFILES.in: Regenerated.
 512
 513 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 514
 515         * doc/as.texinfo: Mention that some .type syntaxes are not
 516         supported on all architectures.
 517
 518 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 519
 520         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 521         instructions when such transformations have been disabled.
 522
 523 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 524
 525         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 526         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 527         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 528         decoding the loop instructions.  Remove current_offset variable.
 529         (xtensa_fix_short_loop_frags): Likewise.
 530         (min_bytes_to_other_loop_end): Remove current_offset argument.
 531
 532 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 533
 534         * config/tc-z80.c (z80_optimize_expr): Removed.
 535         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 536
 537 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 538
 539         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 540         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 541         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 542         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 543         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 544         at90can64, at90usb646, at90usb647, at90usb1286 and
 545         at90usb1287.
 546         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 547
 548 2006-04-07  Paul Brook  <paul@codesourcery.com>
 549
 550         * config/tc-arm.c (parse_operands): Set default error message.
 551
 552 2006-04-07  Paul Brook  <paul@codesourcery.com>
 553
 554         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 555
 556 2006-04-07  Paul Brook  <paul@codesourcery.com>
 557
 558         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 559
 560 2006-04-07  Paul Brook  <paul@codesourcery.com>
 561
 562         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 563         (move_or_literal_pool): Handle Thumb-2 instructions.
 564         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 565
 566 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 567
 568         PR 2512.
 569         * config/tc-i386.c (match_template): Move 64-bit operand tests
 570         inside loop.
 571
 572 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 573
 574         * po/Make-in: Add install-html target.
 575         * Makefile.am: Add install-html and install-html-recursive targets.
 576         * Makefile.in: Regenerate.
 577         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 578         * configure: Regenerate.
 579         * doc/Makefile.am: Add install-html and install-html-am targets.
 580         * doc/Makefile.in: Regenerate.
 581
 582 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 583
 584         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 585         second scan.
 586
 587 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 588             Daniel Jacobowitz  <dan@codesourcery.com>
 589
 590         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 591         (GOTT_BASE, GOTT_INDEX): New.
 592         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 593         GOTT_INDEX when generating VxWorks PIC.
 594         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 595         use the generic *-*-vxworks* stanza instead.
 596
 597 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 598
 599         PR 997
 600         * frags.c (frag_offset_fixed_p): New function.
 601         * frags.h (frag_offset_fixed_p): Declare.
 602         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 603         (resolve_expression): Likewise.
 604
 605 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 606
 607         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 608         of the same length but different numbers of slots.
 609
 610 2006-03-30  Andreas Schwab  <schwab@suse.de>
 611
 612         * configure.in: Fix help string for --enable-targets option.
 613         * configure: Regenerate.
 614
 615 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 616
 617         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 618         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 619         overrun and avoid excessive copying.
 620
 621         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 622         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 623         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 624         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 625         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 626         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 627         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 628         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 629         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 630         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 631         (struct m68k_cpu): Change chip field to control_regs.
 632         (current_chip): Remove.
 633         (control_regs): New.
 634         (m68k_archs, m68k_extensions): Adjust.
 635         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 636         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 637         (find_cf_chip): Reimplement for new organization of cpu table.
 638         (select_control_regs): Remove.
 639         (mri_chip): Adjust.
 640         (struct save_opts): Save control regs, not chip.
 641         (s_save, s_restore): Adjust.
 642         (m68k_lookup_cpu): Give deprecated warning when necessary.
 643         (m68k_init_arch): Adjust.
 644         (md_show_usage): Adjust for new cpu table organization.
 645
 646 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 647
 648         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 649         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 650         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 651         "elf/bfin.h".
 652         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 653         (any_gotrel): New rule.
 654         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 655         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 656         "elf/bfin.h".
 657         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 658         (bfin_pic_ptr): New function.
 659         (md_pseudo_table): Add it for ".picptr".
 660         (OPTION_FDPIC): New macro.
 661         (md_longopts): Add -mfdpic.
 662         (md_parse_option): Handle it.
 663         (md_begin): Set BFD flags.
 664         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 665         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 666         us for GOT relocs.
 667         * Makefile.am (bfin-parse.o): Update dependencies.
 668         (DEPTC_bfin_elf): Likewise.
 669         * Makefile.in: Regenerate.
 670
 671 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 672
 673         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 674         mcfemac instead of mcfmac.
 675
 676 2006-03-23  Michael Matz  <matz@suse.de>
 677
 678         * config/tc-i386.c (type_names): Correct placement of 'static'.
 679         (reloc): Map some more relocs to their 64 bit counterpart when
 680         size is 8.
 681         (output_insn): Work around breakage if DEBUG386 is defined.
 682         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 683         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 684         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 685         different from i386.
 686         (output_imm): Ditto.
 687         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 688         Imm64.
 689         (md_convert_frag): Jumps can now be larger than 2GB away, error
 690         out in that case.
 691         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 692         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 693
 694 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 695             Daniel Jacobowitz  <dan@codesourcery.com>
 696             Phil Edwards  <phil@codesourcery.com>
 697             Zack Weinberg  <zack@codesourcery.com>
 698             Mark Mitchell  <mark@codesourcery.com>
 699             Nathan Sidwell  <nathan@codesourcery.com>
 700
 701         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 702         (md_begin): Complain about -G being used for PIC.  Don't change
 703         the text, data and bss alignments on VxWorks.
 704         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 705         generating VxWorks PIC.
 706         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 707         (macro): Likewise, but do not treat la $25 specially for
 708         VxWorks PIC, and do not handle jal.
 709         (OPTION_MVXWORKS_PIC): New macro.
 710         (md_longopts): Add -mvxworks-pic.
 711         (md_parse_option): Don't complain about using PIC and -G together here.
 712         Handle OPTION_MVXWORKS_PIC.
 713         (md_estimate_size_before_relax): Always use the first relaxation
 714         sequence on VxWorks.
 715         * config/tc-mips.h (VXWORKS_PIC): New.
 716
 717 2006-03-21  Paul Brook  <paul@codesourcery.com>
 718
 719         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 720
 721 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 722
 723         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 724         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 725         (get_loop_align_size): New.
 726         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 727         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 728         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 729         (get_noop_aligned_address): Use get_loop_align_size.
 730         (get_aligned_diff): Likewise.
 731
 732 2006-03-21  Paul Brook  <paul@codesourcery.com>
 733
 734         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 735
 736 2006-03-20  Paul Brook  <paul@codesourcery.com>
 737
 738         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 739         (do_t_branch): Encode branches inside IT blocks as unconditional.
 740         (do_t_cps): New function.
 741         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 742         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 743         (opcode_lookup): Allow conditional suffixes on all instructions in
 744         Thumb mode.
 745         (md_assemble): Advance condexec state before checking for errors.
 746         (insns): Use do_t_cps.
 747
 748 2006-03-20  Paul Brook  <paul@codesourcery.com>
 749
 750         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 751         outputting the insn.
 752
 753 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 754
 755         * config/tc-vax.c: Update copyright year.
 756         * config/tc-vax.h: Likewise.
 757
 758 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 759
 760         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 761         make it static.
 762         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 763
 764 2006-03-17  Paul Brook  <paul@codesourcery.com>
 765
 766         * config/tc-arm.c (insns): Add ldm and stm.
 767
 768 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 769
 770         PR gas/2446
 771         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 772
 773 2006-03-16  Paul Brook  <paul@codesourcery.com>
 774
 775         * config/tc-arm.c (insns): Add "svc".
 776
 777 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 778
 779         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 780         flag and avoid double underscore prefixes.
 781
 782 2006-03-10  Paul Brook  <paul@codesourcery.com>
 783
 784         * config/tc-arm.c (md_begin): Handle EABIv5.
 785         (arm_eabis): Add EF_ARM_EABI_VER5.
 786         * doc/c-arm.texi: Document -meabi=5.
 787
 788 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 789
 790         * app.c (do_scrub_chars): Simplify string handling.
 791
 792 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 793             Daniel Jacobowitz  <dan@codesourcery.com>
 794             Zack Weinberg  <zack@codesourcery.com>
 795             Nathan Sidwell  <nathan@codesourcery.com>
 796             Paul Brook  <paul@codesourcery.com>
 797             Ricardo Anguiano  <anguiano@codesourcery.com>
 798             Phil Edwards  <phil@codesourcery.com>
 799
 800         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 801         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 802         R_ARM_ABS12 reloc.
 803         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 804         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 805         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 806
 807 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 808
 809         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 810         even when using the text-section-literals option.
 811
 812 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 813
 814         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 815         and cf.
 816         (m68k_ip): <case 'J'> Check we have some control regs.
 817         (md_parse_option): Allow raw arch switch.
 818         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 819         whether 68881 or cfloat was meant by -mfloat.
 820         (md_show_usage): Adjust extension display.
 821         (m68k_elf_final_processing): Adjust.
 822
 823 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 824
 825         * config/tc-avr.c (avr_mod_hash_value): New function.
 826         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 827         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 828         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 829         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 830         of (int).
 831         (tc_gen_reloc): Handle substractions of symbols, if possible do
 832         fixups, abort otherwise.
 833         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 834         tc_fix_adjustable): Define.
 835
 836 2006-03-02  James E Wilson  <wilson@specifix.com>
 837
 838         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 839         change the template, then clear md.slot[curr].end_of_insn_group.
 840
 841 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 842
 843         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 844
 845 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 846
 847         PR/1070
 848         * macro.c (getstring): Don't treat parentheses special anymore.
 849         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 850         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 851         characters.
 852
 853 2006-02-28  Mat <mat@csail.mit.edu>
 854
 855         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 856
 857 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 858
 859         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 860         field.
 861         (CFI_signal_frame): Define.
 862         (cfi_pseudo_table): Add .cfi_signal_frame.
 863         (dot_cfi): Handle CFI_signal_frame.
 864         (output_cie): Handle cie->signal_frame.
 865         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 866         different.  Copy signal_frame from FDE to newly created CIE.
 867         * doc/as.texinfo: Document .cfi_signal_frame.
 868
 869 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 870
 871         * doc/Makefile.am: Add html target.
 872         * doc/Makefile.in: Regenerate.
 873         * po/Make-in: Add html target.
 874
 875 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 876
 877         * config/tc-i386.c (output_insn): Support Intel Merom New
 878         Instructions.
 879
 880         * config/tc-i386.h (CpuMNI): New.
 881         (CpuUnknownFlags): Add CpuMNI.
 882
 883 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 884
 885         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 886         (hpriv_reg_table): New table for hyperprivileged registers.
 887         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 888         register encoding.
 889
 890 2006-02-24  DJ Delorie  <dj@redhat.com>
 891
 892         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 893         (tc_gen_reloc): Don't define.
 894         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 895         (OPTION_LINKRELAX): New.
 896         (md_longopts): Add it.
 897         (m32c_relax): New.
 898         (md_parse_options): Set it.
 899         (md_assemble): Emit relaxation relocs as needed.
 900         (md_convert_frag): Emit relaxation relocs as needed.
 901         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 902         (m32c_apply_fix): New.
 903         (tc_gen_reloc): New.
 904         (m32c_force_relocation): Force out jump relocs when relaxing.
 905         (m32c_fix_adjustable): Return false if relaxing.
 906
 907 2006-02-24  Paul Brook  <paul@codesourcery.com>
 908
 909         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 910         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 911         (struct asm_barrier_opt): Define.
 912         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 913         (parse_psr): Accept V7M psr names.
 914         (parse_barrier): New function.
 915         (enum operand_parse_code): Add OP_oBARRIER.
 916         (parse_operands): Implement OP_oBARRIER.
 917         (do_barrier): New function.
 918         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 919         (do_t_cpsi): Add V7M restrictions.
 920         (do_t_mrs, do_t_msr): Validate V7M variants.
 921         (md_assemble): Check for NULL variants.
 922         (v7m_psrs, barrier_opt_names): New tables.
 923         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 924         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 925         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 926         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 927         (struct cpu_arch_ver_table): Define.
 928         (cpu_arch_ver): New.
 929         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 930         Tag_CPU_arch_profile.
 931         * doc/c-arm.texi: Document new cpu and arch options.
 932
 933 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 934
 935         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 936
 937 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 938
 939         * config/tc-ia64.c: Update copyright years.
 940
 941 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 942
 943         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 944         SDM 2.2.
 945
 946 2005-02-22  Paul Brook  <paul@codesourcery.com>
 947
 948         * config/tc-arm.c (do_pld): Remove incorrect write to
 949         inst.instruction.
 950         (encode_thumb32_addr_mode): Use correct operand.
 951
 952 2006-02-21  Paul Brook  <paul@codesourcery.com>
 953
 954         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 955
 956 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 957             Anil Paranjape   <anilp1@kpitcummins.com>
 958             Shilin Shakti    <shilins@kpitcummins.com>
 959
 960         * Makefile.am: Add xc16x related entry.
 961         * Makefile.in: Regenerate.
 962         * configure.in: Added xc16x related entry.
 963         * configure: Regenerate.
 964         * config/tc-xc16x.h: New file
 965         * config/tc-xc16x.c: New file
 966         * doc/c-xc16x.texi: New file for xc16x
 967         * doc/all.texi: Entry for xc16x
 968         * doc/Makefile.texi: Added c-xc16x.texi
 969         * NEWS: Announce the support for the new target.
 970
 971 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 972
 973         * configure.tgt: set emulation for mips-*-netbsd*
 974
 975 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 976
 977         * config.in: Rebuilt.
 978
 979 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 980
 981         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 982         from 1, not 0, in error messages.
 983         (md_assemble): Simplify special-case check for ENTRY instructions.
 984         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 985         operand in error message.
 986
 987 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 988
 989         * configure.tgt (arm-*-linux-gnueabi*): Change to
 990         arm-*-linux-*eabi*.
 991
 992 2006-02-10  Nick Clifton  <nickc@redhat.com>
 993
 994         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 995         32-bit value is propagated into the upper bits of a 64-bit long.
 996
 997         * config/tc-arc.c (init_opcode_tables): Fix cast.
 998         (arc_extoper, md_operand): Likewise.
 999
1000 2006-02-09  David Heine  <dlheine@tensilica.com>
1001
1002         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1003         each relaxation step.
1004
1005 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
1006
1007         * configure.in (CHECK_DECLS): Add vsnprintf.
1008         * configure: Regenerate.
1009         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1010         include/declare here, but...
1011         * as.h: Move code detecting VARARGS idiom to the top.
1012         (errno.h, stdarg.h, varargs.h, va_list): ...here.
1013         (vsnprintf): Declare if not already declared.
1014
1015 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
1016
1017         * as.c (close_output_file): New.
1018         (main): Register close_output_file with xatexit before
1019         dump_statistics. Don't call output_file_close.
1020
1021 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
1022
1023         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1024         mcf5329_control_regs): New.
1025         (not_current_architecture, selected_arch, selected_cpu): New.
1026         (m68k_archs, m68k_extensions): New.
1027         (archs): Renamed to ...
1028         (m68k_cpus): ... here.  Adjust.
1029         (n_arches): Remove.
1030         (md_pseudo_table): Add arch and cpu directives.
1031         (find_cf_chip, m68k_ip): Adjust table scanning.
1032         (no_68851, no_68881): Remove.
1033         (md_assemble): Lazily initialize.
1034         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1035         (md_init_after_args): Move functionality to m68k_init_arch.
1036         (mri_chip): Adjust table scanning.
1037         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1038         options with saner parsing.
1039         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1040         m68k_init_arch): New.
1041         (s_m68k_cpu, s_m68k_arch): New.
1042         (md_show_usage): Adjust.
1043         (m68k_elf_final_processing): Set CF EF flags.
1044         * config/tc-m68k.h (m68k_init_after_args): Remove.
1045         (tc_init_after_args): Remove.
1046         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1047         (M68k-Directives): Document .arch and .cpu directives.
1048
1049 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1050
1051         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1052         synonyms for equ and defl.
1053         (z80_cons_fix_new): New function.
1054         (emit_byte): Disallow relative jumps to absolute locations.
1055         (emit_data): Only handle defb, prototype changed, because defb is
1056         now handled as pseudo-op rather than an instruction.
1057         (instab): Entries for defb,defw,db,dw moved from here...
1058         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1059         Add entries for def24,def32,d24,d32.
1060         (md_assemble): Improved error handling.
1061         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1062         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1063         (z80_cons_fix_new): Declare.
1064         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1065         (def24,d24,def32,d32): New pseudo-ops.
1066
1067 2006-02-02  Paul Brook  <paul@codesourcery.com>
1068
1069         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1070
1071 2005-02-02  Paul Brook  <paul@codesourcery.com>
1072
1073         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1074         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1075         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1076         T2_OPCODE_RSB): Define.
1077         (thumb32_negate_data_op): New function.
1078         (md_apply_fix): Use it.
1079
1080 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1081
1082         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1083         fields.
1084         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1085         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1086         subtracted symbols.
1087         (relaxation_requirements): Add pfinish_frag argument and use it to
1088         replace setting tinsn->record_fix fields.
1089         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1090         and vinsn_to_insnbuf.  Remove references to record_fix and
1091         slot_sub_symbols fields.
1092         (xtensa_mark_narrow_branches): Delete unused code.
1093         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1094         a symbol.
1095         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1096         record_fix fields.
1097         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1098         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1099         of the record_fix field.  Simplify error messages for unexpected
1100         symbolic operands.
1101         (set_expr_symbol_offset_diff): Delete.
1102
1103 2006-01-31  Paul Brook  <paul@codesourcery.com>
1104
1105         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1106
1107 2006-01-31  Paul Brook  <paul@codesourcery.com>
1108         Richard Earnshaw <rearnsha@arm.com>
1109
1110         * config/tc-arm.c: Use arm_feature_set.
1111         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1112         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1113         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1114         New variables.
1115         (insns): Use them.
1116         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1117         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1118         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1119         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1120         feature flags.
1121         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1122         (arm_opts): Move old cpu/arch options from here...
1123         (arm_legacy_opts): ... to here.
1124         (md_parse_option): Search arm_legacy_opts.
1125         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1126         (arm_float_abis, arm_eabis): Make const.
1127
1128 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1129
1130         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1131
1132 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1133
1134         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1135         in load immediate intruction.
1136
1137 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1138
1139         * config/bfin-parse.y (value_match): Use correct conversion
1140         specifications in template string for __FILE__ and __LINE__.
1141         (binary): Ditto.
1142         (unary): Ditto.
1143
1144 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1145
1146         Introduce TLS descriptors for i386 and x86_64.
1147         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1148         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1149         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1150         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1151         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1152         displacement bits.
1153         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1154         (lex_got): Handle @tlsdesc and @tlscall.
1155         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1156
1157 2006-01-11  Nick Clifton  <nickc@redhat.com>
1158
1159         Fixes for building on 64-bit hosts:
1160         * config/tc-avr.c (mod_index): New union to allow conversion
1161         between pointers and integers.
1162         (md_begin, avr_ldi_expression): Use it.
1163         * config/tc-i370.c (md_assemble): Add cast for argument to print
1164         statement.
1165         * config/tc-tic54x.c (subsym_substitute): Likewise.
1166         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1167         opindex field of fr_cgen structure into a pointer so that it can
1168         be stored in a frag.
1169         * config/tc-mn10300.c (md_assemble): Likewise.
1170         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1171         types.
1172         * config/tc-v850.c: Replace uses of (int) casts with correct
1173         types.
1174
1175 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1176
1177         PR gas/2117
1178         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1179
1180 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1181
1182         PR gas/2101
1183         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1184         a local-label reference.
1185
1186 For older changes see ChangeLog-2005
1187 \f
1188 Local Variables:
1189 mode: change-log
1190 left-margin: 8
1191 fill-column: 74
1192 version-control: never
1193 End: