config/tc-aarch64.c: Avoid trying to parse a vector mov as immediate.
[binutils-gdb.git] / gas / ChangeLog
1 2013-11-05 Will Newton <will.newton@linaro.org>
2
3 PR gas/16103
4 * config/tc-aarch64.c (parse_operands): Avoid trying to
5 parse a vector register as an immediate.
6
7 2013-11-04 Jan Beulich <jbeulich@suse.com>
8
9 * config/tc-i386.c (check_long_reg): Correct comment indentation.
10 (check_qword_reg): Correct comment and its indentation.
11 (check_word_reg): Extend comment and correct its indentation. Also
12 check for 64-bit register.
13
14 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
15
16 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
17 (ppc_elf_localentry): New function.
18 (ppc_force_relocation): Force relocs on all branches to localenty
19 symbols.
20 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
21
22 2013-10-30 Alan Modra <amodra@gmail.com>
23
24 * config/tc-ppc.c: Include elf/ppc64.h.
25 (ppc_abiversion): New variable.
26 (md_pseudo_table): Add .abiversion.
27 (ppc_elf_abiversion, ppc_elf_end): New functions.
28 * config/tc-ppc.h (md_end): Define.
29
30 2013-10-30 Alan Modra <amodra@gmail.com>
31
32 * config/tc-ppc.c (SEX16): Don't mask.
33 (REPORT_OVERFLOW_HI): Define as zero.
34 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
35 @tprel@high, and @tprel@higha modifiers.
36 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
37 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
38 Handle new relocs.
39 (md_apply_fix): Similarly.
40
41 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
42
43 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
44 (fpr_write_mask): Test MSA registers.
45 (can_swap_branch_p): Check fpr write followed by fpr read.
46
47 2013-10-18 Nick Clifton <nickc@redhat.com>
48
49 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
50
51 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
52 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
53
54 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
55 (md_longopts): Add mmsa and mno-msa.
56 (mips_ases): Add msa.
57 (RTYPE_MASK): Update.
58 (RTYPE_MSA): New define.
59 (OT_REG_ELEMENT): Replace with...
60 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
61 (mips_operand_token): Replace reg_element with index.
62 (mips_parse_argument_token): Treat vector indices as separate tokens.
63 Handle register indices.
64 (md_begin): Add MSA register names.
65 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
66 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
67 (match_mdmx_imm_reg_operand): Update accordingly.
68 (match_imm_index_operand): New function.
69 (match_reg_index_operand): New function.
70 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
71 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
72 (md_show_usage): Print -mmsa and -mno-msa.
73 * doc/as.texinfo: Document -mmsa and -mno-msa.
74 * doc/c-mips.texi: Document -mmsa and -mno-msa.
75 Document .set msa and .set nomsa.
76
77 2013-10-14 Nick Clifton <nickc@redhat.com>
78
79 * read.c (add_include_dir): Use xrealloc.
80 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
81 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
82
83 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
84
85 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
86 also test/refer to "sstatus". Reformat the warning message.
87
88 2013-10-10 Sean Keys <skeys@ipdatasys.com>
89
90 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
91
92 2013-10-10 Jan Beulich <jbeulich@suse.com>
93
94 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
95 swapping for bndmk, bndldx, and bndstx.
96
97 2013-10-09 Nick Clifton <nickc@redhat.com>
98
99 PR gas/16025
100 * config/tc-epiphany.c (md_convert_frag): Add missing break
101 statement.
102
103 PR gas/16026
104 * config/tc-mn10200.c (md_convert_frag): Add missing break
105 statement.
106
107 2013-10-08 Jan Beulich <jbeulich@suse.com>
108
109 * tc-i386.c (check_word_reg): Remove misplaced "else".
110 (check_long_reg): Restore symmetry with check_word_reg.
111
112 2013-10-08 Jan Beulich <jbeulich@suse.com>
113
114 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
115 LR/PC check.
116
117 2013-10-08 Nick Clifton <nickc@redhat.com>
118
119 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
120 for "<foo>a". Issue error messages for unrecognised or corrrupt
121 size extensions.
122
123 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
124
125 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
126 possible.
127
128 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
129
130 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
131 * doc/c-i386.texi: Add -march=bdver4 option.
132
133 2013-09-20 Alan Modra <amodra@gmail.com>
134
135 * configure: Regenerate.
136
137 2013-09-18 Tristan Gingold <gingold@adacore.com>
138
139 * NEWS: Add marker for 2.24.
140
141 2013-09-18 Nick Clifton <nickc@redhat.com>
142
143 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
144 (move_data): New variable.
145 (md_parse_option): Parse -md.
146 (msp430_section): New function. Catch references to the .bss or
147 .data sections and generate a special symbol for use by the libcrt
148 library.
149 (md_pseudo_table): Intercept .section directives.
150 (md_longopt): Add -md
151 (md_show_usage): Likewise.
152 (msp430_operands): Generate a warning message if a NOP is inserted
153 into the instruction stream.
154 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
155
156 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
157
158 * config/tc-mips.c (mips_elf_final_processing): Set
159 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
160
161 2013-09-16 Will Newton <will.newton@linaro.org>
162
163 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
164 disallowing element size 64 with interleave other than 1.
165
166 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
167
168 * config/tc-mips.c (match_insn): Set error when $31 is used for
169 bltzal* and bgezal*.
170
171 2013-09-04 Tristan Gingold <gingold@adacore.com>
172
173 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
174 symbols.
175
176 2013-09-04 Roland McGrath <mcgrathr@google.com>
177
178 PR gas/15914
179 * config/tc-arm.c (T16_32_TAB): Add _udf.
180 (do_t_udf): New function.
181 (insns): Add "udf".
182
183 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
184
185 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
186 assembler errors at correct position.
187
188 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
189
190 PR binutils/15834
191 * config/tc-ia64.c: Fix typos.
192 * config/tc-sparc.c: Likewise.
193 * config/tc-z80.c: Likewise.
194 * doc/c-i386.texi: Likewise.
195 * doc/c-m32r.texi: Likewise.
196
197 2013-08-23 Will Newton <will.newton@linaro.org>
198
199 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
200 for pre-indexed addressing modes.
201
202 2013-08-21 Alan Modra <amodra@gmail.com>
203
204 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
205 range check label number for use with fb_low_counter array.
206
207 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
208
209 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
210 (mips_parse_argument_token, validate_micromips_insn, md_begin)
211 (check_regno, match_float_constant, check_completed_insn, append_insn)
212 (match_insn, match_mips16_insn, match_insns, macro_start)
213 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
214 (mips16_ip, mips_set_option_string, md_parse_option)
215 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
216 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
217 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
218 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
219 Start error messages with a lower-case letter. Do not end error
220 messages with a period. Wrap long messages to 80 character-lines.
221 Use "cannot" instead of "can't" and "can not".
222
223 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
224
225 * config/tc-mips.c (imm_expr): Expand comment.
226 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
227 when populated.
228
229 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
230
231 * config/tc-mips.c (imm2_expr): Delete.
232 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
233
234 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
235
236 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
237 (macro): Remove M_DEXT and M_DINS handling.
238
239 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
240
241 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
242 lax_max with lax_match.
243 (match_int_operand): Update accordingly. Don't report an error
244 for !lax_match-only cases.
245 (match_insn): Replace more_alts with lax_match and use it to
246 initialize the mips_arg_info field. Add a complete_p parameter.
247 Handle implicit VU0 suffixes here.
248 (match_invalid_for_isa, match_insns, match_mips16_insns): New
249 functions.
250 (mips_ip, mips16_ip): Use them.
251
252 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
253
254 * config/tc-mips.c (match_expression): Report uses of registers here.
255 Add a "must be an immediate expression" error. Handle elided offsets
256 here rather than...
257 (match_int_operand): ...here.
258
259 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
260
261 * config/tc-mips.c (mips_arg_info): Remove soft_match.
262 (match_out_of_range, match_not_constant): New functions.
263 (match_const_int): Remove fallback parameter and check for soft_match.
264 Use match_not_constant.
265 (match_mapped_int_operand, match_addiusp_operand)
266 (match_perf_reg_operand, match_save_restore_list_operand)
267 (match_mdmx_imm_reg_operand): Update accordingly. Use
268 match_out_of_range and set_insn_error* instead of as_bad.
269 (match_int_operand): Likewise. Use match_not_constant in the
270 !allows_nonconst case.
271 (match_float_constant): Report invalid float constants.
272 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
273 match_float_constant to check for invalid constants. Fail the
274 match if match_const_int or match_float_constant return false.
275 (mips_ip): Update accordingly.
276 (mips16_ip): Likewise. Undo null termination of instruction name
277 once lookup is complete.
278
279 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
280
281 * config/tc-mips.c (mips_insn_error_format): New enum.
282 (mips_insn_error): New struct.
283 (insn_error): Change to a mips_insn_error.
284 (clear_insn_error, set_insn_error_format, set_insn_error)
285 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
286 functions.
287 (mips_parse_argument_token, md_assemble, match_insn)
288 (match_mips16_insn): Use them instead of manipulating insn_error
289 directly.
290 (mips_ip, mips16_ip): Likewise. Simplify control flow.
291
292 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
293
294 * config/tc-mips.c (normalize_constant_expr): Move further up file.
295 (normalize_address_expr): Likewise.
296 (match_insn, match_mips16_insn): New functions, split out from...
297 (mips_ip, mips16_ip): ...here.
298
299 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
300
301 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
302 OP_OPTIONAL_REG.
303 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
304 for optional operands.
305
306 2013-08-16 Alan Modra <amodra@gmail.com>
307
308 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
309 modifiers generally.
310
311 2013-08-16 Alan Modra <amodra@gmail.com>
312
313 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
314
315 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
316
317 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
318 argument as alignment.
319
320 2013-08-09 Nick Clifton <nickc@redhat.com>
321
322 * config/tc-rl78.c (elf_flags): New variable.
323 (enum options): Add OPTION_G10.
324 (md_longopts): Add mg10.
325 (md_parse_option): Parse -mg10.
326 (rl78_elf_final_processing): New function.
327 * config/tc-rl78.c (tc_final_processing): Define.
328 * doc/c-rl78.texi: Document -mg10 option.
329
330 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
331
332 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
333 suffixes to be elided too.
334 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
335 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
336 to be omitted too.
337
338 2013-08-05 John Tytgat <john@bass-software.com>
339
340 * po/POTFILES.in: Regenerate.
341
342 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
343 Konrad Eisele <konrad@gaisler.com>
344
345 * config/tc-sparc.c (sparc_arch_types): Add leon.
346 (sparc_arch): Move sparc4 around and add leon.
347 (sparc_target_format): Document -Aleon.
348 * doc/c-sparc.texi: Likewise.
349
350 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
351
352 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
353
354 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
355 Richard Sandiford <rdsandiford@googlemail.com>
356
357 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
358 (RWARN): Bump to 0x8000000.
359 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
360 (RTYPE_R5900_ACC): New register types.
361 (RTYPE_MASK): Include them.
362 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
363 macros.
364 (reg_names): Include them.
365 (mips_parse_register_1): New function, split out from...
366 (mips_parse_register): ...here. Add a channels_ptr parameter.
367 Look for VU0 channel suffixes when nonnull.
368 (reg_lookup): Update the call to mips_parse_register.
369 (mips_parse_vu0_channels): New function.
370 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
371 (mips_operand_token): Add a "channels" field to the union.
372 Extend the comment above "ch" to OT_DOUBLE_CHAR.
373 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
374 (mips_parse_argument_token): Handle channel suffixes here too.
375 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
376 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
377 Handle '#' formats.
378 (md_begin): Register $vfN and $vfI registers.
379 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
380 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
381 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
382 (match_vu0_suffix_operand): New function.
383 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
384 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
385 (mips_lookup_insn): New function.
386 (mips_ip): Use it. Allow "+K" operands to be elided at the end
387 of an instruction. Handle '#' sequences.
388
389 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
390
391 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
392 values and use it instead of sreg, treg, xreg, etc.
393
394 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
395
396 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
397 and mips_int_operand_max.
398 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
399 Delete.
400 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
401 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
402 instead of mips16_immed_operand.
403
404 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
405
406 * config/tc-mips.c (mips16_macro): Don't use move_register.
407 (mips16_ip): Allow macros to use 'p'.
408
409 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
410
411 * config/tc-mips.c (MAX_OPERANDS): New macro.
412 (mips_operand_array): New structure.
413 (mips_operands, mips16_operands, micromips_operands): New arrays.
414 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
415 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
416 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
417 (micromips_to_32_reg_q_map): Delete.
418 (insn_operands, insn_opno, insn_extract_operand): New functions.
419 (validate_mips_insn): Take a mips_operand_array as argument and
420 use it to build up a list of operands. Extend to handle INSN_MACRO
421 and MIPS16.
422 (validate_mips16_insn): New function.
423 (validate_micromips_insn): Take a mips_operand_array as argument.
424 Handle INSN_MACRO.
425 (md_begin): Initialize mips_operands, mips16_operands and
426 micromips_operands. Call validate_mips_insn and
427 validate_micromips_insn for macro instructions too.
428 Call validate_mips16_insn for MIPS16 instructions.
429 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
430 New functions.
431 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
432 them. Handle INSN_UDI.
433 (get_append_method): Use gpr_read_mask.
434
435 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
436
437 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
438 flags for MIPS16 and non-MIPS16 instructions.
439 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
440 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
441 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
442 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
443 and non-MIPS16 instructions. Fix formatting.
444
445 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
446
447 * config/tc-mips.c (reg_needs_delay): Move later in file.
448 Use gpr_write_mask.
449 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
450
451 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
452 Alexander Ivchenko <alexander.ivchenko@intel.com>
453 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
454 Sergey Lega <sergey.s.lega@intel.com>
455 Anna Tikhonova <anna.tikhonova@intel.com>
456 Ilya Tocar <ilya.tocar@intel.com>
457 Andrey Turetskiy <andrey.turetskiy@intel.com>
458 Ilya Verbin <ilya.verbin@intel.com>
459 Kirill Yukhin <kirill.yukhin@intel.com>
460 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
461
462 * config/tc-i386-intel.c (O_zmmword_ptr): New.
463 (i386_types): Add zmmword.
464 (i386_intel_simplify_register): Allow regzmm.
465 (i386_intel_simplify): Handle zmmwords.
466 (i386_intel_operand): Handle RC/SAE, vector operations and
467 zmmwords.
468 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
469 (struct RC_Operation): New.
470 (struct Mask_Operation): New.
471 (struct Broadcast_Operation): New.
472 (vex_prefix): Size of bytes increased to 4 to support EVEX
473 encoding.
474 (enum i386_error): Add new error codes: unsupported_broadcast,
475 broadcast_not_on_src_operand, broadcast_needed,
476 unsupported_masking, mask_not_on_destination, no_default_mask,
477 unsupported_rc_sae, rc_sae_operand_not_last_imm,
478 invalid_register_operand, try_vector_disp8.
479 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
480 rounding, broadcast, memshift.
481 (struct RC_name): New.
482 (RC_NamesTable): New.
483 (evexlig): New.
484 (evexwig): New.
485 (extra_symbol_chars): Add '{'.
486 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
487 (i386_operand_type): Add regzmm, regmask and vec_disp8.
488 (match_mem_size): Handle zmmwords.
489 (operand_type_match): Handle zmm-registers.
490 (mode_from_disp_size): Handle vec_disp8.
491 (fits_in_vec_disp8): New.
492 (md_begin): Handle {} properly.
493 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
494 (build_vex_prefix): Handle vrex.
495 (build_evex_prefix): New.
496 (process_immext): Adjust to properly handle EVEX.
497 (md_assemble): Add EVEX encoding support.
498 (swap_2_operands): Correctly handle operands with masking,
499 broadcasting or RC/SAE.
500 (check_VecOperands): Support EVEX features.
501 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
502 (match_template): Support regzmm and handle new error codes.
503 (process_suffix): Handle zmmwords and zmm-registers.
504 (check_byte_reg): Extend to zmm-registers.
505 (process_operands): Extend to zmm-registers.
506 (build_modrm_byte): Handle EVEX.
507 (output_insn): Adjust to properly handle EVEX case.
508 (disp_size): Handle vec_disp8.
509 (output_disp): Support compressed disp8*N evex feature.
510 (output_imm): Handle RC/SAE immediates properly.
511 (check_VecOperations): New.
512 (i386_immediate): Handle EVEX features.
513 (i386_index_check): Handle zmmwords and zmm-registers.
514 (RC_SAE_immediate): New.
515 (i386_att_operand): Handle EVEX features.
516 (parse_real_register): Add a check for ZMM/Mask registers.
517 (OPTION_MEVEXLIG): New.
518 (OPTION_MEVEXWIG): New.
519 (md_longopts): Add mevexlig and mevexwig.
520 (md_parse_option): Handle mevexlig and mevexwig options.
521 (md_show_usage): Add description for mevexlig and mevexwig.
522 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
523 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
524
525 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
526
527 * config/tc-i386.c (cpu_arch): Add .sha.
528 * doc/c-i386.texi: Document sha/.sha.
529
530 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
531 Kirill Yukhin <kirill.yukhin@intel.com>
532 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
533
534 * config/tc-i386.c (BND_PREFIX): New.
535 (struct _i386_insn): Add new field bnd_prefix.
536 (add_bnd_prefix): New.
537 (cpu_arch): Add MPX.
538 (i386_operand_type): Add regbnd.
539 (md_assemble): Handle BND prefixes.
540 (parse_insn): Likewise.
541 (output_branch): Likewise.
542 (output_jump): Likewise.
543 (build_modrm_byte): Handle regbnd.
544 (OPTION_MADD_BND_PREFIX): New.
545 (md_longopts): Add entry for 'madd-bnd-prefix'.
546 (md_parse_option): Handle madd-bnd-prefix option.
547 (md_show_usage): Add description for madd-bnd-prefix
548 option.
549 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
550
551 2013-07-24 Tristan Gingold <gingold@adacore.com>
552
553 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
554 xcoff targets.
555
556 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
557
558 * config/tc-s390.c (s390_machine): Don't force the .machine
559 argument to lower case.
560
561 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
562
563 * config/tc-arm.c (s_arm_arch_extension): Improve error message
564 for invalid extension.
565
566 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
567
568 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
569 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
570 (aarch64_abi): New variable.
571 (ilp32_p): Change to be a macro.
572 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
573 (struct aarch64_option_abi_value_table): New struct.
574 (aarch64_abis): New table.
575 (aarch64_parse_abi): New function.
576 (aarch64_long_opts): Add entry for -mabi=.
577 * doc/as.texinfo (Target AArch64 options): Document -mabi.
578 * doc/c-aarch64.texi: Likewise.
579
580 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
581
582 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
583 unsigned comparison.
584
585 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
586
587 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
588 RX610.
589 * config/rx-parse.y: (rx_check_float_support): Add function to
590 check floating point operation support for target RX100 and
591 RX200.
592 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
593 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
594 RX200, RX600, and RX610
595
596 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
597
598 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
599
600 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
601
602 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
603 * doc/c-avr.texi: Likewise.
604
605 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
606
607 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
608 error with older GCCs.
609 (mips16_macro_build): Dereference args.
610
611 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
612
613 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
614 New functions, split out from...
615 (reg_lookup): ...here. Remove itbl support.
616 (reglist_lookup): Delete.
617 (mips_operand_token_type): New enum.
618 (mips_operand_token): New structure.
619 (mips_operand_tokens): New variable.
620 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
621 (mips_parse_arguments): New functions.
622 (md_begin): Initialize mips_operand_tokens.
623 (mips_arg_info): Add a token field. Remove optional_reg field.
624 (match_char, match_expression): New functions.
625 (match_const_int): Use match_expression. Remove "s" argument
626 and return a boolean result. Remove O_register handling.
627 (match_regno, match_reg, match_reg_range): New functions.
628 (match_int_operand, match_mapped_int_operand, match_msb_operand)
629 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
630 (match_addiusp_operand, match_clo_clz_dest_operand)
631 (match_lwm_swm_list_operand, match_entry_exit_operand)
632 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
633 (match_tied_reg_operand): Remove "s" argument and return a boolean
634 result. Match tokens rather than text. Update calls to
635 match_const_int. Rely on match_regno to call check_regno.
636 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
637 "arg" argument. Return a boolean result.
638 (parse_float_constant): Replace with...
639 (match_float_constant): ...this new function.
640 (match_operand): Remove "s" argument and return a boolean result.
641 Update calls to subfunctions.
642 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
643 rather than string-parsing routines. Update handling of optional
644 registers for token scheme.
645
646 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
647
648 * config/tc-mips.c (parse_float_constant): Split out from...
649 (mips_ip): ...here.
650
651 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
652
653 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
654 Delete.
655
656 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
657
658 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
659 (match_entry_exit_operand): New function.
660 (match_save_restore_list_operand): Likewise.
661 (match_operand): Use them.
662 (check_absolute_expr): Delete.
663 (mips16_ip): Rewrite main parsing loop to use mips_operands.
664
665 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
666
667 * config/tc-mips.c: Enable functions commented out in previous patch.
668 (SKIP_SPACE_TABS): Move further up file.
669 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
670 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
671 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
672 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
673 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
674 (micromips_imm_b_map, micromips_imm_c_map): Delete.
675 (mips_lookup_reg_pair): Delete.
676 (macro): Use report_bad_range and report_bad_field.
677 (mips_immed, expr_const_in_range): Delete.
678 (mips_ip): Rewrite main parsing loop to use new functions.
679
680 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
683 Change return type to bfd_boolean.
684 (report_bad_range, report_bad_field): New functions.
685 (mips_arg_info): New structure.
686 (match_const_int, convert_reg_type, check_regno, match_int_operand)
687 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
688 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
689 (match_addiusp_operand, match_clo_clz_dest_operand)
690 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
691 (match_pc_operand, match_tied_reg_operand, match_operand)
692 (check_completed_insn): New functions, commented out for now.
693
694 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
695
696 * config/tc-mips.c (insn_insert_operand): New function.
697 (macro_build, mips16_macro_build): Put null character check
698 in the for loop and convert continues to breaks. Use operand
699 structures to handle constant operands.
700
701 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
702
703 * config/tc-mips.c (validate_mips_insn): Move further up file.
704 Add insn_bits and decode_operand arguments. Use the mips_operand
705 fields to work out which bits an operand occupies. Detect double
706 definitions.
707 (validate_micromips_insn): Move further up file. Call into
708 validate_mips_insn.
709
710 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
711
712 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
713
714 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
715
716 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
717 and "~".
718 (macro): Update accordingly.
719
720 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
721
722 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
723 (imm_reloc): Delete.
724 (md_assemble): Remove imm_reloc handling.
725 (mips_ip): Update commentary. Use offset_expr and offset_reloc
726 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
727 Use a temporary array rather than imm_reloc when parsing
728 constant expressions. Remove imm_reloc initialization.
729 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
730 for the relaxable field. Use a relax_char variable to track the
731 type of this field. Remove imm_reloc initialization.
732
733 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
734
735 * config/tc-mips.c (mips16_ip): Handle "I".
736
737 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
738
739 * config/tc-mips.c (mips_flag_nan2008): New variable.
740 (options): Add OPTION_NAN enum value.
741 (md_longopts): Handle it.
742 (md_parse_option): Likewise.
743 (s_nan): New function.
744 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
745 (md_show_usage): Add -mnan.
746
747 * doc/as.texinfo (Overview): Add -mnan.
748 * doc/c-mips.texi (MIPS Opts): Document -mnan.
749 (MIPS NaN Encodings): New node. Document .nan directive.
750 (MIPS-Dependent): List the new node.
751
752 2013-07-09 Tristan Gingold <gingold@adacore.com>
753
754 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
755
756 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
757
758 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
759 for 'A' and assume that the constant has been elided if the result
760 is an O_register.
761
762 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
763
764 * config/tc-mips.c (gprel16_reloc_p): New function.
765 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
766 BFD_RELOC_UNUSED.
767 (offset_high_part, small_offset_p): New functions.
768 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
769 register load and store macros, handle the 16-bit offset case first.
770 If a 16-bit offset is not suitable for the instruction we're
771 generating, load it into the temporary register using
772 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
773 M_L_DAB code once the address has been constructed. For double load
774 and store macros, again handle the 16-bit offset case first.
775 If the second register cannot be accessed from the same high
776 part as the first, load it into AT using ADDRESS_ADDI_INSN.
777 Fix the handling of LD in cases where the first register is the
778 same as the base. Also handle the case where the offset is
779 not 16 bits and the second register cannot be accessed from the
780 same high part as the first. For unaligned loads and stores,
781 fuse the offbits == 12 and old "ab" handling. Apply this handling
782 whenever the second offset needs a different high part from the first.
783 Construct the offset using ADDRESS_ADDI_INSN where possible,
784 for offbits == 16 as well as offbits == 12. Use offset_reloc
785 when constructing the individual loads and stores.
786 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
787 and offset_reloc before matching against a particular opcode.
788 Handle elided 'A' constants. Allow 'A' constants to use
789 relocation operators.
790
791 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
792
793 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
794 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
795 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
796
797 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
798
799 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
800 Require the msb to be <= 31 for "+s". Check that the size is <= 31
801 for both "+s" and "+S".
802
803 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
804
805 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
806 (mips_ip, mips16_ip): Handle "+i".
807
808 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
809
810 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
811 (micromips_to_32_reg_h_map): Rename to...
812 (micromips_to_32_reg_h_map1): ...this.
813 (micromips_to_32_reg_i_map): Rename to...
814 (micromips_to_32_reg_h_map2): ...this.
815 (mips_lookup_reg_pair): New function.
816 (gpr_write_mask, macro): Adjust after above renaming.
817 (validate_micromips_insn): Remove "mi" handling.
818 (mips_ip): Likewise. Parse both registers in a pair for "mh".
819
820 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
821
822 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
823 (mips_ip): Remove "+D" and "+T" handling.
824
825 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
826
827 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
828 relocs.
829
830 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
831
832 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
833
834 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
835
836 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
837 (aarch64_force_relocation): Likewise.
838
839 2013-07-02 Alan Modra <amodra@gmail.com>
840
841 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
842
843 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
844
845 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
846 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
847 Replace @sc{mips16} with literal `MIPS16'.
848 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
849
850 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
851
852 * config/tc-aarch64.c (reloc_table): Replace
853 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
854 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
855 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
856 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
857 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
858 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
859 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
860 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
861 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
862 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
863 (aarch64_force_relocation): Likewise.
864
865 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
866
867 * config/tc-aarch64.c (ilp32_p): New static variable.
868 (elf64_aarch64_target_format): Return the target according to the
869 value of 'ilp32_p'.
870 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
871 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
872 (aarch64_dwarf2_addr_size): New function.
873 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
874 (DWARF2_ADDR_SIZE): New define.
875
876 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
877
878 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
879
880 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
881
882 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
883
884 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
885
886 * config/tc-mips.c (mips_set_options): Add insn32 member.
887 (mips_opts): Initialize it.
888 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
889 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
890 (md_longopts): Add "minsn32" and "mno-insn32" options.
891 (is_size_valid): Handle insn32 mode.
892 (md_assemble): Pass instruction string down to macro.
893 (brk_fmt): Add second dimension and insn32 mode initializers.
894 (mfhl_fmt): Likewise.
895 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
896 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
897 (macro_build_jalr, move_register): Handle insn32 mode.
898 (macro_build_branch_rs): Likewise.
899 (macro): Handle insn32 mode.
900 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
901 (mips_ip): Handle insn32 mode.
902 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
903 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
904 (mips_handle_align): Handle insn32 mode.
905 (md_show_usage): Add -minsn32 and -mno-insn32.
906
907 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
908 -mno-insn32 options.
909 (-minsn32, -mno-insn32): New options.
910 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
911 options.
912 (MIPS assembly options): New node. Document .set insn32 and
913 .set noinsn32.
914 (MIPS-Dependent): List the new node.
915
916 2013-06-25 Nick Clifton <nickc@redhat.com>
917
918 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
919 the PC in indirect addressing on 430xv2 parts.
920 (msp430_operands): Add version test to hardware bug encoding
921 restrictions.
922
923 2013-06-24 Roland McGrath <mcgrathr@google.com>
924
925 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
926 so it skips whitespace before it.
927 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
928
929 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
930 (arm_reg_parse_multi): Skip whitespace first.
931 (parse_reg_list): Likewise.
932 (parse_vfp_reg_list): Likewise.
933 (s_arm_unwind_save_mmxwcg): Likewise.
934
935 2013-06-24 Nick Clifton <nickc@redhat.com>
936
937 PR gas/15623
938 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
939
940 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
941
942 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
943
944 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
945
946 * config/tc-mips.c: Assert that offsetT and valueT are at least
947 8 bytes in size.
948 (GPR_SMIN, GPR_SMAX): New macros.
949 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
950
951 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
952
953 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
954 conditions. Remove any code deselected by them.
955 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
956
957 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
958
959 * NEWS: Note removal of ECOFF support.
960 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
961 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
962 (MULTI_CFILES): Remove config/e-mipsecoff.c.
963 * Makefile.in: Regenerate.
964 * configure.in: Remove MIPS ECOFF references.
965 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
966 Delete cases.
967 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
968 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
969 (mips-*-*): ...this single case.
970 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
971 MIPS emulations to be e-mipself*.
972 * configure: Regenerate.
973 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
974 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
975 (mips-*-sysv*): Remove coff and ecoff cases.
976 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
977 * ecoff.c: Remove reference to MIPS ECOFF.
978 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
979 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
980 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
981 (mips_hi_fixup): Tweak comment.
982 (append_insn): Require a howto.
983 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
984
985 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
986
987 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
988 Use "CPU" instead of "cpu".
989 * doc/c-mips.texi: Likewise.
990 (MIPS Opts): Rename to MIPS Options.
991 (MIPS option stack): Rename to MIPS Option Stack.
992 (MIPS ASE instruction generation overrides): Rename to
993 MIPS ASE Instruction Generation Overrides (for now).
994 (MIPS floating-point): Rename to MIPS Floating-Point.
995
996 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
997
998 * doc/c-mips.texi (MIPS Macros): New section.
999 (MIPS Object): Replace with...
1000 (MIPS Small Data): ...this new section.
1001
1002 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1003
1004 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1005 Capitalize name. Use @kindex instead of @cindex for .set entries.
1006
1007 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1008
1009 * doc/c-mips.texi (MIPS Stabs): Remove section.
1010
1011 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1012
1013 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1014 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1015 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1016 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1017 (mips_ase): New structure.
1018 (mips_ases): New table.
1019 (FP64_ASES): New macro.
1020 (mips_ase_groups): New array.
1021 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1022 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1023 functions.
1024 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1025 (md_parse_option): Use mips_ases and mips_set_ase instead of
1026 separate case statements for each ASE option.
1027 (mips_after_parse_args): Use FP64_ASES. Use
1028 mips_check_isa_supports_ases to check the ASEs against
1029 other options.
1030 (s_mipsset): Use mips_ases and mips_set_ase instead of
1031 separate if statements for each ASE option. Use
1032 mips_check_isa_supports_ases, even when a non-ASE option
1033 is specified.
1034
1035 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1036
1037 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1038
1039 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1040
1041 * config/tc-mips.c (md_shortopts, options, md_longopts)
1042 (md_longopts_size): Move earlier in file.
1043
1044 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1045
1046 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1047 with a single "ase" bitmask.
1048 (mips_opts): Update accordingly.
1049 (file_ase, file_ase_explicit): New variables.
1050 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1051 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1052 (ISA_HAS_ROR): Adjust for mips_set_options change.
1053 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1054 (mips_ip): Adjust for mips_set_options change.
1055 (md_parse_option): Likewise. Update file_ase_explicit.
1056 (mips_after_parse_args): Adjust for mips_set_options change.
1057 Use bitmask operations to select the default ASEs. Set file_ase
1058 rather than individual per-ASE variables.
1059 (s_mipsset): Adjust for mips_set_options change.
1060 (mips_elf_final_processing): Test file_ase rather than
1061 file_ase_mdmx. Remove commented-out code.
1062
1063 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1064
1065 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1066 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1067 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1068 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1069 (mips_after_parse_args): Use the new "ase" field to choose
1070 the default ASEs.
1071 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1072 "ase" field.
1073
1074 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1075
1076 * config/tc-arm.c (symbol_preemptible): New function.
1077 (relax_branch): Use it.
1078
1079 2013-06-17 Catherine Moore <clm@codesourcery.com>
1080 Maciej W. Rozycki <macro@codesourcery.com>
1081 Chao-Ying Fu <fu@mips.com>
1082
1083 * config/tc-mips.c (mips_set_options): Add ase_eva.
1084 (mips_set_options mips_opts): Add ase_eva.
1085 (file_ase_eva): Declare.
1086 (ISA_SUPPORTS_EVA_ASE): Define.
1087 (IS_SEXT_9BIT_NUM): Define.
1088 (MIPS_CPU_ASE_EVA): Define.
1089 (is_opcode_valid): Add support for ase_eva.
1090 (macro_build): Likewise.
1091 (macro): Likewise.
1092 (validate_mips_insn): Likewise.
1093 (validate_micromips_insn): Likewise.
1094 (mips_ip): Likewise.
1095 (options): Add OPTION_EVA and OPTION_NO_EVA.
1096 (md_longopts): Add -meva and -mno-eva.
1097 (md_parse_option): Process new options.
1098 (mips_after_parse_args): Check for valid EVA combinations.
1099 (s_mipsset): Likewise.
1100
1101 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1102
1103 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1104 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1105 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1106 (dwarf2_gen_line_info_1): Update call accordingly.
1107 (dwarf2_move_insn): New function.
1108 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1109
1110 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1111
1112 Revert:
1113
1114 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1115
1116 PR gas/13024
1117 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1118 (dwarf2_gen_line_info_1): Delete.
1119 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1120 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1121 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1122 (dwarf2_directive_loc): Push previous .locs instead of generating
1123 them immediately.
1124
1125 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1126
1127 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1128 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1129
1130 2013-06-13 Nick Clifton <nickc@redhat.com>
1131
1132 PR gas/15602
1133 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1134 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1135 function. Generates an error if the adjusted offset is out of a
1136 16-bit range.
1137
1138 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1139
1140 * config/tc-nios2.c (md_apply_fix): Mask constant
1141 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1142
1143 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1144
1145 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1146 MIPS-3D instructions either.
1147 (md_convert_frag): Update the COPx branch mask accordingly.
1148
1149 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1150 option.
1151 * doc/as.texinfo (Overview): Add --relax-branch and
1152 --no-relax-branch.
1153 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1154 --no-relax-branch.
1155
1156 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1157
1158 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1159 omitted.
1160
1161 2013-06-08 Catherine Moore <clm@codesourcery.com>
1162
1163 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1164 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1165 (append_insn): Change INSN_xxxx to ASE_xxxx.
1166
1167 2013-06-01 George Thomas <george.thomas@atmel.com>
1168
1169 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1170 AVR_ISA_XMEGAU
1171
1172 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1173
1174 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1175 for ELF.
1176
1177 2013-05-31 Paul Brook <paul@codesourcery.com>
1178
1179 * config/tc-mips.c (s_ehword): New.
1180
1181 2013-05-30 Paul Brook <paul@codesourcery.com>
1182
1183 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1184
1185 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1186
1187 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1188 convert relocs who have no relocatable field either. Rephrase
1189 the conditional so that the PC-relative check is only applied
1190 for REL targets.
1191
1192 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1193
1194 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1195 calculation.
1196
1197 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1198
1199 * config/tc-aarch64.c (reloc_table): Update to use
1200 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1201 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1202 (md_apply_fix): Likewise.
1203 (aarch64_force_relocation): Likewise.
1204
1205 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1206
1207 * config/tc-arm.c (it_fsm_post_encode): Improve
1208 warning messages about deprecated IT block formats.
1209
1210 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1211
1212 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1213 inside fx_done condition.
1214
1215 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1216
1217 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1218
1219 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1220
1221 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1222 and clean up warning when using PRINT_OPCODE_TABLE.
1223
1224 2013-05-20 Alan Modra <amodra@gmail.com>
1225
1226 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1227 and data fixups performing shift/high adjust/sign extension on
1228 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1229 when writing data fixups rather than recalculating size.
1230
1231 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1232
1233 * doc/c-msp430.texi: Fix typo.
1234
1235 2013-05-16 Tristan Gingold <gingold@adacore.com>
1236
1237 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1238 are also TOC symbols.
1239
1240 2013-05-16 Nick Clifton <nickc@redhat.com>
1241
1242 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1243 Add -mcpu command to specify core type.
1244 * doc/c-msp430.texi: Update documentation.
1245
1246 2013-05-09 Andrew Pinski <apinski@cavium.com>
1247
1248 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1249 (mips_opts): Update for the new field.
1250 (file_ase_virt): New variable.
1251 (ISA_SUPPORTS_VIRT_ASE): New macro.
1252 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1253 (MIPS_CPU_ASE_VIRT): New define.
1254 (is_opcode_valid): Handle ase_virt.
1255 (macro_build): Handle "+J".
1256 (validate_mips_insn): Likewise.
1257 (mips_ip): Likewise.
1258 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1259 (md_longopts): Add mvirt and mnovirt
1260 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1261 (mips_after_parse_args): Handle ase_virt field.
1262 (s_mipsset): Handle "virt" and "novirt".
1263 (mips_elf_final_processing): Add a comment about virt ASE might need
1264 a new flag.
1265 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1266 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1267 Document ".set virt" and ".set novirt".
1268
1269 2013-05-09 Alan Modra <amodra@gmail.com>
1270
1271 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1272 control of operand flag bits.
1273
1274 2013-05-07 Alan Modra <amodra@gmail.com>
1275
1276 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1277 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1278 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1279 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1280 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1281 Shift and sign-extend fieldval for use by some VLE reloc
1282 operand->insert functions.
1283
1284 2013-05-06 Paul Brook <paul@codesourcery.com>
1285 Catherine Moore <clm@codesourcery.com>
1286
1287 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1288 (limited_pcrel_reloc_p): Likewise.
1289 (md_apply_fix): Likewise.
1290 (tc_gen_reloc): Likewise.
1291
1292 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1293
1294 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1295 (mips_fix_adjustable): Adjust pc-relative check to use
1296 limited_pc_reloc_p.
1297
1298 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1299
1300 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1301 (s_mips_stab): Do not restrict to stabn only.
1302
1303 2013-05-02 Nick Clifton <nickc@redhat.com>
1304
1305 * config/tc-msp430.c: Add support for the MSP430X architecture.
1306 Add code to insert a NOP instruction after any instruction that
1307 might change the interrupt state.
1308 Add support for the LARGE memory model.
1309 Add code to initialise the .MSP430.attributes section.
1310 * config/tc-msp430.h: Add support for the MSP430X architecture.
1311 * doc/c-msp430.texi: Document the new -mL and -mN command line
1312 options.
1313 * NEWS: Mention support for the MSP430X architecture.
1314
1315 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1316
1317 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1318 alpha*-*-linux*ecoff*.
1319
1320 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1321
1322 * config/tc-mips.c (mips_ip): Add sizelo.
1323 For "+C", "+G", and "+H", set sizelo and compare against it.
1324
1325 2013-04-29 Nick Clifton <nickc@redhat.com>
1326
1327 * as.c (Options): Add -gdwarf-sections.
1328 (parse_args): Likewise.
1329 * as.h (flag_dwarf_sections): Declare.
1330 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1331 (process_entries): When -gdwarf-sections is enabled generate
1332 fragmentary .debug_line sections.
1333 (out_debug_line): Set the section for the .debug_line section end
1334 symbol.
1335 * doc/as.texinfo: Document -gdwarf-sections.
1336 * NEWS: Mention -gdwarf-sections.
1337
1338 2013-04-26 Christian Groessler <chris@groessler.org>
1339
1340 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1341 according to the target parameter. Don't call s_segm since s_segm
1342 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1343 initialized yet.
1344 (md_begin): Call s_segm according to target parameter from command
1345 line.
1346
1347 2013-04-25 Alan Modra <amodra@gmail.com>
1348
1349 * configure.in: Allow little-endian linux.
1350 * configure: Regenerate.
1351
1352 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1353
1354 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1355 "fstatus" control register to "eccinj".
1356
1357 2013-04-19 Kai Tietz <ktietz@redhat.com>
1358
1359 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1360
1361 2013-04-15 Julian Brown <julian@codesourcery.com>
1362
1363 * expr.c (add_to_result, subtract_from_result): Make global.
1364 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1365 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1366 subtract_from_result to handle extra bit of precision for .sleb128
1367 directive operands.
1368
1369 2013-04-10 Julian Brown <julian@codesourcery.com>
1370
1371 * read.c (convert_to_bignum): Add sign parameter. Use it
1372 instead of X_unsigned to determine sign of resulting bignum.
1373 (emit_expr): Pass extra argument to convert_to_bignum.
1374 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1375 X_extrabit to convert_to_bignum.
1376 (parse_bitfield_cons): Set X_extrabit.
1377 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1378 Initialise X_extrabit field as appropriate.
1379 (add_to_result): New.
1380 (subtract_from_result): New.
1381 (expr): Use above.
1382 * expr.h (expressionS): Add X_extrabit field.
1383
1384 2013-04-10 Jan Beulich <jbeulich@suse.com>
1385
1386 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1387 register being PC when is_t or writeback, and use distinct
1388 diagnostic for the latter case.
1389
1390 2013-04-10 Jan Beulich <jbeulich@suse.com>
1391
1392 * gas/config/tc-arm.c (parse_operands): Re-write
1393 po_barrier_or_imm().
1394 (do_barrier): Remove bogus constraint().
1395 (do_t_barrier): Remove.
1396
1397 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1398
1399 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1400 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1401 ATmega2564RFR2
1402 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1403
1404 2013-04-09 Jan Beulich <jbeulich@suse.com>
1405
1406 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1407 Use local variable Rt in more places.
1408 (do_vmsr): Accept all control registers.
1409
1410 2013-04-09 Jan Beulich <jbeulich@suse.com>
1411
1412 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1413 if there was none specified for moves between scalar and core
1414 register.
1415
1416 2013-04-09 Jan Beulich <jbeulich@suse.com>
1417
1418 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1419 NEON_ALL_LANES case.
1420
1421 2013-04-08 Jan Beulich <jbeulich@suse.com>
1422
1423 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1424 PC-relative VSTR.
1425
1426 2013-04-08 Jan Beulich <jbeulich@suse.com>
1427
1428 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1429 entry to sp_fiq.
1430
1431 2013-04-03 Alan Modra <amodra@gmail.com>
1432
1433 * doc/as.texinfo: Add support to generate man options for h8300.
1434 * doc/c-h8300.texi: Likewise.
1435
1436 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1437
1438 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1439 Cortex-A57.
1440
1441 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1442
1443 PR binutils/15068
1444 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1445
1446 2013-03-26 Nick Clifton <nickc@redhat.com>
1447
1448 PR gas/15295
1449 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1450 start of the file each time.
1451
1452 PR gas/15178
1453 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1454 FreeBSD targets.
1455
1456 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1457
1458 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1459 after fixup.
1460
1461 2013-03-21 Will Newton <will.newton@linaro.org>
1462
1463 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1464 pc-relative str instructions in Thumb mode.
1465
1466 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1467
1468 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1469 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1470 R_H8_DISP32A16.
1471 * config/tc-h8300.h: Remove duplicated defines.
1472
1473 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1474
1475 PR gas/15282
1476 * tc-avr.c (mcu_has_3_byte_pc): New function.
1477 (tc_cfi_frame_initial_instructions): Call it to find return
1478 address size.
1479
1480 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1481
1482 PR gas/15095
1483 * config/tc-tic6x.c (tic6x_try_encode): Handle
1484 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1485 encode register pair numbers when required.
1486
1487 2013-03-15 Will Newton <will.newton@linaro.org>
1488
1489 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1490 in vstr in Thumb mode for pre-ARMv7 cores.
1491
1492 2013-03-14 Andreas Schwab <schwab@suse.de>
1493
1494 * doc/c-arc.texi (ARC Directives): Revert last change and use
1495 @itemize instead of @table.
1496 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1497
1498 2013-03-14 Nick Clifton <nickc@redhat.com>
1499
1500 PR gas/15273
1501 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1502 NULL message, instead just check ARM_CPU_IS_ANY directly.
1503
1504 2013-03-14 Nick Clifton <nickc@redhat.com>
1505
1506 PR gas/15212
1507 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1508 for table format.
1509 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1510 to the @item directives.
1511 (ARM-Neon-Alignment): Move to correct place in the document.
1512 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1513 formatting.
1514 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1515 @smallexample.
1516
1517 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1518
1519 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1520 case. Add default BAD_CASE to switch.
1521
1522 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1523
1524 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1525 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1526
1527 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1528
1529 * config/tc-arm.c (crc_ext_armv8): New feature set.
1530 (UNPRED_REG): New macro.
1531 (do_crc32_1): New function.
1532 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1533 do_crc32ch, do_crc32cw): Likewise.
1534 (TUEc): New macro.
1535 (insns): Add entries for crc32 mnemonics.
1536 (arm_extensions): Add entry for crc.
1537
1538 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1539
1540 * write.h (struct fix): Add fx_dot_frag field.
1541 (dot_frag): Declare.
1542 * write.c (dot_frag): New variable.
1543 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1544 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1545 * expr.c (expr): Save value of frag_now in dot_frag when setting
1546 dot_value.
1547 * read.c (emit_expr): Likewise. Delete comments.
1548
1549 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1550
1551 * config/tc-i386.c (flag_code_names): Removed.
1552 (i386_index_check): Rewrote.
1553
1554 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1555
1556 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1557 add comment.
1558 (aarch64_double_precision_fmovable): New function.
1559 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1560 function; handle hexadecimal representation of IEEE754 encoding.
1561 (parse_operands): Update the call to parse_aarch64_imm_float.
1562
1563 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1564
1565 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1566 (check_hle): Updated.
1567 (md_assemble): Likewise.
1568 (parse_insn): Likewise.
1569
1570 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1571
1572 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1573 (md_assemble): Check if REP prefix is OK.
1574 (parse_insn): Remove expecting_string_instruction. Set
1575 i.rep_prefix.
1576
1577 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1578
1579 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1580
1581 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1582
1583 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1584 for system registers.
1585
1586 2013-02-27 DJ Delorie <dj@redhat.com>
1587
1588 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1589 (rl78_op): Handle %code().
1590 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1591 (tc_gen_reloc): Likwise; convert to a computed reloc.
1592 (md_apply_fix): Likewise.
1593
1594 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1595
1596 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1597
1598 2013-02-25 Terry Guo <terry.guo@arm.com>
1599
1600 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1601 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1602 list of accepted CPUs.
1603
1604 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1605
1606 PR gas/15159
1607 * config/tc-i386.c (cpu_arch): Add ".smap".
1608
1609 * doc/c-i386.texi: Document smap.
1610
1611 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1612
1613 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1614 mips_assembling_insn appropriately.
1615 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1616
1617 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1618
1619 * config/tc-mips.c (append_insn): Correct indentation, remove
1620 extraneous braces.
1621
1622 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1623
1624 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1625
1626 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1627
1628 * configure.tgt: Add nios2-*-rtems*.
1629
1630 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1631
1632 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1633 NULL.
1634
1635 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1636
1637 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1638 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1639
1640 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1641
1642 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1643 core.
1644
1645 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1646 Andrew Jenner <andrew@codesourcery.com>
1647
1648 Based on patches from Altera Corporation.
1649
1650 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1651 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1652 * Makefile.in: Regenerated.
1653 * configure.tgt: Add case for nios2*-linux*.
1654 * config/obj-elf.c: Conditionally include elf/nios2.h.
1655 * config/tc-nios2.c: New file.
1656 * config/tc-nios2.h: New file.
1657 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1658 * doc/Makefile.in: Regenerated.
1659 * doc/all.texi: Set NIOSII.
1660 * doc/as.texinfo (Overview): Add Nios II options.
1661 (Machine Dependencies): Include c-nios2.texi.
1662 * doc/c-nios2.texi: New file.
1663 * NEWS: Note Altera Nios II support.
1664
1665 2013-02-06 Alan Modra <amodra@gmail.com>
1666
1667 PR gas/14255
1668 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1669 Don't skip fixups with fx_subsy non-NULL.
1670 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1671 with fx_subsy non-NULL.
1672
1673 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1674
1675 * doc/c-metag.texi: Add "@c man" markers.
1676
1677 2013-02-04 Alan Modra <amodra@gmail.com>
1678
1679 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1680 related code.
1681 (TC_ADJUST_RELOC_COUNT): Delete.
1682 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1683
1684 2013-02-04 Alan Modra <amodra@gmail.com>
1685
1686 * po/POTFILES.in: Regenerate.
1687
1688 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1689
1690 * config/tc-metag.c: Make SWAP instruction less permissive with
1691 its operands.
1692
1693 2013-01-29 DJ Delorie <dj@redhat.com>
1694
1695 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1696 relocs in .word/.etc statements.
1697
1698 2013-01-29 Roland McGrath <mcgrathr@google.com>
1699
1700 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1701 immediate value for 8-bit offset" error so it shows line info.
1702
1703 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1704
1705 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1706 for 64-bit output.
1707
1708 2013-01-24 Nick Clifton <nickc@redhat.com>
1709
1710 * config/tc-v850.c: Add support for e3v5 architecture.
1711 * doc/c-v850.texi: Mention new support.
1712
1713 2013-01-23 Nick Clifton <nickc@redhat.com>
1714
1715 PR gas/15039
1716 * config/tc-avr.c: Include dwarf2dbg.h.
1717
1718 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1719
1720 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1721 (tc_i386_fix_adjustable): Likewise.
1722 (lex_got): Likewise.
1723 (tc_gen_reloc): Likewise.
1724
1725 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1726
1727 * config/tc-aarch64.c (output_operand_error_record): Change to output
1728 the out-of-range error message as value-expected message if there is
1729 only one single value in the expected range.
1730 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1731 LSL #0 as a programmer-friendly feature.
1732
1733 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1734
1735 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1736 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1737 BFD_RELOC_64_SIZE relocations.
1738 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1739 for it.
1740 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1741 relocations against local symbols.
1742
1743 2013-01-16 Alan Modra <amodra@gmail.com>
1744
1745 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1746 finding some sort of toc syntax error, and break to avoid
1747 compiler uninit warning.
1748
1749 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1750
1751 PR gas/15019
1752 * config/tc-i386.c (lex_got): Increment length by 1 if the
1753 relocation token is removed.
1754
1755 2013-01-15 Nick Clifton <nickc@redhat.com>
1756
1757 * config/tc-v850.c (md_assemble): Allow signed values for
1758 V850E_IMMEDIATE.
1759
1760 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1761
1762 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1763 git to cvs.
1764
1765 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1766
1767 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1768 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1769 * config/tc-ppc.c (md_show_usage): Likewise.
1770 (ppc_handle_align): Handle power8's group ending nop.
1771
1772 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1773
1774 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1775 that the assember exits after the opcodes have been printed.
1776
1777 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1778
1779 * app.c: Remove trailing white spaces.
1780 * as.c: Likewise.
1781 * as.h: Likewise.
1782 * cond.c: Likewise.
1783 * dw2gencfi.c: Likewise.
1784 * dwarf2dbg.h: Likewise.
1785 * ecoff.c: Likewise.
1786 * input-file.c: Likewise.
1787 * itbl-lex.h: Likewise.
1788 * output-file.c: Likewise.
1789 * read.c: Likewise.
1790 * sb.c: Likewise.
1791 * subsegs.c: Likewise.
1792 * symbols.c: Likewise.
1793 * write.c: Likewise.
1794 * config/tc-i386.c: Likewise.
1795 * doc/Makefile.am: Likewise.
1796 * doc/Makefile.in: Likewise.
1797 * doc/c-aarch64.texi: Likewise.
1798 * doc/c-alpha.texi: Likewise.
1799 * doc/c-arc.texi: Likewise.
1800 * doc/c-arm.texi: Likewise.
1801 * doc/c-avr.texi: Likewise.
1802 * doc/c-bfin.texi: Likewise.
1803 * doc/c-cr16.texi: Likewise.
1804 * doc/c-d10v.texi: Likewise.
1805 * doc/c-d30v.texi: Likewise.
1806 * doc/c-h8300.texi: Likewise.
1807 * doc/c-hppa.texi: Likewise.
1808 * doc/c-i370.texi: Likewise.
1809 * doc/c-i386.texi: Likewise.
1810 * doc/c-i860.texi: Likewise.
1811 * doc/c-m32c.texi: Likewise.
1812 * doc/c-m32r.texi: Likewise.
1813 * doc/c-m68hc11.texi: Likewise.
1814 * doc/c-m68k.texi: Likewise.
1815 * doc/c-microblaze.texi: Likewise.
1816 * doc/c-mips.texi: Likewise.
1817 * doc/c-msp430.texi: Likewise.
1818 * doc/c-mt.texi: Likewise.
1819 * doc/c-s390.texi: Likewise.
1820 * doc/c-score.texi: Likewise.
1821 * doc/c-sh.texi: Likewise.
1822 * doc/c-sh64.texi: Likewise.
1823 * doc/c-tic54x.texi: Likewise.
1824 * doc/c-tic6x.texi: Likewise.
1825 * doc/c-v850.texi: Likewise.
1826 * doc/c-xc16x.texi: Likewise.
1827 * doc/c-xgate.texi: Likewise.
1828 * doc/c-xtensa.texi: Likewise.
1829 * doc/c-z80.texi: Likewise.
1830 * doc/internals.texi: Likewise.
1831
1832 2013-01-10 Roland McGrath <mcgrathr@google.com>
1833
1834 * hash.c (hash_new_sized): Make it global.
1835 * hash.h: Declare it.
1836 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1837 pass a small size.
1838
1839 2013-01-10 Will Newton <will.newton@imgtec.com>
1840
1841 * Makefile.am: Add Meta.
1842 * Makefile.in: Regenerate.
1843 * config/tc-metag.c: New file.
1844 * config/tc-metag.h: New file.
1845 * configure.tgt: Add Meta.
1846 * doc/Makefile.am: Add Meta.
1847 * doc/Makefile.in: Regenerate.
1848 * doc/all.texi: Add Meta.
1849 * doc/as.texiinfo: Document Meta options.
1850 * doc/c-metag.texi: New file.
1851
1852 2013-01-09 Steve Ellcey <sellcey@mips.com>
1853
1854 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1855 calls.
1856 * config/tc-mips.c (internalError): Remove, replace with abort.
1857
1858 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1859
1860 * config/tc-aarch64.c (parse_operands): Change to compare the result
1861 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1862
1863 2013-01-07 Nick Clifton <nickc@redhat.com>
1864
1865 PR gas/14887
1866 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1867 anticipated character.
1868 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1869 here as it is no longer needed.
1870
1871 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1872
1873 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1874 * doc/c-score.texi (SCORE-Opts): Likewise.
1875 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1876
1877 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1878
1879 * config/tc-mips.c: Add support for MIPS r5900.
1880 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1881 lq and sq.
1882 (can_swap_branch_p, get_append_method): Detect some conditional
1883 short loops to fix a bug on the r5900 by NOP in the branch delay
1884 slot.
1885 (M_MUL): Support 3 operands in multu on r5900.
1886 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1887 (s_mipsset): Force 32 bit floating point on r5900.
1888 (mips_ip): Check parameter range of instructions mfps and mtps on
1889 r5900.
1890 * configure.in: Detect CPU type when target string contains r5900
1891 (e.g. mips64r5900el-linux-gnu).
1892
1893 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1894
1895 * as.c (parse_args): Update copyright year to 2013.
1896
1897 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1898
1899 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1900 and "cortex57".
1901
1902 2013-01-02 Nick Clifton <nickc@redhat.com>
1903
1904 PR gas/14987
1905 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1906 closing bracket.
1907
1908 For older changes see ChangeLog-2012
1909 \f
1910 Copyright (C) 2013 Free Software Foundation, Inc.
1911
1912 Copying and distribution of this file, with or without modification,
1913 are permitted in any medium without royalty provided the copyright
1914 notice and this notice are preserved.
1915
1916 Local Variables:
1917 mode: change-log
1918 left-margin: 8
1919 fill-column: 74
1920 version-control: never
1921 End: