1 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
4 * config/tc-i386.c (md_parse_option): Treat any target starting
5 with elf64_x86_64 as a viable target for the -64 switch.
6 (i386_target_format): For 64-bit ELF flavoured output use
8 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
10 2006-08-02 Nick Clifton <nickc@redhat.com>
13 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
15 * configure.in: Run BFD_BINARY_FOPEN.
16 * configure: Regenerate.
17 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
20 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
22 * config/tc-i386.c (md_assemble): Don't update
25 2006-08-01 Thiemo Seufer <ths@mips.com>
27 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
29 2006-08-01 Thiemo Seufer <ths@mips.com>
31 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
32 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
33 BFD_RELOC_32 and BFD_RELOC_16.
34 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
35 md_convert_frag, md_obj_end): Fix comment formatting.
37 2006-07-31 Thiemo Seufer <ths@mips.com>
39 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
40 handling for BFD_RELOC_MIPS16_JMP.
42 2006-07-24 Andreas Schwab <schwab@suse.de>
45 * read.c (read_a_source_file): Ignore unknown text after line
46 comment character. Fix misleading comment.
48 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
50 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
51 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
52 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
53 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
54 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
55 doc/c-z80.texi, doc/internals.texi: Fix some typos.
57 2006-07-21 Nick Clifton <nickc@redhat.com>
59 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
62 2006-07-20 Thiemo Seufer <ths@mips.com>
63 Nigel Stephens <nigel@mips.com>
65 * config/tc-mips.c (md_parse_option): Don't infer optimisation
66 options from debug options.
68 2006-07-20 Thiemo Seufer <ths@mips.com>
70 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
71 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
73 2006-07-19 Paul Brook <paul@codesourcery.com>
75 * config/tc-arm.c (insns): Fix rbit Arm opcode.
77 2006-07-18 Paul Brook <paul@codesourcery.com>
79 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
80 (md_convert_frag): Use correct reloc for add_pc. Use
81 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
82 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
83 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
85 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
87 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
88 when file and line unknown.
90 2006-07-17 Thiemo Seufer <ths@mips.com>
92 * read.c (s_struct): Use IS_ELF.
93 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
94 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
95 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
96 s_mips_mask): Likewise.
98 2006-07-16 Thiemo Seufer <ths@mips.com>
99 David Ung <davidu@mips.com>
101 * read.c (s_struct): Handle ELF section changing.
102 * config/tc-mips.c (s_align): Leave enabling auto-align to the
104 (s_change_sec): Try section changing only if we output ELF.
106 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
108 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
110 (smallest_imm_type): Remove Cpu086.
111 (i386_target_format): Likewise.
113 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
116 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
117 Michael Meissner <michael.meissner@amd.com>
119 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
120 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
121 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
123 (i386_align_code): Ditto.
124 (md_assemble_code): Add support for insertq/extrq instructions,
125 swapping as needed for intel syntax.
126 (swap_imm_operands): New function to swap immediate operands.
127 (swap_operands): Deal with 4 operand instructions.
128 (build_modrm_byte): Add support for insertq instruction.
130 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
132 * config/tc-i386.h (Size64): Fix a typo in comment.
134 2006-07-12 Nick Clifton <nickc@redhat.com>
136 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
137 fixup_segment() to repeat a range check on a value that has
138 already been checked here.
140 2006-07-07 James E Wilson <wilson@specifix.com>
142 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
144 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
145 Nick Clifton <nickc@redhat.com>
148 * doc/as.texi: Fix spelling typo: branchs => branches.
149 * doc/c-m68hc11.texi: Likewise.
150 * config/tc-m68hc11.c: Likewise.
151 Support old spelling of command line switch for backwards
154 2006-07-04 Thiemo Seufer <ths@mips.com>
155 David Ung <davidu@mips.com>
157 * config/tc-mips.c (s_is_linkonce): New function.
158 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
159 weak, external, and linkonce symbols.
160 (pic_need_relax): Use s_is_linkonce.
162 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
164 * doc/as.texinfo (Org): Remove space.
165 (P2align): Add "@var{abs-expr},".
167 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
169 * config/tc-i386.c (cpu_arch_tune_set): New.
170 (cpu_arch_isa): Likewise.
171 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
172 nops with short or long nop sequences based on -march=/.arch
174 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
175 set cpu_arch_tune and cpu_arch_tune_flags.
176 (md_parse_option): For -march=, set cpu_arch_isa and set
177 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
178 0. Set cpu_arch_tune_set to 1 for -mtune=.
179 (i386_target_format): Don't set cpu_arch_tune.
181 2006-06-23 Nigel Stephens <nigel@mips.com>
183 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
184 generated .sbss.* and .gnu.linkonce.sb.*.
186 2006-06-23 Thiemo Seufer <ths@mips.com>
187 David Ung <davidu@mips.com>
189 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
191 * config/tc-mips.c (label_list): Define per-segment label_list.
192 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
193 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
194 mips_from_file_after_relocs, mips_define_label): Use per-segment
197 2006-06-22 Thiemo Seufer <ths@mips.com>
199 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
200 (append_insn): Use it.
201 (md_apply_fix): Whitespace formatting.
202 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
203 mips16_extended_frag): Remove register specifier.
204 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
207 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
209 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
210 a directive saving VFP registers for ARMv6 or later.
211 (s_arm_unwind_save): Add parameter arch_v6 and call
212 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
214 (md_pseudo_table): Add entry for new "vsave" directive.
215 * doc/c-arm.texi: Correct error in example for "save"
216 directive (fstmdf -> fstmdx). Also document "vsave" directive.
218 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
219 Anatoly Sokolov <aesok@post.ru>
221 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
222 and atmega644p devices. Rename atmega164/atmega324 devices to
223 atmega164p/atmega324p.
224 * doc/c-avr.texi: Document new mcu and arch options.
226 2006-06-17 Nick Clifton <nickc@redhat.com>
228 * config/tc-arm.c (enum parse_operand_result): Move outside of
229 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
231 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
233 * config/tc-i386.h (processor_type): New.
234 (arch_entry): Add type.
236 * config/tc-i386.c (cpu_arch_tune): New.
237 (cpu_arch_tune_flags): Likewise.
238 (cpu_arch_isa_flags): Likewise.
240 (set_cpu_arch): Also update cpu_arch_isa_flags.
241 (md_assemble): Update cpu_arch_isa_flags.
243 (OPTION_MTUNE): Likewise.
244 (md_longopts): Add -march= and -mtune=.
245 (md_parse_option): Support -march= and -mtune=.
246 (md_show_usage): Add -march=CPU/-mtune=CPU.
247 (i386_target_format): Also update cpu_arch_isa_flags,
248 cpu_arch_tune and cpu_arch_tune_flags.
250 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
252 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
254 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
256 * config/tc-arm.c (enum parse_operand_result): New.
257 (struct group_reloc_table_entry): New.
258 (enum group_reloc_type): New.
259 (group_reloc_table): New array.
260 (find_group_reloc_table_entry): New function.
261 (parse_shifter_operand_group_reloc): New function.
262 (parse_address_main): New function, incorporating code
263 from the old parse_address function. To be used via...
264 (parse_address): wrapper for parse_address_main; and
265 (parse_address_group_reloc): new function, likewise.
266 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
267 OP_ADDRGLDRS, OP_ADDRGLDC.
268 (parse_operands): Support for these new operand codes.
269 New macro po_misc_or_fail_no_backtrack.
270 (encode_arm_cp_address): Preserve group relocations.
271 (insns): Modify to use the above operand codes where group
272 relocations are permitted.
273 (md_apply_fix): Handle the group relocations
274 ALU_PC_G0_NC through LDC_SB_G2.
275 (tc_gen_reloc): Likewise.
276 (arm_force_relocation): Leave group relocations for the linker.
277 (arm_fix_adjustable): Likewise.
279 2006-06-15 Julian Brown <julian@codesourcery.com>
281 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
282 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
285 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
287 * config/tc-i386.c (process_suffix): Don't add rex64 for
290 2006-06-09 Thiemo Seufer <ths@mips.com>
292 * config/tc-mips.c (mips_ip): Maintain argument count.
294 2006-06-09 Alan Modra <amodra@bigpond.net.au>
296 * config/tc-iq2000.c: Include sb.h.
298 2006-06-08 Nigel Stephens <nigel@mips.com>
300 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
301 aliases for better compatibility with SGI tools.
303 2006-06-08 Alan Modra <amodra@bigpond.net.au>
305 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
306 * Makefile.am (GASLIBS): Expand @BFDLIB@.
308 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
309 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
310 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
312 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
313 * Makefile.in: Regenerate.
314 * doc/Makefile.in: Regenerate.
315 * configure: Regenerate.
317 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
319 * po/Make-in (pdf, ps): New dummy targets.
321 2006-06-07 Julian Brown <julian@codesourcery.com>
323 * config/tc-arm.c (stdarg.h): include.
324 (arm_it): Add uncond_value field. Add isvec and issingle to operand
326 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
327 REG_TYPE_NSDQ (single, double or quad vector reg).
328 (reg_expected_msgs): Update.
329 (BAD_FPU): Add macro for unsupported FPU instruction error.
330 (parse_neon_type): Support 'd' as an alias for .f64.
331 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
333 (parse_vfp_reg_list): Don't update first arg on error.
334 (parse_neon_mov): Support extra syntax for VFP moves.
335 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
336 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
337 (parse_operands): Support isvec, issingle operands fields, new parse
339 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
341 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
342 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
343 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
344 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
346 (neon_shape): Redefine in terms of above.
347 (neon_shape_class): New enumeration, table of shape classes.
348 (neon_shape_el): New enumeration. One element of a shape.
349 (neon_shape_el_size): Register widths of above, where appropriate.
350 (neon_shape_info): New struct. Info for shape table.
351 (neon_shape_tab): New array.
352 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
353 (neon_check_shape): Rewrite as...
354 (neon_select_shape): New function to classify instruction shapes,
355 driven by new table neon_shape_tab array.
356 (neon_quad): New function. Return 1 if shape should set Q flag in
357 instructions (or equivalent), 0 otherwise.
358 (type_chk_of_el_type): Support F64.
359 (el_type_of_type_chk): Likewise.
360 (neon_check_type): Add support for VFP type checking (VFP data
361 elements fill their containing registers).
362 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
363 in thumb mode for VFP instructions.
364 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
365 and encode the current instruction as if it were that opcode.
366 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
367 arguments, call function in PFN.
368 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
369 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
370 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
371 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
372 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
373 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
374 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
375 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
376 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
377 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
378 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
379 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
380 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
381 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
382 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
384 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
385 between VFP and Neon turns out to belong to Neon. Perform
386 architecture check and fill in condition field if appropriate.
387 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
388 (do_neon_cvt): Add support for VFP variants of instructions.
389 (neon_cvt_flavour): Extend to cover VFP conversions.
390 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
392 (do_neon_ldr_str): Handle single-precision VFP load/store.
393 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
394 NS_NULL not NS_IGNORE.
395 (opcode_tag): Add OT_csuffixF for operands which either take a
396 conditional suffix, or have 0xF in the condition field.
397 (md_assemble): Add support for OT_csuffixF.
398 (NCE): Replace macro with...
399 (NCE_tag, NCE, NCEF): New macros.
400 (nCE): Replace macro with...
401 (nCE_tag, nCE, nCEF): New macros.
402 (insns): Add support for VFP insns or VFP versions of insns msr,
403 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
404 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
405 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
406 VFP/Neon insns together.
408 2006-06-07 Alan Modra <amodra@bigpond.net.au>
409 Ladislav Michl <ladis@linux-mips.org>
411 * app.c: Don't include headers already included by as.h.
413 * atof-generic.c: Likewise.
415 * dwarf2dbg.c: Likewise.
417 * input-file.c: Likewise.
418 * input-scrub.c: Likewise.
420 * output-file.c: Likewise.
423 * config/bfin-lex.l: Likewise.
424 * config/obj-coff.h: Likewise.
425 * config/obj-elf.h: Likewise.
426 * config/obj-som.h: Likewise.
427 * config/tc-arc.c: Likewise.
428 * config/tc-arm.c: Likewise.
429 * config/tc-avr.c: Likewise.
430 * config/tc-bfin.c: Likewise.
431 * config/tc-cris.c: Likewise.
432 * config/tc-d10v.c: Likewise.
433 * config/tc-d30v.c: Likewise.
434 * config/tc-dlx.h: Likewise.
435 * config/tc-fr30.c: Likewise.
436 * config/tc-frv.c: Likewise.
437 * config/tc-h8300.c: Likewise.
438 * config/tc-hppa.c: Likewise.
439 * config/tc-i370.c: Likewise.
440 * config/tc-i860.c: Likewise.
441 * config/tc-i960.c: Likewise.
442 * config/tc-ip2k.c: Likewise.
443 * config/tc-iq2000.c: Likewise.
444 * config/tc-m32c.c: Likewise.
445 * config/tc-m32r.c: Likewise.
446 * config/tc-maxq.c: Likewise.
447 * config/tc-mcore.c: Likewise.
448 * config/tc-mips.c: Likewise.
449 * config/tc-mmix.c: Likewise.
450 * config/tc-mn10200.c: Likewise.
451 * config/tc-mn10300.c: Likewise.
452 * config/tc-msp430.c: Likewise.
453 * config/tc-mt.c: Likewise.
454 * config/tc-ns32k.c: Likewise.
455 * config/tc-openrisc.c: Likewise.
456 * config/tc-ppc.c: Likewise.
457 * config/tc-s390.c: Likewise.
458 * config/tc-sh.c: Likewise.
459 * config/tc-sh64.c: Likewise.
460 * config/tc-sparc.c: Likewise.
461 * config/tc-tic30.c: Likewise.
462 * config/tc-tic4x.c: Likewise.
463 * config/tc-tic54x.c: Likewise.
464 * config/tc-v850.c: Likewise.
465 * config/tc-vax.c: Likewise.
466 * config/tc-xc16x.c: Likewise.
467 * config/tc-xstormy16.c: Likewise.
468 * config/tc-xtensa.c: Likewise.
469 * config/tc-z80.c: Likewise.
470 * config/tc-z8k.c: Likewise.
471 * macro.h: Don't include sb.h or ansidecl.h.
472 * sb.h: Don't include stdio.h or ansidecl.h.
473 * cond.c: Include sb.h.
474 * itbl-lex.l: Include as.h instead of other system headers.
475 * itbl-parse.y: Likewise.
476 * itbl-ops.c: Similarly.
477 * itbl-ops.h: Don't include as.h or ansidecl.h.
478 * config/bfin-defs.h: Don't include bfd.h or as.h.
479 * config/bfin-parse.y: Include as.h instead of other system headers.
481 2006-06-06 Ben Elliston <bje@au.ibm.com>
482 Anton Blanchard <anton@samba.org>
484 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
485 (md_show_usage): Document it.
486 (ppc_setup_opcodes): Test power6 opcode flag bits.
487 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
489 2006-06-06 Thiemo Seufer <ths@mips.com>
490 Chao-ying Fu <fu@mips.com>
492 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
493 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
494 (macro_build): Update comment.
495 (mips_ip): Allow DSP64 instructions for MIPS64R2.
496 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
498 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
499 MIPS_CPU_ASE_MDMX flags for sb1.
501 2006-06-05 Thiemo Seufer <ths@mips.com>
503 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
505 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
506 (mips_ip): Make overflowed/underflowed constant arguments in DSP
507 and MT instructions a fatal error. Use INSERT_OPERAND where
508 appropriate. Improve warnings for break and wait code overflows.
509 Use symbolic constant of OP_MASK_COPZ.
510 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
512 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
514 * po/Make-in (top_builddir): Define.
516 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
518 * doc/Makefile.am (TEXI2DVI): Define.
519 * doc/Makefile.in: Regenerate.
520 * doc/c-arc.texi: Fix typo.
522 2006-06-01 Alan Modra <amodra@bigpond.net.au>
524 * config/obj-ieee.c: Delete.
525 * config/obj-ieee.h: Delete.
526 * Makefile.am (OBJ_FORMATS): Remove ieee.
527 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
528 (obj-ieee.o): Remove rule.
529 * Makefile.in: Regenerate.
530 * configure.in (atof): Remove tahoe.
531 (OBJ_MAYBE_IEEE): Don't define.
532 * configure: Regenerate.
533 * config.in: Regenerate.
534 * doc/Makefile.in: Regenerate.
535 * po/POTFILES.in: Regenerate.
537 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
539 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
540 and LIBINTL_DEP everywhere.
542 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
543 * acinclude.m4: Include new gettext macros.
544 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
545 Remove local code for po/Makefile.
546 * Makefile.in, configure, doc/Makefile.in: Regenerated.
548 2006-05-30 Nick Clifton <nickc@redhat.com>
550 * po/es.po: Updated Spanish translation.
552 2006-05-06 Denis Chertykov <denisc@overta.ru>
554 * doc/c-avr.texi: New file.
555 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
556 * doc/all.texi: Set AVR
557 * doc/as.texinfo: Include c-avr.texi
559 2006-05-28 Jie Zhang <jie.zhang@analog.com>
561 * config/bfin-parse.y (check_macfunc): Loose the condition of
562 calling check_multiply_halfregs ().
564 2006-05-25 Jie Zhang <jie.zhang@analog.com>
566 * config/bfin-parse.y (asm_1): Better check and deal with
567 vector and scalar Multiply 16-Bit Operands instructions.
569 2006-05-24 Nick Clifton <nickc@redhat.com>
571 * config/tc-hppa.c: Convert to ISO C90 format.
572 * config/tc-hppa.h: Likewise.
574 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
575 Randolph Chung <randolph@tausq.org>
577 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
578 is_tls_ieoff, is_tls_leoff): Define.
579 (fix_new_hppa): Handle TLS.
580 (cons_fix_new_hppa): Likewise.
582 (md_apply_fix): Handle TLS relocs.
583 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
585 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
587 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
589 2006-05-23 Thiemo Seufer <ths@mips.com>
590 David Ung <davidu@mips.com>
591 Nigel Stephens <nigel@mips.com>
594 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
595 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
596 ISA_HAS_MXHC1): New macros.
597 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
598 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
599 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
600 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
601 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
602 (mips_after_parse_args): Change default handling of float register
603 size to account for 32bit code with 64bit FP. Better sanity checking
604 of ISA/ASE/ABI option combinations.
605 (s_mipsset): Support switching of GPR and FPR sizes via
606 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
608 (mips_elf_final_processing): We should record the use of 64bit FP
609 registers in 32bit code but we don't, because ELF header flags are
611 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
612 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
613 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
614 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
615 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
616 missing -march options. Document .set arch=CPU. Move .set smartmips
617 to ASE page. Use @code for .set FOO examples.
619 2006-05-23 Jie Zhang <jie.zhang@analog.com>
621 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
624 2006-05-23 Jie Zhang <jie.zhang@analog.com>
626 * config/bfin-defs.h (bfin_equals): Remove declaration.
627 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
628 * config/tc-bfin.c (bfin_name_is_register): Remove.
629 (bfin_equals): Remove.
630 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
631 (bfin_name_is_register): Remove declaration.
633 2006-05-19 Thiemo Seufer <ths@mips.com>
634 Nigel Stephens <nigel@mips.com>
636 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
637 (mips_oddfpreg_ok): New function.
640 2006-05-19 Thiemo Seufer <ths@mips.com>
641 David Ung <davidu@mips.com>
643 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
644 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
645 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
646 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
647 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
648 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
649 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
650 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
651 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
652 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
653 reg_names_o32, reg_names_n32n64): Define register classes.
654 (reg_lookup): New function, use register classes.
655 (md_begin): Reserve register names in the symbol table. Simplify
657 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
659 (mips16_ip): Use reg_lookup.
660 (tc_get_register): Likewise.
661 (tc_mips_regname_to_dw2regnum): New function.
663 2006-05-19 Thiemo Seufer <ths@mips.com>
665 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
666 Un-constify string argument.
667 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
669 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
671 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
673 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
675 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
677 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
680 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
682 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
683 cfloat/m68881 to correct architecture before using it.
685 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
687 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
690 2006-05-15 Paul Brook <paul@codesourcery.com>
692 * config/tc-arm.c (arm_adjust_symtab): Use
693 bfd_is_arm_special_symbol_name.
695 2006-05-15 Bob Wilson <bob.wilson@acm.org>
697 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
698 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
699 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
700 Handle errors from calls to xtensa_opcode_is_* functions.
702 2006-05-14 Thiemo Seufer <ths@mips.com>
704 * config/tc-mips.c (macro_build): Test for currently active
706 (mips16_ip): Reject invalid opcodes.
708 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
710 * doc/as.texinfo: Rename "Index" to "AS Index",
711 and "ABORT" to "ABORT (COFF)".
713 2006-05-11 Paul Brook <paul@codesourcery.com>
715 * config/tc-arm.c (parse_half): New function.
716 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
717 (parse_operands): Ditto.
718 (do_mov16): Reject invalid relocations.
719 (do_t_mov16): Ditto. Use Thumb reloc numbers.
720 (insns): Replace Iffff with HALF.
721 (md_apply_fix): Add MOVW and MOVT relocs.
722 (tc_gen_reloc): Ditto.
723 * doc/c-arm.texi: Document relocation operators
725 2006-05-11 Paul Brook <paul@codesourcery.com>
727 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
729 2006-05-11 Thiemo Seufer <ths@mips.com>
731 * config/tc-mips.c (append_insn): Don't check the range of j or
734 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
736 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
737 relocs against external symbols for WinCE targets.
738 (md_apply_fix): Likewise.
740 2006-05-09 David Ung <davidu@mips.com>
742 * config/tc-mips.c (append_insn): Only warn about an out-of-range
745 2006-05-09 Nick Clifton <nickc@redhat.com>
747 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
748 against symbols which are not going to be placed into the symbol
751 2006-05-09 Ben Elliston <bje@au.ibm.com>
753 * expr.c (operand): Remove `if (0 && ..)' statement and
754 subsequently unused target_op label. Collapse `if (1 || ..)'
756 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
757 separately above the switch.
759 2006-05-08 Nick Clifton <nickc@redhat.com>
762 * config/tc-msp430.c (line_separator_character): Define as |.
764 2006-05-08 Thiemo Seufer <ths@mips.com>
765 Nigel Stephens <nigel@mips.com>
766 David Ung <davidu@mips.com>
768 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
769 (mips_opts): Likewise.
770 (file_ase_smartmips): New variable.
771 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
772 (macro_build): Handle SmartMIPS instructions.
774 (md_longopts): Add argument handling for smartmips.
775 (md_parse_options, mips_after_parse_args): Likewise.
776 (s_mipsset): Add .set smartmips support.
777 (md_show_usage): Document -msmartmips/-mno-smartmips.
778 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
780 * doc/c-mips.texi: Likewise.
782 2006-05-08 Alan Modra <amodra@bigpond.net.au>
784 * write.c (relax_segment): Add pass count arg. Don't error on
785 negative org/space on first two passes.
786 (relax_seg_info): New struct.
787 (relax_seg, write_object_file): Adjust.
788 * write.h (relax_segment): Update prototype.
790 2006-05-05 Julian Brown <julian@codesourcery.com>
792 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
794 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
795 architecture version checks.
796 (insns): Allow overlapping instructions to be used in VFP mode.
798 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
801 * config/obj-elf.c (obj_elf_change_section): Allow user
802 specified SHF_ALPHA_GPREL.
804 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
806 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
807 for PMEM related expressions.
809 2006-05-05 Nick Clifton <nickc@redhat.com>
812 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
813 insertion of a directory separator character into a string at a
814 given offset. Uses heuristics to decide when to use a backslash
815 character rather than a forward-slash character.
816 (dwarf2_directive_loc): Use the macro.
817 (out_debug_info): Likewise.
819 2006-05-05 Thiemo Seufer <ths@mips.com>
820 David Ung <davidu@mips.com>
822 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
824 (macro): Add new case M_CACHE_AB.
826 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
828 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
829 (opcode_lookup): Issue a warning for opcode with
830 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
831 identical to OT_cinfix3.
832 (TxC3w, TC3w, tC3w): New.
833 (insns): Use tC3w and TC3w for comparison instructions with
836 2006-05-04 Alan Modra <amodra@bigpond.net.au>
838 * subsegs.h (struct frchain): Delete frch_seg.
839 (frchain_root): Delete.
840 (seg_info): Define as macro.
841 * subsegs.c (frchain_root): Delete.
842 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
843 (subsegs_begin, subseg_change): Adjust for above.
844 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
845 rather than to one big list.
846 (subseg_get): Don't special case abs, und sections.
847 (subseg_new, subseg_force_new): Don't set frchainP here.
849 (subsegs_print_statistics): Adjust frag chain control list traversal.
850 * debug.c (dmp_frags): Likewise.
851 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
852 at frchain_root. Make use of known frchain ordering.
853 (last_frag_for_seg): Likewise.
854 (get_frag_fix): Likewise. Add seg param.
855 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
856 * write.c (chain_frchains_together_1): Adjust for struct frchain.
857 (SUB_SEGMENT_ALIGN): Likewise.
858 (subsegs_finish): Adjust frchain list traversal.
859 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
860 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
861 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
862 (xtensa_fix_b_j_loop_end_frags): Likewise.
863 (xtensa_fix_close_loop_end_frags): Likewise.
864 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
865 (retrieve_segment_info): Delete frch_seg initialisation.
867 2006-05-03 Alan Modra <amodra@bigpond.net.au>
869 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
870 * config/obj-elf.h (obj_sec_set_private_data): Delete.
871 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
872 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
874 2006-05-02 Joseph Myers <joseph@codesourcery.com>
876 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
878 (md_apply_fix3): Multiply offset by 4 here for
879 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
881 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
882 Jan Beulich <jbeulich@novell.com>
884 * config/tc-i386.c (output_invalid_buf): Change size for
886 * config/tc-tic30.c (output_invalid_buf): Likewise.
888 * config/tc-i386.c (output_invalid): Cast none-ascii char to
890 * config/tc-tic30.c (output_invalid): Likewise.
892 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
894 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
895 (TEXI2POD): Use AM_MAKEINFOFLAGS.
896 (asconfig.texi): Don't set top_srcdir.
897 * doc/as.texinfo: Don't use top_srcdir.
898 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
900 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
902 * config/tc-i386.c (output_invalid_buf): Change size to 16.
903 * config/tc-tic30.c (output_invalid_buf): Likewise.
905 * config/tc-i386.c (output_invalid): Use snprintf instead of
907 * config/tc-ia64.c (declare_register_set): Likewise.
908 (emit_one_bundle): Likewise.
909 (check_dependencies): Likewise.
910 * config/tc-tic30.c (output_invalid): Likewise.
912 2006-05-02 Paul Brook <paul@codesourcery.com>
914 * config/tc-arm.c (arm_optimize_expr): New function.
915 * config/tc-arm.h (md_optimize_expr): Define
916 (arm_optimize_expr): Add prototype.
917 (TC_FORCE_RELOCATION_SUB_SAME): Define.
919 2006-05-02 Ben Elliston <bje@au.ibm.com>
921 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
924 * sb.h (sb_list_vector): Move to sb.c.
925 * sb.c (free_list): Use type of sb_list_vector directly.
926 (sb_build): Fix off-by-one error in assertion about `size'.
928 2006-05-01 Ben Elliston <bje@au.ibm.com>
930 * listing.c (listing_listing): Remove useless loop.
931 * macro.c (macro_expand): Remove is_positional local variable.
932 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
933 and simplify surrounding expressions, where possible.
934 (assign_symbol): Likewise.
935 (s_weakref): Likewise.
936 * symbols.c (colon): Likewise.
938 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
940 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
942 2006-04-30 Thiemo Seufer <ths@mips.com>
943 David Ung <davidu@mips.com>
945 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
946 (mips_immed): New table that records various handling of udi
947 instruction patterns.
948 (mips_ip): Adds udi handling.
950 2006-04-28 Alan Modra <amodra@bigpond.net.au>
952 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
953 of list rather than beginning.
955 2006-04-26 Julian Brown <julian@codesourcery.com>
957 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
958 (is_quarter_float): Rename from above. Simplify slightly.
959 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
961 (parse_neon_mov): Parse floating-point constants.
962 (neon_qfloat_bits): Fix encoding.
963 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
964 preference to integer encoding when using the F32 type.
966 2006-04-26 Julian Brown <julian@codesourcery.com>
968 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
969 zero-initialising structures containing it will lead to invalid types).
970 (arm_it): Add vectype to each operand.
971 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
973 (neon_typed_alias): New structure. Extra information for typed
975 (reg_entry): Add neon type info field.
976 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
977 Break out alternative syntax for coprocessor registers, etc. into...
978 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
979 out from arm_reg_parse.
980 (parse_neon_type): Move. Return SUCCESS/FAIL.
981 (first_error): New function. Call to ensure first error which occurs is
983 (parse_neon_operand_type): Parse exactly one type.
984 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
985 (parse_typed_reg_or_scalar): New function. Handle core of both
986 arm_typed_reg_parse and parse_scalar.
987 (arm_typed_reg_parse): Parse a register with an optional type.
988 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
990 (parse_scalar): Parse a Neon scalar with optional type.
991 (parse_reg_list): Use first_error.
992 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
993 (neon_alias_types_same): New function. Return true if two (alias) types
995 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
997 (insert_reg_alias): Return new reg_entry not void.
998 (insert_neon_reg_alias): New function. Insert type/index information as
999 well as register for alias.
1000 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1001 make typed register aliases accordingly.
1002 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1004 (s_unreq): Delete type information if present.
1005 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1006 (s_arm_unwind_save_mmxwcg): Likewise.
1007 (s_arm_unwind_movsp): Likewise.
1008 (s_arm_unwind_setfp): Likewise.
1009 (parse_shift): Likewise.
1010 (parse_shifter_operand): Likewise.
1011 (parse_address): Likewise.
1012 (parse_tb): Likewise.
1013 (tc_arm_regname_to_dw2regnum): Likewise.
1014 (md_pseudo_table): Add dn, qn.
1015 (parse_neon_mov): Handle typed operands.
1016 (parse_operands): Likewise.
1017 (neon_type_mask): Add N_SIZ.
1018 (N_ALLMODS): New macro.
1019 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1020 (el_type_of_type_chk): Add some safeguards.
1021 (modify_types_allowed): Fix logic bug.
1022 (neon_check_type): Handle operands with types.
1023 (neon_three_same): Remove redundant optional arg handling.
1024 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1025 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1026 (do_neon_step): Adjust accordingly.
1027 (neon_cmode_for_logic_imm): Use first_error.
1028 (do_neon_bitfield): Call neon_check_type.
1029 (neon_dyadic): Rename to...
1030 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1031 to allow modification of type of the destination.
1032 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1033 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1034 (do_neon_compare): Make destination be an untyped bitfield.
1035 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1036 (neon_mul_mac): Return early in case of errors.
1037 (neon_move_immediate): Use first_error.
1038 (neon_mac_reg_scalar_long): Fix type to include scalar.
1039 (do_neon_dup): Likewise.
1040 (do_neon_mov): Likewise (in several places).
1041 (do_neon_tbl_tbx): Fix type.
1042 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1043 (do_neon_ld_dup): Exit early in case of errors and/or use
1045 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1046 Handle .dn/.qn directives.
1047 (REGDEF): Add zero for reg_entry neon field.
1049 2006-04-26 Julian Brown <julian@codesourcery.com>
1051 * config/tc-arm.c (limits.h): Include.
1052 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1053 (fpu_vfp_v3_or_neon_ext): Declare constants.
1054 (neon_el_type): New enumeration of types for Neon vector elements.
1055 (neon_type_el): New struct. Define type and size of a vector element.
1056 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1058 (neon_type): Define struct. The type of an instruction.
1059 (arm_it): Add 'vectype' for the current instruction.
1060 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1061 (vfp_sp_reg_pos): Rename to...
1062 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1064 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1065 (Neon D or Q register).
1066 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1068 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1069 (my_get_expression): Allow above constant as argument to accept
1070 64-bit constants with optional prefix.
1071 (arm_reg_parse): Add extra argument to return the specific type of
1072 register in when either a D or Q register (REG_TYPE_NDQ) is
1073 requested. Can be NULL.
1074 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1075 (parse_reg_list): Update for new arm_reg_parse args.
1076 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1077 (parse_neon_el_struct_list): New function. Parse element/structure
1078 register lists for VLD<n>/VST<n> instructions.
1079 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1080 (s_arm_unwind_save_mmxwr): Likewise.
1081 (s_arm_unwind_save_mmxwcg): Likewise.
1082 (s_arm_unwind_movsp): Likewise.
1083 (s_arm_unwind_setfp): Likewise.
1084 (parse_big_immediate): New function. Parse an immediate, which may be
1085 64 bits wide. Put results in inst.operands[i].
1086 (parse_shift): Update for new arm_reg_parse args.
1087 (parse_address): Likewise. Add parsing of alignment specifiers.
1088 (parse_neon_mov): Parse the operands of a VMOV instruction.
1089 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1090 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1091 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1092 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1093 (parse_operands): Handle new codes above.
1094 (encode_arm_vfp_sp_reg): Rename to...
1095 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1096 selected VFP version only supports D0-D15.
1097 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1098 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1099 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1100 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1101 encode_arm_vfp_reg name, and allow 32 D regs.
1102 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1103 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1105 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1106 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1107 constant-load and conversion insns introduced with VFPv3.
1108 (neon_tab_entry): New struct.
1109 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1110 those which are the targets of pseudo-instructions.
1111 (neon_opc): Enumerate opcodes, use as indices into...
1112 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1113 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1114 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1115 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1117 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1119 (neon_type_mask): New. Compact type representation for type checking.
1120 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1121 permitted type combinations.
1122 (N_IGNORE_TYPE): New macro.
1123 (neon_check_shape): New function. Check an instruction shape for
1124 multiple alternatives. Return the specific shape for the current
1126 (neon_modify_type_size): New function. Modify a vector type and size,
1127 depending on the bit mask in argument 1.
1128 (neon_type_promote): New function. Convert a given "key" type (of an
1129 operand) into the correct type for a different operand, based on a bit
1131 (type_chk_of_el_type): New function. Convert a type and size into the
1132 compact representation used for type checking.
1133 (el_type_of_type_ckh): New function. Reverse of above (only when a
1134 single bit is set in the bit mask).
1135 (modify_types_allowed): New function. Alter a mask of allowed types
1136 based on a bit mask of modifications.
1137 (neon_check_type): New function. Check the type of the current
1138 instruction against the variable argument list. The "key" type of the
1139 instruction is returned.
1140 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1141 a Neon data-processing instruction depending on whether we're in ARM
1142 mode or Thumb-2 mode.
1143 (neon_logbits): New function.
1144 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1145 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1146 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1147 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1148 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1149 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1150 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1151 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1152 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1153 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1154 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1155 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1156 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1157 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1158 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1159 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1160 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1161 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1162 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1163 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1164 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1165 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1166 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1167 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1168 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1170 (parse_neon_type): New function. Parse Neon type specifier.
1171 (opcode_lookup): Allow parsing of Neon type specifiers.
1172 (REGNUM2, REGSETH, REGSET2): New macros.
1173 (reg_names): Add new VFPv3 and Neon registers.
1174 (NUF, nUF, NCE, nCE): New macros for opcode table.
1175 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1176 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1177 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1178 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1179 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1180 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1181 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1182 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1183 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1184 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1185 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1186 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1187 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1188 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1190 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1191 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1192 (arm_option_cpu_value): Add vfp3 and neon.
1193 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1196 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1198 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1199 syntax instead of hardcoded opcodes with ".w18" suffixes.
1200 (wide_branch_opcode): New.
1201 (build_transition): Use it to check for wide branch opcodes with
1202 either ".w18" or ".w15" suffixes.
1204 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1206 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1207 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1208 frag's is_literal flag.
1210 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1212 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1214 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1216 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1217 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1218 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1219 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1220 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1222 2005-04-20 Paul Brook <paul@codesourcery.com>
1224 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1226 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1228 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1230 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1231 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1232 Make some cpus unsupported on ELF. Run "make dep-am".
1233 * Makefile.in: Regenerate.
1235 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1237 * configure.in (--enable-targets): Indent help message.
1238 * configure: Regenerate.
1240 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1243 * config/tc-i386.c (i386_immediate): Check illegal immediate
1246 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1248 * config/tc-i386.c: Formatting.
1249 (output_disp, output_imm): ISO C90 params.
1251 * frags.c (frag_offset_fixed_p): Constify args.
1252 * frags.h (frag_offset_fixed_p): Ditto.
1254 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1255 (COFF_MAGIC): Delete.
1257 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1259 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1261 * po/POTFILES.in: Regenerated.
1263 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1265 * doc/as.texinfo: Mention that some .type syntaxes are not
1266 supported on all architectures.
1268 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1270 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1271 instructions when such transformations have been disabled.
1273 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1275 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1276 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1277 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1278 decoding the loop instructions. Remove current_offset variable.
1279 (xtensa_fix_short_loop_frags): Likewise.
1280 (min_bytes_to_other_loop_end): Remove current_offset argument.
1282 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1284 * config/tc-z80.c (z80_optimize_expr): Removed.
1285 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1287 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1289 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1290 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1291 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1292 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1293 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1294 at90can64, at90usb646, at90usb647, at90usb1286 and
1296 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1298 2006-04-07 Paul Brook <paul@codesourcery.com>
1300 * config/tc-arm.c (parse_operands): Set default error message.
1302 2006-04-07 Paul Brook <paul@codesourcery.com>
1304 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1306 2006-04-07 Paul Brook <paul@codesourcery.com>
1308 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1310 2006-04-07 Paul Brook <paul@codesourcery.com>
1312 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1313 (move_or_literal_pool): Handle Thumb-2 instructions.
1314 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1316 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1319 * config/tc-i386.c (match_template): Move 64-bit operand tests
1322 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1324 * po/Make-in: Add install-html target.
1325 * Makefile.am: Add install-html and install-html-recursive targets.
1326 * Makefile.in: Regenerate.
1327 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1328 * configure: Regenerate.
1329 * doc/Makefile.am: Add install-html and install-html-am targets.
1330 * doc/Makefile.in: Regenerate.
1332 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1334 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1337 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1338 Daniel Jacobowitz <dan@codesourcery.com>
1340 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1341 (GOTT_BASE, GOTT_INDEX): New.
1342 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1343 GOTT_INDEX when generating VxWorks PIC.
1344 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1345 use the generic *-*-vxworks* stanza instead.
1347 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1350 * frags.c (frag_offset_fixed_p): New function.
1351 * frags.h (frag_offset_fixed_p): Declare.
1352 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1353 (resolve_expression): Likewise.
1355 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1357 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1358 of the same length but different numbers of slots.
1360 2006-03-30 Andreas Schwab <schwab@suse.de>
1362 * configure.in: Fix help string for --enable-targets option.
1363 * configure: Regenerate.
1365 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1367 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1368 (m68k_ip): ... here. Use for all chips. Protect against buffer
1369 overrun and avoid excessive copying.
1371 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1372 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1373 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1374 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1375 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1376 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1377 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1378 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1379 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1380 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1381 (struct m68k_cpu): Change chip field to control_regs.
1382 (current_chip): Remove.
1383 (control_regs): New.
1384 (m68k_archs, m68k_extensions): Adjust.
1385 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1386 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1387 (find_cf_chip): Reimplement for new organization of cpu table.
1388 (select_control_regs): Remove.
1390 (struct save_opts): Save control regs, not chip.
1391 (s_save, s_restore): Adjust.
1392 (m68k_lookup_cpu): Give deprecated warning when necessary.
1393 (m68k_init_arch): Adjust.
1394 (md_show_usage): Adjust for new cpu table organization.
1396 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1398 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1399 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1400 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1402 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1403 (any_gotrel): New rule.
1404 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1405 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1407 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1408 (bfin_pic_ptr): New function.
1409 (md_pseudo_table): Add it for ".picptr".
1410 (OPTION_FDPIC): New macro.
1411 (md_longopts): Add -mfdpic.
1412 (md_parse_option): Handle it.
1413 (md_begin): Set BFD flags.
1414 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1415 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1417 * Makefile.am (bfin-parse.o): Update dependencies.
1418 (DEPTC_bfin_elf): Likewise.
1419 * Makefile.in: Regenerate.
1421 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1423 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1424 mcfemac instead of mcfmac.
1426 2006-03-23 Michael Matz <matz@suse.de>
1428 * config/tc-i386.c (type_names): Correct placement of 'static'.
1429 (reloc): Map some more relocs to their 64 bit counterpart when
1431 (output_insn): Work around breakage if DEBUG386 is defined.
1432 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1433 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1434 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1435 different from i386.
1436 (output_imm): Ditto.
1437 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1439 (md_convert_frag): Jumps can now be larger than 2GB away, error
1441 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1442 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1444 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1445 Daniel Jacobowitz <dan@codesourcery.com>
1446 Phil Edwards <phil@codesourcery.com>
1447 Zack Weinberg <zack@codesourcery.com>
1448 Mark Mitchell <mark@codesourcery.com>
1449 Nathan Sidwell <nathan@codesourcery.com>
1451 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1452 (md_begin): Complain about -G being used for PIC. Don't change
1453 the text, data and bss alignments on VxWorks.
1454 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1455 generating VxWorks PIC.
1456 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1457 (macro): Likewise, but do not treat la $25 specially for
1458 VxWorks PIC, and do not handle jal.
1459 (OPTION_MVXWORKS_PIC): New macro.
1460 (md_longopts): Add -mvxworks-pic.
1461 (md_parse_option): Don't complain about using PIC and -G together here.
1462 Handle OPTION_MVXWORKS_PIC.
1463 (md_estimate_size_before_relax): Always use the first relaxation
1464 sequence on VxWorks.
1465 * config/tc-mips.h (VXWORKS_PIC): New.
1467 2006-03-21 Paul Brook <paul@codesourcery.com>
1469 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1471 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1473 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1474 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1475 (get_loop_align_size): New.
1476 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1477 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1478 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1479 (get_noop_aligned_address): Use get_loop_align_size.
1480 (get_aligned_diff): Likewise.
1482 2006-03-21 Paul Brook <paul@codesourcery.com>
1484 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1486 2006-03-20 Paul Brook <paul@codesourcery.com>
1488 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1489 (do_t_branch): Encode branches inside IT blocks as unconditional.
1490 (do_t_cps): New function.
1491 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1492 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1493 (opcode_lookup): Allow conditional suffixes on all instructions in
1495 (md_assemble): Advance condexec state before checking for errors.
1496 (insns): Use do_t_cps.
1498 2006-03-20 Paul Brook <paul@codesourcery.com>
1500 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1501 outputting the insn.
1503 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1505 * config/tc-vax.c: Update copyright year.
1506 * config/tc-vax.h: Likewise.
1508 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1510 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1512 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1514 2006-03-17 Paul Brook <paul@codesourcery.com>
1516 * config/tc-arm.c (insns): Add ldm and stm.
1518 2006-03-17 Ben Elliston <bje@au.ibm.com>
1521 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1523 2006-03-16 Paul Brook <paul@codesourcery.com>
1525 * config/tc-arm.c (insns): Add "svc".
1527 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1529 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1530 flag and avoid double underscore prefixes.
1532 2006-03-10 Paul Brook <paul@codesourcery.com>
1534 * config/tc-arm.c (md_begin): Handle EABIv5.
1535 (arm_eabis): Add EF_ARM_EABI_VER5.
1536 * doc/c-arm.texi: Document -meabi=5.
1538 2006-03-10 Ben Elliston <bje@au.ibm.com>
1540 * app.c (do_scrub_chars): Simplify string handling.
1542 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1543 Daniel Jacobowitz <dan@codesourcery.com>
1544 Zack Weinberg <zack@codesourcery.com>
1545 Nathan Sidwell <nathan@codesourcery.com>
1546 Paul Brook <paul@codesourcery.com>
1547 Ricardo Anguiano <anguiano@codesourcery.com>
1548 Phil Edwards <phil@codesourcery.com>
1550 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1551 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1553 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1554 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1555 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1557 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1559 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1560 even when using the text-section-literals option.
1562 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1564 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1566 (m68k_ip): <case 'J'> Check we have some control regs.
1567 (md_parse_option): Allow raw arch switch.
1568 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1569 whether 68881 or cfloat was meant by -mfloat.
1570 (md_show_usage): Adjust extension display.
1571 (m68k_elf_final_processing): Adjust.
1573 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1575 * config/tc-avr.c (avr_mod_hash_value): New function.
1576 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1577 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1578 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1579 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1581 (tc_gen_reloc): Handle substractions of symbols, if possible do
1582 fixups, abort otherwise.
1583 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1584 tc_fix_adjustable): Define.
1586 2006-03-02 James E Wilson <wilson@specifix.com>
1588 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1589 change the template, then clear md.slot[curr].end_of_insn_group.
1591 2006-02-28 Jan Beulich <jbeulich@novell.com>
1593 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1595 2006-02-28 Jan Beulich <jbeulich@novell.com>
1598 * macro.c (getstring): Don't treat parentheses special anymore.
1599 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1600 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1603 2006-02-28 Mat <mat@csail.mit.edu>
1605 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1607 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1609 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1611 (CFI_signal_frame): Define.
1612 (cfi_pseudo_table): Add .cfi_signal_frame.
1613 (dot_cfi): Handle CFI_signal_frame.
1614 (output_cie): Handle cie->signal_frame.
1615 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1616 different. Copy signal_frame from FDE to newly created CIE.
1617 * doc/as.texinfo: Document .cfi_signal_frame.
1619 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1621 * doc/Makefile.am: Add html target.
1622 * doc/Makefile.in: Regenerate.
1623 * po/Make-in: Add html target.
1625 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1627 * config/tc-i386.c (output_insn): Support Intel Merom New
1630 * config/tc-i386.h (CpuMNI): New.
1631 (CpuUnknownFlags): Add CpuMNI.
1633 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1635 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1636 (hpriv_reg_table): New table for hyperprivileged registers.
1637 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1640 2006-02-24 DJ Delorie <dj@redhat.com>
1642 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1643 (tc_gen_reloc): Don't define.
1644 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1645 (OPTION_LINKRELAX): New.
1646 (md_longopts): Add it.
1648 (md_parse_options): Set it.
1649 (md_assemble): Emit relaxation relocs as needed.
1650 (md_convert_frag): Emit relaxation relocs as needed.
1651 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1652 (m32c_apply_fix): New.
1653 (tc_gen_reloc): New.
1654 (m32c_force_relocation): Force out jump relocs when relaxing.
1655 (m32c_fix_adjustable): Return false if relaxing.
1657 2006-02-24 Paul Brook <paul@codesourcery.com>
1659 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1660 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1661 (struct asm_barrier_opt): Define.
1662 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1663 (parse_psr): Accept V7M psr names.
1664 (parse_barrier): New function.
1665 (enum operand_parse_code): Add OP_oBARRIER.
1666 (parse_operands): Implement OP_oBARRIER.
1667 (do_barrier): New function.
1668 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1669 (do_t_cpsi): Add V7M restrictions.
1670 (do_t_mrs, do_t_msr): Validate V7M variants.
1671 (md_assemble): Check for NULL variants.
1672 (v7m_psrs, barrier_opt_names): New tables.
1673 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1674 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1675 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1676 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1677 (struct cpu_arch_ver_table): Define.
1678 (cpu_arch_ver): New.
1679 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1680 Tag_CPU_arch_profile.
1681 * doc/c-arm.texi: Document new cpu and arch options.
1683 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1685 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1687 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1689 * config/tc-ia64.c: Update copyright years.
1691 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1693 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1696 2005-02-22 Paul Brook <paul@codesourcery.com>
1698 * config/tc-arm.c (do_pld): Remove incorrect write to
1700 (encode_thumb32_addr_mode): Use correct operand.
1702 2006-02-21 Paul Brook <paul@codesourcery.com>
1704 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1706 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1707 Anil Paranjape <anilp1@kpitcummins.com>
1708 Shilin Shakti <shilins@kpitcummins.com>
1710 * Makefile.am: Add xc16x related entry.
1711 * Makefile.in: Regenerate.
1712 * configure.in: Added xc16x related entry.
1713 * configure: Regenerate.
1714 * config/tc-xc16x.h: New file
1715 * config/tc-xc16x.c: New file
1716 * doc/c-xc16x.texi: New file for xc16x
1717 * doc/all.texi: Entry for xc16x
1718 * doc/Makefile.texi: Added c-xc16x.texi
1719 * NEWS: Announce the support for the new target.
1721 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1723 * configure.tgt: set emulation for mips-*-netbsd*
1725 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1727 * config.in: Rebuilt.
1729 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1731 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1732 from 1, not 0, in error messages.
1733 (md_assemble): Simplify special-case check for ENTRY instructions.
1734 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1735 operand in error message.
1737 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1739 * configure.tgt (arm-*-linux-gnueabi*): Change to
1742 2006-02-10 Nick Clifton <nickc@redhat.com>
1744 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1745 32-bit value is propagated into the upper bits of a 64-bit long.
1747 * config/tc-arc.c (init_opcode_tables): Fix cast.
1748 (arc_extoper, md_operand): Likewise.
1750 2006-02-09 David Heine <dlheine@tensilica.com>
1752 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1753 each relaxation step.
1755 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1757 * configure.in (CHECK_DECLS): Add vsnprintf.
1758 * configure: Regenerate.
1759 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1760 include/declare here, but...
1761 * as.h: Move code detecting VARARGS idiom to the top.
1762 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1763 (vsnprintf): Declare if not already declared.
1765 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1767 * as.c (close_output_file): New.
1768 (main): Register close_output_file with xatexit before
1769 dump_statistics. Don't call output_file_close.
1771 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1773 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1774 mcf5329_control_regs): New.
1775 (not_current_architecture, selected_arch, selected_cpu): New.
1776 (m68k_archs, m68k_extensions): New.
1777 (archs): Renamed to ...
1778 (m68k_cpus): ... here. Adjust.
1780 (md_pseudo_table): Add arch and cpu directives.
1781 (find_cf_chip, m68k_ip): Adjust table scanning.
1782 (no_68851, no_68881): Remove.
1783 (md_assemble): Lazily initialize.
1784 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1785 (md_init_after_args): Move functionality to m68k_init_arch.
1786 (mri_chip): Adjust table scanning.
1787 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1788 options with saner parsing.
1789 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1790 m68k_init_arch): New.
1791 (s_m68k_cpu, s_m68k_arch): New.
1792 (md_show_usage): Adjust.
1793 (m68k_elf_final_processing): Set CF EF flags.
1794 * config/tc-m68k.h (m68k_init_after_args): Remove.
1795 (tc_init_after_args): Remove.
1796 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1797 (M68k-Directives): Document .arch and .cpu directives.
1799 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1801 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1802 synonyms for equ and defl.
1803 (z80_cons_fix_new): New function.
1804 (emit_byte): Disallow relative jumps to absolute locations.
1805 (emit_data): Only handle defb, prototype changed, because defb is
1806 now handled as pseudo-op rather than an instruction.
1807 (instab): Entries for defb,defw,db,dw moved from here...
1808 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1809 Add entries for def24,def32,d24,d32.
1810 (md_assemble): Improved error handling.
1811 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1812 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1813 (z80_cons_fix_new): Declare.
1814 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1815 (def24,d24,def32,d32): New pseudo-ops.
1817 2006-02-02 Paul Brook <paul@codesourcery.com>
1819 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1821 2005-02-02 Paul Brook <paul@codesourcery.com>
1823 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1824 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1825 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1826 T2_OPCODE_RSB): Define.
1827 (thumb32_negate_data_op): New function.
1828 (md_apply_fix): Use it.
1830 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1832 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1834 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1835 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1837 (relaxation_requirements): Add pfinish_frag argument and use it to
1838 replace setting tinsn->record_fix fields.
1839 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1840 and vinsn_to_insnbuf. Remove references to record_fix and
1841 slot_sub_symbols fields.
1842 (xtensa_mark_narrow_branches): Delete unused code.
1843 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1845 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1847 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1848 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1849 of the record_fix field. Simplify error messages for unexpected
1851 (set_expr_symbol_offset_diff): Delete.
1853 2006-01-31 Paul Brook <paul@codesourcery.com>
1855 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1857 2006-01-31 Paul Brook <paul@codesourcery.com>
1858 Richard Earnshaw <rearnsha@arm.com>
1860 * config/tc-arm.c: Use arm_feature_set.
1861 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1862 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1863 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1866 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1867 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1868 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1869 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1871 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1872 (arm_opts): Move old cpu/arch options from here...
1873 (arm_legacy_opts): ... to here.
1874 (md_parse_option): Search arm_legacy_opts.
1875 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1876 (arm_float_abis, arm_eabis): Make const.
1878 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1880 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1882 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1884 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1885 in load immediate intruction.
1887 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1889 * config/bfin-parse.y (value_match): Use correct conversion
1890 specifications in template string for __FILE__ and __LINE__.
1894 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1896 Introduce TLS descriptors for i386 and x86_64.
1897 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1898 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1899 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1900 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1901 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1903 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1904 (lex_got): Handle @tlsdesc and @tlscall.
1905 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1907 2006-01-11 Nick Clifton <nickc@redhat.com>
1909 Fixes for building on 64-bit hosts:
1910 * config/tc-avr.c (mod_index): New union to allow conversion
1911 between pointers and integers.
1912 (md_begin, avr_ldi_expression): Use it.
1913 * config/tc-i370.c (md_assemble): Add cast for argument to print
1915 * config/tc-tic54x.c (subsym_substitute): Likewise.
1916 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1917 opindex field of fr_cgen structure into a pointer so that it can
1918 be stored in a frag.
1919 * config/tc-mn10300.c (md_assemble): Likewise.
1920 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1922 * config/tc-v850.c: Replace uses of (int) casts with correct
1925 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1928 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1930 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1933 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1934 a local-label reference.
1936 For older changes see ChangeLog-2005
1942 version-control: never