1 2006-05-25 Jie Zhang <jie.zhang@analog.com>
3 * config/bfin-parse.y (asm_1): Better check and deal with
4 vector and scalar Multiply 16-Bit Operands instructions.
6 2006-05-24 Nick Clifton <nickc@redhat.com>
8 * config/tc-hppa.c: Convert to ISO C90 format.
9 * config/tc-hppa.h: Likewise.
11 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
12 Randolph Chung <randolph@tausq.org>
14 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
15 is_tls_ieoff, is_tls_leoff): Define.
16 (fix_new_hppa): Handle TLS.
17 (cons_fix_new_hppa): Likewise.
19 (md_apply_fix): Handle TLS relocs.
20 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
22 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
24 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
26 2006-05-23 Thiemo Seufer <ths@mips.com>
27 David Ung <davidu@mips.com>
28 Nigel Stephens <nigel@mips.com>
31 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
32 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
33 ISA_HAS_MXHC1): New macros.
34 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
35 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
36 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
37 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
38 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
39 (mips_after_parse_args): Change default handling of float register
40 size to account for 32bit code with 64bit FP. Better sanity checking
41 of ISA/ASE/ABI option combinations.
42 (s_mipsset): Support switching of GPR and FPR sizes via
43 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
45 (mips_elf_final_processing): We should record the use of 64bit FP
46 registers in 32bit code but we don't, because ELF header flags are
48 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
49 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
50 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
51 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
52 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
53 missing -march options. Document .set arch=CPU. Move .set smartmips
54 to ASE page. Use @code for .set FOO examples.
57 2006-05-23 Jie Zhang <jie.zhang@analog.com>
59 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
62 2006-05-23 Jie Zhang <jie.zhang@analog.com>
64 * config/bfin-defs.h (bfin_equals): Remove declaration.
65 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
66 * config/tc-bfin.c (bfin_name_is_register): Remove.
67 (bfin_equals): Remove.
68 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
69 (bfin_name_is_register): Remove declaration.
71 2006-05-19 Thiemo Seufer <ths@mips.com>
72 Nigel Stephens <nigel@mips.com>
74 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
75 (mips_oddfpreg_ok): New function.
78 2006-05-19 Thiemo Seufer <ths@mips.com>
79 David Ung <davidu@mips.com>
81 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
82 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
83 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
84 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
85 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
86 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
87 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
88 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
89 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
90 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
91 reg_names_o32, reg_names_n32n64): Define register classes.
92 (reg_lookup): New function, use register classes.
93 (md_begin): Reserve register names in the symbol table. Simplify
95 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
97 (mips16_ip): Use reg_lookup.
98 (tc_get_register): Likewise.
99 (tc_mips_regname_to_dw2regnum): New function.
101 2006-05-19 Thiemo Seufer <ths@mips.com>
103 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
104 Un-constify string argument.
105 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
107 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
109 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
111 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
113 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
115 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
118 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
120 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
121 cfloat/m68881 to correct architecture before using it.
123 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
125 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
128 2006-05-15 Paul Brook <paul@codesourcery.com>
130 * config/tc-arm.c (arm_adjust_symtab): Use
131 bfd_is_arm_special_symbol_name.
133 2006-05-15 Bob Wilson <bob.wilson@acm.org>
135 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
136 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
137 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
138 Handle errors from calls to xtensa_opcode_is_* functions.
140 2006-05-14 Thiemo Seufer <ths@mips.com>
142 * config/tc-mips.c (macro_build): Test for currently active
144 (mips16_ip): Reject invalid opcodes.
146 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
148 * doc/as.texinfo: Rename "Index" to "AS Index",
149 and "ABORT" to "ABORT (COFF)".
151 2006-05-11 Paul Brook <paul@codesourcery.com>
153 * config/tc-arm.c (parse_half): New function.
154 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
155 (parse_operands): Ditto.
156 (do_mov16): Reject invalid relocations.
157 (do_t_mov16): Ditto. Use Thumb reloc numbers.
158 (insns): Replace Iffff with HALF.
159 (md_apply_fix): Add MOVW and MOVT relocs.
160 (tc_gen_reloc): Ditto.
161 * doc/c-arm.texi: Document relocation operators
163 2006-05-11 Paul Brook <paul@codesourcery.com>
165 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
167 2006-05-11 Thiemo Seufer <ths@mips.com>
169 * config/tc-mips.c (append_insn): Don't check the range of j or
172 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
174 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
175 relocs against external symbols for WinCE targets.
176 (md_apply_fix): Likewise.
178 2006-05-09 David Ung <davidu@mips.com>
180 * config/tc-mips.c (append_insn): Only warn about an out-of-range
183 2006-05-09 Nick Clifton <nickc@redhat.com>
185 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
186 against symbols which are not going to be placed into the symbol
189 2006-05-09 Ben Elliston <bje@au.ibm.com>
191 * expr.c (operand): Remove `if (0 && ..)' statement and
192 subsequently unused target_op label. Collapse `if (1 || ..)'
194 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
195 separately above the switch.
197 2006-05-08 Nick Clifton <nickc@redhat.com>
200 * config/tc-msp430.c (line_separator_character): Define as |.
202 2006-05-08 Thiemo Seufer <ths@mips.com>
203 Nigel Stephens <nigel@mips.com>
204 David Ung <davidu@mips.com>
206 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
207 (mips_opts): Likewise.
208 (file_ase_smartmips): New variable.
209 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
210 (macro_build): Handle SmartMIPS instructions.
212 (md_longopts): Add argument handling for smartmips.
213 (md_parse_options, mips_after_parse_args): Likewise.
214 (s_mipsset): Add .set smartmips support.
215 (md_show_usage): Document -msmartmips/-mno-smartmips.
216 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
218 * doc/c-mips.texi: Likewise.
220 2006-05-08 Alan Modra <amodra@bigpond.net.au>
222 * write.c (relax_segment): Add pass count arg. Don't error on
223 negative org/space on first two passes.
224 (relax_seg_info): New struct.
225 (relax_seg, write_object_file): Adjust.
226 * write.h (relax_segment): Update prototype.
228 2006-05-05 Julian Brown <julian@codesourcery.com>
230 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
232 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
233 architecture version checks.
234 (insns): Allow overlapping instructions to be used in VFP mode.
236 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
239 * config/obj-elf.c (obj_elf_change_section): Allow user
240 specified SHF_ALPHA_GPREL.
242 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
244 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
245 for PMEM related expressions.
247 2006-05-05 Nick Clifton <nickc@redhat.com>
250 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
251 insertion of a directory separator character into a string at a
252 given offset. Uses heuristics to decide when to use a backslash
253 character rather than a forward-slash character.
254 (dwarf2_directive_loc): Use the macro.
255 (out_debug_info): Likewise.
257 2006-05-05 Thiemo Seufer <ths@mips.com>
258 David Ung <davidu@mips.com>
260 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
262 (macro): Add new case M_CACHE_AB.
264 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
266 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
267 (opcode_lookup): Issue a warning for opcode with
268 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
269 identical to OT_cinfix3.
270 (TxC3w, TC3w, tC3w): New.
271 (insns): Use tC3w and TC3w for comparison instructions with
274 2006-05-04 Alan Modra <amodra@bigpond.net.au>
276 * subsegs.h (struct frchain): Delete frch_seg.
277 (frchain_root): Delete.
278 (seg_info): Define as macro.
279 * subsegs.c (frchain_root): Delete.
280 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
281 (subsegs_begin, subseg_change): Adjust for above.
282 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
283 rather than to one big list.
284 (subseg_get): Don't special case abs, und sections.
285 (subseg_new, subseg_force_new): Don't set frchainP here.
287 (subsegs_print_statistics): Adjust frag chain control list traversal.
288 * debug.c (dmp_frags): Likewise.
289 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
290 at frchain_root. Make use of known frchain ordering.
291 (last_frag_for_seg): Likewise.
292 (get_frag_fix): Likewise. Add seg param.
293 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
294 * write.c (chain_frchains_together_1): Adjust for struct frchain.
295 (SUB_SEGMENT_ALIGN): Likewise.
296 (subsegs_finish): Adjust frchain list traversal.
297 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
298 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
299 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
300 (xtensa_fix_b_j_loop_end_frags): Likewise.
301 (xtensa_fix_close_loop_end_frags): Likewise.
302 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
303 (retrieve_segment_info): Delete frch_seg initialisation.
305 2006-05-03 Alan Modra <amodra@bigpond.net.au>
307 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
308 * config/obj-elf.h (obj_sec_set_private_data): Delete.
309 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
310 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
312 2006-05-02 Joseph Myers <joseph@codesourcery.com>
314 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
316 (md_apply_fix3): Multiply offset by 4 here for
317 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
319 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
320 Jan Beulich <jbeulich@novell.com>
322 * config/tc-i386.c (output_invalid_buf): Change size for
324 * config/tc-tic30.c (output_invalid_buf): Likewise.
326 * config/tc-i386.c (output_invalid): Cast none-ascii char to
328 * config/tc-tic30.c (output_invalid): Likewise.
330 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
332 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
333 (TEXI2POD): Use AM_MAKEINFOFLAGS.
334 (asconfig.texi): Don't set top_srcdir.
335 * doc/as.texinfo: Don't use top_srcdir.
336 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
338 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
340 * config/tc-i386.c (output_invalid_buf): Change size to 16.
341 * config/tc-tic30.c (output_invalid_buf): Likewise.
343 * config/tc-i386.c (output_invalid): Use snprintf instead of
345 * config/tc-ia64.c (declare_register_set): Likewise.
346 (emit_one_bundle): Likewise.
347 (check_dependencies): Likewise.
348 * config/tc-tic30.c (output_invalid): Likewise.
350 2006-05-02 Paul Brook <paul@codesourcery.com>
352 * config/tc-arm.c (arm_optimize_expr): New function.
353 * config/tc-arm.h (md_optimize_expr): Define
354 (arm_optimize_expr): Add prototype.
355 (TC_FORCE_RELOCATION_SUB_SAME): Define.
357 2006-05-02 Ben Elliston <bje@au.ibm.com>
359 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
362 * sb.h (sb_list_vector): Move to sb.c.
363 * sb.c (free_list): Use type of sb_list_vector directly.
364 (sb_build): Fix off-by-one error in assertion about `size'.
366 2006-05-01 Ben Elliston <bje@au.ibm.com>
368 * listing.c (listing_listing): Remove useless loop.
369 * macro.c (macro_expand): Remove is_positional local variable.
370 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
371 and simplify surrounding expressions, where possible.
372 (assign_symbol): Likewise.
373 (s_weakref): Likewise.
374 * symbols.c (colon): Likewise.
376 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
378 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
380 2006-04-30 Thiemo Seufer <ths@mips.com>
381 David Ung <davidu@mips.com>
383 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
384 (mips_immed): New table that records various handling of udi
385 instruction patterns.
386 (mips_ip): Adds udi handling.
388 2006-04-28 Alan Modra <amodra@bigpond.net.au>
390 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
391 of list rather than beginning.
393 2006-04-26 Julian Brown <julian@codesourcery.com>
395 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
396 (is_quarter_float): Rename from above. Simplify slightly.
397 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
399 (parse_neon_mov): Parse floating-point constants.
400 (neon_qfloat_bits): Fix encoding.
401 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
402 preference to integer encoding when using the F32 type.
404 2006-04-26 Julian Brown <julian@codesourcery.com>
406 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
407 zero-initialising structures containing it will lead to invalid types).
408 (arm_it): Add vectype to each operand.
409 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
411 (neon_typed_alias): New structure. Extra information for typed
413 (reg_entry): Add neon type info field.
414 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
415 Break out alternative syntax for coprocessor registers, etc. into...
416 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
417 out from arm_reg_parse.
418 (parse_neon_type): Move. Return SUCCESS/FAIL.
419 (first_error): New function. Call to ensure first error which occurs is
421 (parse_neon_operand_type): Parse exactly one type.
422 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
423 (parse_typed_reg_or_scalar): New function. Handle core of both
424 arm_typed_reg_parse and parse_scalar.
425 (arm_typed_reg_parse): Parse a register with an optional type.
426 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
428 (parse_scalar): Parse a Neon scalar with optional type.
429 (parse_reg_list): Use first_error.
430 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
431 (neon_alias_types_same): New function. Return true if two (alias) types
433 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
435 (insert_reg_alias): Return new reg_entry not void.
436 (insert_neon_reg_alias): New function. Insert type/index information as
437 well as register for alias.
438 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
439 make typed register aliases accordingly.
440 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
442 (s_unreq): Delete type information if present.
443 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
444 (s_arm_unwind_save_mmxwcg): Likewise.
445 (s_arm_unwind_movsp): Likewise.
446 (s_arm_unwind_setfp): Likewise.
447 (parse_shift): Likewise.
448 (parse_shifter_operand): Likewise.
449 (parse_address): Likewise.
450 (parse_tb): Likewise.
451 (tc_arm_regname_to_dw2regnum): Likewise.
452 (md_pseudo_table): Add dn, qn.
453 (parse_neon_mov): Handle typed operands.
454 (parse_operands): Likewise.
455 (neon_type_mask): Add N_SIZ.
456 (N_ALLMODS): New macro.
457 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
458 (el_type_of_type_chk): Add some safeguards.
459 (modify_types_allowed): Fix logic bug.
460 (neon_check_type): Handle operands with types.
461 (neon_three_same): Remove redundant optional arg handling.
462 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
463 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
464 (do_neon_step): Adjust accordingly.
465 (neon_cmode_for_logic_imm): Use first_error.
466 (do_neon_bitfield): Call neon_check_type.
467 (neon_dyadic): Rename to...
468 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
469 to allow modification of type of the destination.
470 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
471 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
472 (do_neon_compare): Make destination be an untyped bitfield.
473 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
474 (neon_mul_mac): Return early in case of errors.
475 (neon_move_immediate): Use first_error.
476 (neon_mac_reg_scalar_long): Fix type to include scalar.
477 (do_neon_dup): Likewise.
478 (do_neon_mov): Likewise (in several places).
479 (do_neon_tbl_tbx): Fix type.
480 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
481 (do_neon_ld_dup): Exit early in case of errors and/or use
483 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
484 Handle .dn/.qn directives.
485 (REGDEF): Add zero for reg_entry neon field.
487 2006-04-26 Julian Brown <julian@codesourcery.com>
489 * config/tc-arm.c (limits.h): Include.
490 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
491 (fpu_vfp_v3_or_neon_ext): Declare constants.
492 (neon_el_type): New enumeration of types for Neon vector elements.
493 (neon_type_el): New struct. Define type and size of a vector element.
494 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
496 (neon_type): Define struct. The type of an instruction.
497 (arm_it): Add 'vectype' for the current instruction.
498 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
499 (vfp_sp_reg_pos): Rename to...
500 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
502 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
503 (Neon D or Q register).
504 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
506 (GE_OPT_PREFIX_BIG): Define constant, for use in...
507 (my_get_expression): Allow above constant as argument to accept
508 64-bit constants with optional prefix.
509 (arm_reg_parse): Add extra argument to return the specific type of
510 register in when either a D or Q register (REG_TYPE_NDQ) is
511 requested. Can be NULL.
512 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
513 (parse_reg_list): Update for new arm_reg_parse args.
514 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
515 (parse_neon_el_struct_list): New function. Parse element/structure
516 register lists for VLD<n>/VST<n> instructions.
517 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
518 (s_arm_unwind_save_mmxwr): Likewise.
519 (s_arm_unwind_save_mmxwcg): Likewise.
520 (s_arm_unwind_movsp): Likewise.
521 (s_arm_unwind_setfp): Likewise.
522 (parse_big_immediate): New function. Parse an immediate, which may be
523 64 bits wide. Put results in inst.operands[i].
524 (parse_shift): Update for new arm_reg_parse args.
525 (parse_address): Likewise. Add parsing of alignment specifiers.
526 (parse_neon_mov): Parse the operands of a VMOV instruction.
527 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
528 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
529 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
530 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
531 (parse_operands): Handle new codes above.
532 (encode_arm_vfp_sp_reg): Rename to...
533 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
534 selected VFP version only supports D0-D15.
535 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
536 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
537 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
538 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
539 encode_arm_vfp_reg name, and allow 32 D regs.
540 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
541 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
543 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
544 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
545 constant-load and conversion insns introduced with VFPv3.
546 (neon_tab_entry): New struct.
547 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
548 those which are the targets of pseudo-instructions.
549 (neon_opc): Enumerate opcodes, use as indices into...
550 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
551 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
552 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
553 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
555 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
557 (neon_type_mask): New. Compact type representation for type checking.
558 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
559 permitted type combinations.
560 (N_IGNORE_TYPE): New macro.
561 (neon_check_shape): New function. Check an instruction shape for
562 multiple alternatives. Return the specific shape for the current
564 (neon_modify_type_size): New function. Modify a vector type and size,
565 depending on the bit mask in argument 1.
566 (neon_type_promote): New function. Convert a given "key" type (of an
567 operand) into the correct type for a different operand, based on a bit
569 (type_chk_of_el_type): New function. Convert a type and size into the
570 compact representation used for type checking.
571 (el_type_of_type_ckh): New function. Reverse of above (only when a
572 single bit is set in the bit mask).
573 (modify_types_allowed): New function. Alter a mask of allowed types
574 based on a bit mask of modifications.
575 (neon_check_type): New function. Check the type of the current
576 instruction against the variable argument list. The "key" type of the
577 instruction is returned.
578 (neon_dp_fixup): New function. Fill in and modify instruction bits for
579 a Neon data-processing instruction depending on whether we're in ARM
580 mode or Thumb-2 mode.
581 (neon_logbits): New function.
582 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
583 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
584 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
585 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
586 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
587 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
588 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
589 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
590 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
591 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
592 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
593 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
594 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
595 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
596 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
597 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
598 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
599 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
600 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
601 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
602 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
603 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
604 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
605 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
606 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
608 (parse_neon_type): New function. Parse Neon type specifier.
609 (opcode_lookup): Allow parsing of Neon type specifiers.
610 (REGNUM2, REGSETH, REGSET2): New macros.
611 (reg_names): Add new VFPv3 and Neon registers.
612 (NUF, nUF, NCE, nCE): New macros for opcode table.
613 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
614 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
615 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
616 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
617 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
618 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
619 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
620 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
621 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
622 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
623 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
624 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
625 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
626 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
628 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
629 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
630 (arm_option_cpu_value): Add vfp3 and neon.
631 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
634 2006-04-25 Bob Wilson <bob.wilson@acm.org>
636 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
637 syntax instead of hardcoded opcodes with ".w18" suffixes.
638 (wide_branch_opcode): New.
639 (build_transition): Use it to check for wide branch opcodes with
640 either ".w18" or ".w15" suffixes.
642 2006-04-25 Bob Wilson <bob.wilson@acm.org>
644 * config/tc-xtensa.c (xtensa_create_literal_symbol,
645 xg_assemble_literal, xg_assemble_literal_space): Do not set the
646 frag's is_literal flag.
648 2006-04-25 Bob Wilson <bob.wilson@acm.org>
650 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
652 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
654 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
655 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
656 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
657 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
658 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
660 2005-04-20 Paul Brook <paul@codesourcery.com>
662 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
664 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
666 2006-04-19 Alan Modra <amodra@bigpond.net.au>
668 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
669 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
670 Make some cpus unsupported on ELF. Run "make dep-am".
671 * Makefile.in: Regenerate.
673 2006-04-19 Alan Modra <amodra@bigpond.net.au>
675 * configure.in (--enable-targets): Indent help message.
676 * configure: Regenerate.
678 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
681 * config/tc-i386.c (i386_immediate): Check illegal immediate
684 2006-04-18 Alan Modra <amodra@bigpond.net.au>
686 * config/tc-i386.c: Formatting.
687 (output_disp, output_imm): ISO C90 params.
689 * frags.c (frag_offset_fixed_p): Constify args.
690 * frags.h (frag_offset_fixed_p): Ditto.
692 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
693 (COFF_MAGIC): Delete.
695 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
697 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
699 * po/POTFILES.in: Regenerated.
701 2006-04-16 Mark Mitchell <mark@codesourcery.com>
703 * doc/as.texinfo: Mention that some .type syntaxes are not
704 supported on all architectures.
706 2006-04-14 Sterling Augustine <sterling@tensilica.com>
708 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
709 instructions when such transformations have been disabled.
711 2006-04-10 Sterling Augustine <sterling@tensilica.com>
713 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
714 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
715 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
716 decoding the loop instructions. Remove current_offset variable.
717 (xtensa_fix_short_loop_frags): Likewise.
718 (min_bytes_to_other_loop_end): Remove current_offset argument.
720 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
722 * config/tc-z80.c (z80_optimize_expr): Removed.
723 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
725 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
727 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
728 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
729 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
730 atmega644, atmega329, atmega3290, atmega649, atmega6490,
731 atmega406, atmega640, atmega1280, atmega1281, at90can32,
732 at90can64, at90usb646, at90usb647, at90usb1286 and
734 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
736 2006-04-07 Paul Brook <paul@codesourcery.com>
738 * config/tc-arm.c (parse_operands): Set default error message.
740 2006-04-07 Paul Brook <paul@codesourcery.com>
742 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
744 2006-04-07 Paul Brook <paul@codesourcery.com>
746 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
748 2006-04-07 Paul Brook <paul@codesourcery.com>
750 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
751 (move_or_literal_pool): Handle Thumb-2 instructions.
752 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
754 2006-04-07 Alan Modra <amodra@bigpond.net.au>
757 * config/tc-i386.c (match_template): Move 64-bit operand tests
760 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
762 * po/Make-in: Add install-html target.
763 * Makefile.am: Add install-html and install-html-recursive targets.
764 * Makefile.in: Regenerate.
765 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
766 * configure: Regenerate.
767 * doc/Makefile.am: Add install-html and install-html-am targets.
768 * doc/Makefile.in: Regenerate.
770 2006-04-06 Alan Modra <amodra@bigpond.net.au>
772 * frags.c (frag_offset_fixed_p): Reinitialise offset before
775 2006-04-05 Richard Sandiford <richard@codesourcery.com>
776 Daniel Jacobowitz <dan@codesourcery.com>
778 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
779 (GOTT_BASE, GOTT_INDEX): New.
780 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
781 GOTT_INDEX when generating VxWorks PIC.
782 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
783 use the generic *-*-vxworks* stanza instead.
785 2006-04-04 Alan Modra <amodra@bigpond.net.au>
788 * frags.c (frag_offset_fixed_p): New function.
789 * frags.h (frag_offset_fixed_p): Declare.
790 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
791 (resolve_expression): Likewise.
793 2006-04-03 Sterling Augustine <sterling@tensilica.com>
795 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
796 of the same length but different numbers of slots.
798 2006-03-30 Andreas Schwab <schwab@suse.de>
800 * configure.in: Fix help string for --enable-targets option.
801 * configure: Regenerate.
803 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
805 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
806 (m68k_ip): ... here. Use for all chips. Protect against buffer
807 overrun and avoid excessive copying.
809 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
810 m68020_control_regs, m68040_control_regs, m68060_control_regs,
811 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
812 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
813 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
814 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
815 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
816 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
817 mcf5282_ctrl, mcfv4e_ctrl): ... these.
818 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
819 (struct m68k_cpu): Change chip field to control_regs.
820 (current_chip): Remove.
822 (m68k_archs, m68k_extensions): Adjust.
823 (m68k_cpus): Reorder to be in cpu number order. Adjust.
824 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
825 (find_cf_chip): Reimplement for new organization of cpu table.
826 (select_control_regs): Remove.
828 (struct save_opts): Save control regs, not chip.
829 (s_save, s_restore): Adjust.
830 (m68k_lookup_cpu): Give deprecated warning when necessary.
831 (m68k_init_arch): Adjust.
832 (md_show_usage): Adjust for new cpu table organization.
834 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
836 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
837 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
838 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
840 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
841 (any_gotrel): New rule.
842 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
843 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
845 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
846 (bfin_pic_ptr): New function.
847 (md_pseudo_table): Add it for ".picptr".
848 (OPTION_FDPIC): New macro.
849 (md_longopts): Add -mfdpic.
850 (md_parse_option): Handle it.
851 (md_begin): Set BFD flags.
852 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
853 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
855 * Makefile.am (bfin-parse.o): Update dependencies.
856 (DEPTC_bfin_elf): Likewise.
857 * Makefile.in: Regenerate.
859 2006-03-25 Richard Sandiford <richard@codesourcery.com>
861 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
862 mcfemac instead of mcfmac.
864 2006-03-23 Michael Matz <matz@suse.de>
866 * config/tc-i386.c (type_names): Correct placement of 'static'.
867 (reloc): Map some more relocs to their 64 bit counterpart when
869 (output_insn): Work around breakage if DEBUG386 is defined.
870 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
871 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
872 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
875 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
877 (md_convert_frag): Jumps can now be larger than 2GB away, error
879 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
880 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
882 2006-03-22 Richard Sandiford <richard@codesourcery.com>
883 Daniel Jacobowitz <dan@codesourcery.com>
884 Phil Edwards <phil@codesourcery.com>
885 Zack Weinberg <zack@codesourcery.com>
886 Mark Mitchell <mark@codesourcery.com>
887 Nathan Sidwell <nathan@codesourcery.com>
889 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
890 (md_begin): Complain about -G being used for PIC. Don't change
891 the text, data and bss alignments on VxWorks.
892 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
893 generating VxWorks PIC.
894 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
895 (macro): Likewise, but do not treat la $25 specially for
896 VxWorks PIC, and do not handle jal.
897 (OPTION_MVXWORKS_PIC): New macro.
898 (md_longopts): Add -mvxworks-pic.
899 (md_parse_option): Don't complain about using PIC and -G together here.
900 Handle OPTION_MVXWORKS_PIC.
901 (md_estimate_size_before_relax): Always use the first relaxation
903 * config/tc-mips.h (VXWORKS_PIC): New.
905 2006-03-21 Paul Brook <paul@codesourcery.com>
907 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
909 2006-03-21 Sterling Augustine <sterling@tensilica.com>
911 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
912 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
913 (get_loop_align_size): New.
914 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
915 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
916 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
917 (get_noop_aligned_address): Use get_loop_align_size.
918 (get_aligned_diff): Likewise.
920 2006-03-21 Paul Brook <paul@codesourcery.com>
922 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
924 2006-03-20 Paul Brook <paul@codesourcery.com>
926 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
927 (do_t_branch): Encode branches inside IT blocks as unconditional.
928 (do_t_cps): New function.
929 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
930 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
931 (opcode_lookup): Allow conditional suffixes on all instructions in
933 (md_assemble): Advance condexec state before checking for errors.
934 (insns): Use do_t_cps.
936 2006-03-20 Paul Brook <paul@codesourcery.com>
938 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
941 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
943 * config/tc-vax.c: Update copyright year.
944 * config/tc-vax.h: Likewise.
946 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
948 * config/tc-vax.c (md_chars_to_number): Used only locally, so
950 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
952 2006-03-17 Paul Brook <paul@codesourcery.com>
954 * config/tc-arm.c (insns): Add ldm and stm.
956 2006-03-17 Ben Elliston <bje@au.ibm.com>
959 * doc/as.texinfo (Ident): Document this directive more thoroughly.
961 2006-03-16 Paul Brook <paul@codesourcery.com>
963 * config/tc-arm.c (insns): Add "svc".
965 2006-03-13 Bob Wilson <bob.wilson@acm.org>
967 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
968 flag and avoid double underscore prefixes.
970 2006-03-10 Paul Brook <paul@codesourcery.com>
972 * config/tc-arm.c (md_begin): Handle EABIv5.
973 (arm_eabis): Add EF_ARM_EABI_VER5.
974 * doc/c-arm.texi: Document -meabi=5.
976 2006-03-10 Ben Elliston <bje@au.ibm.com>
978 * app.c (do_scrub_chars): Simplify string handling.
980 2006-03-07 Richard Sandiford <richard@codesourcery.com>
981 Daniel Jacobowitz <dan@codesourcery.com>
982 Zack Weinberg <zack@codesourcery.com>
983 Nathan Sidwell <nathan@codesourcery.com>
984 Paul Brook <paul@codesourcery.com>
985 Ricardo Anguiano <anguiano@codesourcery.com>
986 Phil Edwards <phil@codesourcery.com>
988 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
989 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
991 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
992 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
993 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
995 2006-03-06 Bob Wilson <bob.wilson@acm.org>
997 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
998 even when using the text-section-literals option.
1000 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1002 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1004 (m68k_ip): <case 'J'> Check we have some control regs.
1005 (md_parse_option): Allow raw arch switch.
1006 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1007 whether 68881 or cfloat was meant by -mfloat.
1008 (md_show_usage): Adjust extension display.
1009 (m68k_elf_final_processing): Adjust.
1011 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1013 * config/tc-avr.c (avr_mod_hash_value): New function.
1014 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1015 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1016 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1017 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1019 (tc_gen_reloc): Handle substractions of symbols, if possible do
1020 fixups, abort otherwise.
1021 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1022 tc_fix_adjustable): Define.
1024 2006-03-02 James E Wilson <wilson@specifix.com>
1026 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1027 change the template, then clear md.slot[curr].end_of_insn_group.
1029 2006-02-28 Jan Beulich <jbeulich@novell.com>
1031 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1033 2006-02-28 Jan Beulich <jbeulich@novell.com>
1036 * macro.c (getstring): Don't treat parentheses special anymore.
1037 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1038 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1041 2006-02-28 Mat <mat@csail.mit.edu>
1043 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1045 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1047 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1049 (CFI_signal_frame): Define.
1050 (cfi_pseudo_table): Add .cfi_signal_frame.
1051 (dot_cfi): Handle CFI_signal_frame.
1052 (output_cie): Handle cie->signal_frame.
1053 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1054 different. Copy signal_frame from FDE to newly created CIE.
1055 * doc/as.texinfo: Document .cfi_signal_frame.
1057 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1059 * doc/Makefile.am: Add html target.
1060 * doc/Makefile.in: Regenerate.
1061 * po/Make-in: Add html target.
1063 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1065 * config/tc-i386.c (output_insn): Support Intel Merom New
1068 * config/tc-i386.h (CpuMNI): New.
1069 (CpuUnknownFlags): Add CpuMNI.
1071 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1073 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1074 (hpriv_reg_table): New table for hyperprivileged registers.
1075 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1078 2006-02-24 DJ Delorie <dj@redhat.com>
1080 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1081 (tc_gen_reloc): Don't define.
1082 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1083 (OPTION_LINKRELAX): New.
1084 (md_longopts): Add it.
1086 (md_parse_options): Set it.
1087 (md_assemble): Emit relaxation relocs as needed.
1088 (md_convert_frag): Emit relaxation relocs as needed.
1089 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1090 (m32c_apply_fix): New.
1091 (tc_gen_reloc): New.
1092 (m32c_force_relocation): Force out jump relocs when relaxing.
1093 (m32c_fix_adjustable): Return false if relaxing.
1095 2006-02-24 Paul Brook <paul@codesourcery.com>
1097 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1098 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1099 (struct asm_barrier_opt): Define.
1100 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1101 (parse_psr): Accept V7M psr names.
1102 (parse_barrier): New function.
1103 (enum operand_parse_code): Add OP_oBARRIER.
1104 (parse_operands): Implement OP_oBARRIER.
1105 (do_barrier): New function.
1106 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1107 (do_t_cpsi): Add V7M restrictions.
1108 (do_t_mrs, do_t_msr): Validate V7M variants.
1109 (md_assemble): Check for NULL variants.
1110 (v7m_psrs, barrier_opt_names): New tables.
1111 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1112 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1113 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1114 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1115 (struct cpu_arch_ver_table): Define.
1116 (cpu_arch_ver): New.
1117 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1118 Tag_CPU_arch_profile.
1119 * doc/c-arm.texi: Document new cpu and arch options.
1121 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1123 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1125 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1127 * config/tc-ia64.c: Update copyright years.
1129 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1131 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1134 2005-02-22 Paul Brook <paul@codesourcery.com>
1136 * config/tc-arm.c (do_pld): Remove incorrect write to
1138 (encode_thumb32_addr_mode): Use correct operand.
1140 2006-02-21 Paul Brook <paul@codesourcery.com>
1142 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1144 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1145 Anil Paranjape <anilp1@kpitcummins.com>
1146 Shilin Shakti <shilins@kpitcummins.com>
1148 * Makefile.am: Add xc16x related entry.
1149 * Makefile.in: Regenerate.
1150 * configure.in: Added xc16x related entry.
1151 * configure: Regenerate.
1152 * config/tc-xc16x.h: New file
1153 * config/tc-xc16x.c: New file
1154 * doc/c-xc16x.texi: New file for xc16x
1155 * doc/all.texi: Entry for xc16x
1156 * doc/Makefile.texi: Added c-xc16x.texi
1157 * NEWS: Announce the support for the new target.
1159 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1161 * configure.tgt: set emulation for mips-*-netbsd*
1163 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1165 * config.in: Rebuilt.
1167 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1169 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1170 from 1, not 0, in error messages.
1171 (md_assemble): Simplify special-case check for ENTRY instructions.
1172 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1173 operand in error message.
1175 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1177 * configure.tgt (arm-*-linux-gnueabi*): Change to
1180 2006-02-10 Nick Clifton <nickc@redhat.com>
1182 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1183 32-bit value is propagated into the upper bits of a 64-bit long.
1185 * config/tc-arc.c (init_opcode_tables): Fix cast.
1186 (arc_extoper, md_operand): Likewise.
1188 2006-02-09 David Heine <dlheine@tensilica.com>
1190 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1191 each relaxation step.
1193 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1195 * configure.in (CHECK_DECLS): Add vsnprintf.
1196 * configure: Regenerate.
1197 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1198 include/declare here, but...
1199 * as.h: Move code detecting VARARGS idiom to the top.
1200 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1201 (vsnprintf): Declare if not already declared.
1203 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1205 * as.c (close_output_file): New.
1206 (main): Register close_output_file with xatexit before
1207 dump_statistics. Don't call output_file_close.
1209 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1211 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1212 mcf5329_control_regs): New.
1213 (not_current_architecture, selected_arch, selected_cpu): New.
1214 (m68k_archs, m68k_extensions): New.
1215 (archs): Renamed to ...
1216 (m68k_cpus): ... here. Adjust.
1218 (md_pseudo_table): Add arch and cpu directives.
1219 (find_cf_chip, m68k_ip): Adjust table scanning.
1220 (no_68851, no_68881): Remove.
1221 (md_assemble): Lazily initialize.
1222 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1223 (md_init_after_args): Move functionality to m68k_init_arch.
1224 (mri_chip): Adjust table scanning.
1225 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1226 options with saner parsing.
1227 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1228 m68k_init_arch): New.
1229 (s_m68k_cpu, s_m68k_arch): New.
1230 (md_show_usage): Adjust.
1231 (m68k_elf_final_processing): Set CF EF flags.
1232 * config/tc-m68k.h (m68k_init_after_args): Remove.
1233 (tc_init_after_args): Remove.
1234 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1235 (M68k-Directives): Document .arch and .cpu directives.
1237 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1239 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1240 synonyms for equ and defl.
1241 (z80_cons_fix_new): New function.
1242 (emit_byte): Disallow relative jumps to absolute locations.
1243 (emit_data): Only handle defb, prototype changed, because defb is
1244 now handled as pseudo-op rather than an instruction.
1245 (instab): Entries for defb,defw,db,dw moved from here...
1246 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1247 Add entries for def24,def32,d24,d32.
1248 (md_assemble): Improved error handling.
1249 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1250 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1251 (z80_cons_fix_new): Declare.
1252 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1253 (def24,d24,def32,d32): New pseudo-ops.
1255 2006-02-02 Paul Brook <paul@codesourcery.com>
1257 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1259 2005-02-02 Paul Brook <paul@codesourcery.com>
1261 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1262 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1263 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1264 T2_OPCODE_RSB): Define.
1265 (thumb32_negate_data_op): New function.
1266 (md_apply_fix): Use it.
1268 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1270 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1272 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1273 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1275 (relaxation_requirements): Add pfinish_frag argument and use it to
1276 replace setting tinsn->record_fix fields.
1277 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1278 and vinsn_to_insnbuf. Remove references to record_fix and
1279 slot_sub_symbols fields.
1280 (xtensa_mark_narrow_branches): Delete unused code.
1281 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1283 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1285 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1286 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1287 of the record_fix field. Simplify error messages for unexpected
1289 (set_expr_symbol_offset_diff): Delete.
1291 2006-01-31 Paul Brook <paul@codesourcery.com>
1293 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1295 2006-01-31 Paul Brook <paul@codesourcery.com>
1296 Richard Earnshaw <rearnsha@arm.com>
1298 * config/tc-arm.c: Use arm_feature_set.
1299 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1300 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1301 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1304 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1305 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1306 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1307 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1309 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1310 (arm_opts): Move old cpu/arch options from here...
1311 (arm_legacy_opts): ... to here.
1312 (md_parse_option): Search arm_legacy_opts.
1313 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1314 (arm_float_abis, arm_eabis): Make const.
1316 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1318 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1320 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1322 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1323 in load immediate intruction.
1325 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1327 * config/bfin-parse.y (value_match): Use correct conversion
1328 specifications in template string for __FILE__ and __LINE__.
1332 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1334 Introduce TLS descriptors for i386 and x86_64.
1335 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1336 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1337 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1338 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1339 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1341 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1342 (lex_got): Handle @tlsdesc and @tlscall.
1343 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1345 2006-01-11 Nick Clifton <nickc@redhat.com>
1347 Fixes for building on 64-bit hosts:
1348 * config/tc-avr.c (mod_index): New union to allow conversion
1349 between pointers and integers.
1350 (md_begin, avr_ldi_expression): Use it.
1351 * config/tc-i370.c (md_assemble): Add cast for argument to print
1353 * config/tc-tic54x.c (subsym_substitute): Likewise.
1354 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1355 opindex field of fr_cgen structure into a pointer so that it can
1356 be stored in a frag.
1357 * config/tc-mn10300.c (md_assemble): Likewise.
1358 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1360 * config/tc-v850.c: Replace uses of (int) casts with correct
1363 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1366 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1368 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1371 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1372 a local-label reference.
1374 For older changes see ChangeLog-2005
1380 version-control: never