remove uses of PARAMS from binutils
[binutils-gdb.git] / gas / ChangeLog
1 2014-01-07 Tom Tromey <tromey@redhat.com>
2
3 * config/tc-microblaze.h (parse_cons_expression_microblaze): Don't
4 use PARAMS.
5
6 2014-01-07 Tom Tromey <tromey@redhat.com>
7
8 * config/tc-xc16x.h: Don't use ANSI_PROTOTYPES.
9
10 2013-01-07 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
11
12 * config/tc-aarch64.c (aarch64_cpus): Add entry for "xgene-1"
13
14 2013-12-20 Tristan Gingold <gingold@adacore.com>
15
16 * doc/c-arm.texi (ARM Directives): Remove duplicate .pad entry.
17
18 2013-12-18 Yufeng Zhang <yufeng.zhang@arm.com>
19
20 * config/tc-aarch64.c (md_assemble): Defer the feature checking until
21 do_encode () succeeds.
22
23 2013-12-18 Nick Clifton <nickc@redhat.com>
24
25 * config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' in
26 order to avoid conflict with same named variable in MinGW system
27 header file.
28
29 2013-12-13 Nick Clifton <nickc@redhat.com>
30
31 * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
32 (OPTION_INTR_NOPS): Define.
33 (gen_interrupt_nops): Default to FALSE.
34 (md_parse_opton): Add support for OPTION_INTR_NOPS.
35 (md_longopts): Add -mn.
36 (md_show_usage): Add -mn.
37 (msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
38 * doc/c-msp430.c: Document -mn.
39
40 2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
41 Wei-Cheng Wang <cole945@gmail.com>
42 Hsiang-Kai Wang <hsiangkai@gmail.com>
43 Hui-Wen Ni <sabrinanitw@gmail.com>
44
45 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
46 (TARGET_CPU_HFILES): Add config/tc-nds32.h.
47 * Makefile.in: Regenerate.
48 * configure.in (nds32): Add nds32 target extension config support.
49 * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
50 * configure: Regenerate.
51 * config/tc-nds32.c: New file for nds32.
52 * config/tc-nds32.h: New file for nds32.
53 * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
54 * doc/Makefile.in: Regenerate.
55 * doc/as.texinfo: Add nds32 options.
56 * doc/all.texi: Set NDS32.
57 * doc/c-nds32.texi: New file dor nds32 document.
58 * NEWS: Announce Andes nds32 support.
59
60 2013-12-10 Roland McGrath <mcgrathr@google.com>
61
62 * Makefile.am (install-exec-bindir): Prefix libtool invocation
63 with $(INSTALL_PROGRAM_ENV).
64 (install-exec-tooldir): Likewise.
65 * Makefile.in: Regenerate.
66
67 2013-12-07 Mike Frysinger <vapier@gentoo.org>
68
69 * config/bfin-aux.h: Remove +x file mode.
70 * config/tc-epiphany.c: Likewise.
71 * config/tc-epiphany.h: Likewise.
72
73 2013-12-03 Tristan Gingold <gingold@adacore.com>
74
75 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
76 overflow on pointers.
77
78 2013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
79
80 Revert
81
82 2013-11-19 Nick Clifton <nickc@redhat.com>
83
84 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
85 for deprecated system registers when parsing pstate fields.
86
87 2013-11-19 Nick Clifton <nickc@redhat.com>
88
89 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
90 for deprecated system registers when parsing pstate fields.
91
92 2013-11-19 Catherine Moore <clm@codesourcery.com>
93
94 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
95 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
96 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
97 (INSN_DMULT): Define.
98 (INSN_DMULTU): Define.
99 (insns_between): Detect PMC RM7000 errata.
100 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
101 OPTION_NO_FIX_PMC_RM7000.
102 * doc/as.texinfo: Document new options.
103 * doc/c-mips.texi: Likewise.
104
105 2013-11-19 Alexey Makhalov <makhaloff@gmail.com>
106
107 PR gas/16109
108 * app.c (do_scrub_chars): Only insert a newline character if
109 end-of-file has been reached.
110
111 2013-11-18 H.J. Lu <hongjiu.lu@intel.com>
112
113 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
114 argument.
115
116 2013-11-18 Renlin Li <Renlin.Li@arm.com>
117
118 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
119 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
120 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
121 (cpu_arch_ver): Likewise.
122 * doc/c-arm.texi: Document armv7ve.
123
124 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
125
126 * config/tc-aarch64.c (parse_sys_reg): Support
127 S2_<op1>_<Cn>_<Cm>_<op2>.
128
129 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
130
131 Revert
132
133 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
134
135 * config/tc-aarch64.c (set_other_error): New function.
136 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
137 the variable to which it points with 'o'.
138 (parse_operands): Update; check for write to read-only system
139 registers or read from write-only ones.
140
141 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
142
143 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
144 indicate if instruction has the BND prefix. Return
145 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
146 bnd_prefix isn't zero.
147 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
148 if needed.
149 (output_jump): Update reloc call.
150 (output_interseg_jump): Likewise.
151 (output_disp): Likewise.
152 (output_imm): Likewise.
153 (x86_cons_fix_new): Likewise.
154 (lex_got): Add an argument, bnd_prefix, to indicate if
155 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
156 if needed.
157 (x86_cons): Update lex_got call.
158 (i386_immediate): Likewise.
159 (i386_displacement): Likewise.
160 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
161 BFD_RELOC_X86_64_PLT32_BND.
162 (tc_gen_reloc): Likewise.
163 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
164
165 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
166
167 * config/tc-aarch64.c (set_other_error): New function.
168 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
169 the variable to which it points with 'o'.
170 (parse_operands): Update; check for write to read-only system
171 registers or read from write-only ones.
172
173 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
174
175 * config/tc-i386.c (check_VecOperands): Reorder checks.
176
177 2013-11-11 Catherine Moore <clm@codesourcery.com>
178
179 * config/mips/tc-mips.c (convert_reg_type): Use
180 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
181 (reg_needs_delay): Likewise.
182 (insns_between): Likewise.
183
184 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
185
186 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
187
188 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
189
190 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
191 call aarch64_sys_reg_deprecated_p and warn about the deprecated
192 system registers.
193
194 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
195
196 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
197
198 2013-11-05 Will Newton <will.newton@linaro.org>
199
200 PR gas/16103
201 * config/tc-aarch64.c (parse_operands): Avoid trying to
202 parse a vector register as an immediate.
203
204 2013-11-04 Jan Beulich <jbeulich@suse.com>
205
206 * config/tc-i386.c (check_long_reg): Correct comment indentation.
207 (check_qword_reg): Correct comment and its indentation.
208 (check_word_reg): Extend comment and correct its indentation. Also
209 check for 64-bit register.
210
211 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
212
213 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
214 (ppc_elf_localentry): New function.
215 (ppc_force_relocation): Force relocs on all branches to localenty
216 symbols.
217 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
218
219 2013-10-30 Alan Modra <amodra@gmail.com>
220
221 * config/tc-ppc.c: Include elf/ppc64.h.
222 (ppc_abiversion): New variable.
223 (md_pseudo_table): Add .abiversion.
224 (ppc_elf_abiversion, ppc_elf_end): New functions.
225 * config/tc-ppc.h (md_end): Define.
226
227 2013-10-30 Alan Modra <amodra@gmail.com>
228
229 * config/tc-ppc.c (SEX16): Don't mask.
230 (REPORT_OVERFLOW_HI): Define as zero.
231 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
232 @tprel@high, and @tprel@higha modifiers.
233 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
234 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
235 Handle new relocs.
236 (md_apply_fix): Similarly.
237
238 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
239
240 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
241 (fpr_write_mask): Test MSA registers.
242 (can_swap_branch_p): Check fpr write followed by fpr read.
243
244 2013-10-18 Nick Clifton <nickc@redhat.com>
245
246 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
247
248 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
249 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
250
251 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
252 (md_longopts): Add mmsa and mno-msa.
253 (mips_ases): Add msa.
254 (RTYPE_MASK): Update.
255 (RTYPE_MSA): New define.
256 (OT_REG_ELEMENT): Replace with...
257 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
258 (mips_operand_token): Replace reg_element with index.
259 (mips_parse_argument_token): Treat vector indices as separate tokens.
260 Handle register indices.
261 (md_begin): Add MSA register names.
262 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
263 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
264 (match_mdmx_imm_reg_operand): Update accordingly.
265 (match_imm_index_operand): New function.
266 (match_reg_index_operand): New function.
267 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
268 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
269 (md_show_usage): Print -mmsa and -mno-msa.
270 * doc/as.texinfo: Document -mmsa and -mno-msa.
271 * doc/c-mips.texi: Document -mmsa and -mno-msa.
272 Document .set msa and .set nomsa.
273
274 2013-10-14 Nick Clifton <nickc@redhat.com>
275
276 * read.c (add_include_dir): Use xrealloc.
277 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
278 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
279
280 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
281
282 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
283 also test/refer to "sstatus". Reformat the warning message.
284
285 2013-10-10 Sean Keys <skeys@ipdatasys.com>
286
287 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
288
289 2013-10-10 Jan Beulich <jbeulich@suse.com>
290
291 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
292 swapping for bndmk, bndldx, and bndstx.
293
294 2013-10-09 Nick Clifton <nickc@redhat.com>
295
296 PR gas/16025
297 * config/tc-epiphany.c (md_convert_frag): Add missing break
298 statement.
299
300 PR gas/16026
301 * config/tc-mn10200.c (md_convert_frag): Add missing break
302 statement.
303
304 2013-10-08 Jan Beulich <jbeulich@suse.com>
305
306 * tc-i386.c (check_word_reg): Remove misplaced "else".
307 (check_long_reg): Restore symmetry with check_word_reg.
308
309 2013-10-08 Jan Beulich <jbeulich@suse.com>
310
311 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
312 LR/PC check.
313
314 2013-10-08 Nick Clifton <nickc@redhat.com>
315
316 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
317 for "<foo>a". Issue error messages for unrecognised or corrrupt
318 size extensions.
319
320 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
321
322 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
323 possible.
324
325 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
326
327 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
328 * doc/c-i386.texi: Add -march=bdver4 option.
329
330 2013-09-20 Alan Modra <amodra@gmail.com>
331
332 * configure: Regenerate.
333
334 2013-09-18 Tristan Gingold <gingold@adacore.com>
335
336 * NEWS: Add marker for 2.24.
337
338 2013-09-18 Nick Clifton <nickc@redhat.com>
339
340 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
341 (move_data): New variable.
342 (md_parse_option): Parse -md.
343 (msp430_section): New function. Catch references to the .bss or
344 .data sections and generate a special symbol for use by the libcrt
345 library.
346 (md_pseudo_table): Intercept .section directives.
347 (md_longopt): Add -md
348 (md_show_usage): Likewise.
349 (msp430_operands): Generate a warning message if a NOP is inserted
350 into the instruction stream.
351 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
352
353 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
354
355 * config/tc-mips.c (mips_elf_final_processing): Set
356 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
357
358 2013-09-16 Will Newton <will.newton@linaro.org>
359
360 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
361 disallowing element size 64 with interleave other than 1.
362
363 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
364
365 * config/tc-mips.c (match_insn): Set error when $31 is used for
366 bltzal* and bgezal*.
367
368 2013-09-04 Tristan Gingold <gingold@adacore.com>
369
370 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
371 symbols.
372
373 2013-09-04 Roland McGrath <mcgrathr@google.com>
374
375 PR gas/15914
376 * config/tc-arm.c (T16_32_TAB): Add _udf.
377 (do_t_udf): New function.
378 (insns): Add "udf".
379
380 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
381
382 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
383 assembler errors at correct position.
384
385 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
386
387 PR binutils/15834
388 * config/tc-ia64.c: Fix typos.
389 * config/tc-sparc.c: Likewise.
390 * config/tc-z80.c: Likewise.
391 * doc/c-i386.texi: Likewise.
392 * doc/c-m32r.texi: Likewise.
393
394 2013-08-23 Will Newton <will.newton@linaro.org>
395
396 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
397 for pre-indexed addressing modes.
398
399 2013-08-21 Alan Modra <amodra@gmail.com>
400
401 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
402 range check label number for use with fb_low_counter array.
403
404 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
405
406 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
407 (mips_parse_argument_token, validate_micromips_insn, md_begin)
408 (check_regno, match_float_constant, check_completed_insn, append_insn)
409 (match_insn, match_mips16_insn, match_insns, macro_start)
410 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
411 (mips16_ip, mips_set_option_string, md_parse_option)
412 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
413 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
414 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
415 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
416 Start error messages with a lower-case letter. Do not end error
417 messages with a period. Wrap long messages to 80 character-lines.
418 Use "cannot" instead of "can't" and "can not".
419
420 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
421
422 * config/tc-mips.c (imm_expr): Expand comment.
423 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
424 when populated.
425
426 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
427
428 * config/tc-mips.c (imm2_expr): Delete.
429 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
430
431 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
432
433 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
434 (macro): Remove M_DEXT and M_DINS handling.
435
436 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
437
438 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
439 lax_max with lax_match.
440 (match_int_operand): Update accordingly. Don't report an error
441 for !lax_match-only cases.
442 (match_insn): Replace more_alts with lax_match and use it to
443 initialize the mips_arg_info field. Add a complete_p parameter.
444 Handle implicit VU0 suffixes here.
445 (match_invalid_for_isa, match_insns, match_mips16_insns): New
446 functions.
447 (mips_ip, mips16_ip): Use them.
448
449 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
450
451 * config/tc-mips.c (match_expression): Report uses of registers here.
452 Add a "must be an immediate expression" error. Handle elided offsets
453 here rather than...
454 (match_int_operand): ...here.
455
456 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
457
458 * config/tc-mips.c (mips_arg_info): Remove soft_match.
459 (match_out_of_range, match_not_constant): New functions.
460 (match_const_int): Remove fallback parameter and check for soft_match.
461 Use match_not_constant.
462 (match_mapped_int_operand, match_addiusp_operand)
463 (match_perf_reg_operand, match_save_restore_list_operand)
464 (match_mdmx_imm_reg_operand): Update accordingly. Use
465 match_out_of_range and set_insn_error* instead of as_bad.
466 (match_int_operand): Likewise. Use match_not_constant in the
467 !allows_nonconst case.
468 (match_float_constant): Report invalid float constants.
469 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
470 match_float_constant to check for invalid constants. Fail the
471 match if match_const_int or match_float_constant return false.
472 (mips_ip): Update accordingly.
473 (mips16_ip): Likewise. Undo null termination of instruction name
474 once lookup is complete.
475
476 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
477
478 * config/tc-mips.c (mips_insn_error_format): New enum.
479 (mips_insn_error): New struct.
480 (insn_error): Change to a mips_insn_error.
481 (clear_insn_error, set_insn_error_format, set_insn_error)
482 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
483 functions.
484 (mips_parse_argument_token, md_assemble, match_insn)
485 (match_mips16_insn): Use them instead of manipulating insn_error
486 directly.
487 (mips_ip, mips16_ip): Likewise. Simplify control flow.
488
489 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
490
491 * config/tc-mips.c (normalize_constant_expr): Move further up file.
492 (normalize_address_expr): Likewise.
493 (match_insn, match_mips16_insn): New functions, split out from...
494 (mips_ip, mips16_ip): ...here.
495
496 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
497
498 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
499 OP_OPTIONAL_REG.
500 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
501 for optional operands.
502
503 2013-08-16 Alan Modra <amodra@gmail.com>
504
505 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
506 modifiers generally.
507
508 2013-08-16 Alan Modra <amodra@gmail.com>
509
510 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
511
512 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
513
514 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
515 argument as alignment.
516
517 2013-08-09 Nick Clifton <nickc@redhat.com>
518
519 * config/tc-rl78.c (elf_flags): New variable.
520 (enum options): Add OPTION_G10.
521 (md_longopts): Add mg10.
522 (md_parse_option): Parse -mg10.
523 (rl78_elf_final_processing): New function.
524 * config/tc-rl78.c (tc_final_processing): Define.
525 * doc/c-rl78.texi: Document -mg10 option.
526
527 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
528
529 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
530 suffixes to be elided too.
531 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
532 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
533 to be omitted too.
534
535 2013-08-05 John Tytgat <john@bass-software.com>
536
537 * po/POTFILES.in: Regenerate.
538
539 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
540 Konrad Eisele <konrad@gaisler.com>
541
542 * config/tc-sparc.c (sparc_arch_types): Add leon.
543 (sparc_arch): Move sparc4 around and add leon.
544 (sparc_target_format): Document -Aleon.
545 * doc/c-sparc.texi: Likewise.
546
547 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
548
549 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
550
551 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
552 Richard Sandiford <rdsandiford@googlemail.com>
553
554 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
555 (RWARN): Bump to 0x8000000.
556 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
557 (RTYPE_R5900_ACC): New register types.
558 (RTYPE_MASK): Include them.
559 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
560 macros.
561 (reg_names): Include them.
562 (mips_parse_register_1): New function, split out from...
563 (mips_parse_register): ...here. Add a channels_ptr parameter.
564 Look for VU0 channel suffixes when nonnull.
565 (reg_lookup): Update the call to mips_parse_register.
566 (mips_parse_vu0_channels): New function.
567 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
568 (mips_operand_token): Add a "channels" field to the union.
569 Extend the comment above "ch" to OT_DOUBLE_CHAR.
570 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
571 (mips_parse_argument_token): Handle channel suffixes here too.
572 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
573 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
574 Handle '#' formats.
575 (md_begin): Register $vfN and $vfI registers.
576 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
577 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
578 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
579 (match_vu0_suffix_operand): New function.
580 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
581 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
582 (mips_lookup_insn): New function.
583 (mips_ip): Use it. Allow "+K" operands to be elided at the end
584 of an instruction. Handle '#' sequences.
585
586 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
587
588 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
589 values and use it instead of sreg, treg, xreg, etc.
590
591 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
592
593 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
594 and mips_int_operand_max.
595 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
596 Delete.
597 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
598 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
599 instead of mips16_immed_operand.
600
601 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
602
603 * config/tc-mips.c (mips16_macro): Don't use move_register.
604 (mips16_ip): Allow macros to use 'p'.
605
606 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
607
608 * config/tc-mips.c (MAX_OPERANDS): New macro.
609 (mips_operand_array): New structure.
610 (mips_operands, mips16_operands, micromips_operands): New arrays.
611 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
612 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
613 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
614 (micromips_to_32_reg_q_map): Delete.
615 (insn_operands, insn_opno, insn_extract_operand): New functions.
616 (validate_mips_insn): Take a mips_operand_array as argument and
617 use it to build up a list of operands. Extend to handle INSN_MACRO
618 and MIPS16.
619 (validate_mips16_insn): New function.
620 (validate_micromips_insn): Take a mips_operand_array as argument.
621 Handle INSN_MACRO.
622 (md_begin): Initialize mips_operands, mips16_operands and
623 micromips_operands. Call validate_mips_insn and
624 validate_micromips_insn for macro instructions too.
625 Call validate_mips16_insn for MIPS16 instructions.
626 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
627 New functions.
628 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
629 them. Handle INSN_UDI.
630 (get_append_method): Use gpr_read_mask.
631
632 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
633
634 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
635 flags for MIPS16 and non-MIPS16 instructions.
636 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
637 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
638 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
639 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
640 and non-MIPS16 instructions. Fix formatting.
641
642 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
643
644 * config/tc-mips.c (reg_needs_delay): Move later in file.
645 Use gpr_write_mask.
646 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
647
648 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
649 Alexander Ivchenko <alexander.ivchenko@intel.com>
650 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
651 Sergey Lega <sergey.s.lega@intel.com>
652 Anna Tikhonova <anna.tikhonova@intel.com>
653 Ilya Tocar <ilya.tocar@intel.com>
654 Andrey Turetskiy <andrey.turetskiy@intel.com>
655 Ilya Verbin <ilya.verbin@intel.com>
656 Kirill Yukhin <kirill.yukhin@intel.com>
657 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
658
659 * config/tc-i386-intel.c (O_zmmword_ptr): New.
660 (i386_types): Add zmmword.
661 (i386_intel_simplify_register): Allow regzmm.
662 (i386_intel_simplify): Handle zmmwords.
663 (i386_intel_operand): Handle RC/SAE, vector operations and
664 zmmwords.
665 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
666 (struct RC_Operation): New.
667 (struct Mask_Operation): New.
668 (struct Broadcast_Operation): New.
669 (vex_prefix): Size of bytes increased to 4 to support EVEX
670 encoding.
671 (enum i386_error): Add new error codes: unsupported_broadcast,
672 broadcast_not_on_src_operand, broadcast_needed,
673 unsupported_masking, mask_not_on_destination, no_default_mask,
674 unsupported_rc_sae, rc_sae_operand_not_last_imm,
675 invalid_register_operand, try_vector_disp8.
676 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
677 rounding, broadcast, memshift.
678 (struct RC_name): New.
679 (RC_NamesTable): New.
680 (evexlig): New.
681 (evexwig): New.
682 (extra_symbol_chars): Add '{'.
683 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
684 (i386_operand_type): Add regzmm, regmask and vec_disp8.
685 (match_mem_size): Handle zmmwords.
686 (operand_type_match): Handle zmm-registers.
687 (mode_from_disp_size): Handle vec_disp8.
688 (fits_in_vec_disp8): New.
689 (md_begin): Handle {} properly.
690 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
691 (build_vex_prefix): Handle vrex.
692 (build_evex_prefix): New.
693 (process_immext): Adjust to properly handle EVEX.
694 (md_assemble): Add EVEX encoding support.
695 (swap_2_operands): Correctly handle operands with masking,
696 broadcasting or RC/SAE.
697 (check_VecOperands): Support EVEX features.
698 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
699 (match_template): Support regzmm and handle new error codes.
700 (process_suffix): Handle zmmwords and zmm-registers.
701 (check_byte_reg): Extend to zmm-registers.
702 (process_operands): Extend to zmm-registers.
703 (build_modrm_byte): Handle EVEX.
704 (output_insn): Adjust to properly handle EVEX case.
705 (disp_size): Handle vec_disp8.
706 (output_disp): Support compressed disp8*N evex feature.
707 (output_imm): Handle RC/SAE immediates properly.
708 (check_VecOperations): New.
709 (i386_immediate): Handle EVEX features.
710 (i386_index_check): Handle zmmwords and zmm-registers.
711 (RC_SAE_immediate): New.
712 (i386_att_operand): Handle EVEX features.
713 (parse_real_register): Add a check for ZMM/Mask registers.
714 (OPTION_MEVEXLIG): New.
715 (OPTION_MEVEXWIG): New.
716 (md_longopts): Add mevexlig and mevexwig.
717 (md_parse_option): Handle mevexlig and mevexwig options.
718 (md_show_usage): Add description for mevexlig and mevexwig.
719 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
720 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
721
722 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
723
724 * config/tc-i386.c (cpu_arch): Add .sha.
725 * doc/c-i386.texi: Document sha/.sha.
726
727 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
728 Kirill Yukhin <kirill.yukhin@intel.com>
729 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
730
731 * config/tc-i386.c (BND_PREFIX): New.
732 (struct _i386_insn): Add new field bnd_prefix.
733 (add_bnd_prefix): New.
734 (cpu_arch): Add MPX.
735 (i386_operand_type): Add regbnd.
736 (md_assemble): Handle BND prefixes.
737 (parse_insn): Likewise.
738 (output_branch): Likewise.
739 (output_jump): Likewise.
740 (build_modrm_byte): Handle regbnd.
741 (OPTION_MADD_BND_PREFIX): New.
742 (md_longopts): Add entry for 'madd-bnd-prefix'.
743 (md_parse_option): Handle madd-bnd-prefix option.
744 (md_show_usage): Add description for madd-bnd-prefix
745 option.
746 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
747
748 2013-07-24 Tristan Gingold <gingold@adacore.com>
749
750 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
751 xcoff targets.
752
753 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
754
755 * config/tc-s390.c (s390_machine): Don't force the .machine
756 argument to lower case.
757
758 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
759
760 * config/tc-arm.c (s_arm_arch_extension): Improve error message
761 for invalid extension.
762
763 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
764
765 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
766 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
767 (aarch64_abi): New variable.
768 (ilp32_p): Change to be a macro.
769 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
770 (struct aarch64_option_abi_value_table): New struct.
771 (aarch64_abis): New table.
772 (aarch64_parse_abi): New function.
773 (aarch64_long_opts): Add entry for -mabi=.
774 * doc/as.texinfo (Target AArch64 options): Document -mabi.
775 * doc/c-aarch64.texi: Likewise.
776
777 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
778
779 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
780 unsigned comparison.
781
782 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
783
784 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
785 RX610.
786 * config/rx-parse.y: (rx_check_float_support): Add function to
787 check floating point operation support for target RX100 and
788 RX200.
789 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
790 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
791 RX200, RX600, and RX610
792
793 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
794
795 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
796
797 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
798
799 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
800 * doc/c-avr.texi: Likewise.
801
802 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
803
804 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
805 error with older GCCs.
806 (mips16_macro_build): Dereference args.
807
808 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
809
810 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
811 New functions, split out from...
812 (reg_lookup): ...here. Remove itbl support.
813 (reglist_lookup): Delete.
814 (mips_operand_token_type): New enum.
815 (mips_operand_token): New structure.
816 (mips_operand_tokens): New variable.
817 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
818 (mips_parse_arguments): New functions.
819 (md_begin): Initialize mips_operand_tokens.
820 (mips_arg_info): Add a token field. Remove optional_reg field.
821 (match_char, match_expression): New functions.
822 (match_const_int): Use match_expression. Remove "s" argument
823 and return a boolean result. Remove O_register handling.
824 (match_regno, match_reg, match_reg_range): New functions.
825 (match_int_operand, match_mapped_int_operand, match_msb_operand)
826 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
827 (match_addiusp_operand, match_clo_clz_dest_operand)
828 (match_lwm_swm_list_operand, match_entry_exit_operand)
829 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
830 (match_tied_reg_operand): Remove "s" argument and return a boolean
831 result. Match tokens rather than text. Update calls to
832 match_const_int. Rely on match_regno to call check_regno.
833 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
834 "arg" argument. Return a boolean result.
835 (parse_float_constant): Replace with...
836 (match_float_constant): ...this new function.
837 (match_operand): Remove "s" argument and return a boolean result.
838 Update calls to subfunctions.
839 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
840 rather than string-parsing routines. Update handling of optional
841 registers for token scheme.
842
843 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
844
845 * config/tc-mips.c (parse_float_constant): Split out from...
846 (mips_ip): ...here.
847
848 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
849
850 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
851 Delete.
852
853 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
854
855 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
856 (match_entry_exit_operand): New function.
857 (match_save_restore_list_operand): Likewise.
858 (match_operand): Use them.
859 (check_absolute_expr): Delete.
860 (mips16_ip): Rewrite main parsing loop to use mips_operands.
861
862 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
863
864 * config/tc-mips.c: Enable functions commented out in previous patch.
865 (SKIP_SPACE_TABS): Move further up file.
866 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
867 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
868 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
869 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
870 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
871 (micromips_imm_b_map, micromips_imm_c_map): Delete.
872 (mips_lookup_reg_pair): Delete.
873 (macro): Use report_bad_range and report_bad_field.
874 (mips_immed, expr_const_in_range): Delete.
875 (mips_ip): Rewrite main parsing loop to use new functions.
876
877 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
878
879 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
880 Change return type to bfd_boolean.
881 (report_bad_range, report_bad_field): New functions.
882 (mips_arg_info): New structure.
883 (match_const_int, convert_reg_type, check_regno, match_int_operand)
884 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
885 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
886 (match_addiusp_operand, match_clo_clz_dest_operand)
887 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
888 (match_pc_operand, match_tied_reg_operand, match_operand)
889 (check_completed_insn): New functions, commented out for now.
890
891 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
892
893 * config/tc-mips.c (insn_insert_operand): New function.
894 (macro_build, mips16_macro_build): Put null character check
895 in the for loop and convert continues to breaks. Use operand
896 structures to handle constant operands.
897
898 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
899
900 * config/tc-mips.c (validate_mips_insn): Move further up file.
901 Add insn_bits and decode_operand arguments. Use the mips_operand
902 fields to work out which bits an operand occupies. Detect double
903 definitions.
904 (validate_micromips_insn): Move further up file. Call into
905 validate_mips_insn.
906
907 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
908
909 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
910
911 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
912
913 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
914 and "~".
915 (macro): Update accordingly.
916
917 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
918
919 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
920 (imm_reloc): Delete.
921 (md_assemble): Remove imm_reloc handling.
922 (mips_ip): Update commentary. Use offset_expr and offset_reloc
923 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
924 Use a temporary array rather than imm_reloc when parsing
925 constant expressions. Remove imm_reloc initialization.
926 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
927 for the relaxable field. Use a relax_char variable to track the
928 type of this field. Remove imm_reloc initialization.
929
930 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
931
932 * config/tc-mips.c (mips16_ip): Handle "I".
933
934 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
935
936 * config/tc-mips.c (mips_flag_nan2008): New variable.
937 (options): Add OPTION_NAN enum value.
938 (md_longopts): Handle it.
939 (md_parse_option): Likewise.
940 (s_nan): New function.
941 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
942 (md_show_usage): Add -mnan.
943
944 * doc/as.texinfo (Overview): Add -mnan.
945 * doc/c-mips.texi (MIPS Opts): Document -mnan.
946 (MIPS NaN Encodings): New node. Document .nan directive.
947 (MIPS-Dependent): List the new node.
948
949 2013-07-09 Tristan Gingold <gingold@adacore.com>
950
951 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
952
953 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
954
955 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
956 for 'A' and assume that the constant has been elided if the result
957 is an O_register.
958
959 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
960
961 * config/tc-mips.c (gprel16_reloc_p): New function.
962 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
963 BFD_RELOC_UNUSED.
964 (offset_high_part, small_offset_p): New functions.
965 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
966 register load and store macros, handle the 16-bit offset case first.
967 If a 16-bit offset is not suitable for the instruction we're
968 generating, load it into the temporary register using
969 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
970 M_L_DAB code once the address has been constructed. For double load
971 and store macros, again handle the 16-bit offset case first.
972 If the second register cannot be accessed from the same high
973 part as the first, load it into AT using ADDRESS_ADDI_INSN.
974 Fix the handling of LD in cases where the first register is the
975 same as the base. Also handle the case where the offset is
976 not 16 bits and the second register cannot be accessed from the
977 same high part as the first. For unaligned loads and stores,
978 fuse the offbits == 12 and old "ab" handling. Apply this handling
979 whenever the second offset needs a different high part from the first.
980 Construct the offset using ADDRESS_ADDI_INSN where possible,
981 for offbits == 16 as well as offbits == 12. Use offset_reloc
982 when constructing the individual loads and stores.
983 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
984 and offset_reloc before matching against a particular opcode.
985 Handle elided 'A' constants. Allow 'A' constants to use
986 relocation operators.
987
988 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
989
990 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
991 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
992 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
993
994 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
995
996 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
997 Require the msb to be <= 31 for "+s". Check that the size is <= 31
998 for both "+s" and "+S".
999
1000 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1001
1002 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
1003 (mips_ip, mips16_ip): Handle "+i".
1004
1005 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1006
1007 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
1008 (micromips_to_32_reg_h_map): Rename to...
1009 (micromips_to_32_reg_h_map1): ...this.
1010 (micromips_to_32_reg_i_map): Rename to...
1011 (micromips_to_32_reg_h_map2): ...this.
1012 (mips_lookup_reg_pair): New function.
1013 (gpr_write_mask, macro): Adjust after above renaming.
1014 (validate_micromips_insn): Remove "mi" handling.
1015 (mips_ip): Likewise. Parse both registers in a pair for "mh".
1016
1017 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1018
1019 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
1020 (mips_ip): Remove "+D" and "+T" handling.
1021
1022 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
1023
1024 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
1025 relocs.
1026
1027 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
1028
1029 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
1030
1031 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
1032
1033 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
1034 (aarch64_force_relocation): Likewise.
1035
1036 2013-07-02 Alan Modra <amodra@gmail.com>
1037
1038 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
1039
1040 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
1041
1042 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
1043 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
1044 Replace @sc{mips16} with literal `MIPS16'.
1045 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
1046
1047 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1048
1049 * config/tc-aarch64.c (reloc_table): Replace
1050 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
1051 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
1052 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
1053 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
1054 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
1055 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
1056 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
1057 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
1058 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1059 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1060 (aarch64_force_relocation): Likewise.
1061
1062 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1063
1064 * config/tc-aarch64.c (ilp32_p): New static variable.
1065 (elf64_aarch64_target_format): Return the target according to the
1066 value of 'ilp32_p'.
1067 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1068 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1069 (aarch64_dwarf2_addr_size): New function.
1070 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1071 (DWARF2_ADDR_SIZE): New define.
1072
1073 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1074
1075 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1076
1077 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1078
1079 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1080
1081 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1082
1083 * config/tc-mips.c (mips_set_options): Add insn32 member.
1084 (mips_opts): Initialize it.
1085 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1086 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1087 (md_longopts): Add "minsn32" and "mno-insn32" options.
1088 (is_size_valid): Handle insn32 mode.
1089 (md_assemble): Pass instruction string down to macro.
1090 (brk_fmt): Add second dimension and insn32 mode initializers.
1091 (mfhl_fmt): Likewise.
1092 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1093 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1094 (macro_build_jalr, move_register): Handle insn32 mode.
1095 (macro_build_branch_rs): Likewise.
1096 (macro): Handle insn32 mode.
1097 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1098 (mips_ip): Handle insn32 mode.
1099 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1100 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1101 (mips_handle_align): Handle insn32 mode.
1102 (md_show_usage): Add -minsn32 and -mno-insn32.
1103
1104 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1105 -mno-insn32 options.
1106 (-minsn32, -mno-insn32): New options.
1107 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1108 options.
1109 (MIPS assembly options): New node. Document .set insn32 and
1110 .set noinsn32.
1111 (MIPS-Dependent): List the new node.
1112
1113 2013-06-25 Nick Clifton <nickc@redhat.com>
1114
1115 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1116 the PC in indirect addressing on 430xv2 parts.
1117 (msp430_operands): Add version test to hardware bug encoding
1118 restrictions.
1119
1120 2013-06-24 Roland McGrath <mcgrathr@google.com>
1121
1122 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1123 so it skips whitespace before it.
1124 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1125
1126 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1127 (arm_reg_parse_multi): Skip whitespace first.
1128 (parse_reg_list): Likewise.
1129 (parse_vfp_reg_list): Likewise.
1130 (s_arm_unwind_save_mmxwcg): Likewise.
1131
1132 2013-06-24 Nick Clifton <nickc@redhat.com>
1133
1134 PR gas/15623
1135 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1136
1137 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1138
1139 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1140
1141 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1142
1143 * config/tc-mips.c: Assert that offsetT and valueT are at least
1144 8 bytes in size.
1145 (GPR_SMIN, GPR_SMAX): New macros.
1146 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1147
1148 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1149
1150 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1151 conditions. Remove any code deselected by them.
1152 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1153
1154 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1155
1156 * NEWS: Note removal of ECOFF support.
1157 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1158 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1159 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1160 * Makefile.in: Regenerate.
1161 * configure.in: Remove MIPS ECOFF references.
1162 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1163 Delete cases.
1164 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1165 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1166 (mips-*-*): ...this single case.
1167 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1168 MIPS emulations to be e-mipself*.
1169 * configure: Regenerate.
1170 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1171 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1172 (mips-*-sysv*): Remove coff and ecoff cases.
1173 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1174 * ecoff.c: Remove reference to MIPS ECOFF.
1175 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1176 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1177 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1178 (mips_hi_fixup): Tweak comment.
1179 (append_insn): Require a howto.
1180 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1181
1182 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1183
1184 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1185 Use "CPU" instead of "cpu".
1186 * doc/c-mips.texi: Likewise.
1187 (MIPS Opts): Rename to MIPS Options.
1188 (MIPS option stack): Rename to MIPS Option Stack.
1189 (MIPS ASE instruction generation overrides): Rename to
1190 MIPS ASE Instruction Generation Overrides (for now).
1191 (MIPS floating-point): Rename to MIPS Floating-Point.
1192
1193 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1194
1195 * doc/c-mips.texi (MIPS Macros): New section.
1196 (MIPS Object): Replace with...
1197 (MIPS Small Data): ...this new section.
1198
1199 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1200
1201 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1202 Capitalize name. Use @kindex instead of @cindex for .set entries.
1203
1204 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1205
1206 * doc/c-mips.texi (MIPS Stabs): Remove section.
1207
1208 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1209
1210 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1211 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1212 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1213 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1214 (mips_ase): New structure.
1215 (mips_ases): New table.
1216 (FP64_ASES): New macro.
1217 (mips_ase_groups): New array.
1218 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1219 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1220 functions.
1221 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1222 (md_parse_option): Use mips_ases and mips_set_ase instead of
1223 separate case statements for each ASE option.
1224 (mips_after_parse_args): Use FP64_ASES. Use
1225 mips_check_isa_supports_ases to check the ASEs against
1226 other options.
1227 (s_mipsset): Use mips_ases and mips_set_ase instead of
1228 separate if statements for each ASE option. Use
1229 mips_check_isa_supports_ases, even when a non-ASE option
1230 is specified.
1231
1232 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1233
1234 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1235
1236 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1237
1238 * config/tc-mips.c (md_shortopts, options, md_longopts)
1239 (md_longopts_size): Move earlier in file.
1240
1241 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1242
1243 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1244 with a single "ase" bitmask.
1245 (mips_opts): Update accordingly.
1246 (file_ase, file_ase_explicit): New variables.
1247 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1248 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1249 (ISA_HAS_ROR): Adjust for mips_set_options change.
1250 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1251 (mips_ip): Adjust for mips_set_options change.
1252 (md_parse_option): Likewise. Update file_ase_explicit.
1253 (mips_after_parse_args): Adjust for mips_set_options change.
1254 Use bitmask operations to select the default ASEs. Set file_ase
1255 rather than individual per-ASE variables.
1256 (s_mipsset): Adjust for mips_set_options change.
1257 (mips_elf_final_processing): Test file_ase rather than
1258 file_ase_mdmx. Remove commented-out code.
1259
1260 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1261
1262 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1263 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1264 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1265 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1266 (mips_after_parse_args): Use the new "ase" field to choose
1267 the default ASEs.
1268 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1269 "ase" field.
1270
1271 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1272
1273 * config/tc-arm.c (symbol_preemptible): New function.
1274 (relax_branch): Use it.
1275
1276 2013-06-17 Catherine Moore <clm@codesourcery.com>
1277 Maciej W. Rozycki <macro@codesourcery.com>
1278 Chao-Ying Fu <fu@mips.com>
1279
1280 * config/tc-mips.c (mips_set_options): Add ase_eva.
1281 (mips_set_options mips_opts): Add ase_eva.
1282 (file_ase_eva): Declare.
1283 (ISA_SUPPORTS_EVA_ASE): Define.
1284 (IS_SEXT_9BIT_NUM): Define.
1285 (MIPS_CPU_ASE_EVA): Define.
1286 (is_opcode_valid): Add support for ase_eva.
1287 (macro_build): Likewise.
1288 (macro): Likewise.
1289 (validate_mips_insn): Likewise.
1290 (validate_micromips_insn): Likewise.
1291 (mips_ip): Likewise.
1292 (options): Add OPTION_EVA and OPTION_NO_EVA.
1293 (md_longopts): Add -meva and -mno-eva.
1294 (md_parse_option): Process new options.
1295 (mips_after_parse_args): Check for valid EVA combinations.
1296 (s_mipsset): Likewise.
1297
1298 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1299
1300 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1301 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1302 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1303 (dwarf2_gen_line_info_1): Update call accordingly.
1304 (dwarf2_move_insn): New function.
1305 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1306
1307 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1308
1309 Revert:
1310
1311 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1312
1313 PR gas/13024
1314 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1315 (dwarf2_gen_line_info_1): Delete.
1316 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1317 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1318 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1319 (dwarf2_directive_loc): Push previous .locs instead of generating
1320 them immediately.
1321
1322 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1323
1324 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1325 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1326
1327 2013-06-13 Nick Clifton <nickc@redhat.com>
1328
1329 PR gas/15602
1330 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1331 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1332 function. Generates an error if the adjusted offset is out of a
1333 16-bit range.
1334
1335 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1336
1337 * config/tc-nios2.c (md_apply_fix): Mask constant
1338 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1339
1340 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1341
1342 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1343 MIPS-3D instructions either.
1344 (md_convert_frag): Update the COPx branch mask accordingly.
1345
1346 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1347 option.
1348 * doc/as.texinfo (Overview): Add --relax-branch and
1349 --no-relax-branch.
1350 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1351 --no-relax-branch.
1352
1353 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1354
1355 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1356 omitted.
1357
1358 2013-06-08 Catherine Moore <clm@codesourcery.com>
1359
1360 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1361 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1362 (append_insn): Change INSN_xxxx to ASE_xxxx.
1363
1364 2013-06-01 George Thomas <george.thomas@atmel.com>
1365
1366 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1367 AVR_ISA_XMEGAU
1368
1369 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1370
1371 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1372 for ELF.
1373
1374 2013-05-31 Paul Brook <paul@codesourcery.com>
1375
1376 * config/tc-mips.c (s_ehword): New.
1377
1378 2013-05-30 Paul Brook <paul@codesourcery.com>
1379
1380 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1381
1382 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1383
1384 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1385 convert relocs who have no relocatable field either. Rephrase
1386 the conditional so that the PC-relative check is only applied
1387 for REL targets.
1388
1389 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1390
1391 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1392 calculation.
1393
1394 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1395
1396 * config/tc-aarch64.c (reloc_table): Update to use
1397 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1398 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1399 (md_apply_fix): Likewise.
1400 (aarch64_force_relocation): Likewise.
1401
1402 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1403
1404 * config/tc-arm.c (it_fsm_post_encode): Improve
1405 warning messages about deprecated IT block formats.
1406
1407 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1408
1409 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1410 inside fx_done condition.
1411
1412 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1413
1414 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1415
1416 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1417
1418 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1419 and clean up warning when using PRINT_OPCODE_TABLE.
1420
1421 2013-05-20 Alan Modra <amodra@gmail.com>
1422
1423 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1424 and data fixups performing shift/high adjust/sign extension on
1425 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1426 when writing data fixups rather than recalculating size.
1427
1428 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1429
1430 * doc/c-msp430.texi: Fix typo.
1431
1432 2013-05-16 Tristan Gingold <gingold@adacore.com>
1433
1434 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1435 are also TOC symbols.
1436
1437 2013-05-16 Nick Clifton <nickc@redhat.com>
1438
1439 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1440 Add -mcpu command to specify core type.
1441 * doc/c-msp430.texi: Update documentation.
1442
1443 2013-05-09 Andrew Pinski <apinski@cavium.com>
1444
1445 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1446 (mips_opts): Update for the new field.
1447 (file_ase_virt): New variable.
1448 (ISA_SUPPORTS_VIRT_ASE): New macro.
1449 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1450 (MIPS_CPU_ASE_VIRT): New define.
1451 (is_opcode_valid): Handle ase_virt.
1452 (macro_build): Handle "+J".
1453 (validate_mips_insn): Likewise.
1454 (mips_ip): Likewise.
1455 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1456 (md_longopts): Add mvirt and mnovirt
1457 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1458 (mips_after_parse_args): Handle ase_virt field.
1459 (s_mipsset): Handle "virt" and "novirt".
1460 (mips_elf_final_processing): Add a comment about virt ASE might need
1461 a new flag.
1462 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1463 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1464 Document ".set virt" and ".set novirt".
1465
1466 2013-05-09 Alan Modra <amodra@gmail.com>
1467
1468 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1469 control of operand flag bits.
1470
1471 2013-05-07 Alan Modra <amodra@gmail.com>
1472
1473 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1474 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1475 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1476 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1477 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1478 Shift and sign-extend fieldval for use by some VLE reloc
1479 operand->insert functions.
1480
1481 2013-05-06 Paul Brook <paul@codesourcery.com>
1482 Catherine Moore <clm@codesourcery.com>
1483
1484 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1485 (limited_pcrel_reloc_p): Likewise.
1486 (md_apply_fix): Likewise.
1487 (tc_gen_reloc): Likewise.
1488
1489 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1490
1491 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1492 (mips_fix_adjustable): Adjust pc-relative check to use
1493 limited_pc_reloc_p.
1494
1495 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1496
1497 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1498 (s_mips_stab): Do not restrict to stabn only.
1499
1500 2013-05-02 Nick Clifton <nickc@redhat.com>
1501
1502 * config/tc-msp430.c: Add support for the MSP430X architecture.
1503 Add code to insert a NOP instruction after any instruction that
1504 might change the interrupt state.
1505 Add support for the LARGE memory model.
1506 Add code to initialise the .MSP430.attributes section.
1507 * config/tc-msp430.h: Add support for the MSP430X architecture.
1508 * doc/c-msp430.texi: Document the new -mL and -mN command line
1509 options.
1510 * NEWS: Mention support for the MSP430X architecture.
1511
1512 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1513
1514 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1515 alpha*-*-linux*ecoff*.
1516
1517 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1518
1519 * config/tc-mips.c (mips_ip): Add sizelo.
1520 For "+C", "+G", and "+H", set sizelo and compare against it.
1521
1522 2013-04-29 Nick Clifton <nickc@redhat.com>
1523
1524 * as.c (Options): Add -gdwarf-sections.
1525 (parse_args): Likewise.
1526 * as.h (flag_dwarf_sections): Declare.
1527 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1528 (process_entries): When -gdwarf-sections is enabled generate
1529 fragmentary .debug_line sections.
1530 (out_debug_line): Set the section for the .debug_line section end
1531 symbol.
1532 * doc/as.texinfo: Document -gdwarf-sections.
1533 * NEWS: Mention -gdwarf-sections.
1534
1535 2013-04-26 Christian Groessler <chris@groessler.org>
1536
1537 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1538 according to the target parameter. Don't call s_segm since s_segm
1539 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1540 initialized yet.
1541 (md_begin): Call s_segm according to target parameter from command
1542 line.
1543
1544 2013-04-25 Alan Modra <amodra@gmail.com>
1545
1546 * configure.in: Allow little-endian linux.
1547 * configure: Regenerate.
1548
1549 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1550
1551 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1552 "fstatus" control register to "eccinj".
1553
1554 2013-04-19 Kai Tietz <ktietz@redhat.com>
1555
1556 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1557
1558 2013-04-15 Julian Brown <julian@codesourcery.com>
1559
1560 * expr.c (add_to_result, subtract_from_result): Make global.
1561 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1562 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1563 subtract_from_result to handle extra bit of precision for .sleb128
1564 directive operands.
1565
1566 2013-04-10 Julian Brown <julian@codesourcery.com>
1567
1568 * read.c (convert_to_bignum): Add sign parameter. Use it
1569 instead of X_unsigned to determine sign of resulting bignum.
1570 (emit_expr): Pass extra argument to convert_to_bignum.
1571 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1572 X_extrabit to convert_to_bignum.
1573 (parse_bitfield_cons): Set X_extrabit.
1574 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1575 Initialise X_extrabit field as appropriate.
1576 (add_to_result): New.
1577 (subtract_from_result): New.
1578 (expr): Use above.
1579 * expr.h (expressionS): Add X_extrabit field.
1580
1581 2013-04-10 Jan Beulich <jbeulich@suse.com>
1582
1583 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1584 register being PC when is_t or writeback, and use distinct
1585 diagnostic for the latter case.
1586
1587 2013-04-10 Jan Beulich <jbeulich@suse.com>
1588
1589 * gas/config/tc-arm.c (parse_operands): Re-write
1590 po_barrier_or_imm().
1591 (do_barrier): Remove bogus constraint().
1592 (do_t_barrier): Remove.
1593
1594 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1595
1596 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1597 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1598 ATmega2564RFR2
1599 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1600
1601 2013-04-09 Jan Beulich <jbeulich@suse.com>
1602
1603 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1604 Use local variable Rt in more places.
1605 (do_vmsr): Accept all control registers.
1606
1607 2013-04-09 Jan Beulich <jbeulich@suse.com>
1608
1609 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1610 if there was none specified for moves between scalar and core
1611 register.
1612
1613 2013-04-09 Jan Beulich <jbeulich@suse.com>
1614
1615 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1616 NEON_ALL_LANES case.
1617
1618 2013-04-08 Jan Beulich <jbeulich@suse.com>
1619
1620 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1621 PC-relative VSTR.
1622
1623 2013-04-08 Jan Beulich <jbeulich@suse.com>
1624
1625 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1626 entry to sp_fiq.
1627
1628 2013-04-03 Alan Modra <amodra@gmail.com>
1629
1630 * doc/as.texinfo: Add support to generate man options for h8300.
1631 * doc/c-h8300.texi: Likewise.
1632
1633 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1634
1635 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1636 Cortex-A57.
1637
1638 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1639
1640 PR binutils/15068
1641 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1642
1643 2013-03-26 Nick Clifton <nickc@redhat.com>
1644
1645 PR gas/15295
1646 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1647 start of the file each time.
1648
1649 PR gas/15178
1650 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1651 FreeBSD targets.
1652
1653 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1654
1655 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1656 after fixup.
1657
1658 2013-03-21 Will Newton <will.newton@linaro.org>
1659
1660 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1661 pc-relative str instructions in Thumb mode.
1662
1663 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1664
1665 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1666 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1667 R_H8_DISP32A16.
1668 * config/tc-h8300.h: Remove duplicated defines.
1669
1670 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1671
1672 PR gas/15282
1673 * tc-avr.c (mcu_has_3_byte_pc): New function.
1674 (tc_cfi_frame_initial_instructions): Call it to find return
1675 address size.
1676
1677 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1678
1679 PR gas/15095
1680 * config/tc-tic6x.c (tic6x_try_encode): Handle
1681 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1682 encode register pair numbers when required.
1683
1684 2013-03-15 Will Newton <will.newton@linaro.org>
1685
1686 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1687 in vstr in Thumb mode for pre-ARMv7 cores.
1688
1689 2013-03-14 Andreas Schwab <schwab@suse.de>
1690
1691 * doc/c-arc.texi (ARC Directives): Revert last change and use
1692 @itemize instead of @table.
1693 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1694
1695 2013-03-14 Nick Clifton <nickc@redhat.com>
1696
1697 PR gas/15273
1698 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1699 NULL message, instead just check ARM_CPU_IS_ANY directly.
1700
1701 2013-03-14 Nick Clifton <nickc@redhat.com>
1702
1703 PR gas/15212
1704 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1705 for table format.
1706 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1707 to the @item directives.
1708 (ARM-Neon-Alignment): Move to correct place in the document.
1709 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1710 formatting.
1711 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1712 @smallexample.
1713
1714 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1715
1716 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1717 case. Add default BAD_CASE to switch.
1718
1719 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1720
1721 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1722 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1723
1724 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1725
1726 * config/tc-arm.c (crc_ext_armv8): New feature set.
1727 (UNPRED_REG): New macro.
1728 (do_crc32_1): New function.
1729 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1730 do_crc32ch, do_crc32cw): Likewise.
1731 (TUEc): New macro.
1732 (insns): Add entries for crc32 mnemonics.
1733 (arm_extensions): Add entry for crc.
1734
1735 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1736
1737 * write.h (struct fix): Add fx_dot_frag field.
1738 (dot_frag): Declare.
1739 * write.c (dot_frag): New variable.
1740 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1741 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1742 * expr.c (expr): Save value of frag_now in dot_frag when setting
1743 dot_value.
1744 * read.c (emit_expr): Likewise. Delete comments.
1745
1746 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1747
1748 * config/tc-i386.c (flag_code_names): Removed.
1749 (i386_index_check): Rewrote.
1750
1751 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1752
1753 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1754 add comment.
1755 (aarch64_double_precision_fmovable): New function.
1756 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1757 function; handle hexadecimal representation of IEEE754 encoding.
1758 (parse_operands): Update the call to parse_aarch64_imm_float.
1759
1760 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1761
1762 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1763 (check_hle): Updated.
1764 (md_assemble): Likewise.
1765 (parse_insn): Likewise.
1766
1767 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1768
1769 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1770 (md_assemble): Check if REP prefix is OK.
1771 (parse_insn): Remove expecting_string_instruction. Set
1772 i.rep_prefix.
1773
1774 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1775
1776 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1777
1778 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1779
1780 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1781 for system registers.
1782
1783 2013-02-27 DJ Delorie <dj@redhat.com>
1784
1785 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1786 (rl78_op): Handle %code().
1787 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1788 (tc_gen_reloc): Likwise; convert to a computed reloc.
1789 (md_apply_fix): Likewise.
1790
1791 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1792
1793 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1794
1795 2013-02-25 Terry Guo <terry.guo@arm.com>
1796
1797 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1798 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1799 list of accepted CPUs.
1800
1801 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1802
1803 PR gas/15159
1804 * config/tc-i386.c (cpu_arch): Add ".smap".
1805
1806 * doc/c-i386.texi: Document smap.
1807
1808 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1809
1810 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1811 mips_assembling_insn appropriately.
1812 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1813
1814 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1815
1816 * config/tc-mips.c (append_insn): Correct indentation, remove
1817 extraneous braces.
1818
1819 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1820
1821 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1822
1823 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1824
1825 * configure.tgt: Add nios2-*-rtems*.
1826
1827 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1828
1829 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1830 NULL.
1831
1832 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1833
1834 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1835 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1836
1837 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1838
1839 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1840 core.
1841
1842 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1843 Andrew Jenner <andrew@codesourcery.com>
1844
1845 Based on patches from Altera Corporation.
1846
1847 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1848 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1849 * Makefile.in: Regenerated.
1850 * configure.tgt: Add case for nios2*-linux*.
1851 * config/obj-elf.c: Conditionally include elf/nios2.h.
1852 * config/tc-nios2.c: New file.
1853 * config/tc-nios2.h: New file.
1854 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1855 * doc/Makefile.in: Regenerated.
1856 * doc/all.texi: Set NIOSII.
1857 * doc/as.texinfo (Overview): Add Nios II options.
1858 (Machine Dependencies): Include c-nios2.texi.
1859 * doc/c-nios2.texi: New file.
1860 * NEWS: Note Altera Nios II support.
1861
1862 2013-02-06 Alan Modra <amodra@gmail.com>
1863
1864 PR gas/14255
1865 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1866 Don't skip fixups with fx_subsy non-NULL.
1867 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1868 with fx_subsy non-NULL.
1869
1870 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1871
1872 * doc/c-metag.texi: Add "@c man" markers.
1873
1874 2013-02-04 Alan Modra <amodra@gmail.com>
1875
1876 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1877 related code.
1878 (TC_ADJUST_RELOC_COUNT): Delete.
1879 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1880
1881 2013-02-04 Alan Modra <amodra@gmail.com>
1882
1883 * po/POTFILES.in: Regenerate.
1884
1885 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1886
1887 * config/tc-metag.c: Make SWAP instruction less permissive with
1888 its operands.
1889
1890 2013-01-29 DJ Delorie <dj@redhat.com>
1891
1892 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1893 relocs in .word/.etc statements.
1894
1895 2013-01-29 Roland McGrath <mcgrathr@google.com>
1896
1897 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1898 immediate value for 8-bit offset" error so it shows line info.
1899
1900 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1901
1902 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1903 for 64-bit output.
1904
1905 2013-01-24 Nick Clifton <nickc@redhat.com>
1906
1907 * config/tc-v850.c: Add support for e3v5 architecture.
1908 * doc/c-v850.texi: Mention new support.
1909
1910 2013-01-23 Nick Clifton <nickc@redhat.com>
1911
1912 PR gas/15039
1913 * config/tc-avr.c: Include dwarf2dbg.h.
1914
1915 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1916
1917 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1918 (tc_i386_fix_adjustable): Likewise.
1919 (lex_got): Likewise.
1920 (tc_gen_reloc): Likewise.
1921
1922 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1923
1924 * config/tc-aarch64.c (output_operand_error_record): Change to output
1925 the out-of-range error message as value-expected message if there is
1926 only one single value in the expected range.
1927 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1928 LSL #0 as a programmer-friendly feature.
1929
1930 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1931
1932 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1933 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1934 BFD_RELOC_64_SIZE relocations.
1935 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1936 for it.
1937 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1938 relocations against local symbols.
1939
1940 2013-01-16 Alan Modra <amodra@gmail.com>
1941
1942 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1943 finding some sort of toc syntax error, and break to avoid
1944 compiler uninit warning.
1945
1946 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1947
1948 PR gas/15019
1949 * config/tc-i386.c (lex_got): Increment length by 1 if the
1950 relocation token is removed.
1951
1952 2013-01-15 Nick Clifton <nickc@redhat.com>
1953
1954 * config/tc-v850.c (md_assemble): Allow signed values for
1955 V850E_IMMEDIATE.
1956
1957 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1958
1959 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1960 git to cvs.
1961
1962 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1963
1964 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1965 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1966 * config/tc-ppc.c (md_show_usage): Likewise.
1967 (ppc_handle_align): Handle power8's group ending nop.
1968
1969 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1970
1971 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1972 that the assember exits after the opcodes have been printed.
1973
1974 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1975
1976 * app.c: Remove trailing white spaces.
1977 * as.c: Likewise.
1978 * as.h: Likewise.
1979 * cond.c: Likewise.
1980 * dw2gencfi.c: Likewise.
1981 * dwarf2dbg.h: Likewise.
1982 * ecoff.c: Likewise.
1983 * input-file.c: Likewise.
1984 * itbl-lex.h: Likewise.
1985 * output-file.c: Likewise.
1986 * read.c: Likewise.
1987 * sb.c: Likewise.
1988 * subsegs.c: Likewise.
1989 * symbols.c: Likewise.
1990 * write.c: Likewise.
1991 * config/tc-i386.c: Likewise.
1992 * doc/Makefile.am: Likewise.
1993 * doc/Makefile.in: Likewise.
1994 * doc/c-aarch64.texi: Likewise.
1995 * doc/c-alpha.texi: Likewise.
1996 * doc/c-arc.texi: Likewise.
1997 * doc/c-arm.texi: Likewise.
1998 * doc/c-avr.texi: Likewise.
1999 * doc/c-bfin.texi: Likewise.
2000 * doc/c-cr16.texi: Likewise.
2001 * doc/c-d10v.texi: Likewise.
2002 * doc/c-d30v.texi: Likewise.
2003 * doc/c-h8300.texi: Likewise.
2004 * doc/c-hppa.texi: Likewise.
2005 * doc/c-i370.texi: Likewise.
2006 * doc/c-i386.texi: Likewise.
2007 * doc/c-i860.texi: Likewise.
2008 * doc/c-m32c.texi: Likewise.
2009 * doc/c-m32r.texi: Likewise.
2010 * doc/c-m68hc11.texi: Likewise.
2011 * doc/c-m68k.texi: Likewise.
2012 * doc/c-microblaze.texi: Likewise.
2013 * doc/c-mips.texi: Likewise.
2014 * doc/c-msp430.texi: Likewise.
2015 * doc/c-mt.texi: Likewise.
2016 * doc/c-s390.texi: Likewise.
2017 * doc/c-score.texi: Likewise.
2018 * doc/c-sh.texi: Likewise.
2019 * doc/c-sh64.texi: Likewise.
2020 * doc/c-tic54x.texi: Likewise.
2021 * doc/c-tic6x.texi: Likewise.
2022 * doc/c-v850.texi: Likewise.
2023 * doc/c-xc16x.texi: Likewise.
2024 * doc/c-xgate.texi: Likewise.
2025 * doc/c-xtensa.texi: Likewise.
2026 * doc/c-z80.texi: Likewise.
2027 * doc/internals.texi: Likewise.
2028
2029 2013-01-10 Roland McGrath <mcgrathr@google.com>
2030
2031 * hash.c (hash_new_sized): Make it global.
2032 * hash.h: Declare it.
2033 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
2034 pass a small size.
2035
2036 2013-01-10 Will Newton <will.newton@imgtec.com>
2037
2038 * Makefile.am: Add Meta.
2039 * Makefile.in: Regenerate.
2040 * config/tc-metag.c: New file.
2041 * config/tc-metag.h: New file.
2042 * configure.tgt: Add Meta.
2043 * doc/Makefile.am: Add Meta.
2044 * doc/Makefile.in: Regenerate.
2045 * doc/all.texi: Add Meta.
2046 * doc/as.texiinfo: Document Meta options.
2047 * doc/c-metag.texi: New file.
2048
2049 2013-01-09 Steve Ellcey <sellcey@mips.com>
2050
2051 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
2052 calls.
2053 * config/tc-mips.c (internalError): Remove, replace with abort.
2054
2055 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
2056
2057 * config/tc-aarch64.c (parse_operands): Change to compare the result
2058 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2059
2060 2013-01-07 Nick Clifton <nickc@redhat.com>
2061
2062 PR gas/14887
2063 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2064 anticipated character.
2065 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2066 here as it is no longer needed.
2067
2068 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
2069
2070 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2071 * doc/c-score.texi (SCORE-Opts): Likewise.
2072 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2073
2074 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2075
2076 * config/tc-mips.c: Add support for MIPS r5900.
2077 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2078 lq and sq.
2079 (can_swap_branch_p, get_append_method): Detect some conditional
2080 short loops to fix a bug on the r5900 by NOP in the branch delay
2081 slot.
2082 (M_MUL): Support 3 operands in multu on r5900.
2083 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2084 (s_mipsset): Force 32 bit floating point on r5900.
2085 (mips_ip): Check parameter range of instructions mfps and mtps on
2086 r5900.
2087 * configure.in: Detect CPU type when target string contains r5900
2088 (e.g. mips64r5900el-linux-gnu).
2089
2090 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2091
2092 * as.c (parse_args): Update copyright year to 2013.
2093
2094 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2095
2096 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2097 and "cortex57".
2098
2099 2013-01-02 Nick Clifton <nickc@redhat.com>
2100
2101 PR gas/14987
2102 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2103 closing bracket.
2104
2105 For older changes see ChangeLog-2012
2106 \f
2107 Copyright (C) 2013 Free Software Foundation, Inc.
2108
2109 Copying and distribution of this file, with or without modification,
2110 are permitted in any medium without royalty provided the copyright
2111 notice and this notice are preserved.
2112
2113 Local Variables:
2114 mode: change-log
2115 left-margin: 8
2116 fill-column: 74
2117 version-control: never
2118 End: