gas/ChangeLog

   1 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
   2
   3         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
   4
   5 2006-04-30  Thiemo Seufer  <ths@mips.com>
   6             David Ung  <davidu@mips.com>
   7
   8         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
   9         (mips_immed): New table that records various handling of udi
  10         instruction patterns.
  11         (mips_ip): Adds udi handling.
  12
  13 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
  14
  15         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
  16         of list rather than beginning.
  17
  18 2006-04-26  Julian Brown  <julian@codesourcery.com>
  19
  20         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
  21         (is_quarter_float): Rename from above. Simplify slightly.
  22         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
  23         number.
  24         (parse_neon_mov): Parse floating-point constants.
  25         (neon_qfloat_bits): Fix encoding.
  26         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
  27         preference to integer encoding when using the F32 type.
  28
  29 2006-04-26  Julian Brown  <julian@codesourcery.com>
  30
  31         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
  32         zero-initialising structures containing it will lead to invalid types).
  33         (arm_it): Add vectype to each operand.
  34         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
  35         defined field.
  36         (neon_typed_alias): New structure. Extra information for typed
  37         register aliases.
  38         (reg_entry): Add neon type info field.
  39         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
  40         Break out alternative syntax for coprocessor registers, etc. into...
  41         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
  42         out from arm_reg_parse.
  43         (parse_neon_type): Move. Return SUCCESS/FAIL.
  44         (first_error): New function. Call to ensure first error which occurs is
  45         reported.
  46         (parse_neon_operand_type): Parse exactly one type.
  47         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
  48         (parse_typed_reg_or_scalar): New function. Handle core of both
  49         arm_typed_reg_parse and parse_scalar.
  50         (arm_typed_reg_parse): Parse a register with an optional type.
  51         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
  52         result.
  53         (parse_scalar): Parse a Neon scalar with optional type.
  54         (parse_reg_list): Use first_error.
  55         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
  56         (neon_alias_types_same): New function. Return true if two (alias) types
  57         are the same.
  58         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
  59         of elements.
  60         (insert_reg_alias): Return new reg_entry not void.
  61         (insert_neon_reg_alias): New function. Insert type/index information as
  62         well as register for alias.
  63         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
  64         make typed register aliases accordingly.
  65         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
  66         of line.
  67         (s_unreq): Delete type information if present.
  68         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
  69         (s_arm_unwind_save_mmxwcg): Likewise.
  70         (s_arm_unwind_movsp): Likewise.
  71         (s_arm_unwind_setfp): Likewise.
  72         (parse_shift): Likewise.
  73         (parse_shifter_operand): Likewise.
  74         (parse_address): Likewise.
  75         (parse_tb): Likewise.
  76         (tc_arm_regname_to_dw2regnum): Likewise.
  77         (md_pseudo_table): Add dn, qn.
  78         (parse_neon_mov): Handle typed operands.
  79         (parse_operands): Likewise.
  80         (neon_type_mask): Add N_SIZ.
  81         (N_ALLMODS): New macro.
  82         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
  83         (el_type_of_type_chk): Add some safeguards.
  84         (modify_types_allowed): Fix logic bug.
  85         (neon_check_type): Handle operands with types.
  86         (neon_three_same): Remove redundant optional arg handling.
  87         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
  88         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
  89         (do_neon_step): Adjust accordingly.
  90         (neon_cmode_for_logic_imm): Use first_error.
  91         (do_neon_bitfield): Call neon_check_type.
  92         (neon_dyadic): Rename to...
  93         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
  94         to allow modification of type of the destination.
  95         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
  96         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
  97         (do_neon_compare): Make destination be an untyped bitfield.
  98         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
  99         (neon_mul_mac): Return early in case of errors.
 100         (neon_move_immediate): Use first_error.
 101         (neon_mac_reg_scalar_long): Fix type to include scalar.
 102         (do_neon_dup): Likewise.
 103         (do_neon_mov): Likewise (in several places).
 104         (do_neon_tbl_tbx): Fix type.
 105         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 106         (do_neon_ld_dup): Exit early in case of errors and/or use
 107         first_error.
 108         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 109         Handle .dn/.qn directives.
 110         (REGDEF): Add zero for reg_entry neon field.
 111
 112 2006-04-26  Julian Brown  <julian@codesourcery.com>
 113
 114         * config/tc-arm.c (limits.h): Include.
 115         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 116         (fpu_vfp_v3_or_neon_ext): Declare constants.
 117         (neon_el_type): New enumeration of types for Neon vector elements.
 118         (neon_type_el): New struct. Define type and size of a vector element.
 119         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 120         instruction.
 121         (neon_type): Define struct. The type of an instruction.
 122         (arm_it): Add 'vectype' for the current instruction.
 123         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 124         (vfp_sp_reg_pos): Rename to...
 125         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 126         tags.
 127         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 128         (Neon D or Q register).
 129         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 130         register.
 131         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 132         (my_get_expression): Allow above constant as argument to accept
 133         64-bit constants with optional prefix.
 134         (arm_reg_parse): Add extra argument to return the specific type of
 135         register in when either a D or Q register (REG_TYPE_NDQ) is
 136         requested. Can be NULL.
 137         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 138         (parse_reg_list): Update for new arm_reg_parse args.
 139         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 140         (parse_neon_el_struct_list): New function. Parse element/structure
 141         register lists for VLD<n>/VST<n> instructions.
 142         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 143         (s_arm_unwind_save_mmxwr): Likewise.
 144         (s_arm_unwind_save_mmxwcg): Likewise.
 145         (s_arm_unwind_movsp): Likewise.
 146         (s_arm_unwind_setfp): Likewise.
 147         (parse_big_immediate): New function. Parse an immediate, which may be
 148         64 bits wide. Put results in inst.operands[i].
 149         (parse_shift): Update for new arm_reg_parse args.
 150         (parse_address): Likewise. Add parsing of alignment specifiers.
 151         (parse_neon_mov): Parse the operands of a VMOV instruction.
 152         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 153         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 154         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 155         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 156         (parse_operands): Handle new codes above.
 157         (encode_arm_vfp_sp_reg): Rename to...
 158         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 159         selected VFP version only supports D0-D15.
 160         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 161         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 162         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 163         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 164         encode_arm_vfp_reg name, and allow 32 D regs.
 165         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 166         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 167         regs.
 168         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 169         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 170         constant-load and conversion insns introduced with VFPv3.
 171         (neon_tab_entry): New struct.
 172         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 173         those which are the targets of pseudo-instructions.
 174         (neon_opc): Enumerate opcodes, use as indices into...
 175         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 176         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 177         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 178         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 179         neon_enc_tab.
 180         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 181         Neon instructions.
 182         (neon_type_mask): New. Compact type representation for type checking.
 183         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 184         permitted type combinations.
 185         (N_IGNORE_TYPE): New macro.
 186         (neon_check_shape): New function. Check an instruction shape for
 187         multiple alternatives. Return the specific shape for the current
 188         instruction.
 189         (neon_modify_type_size): New function. Modify a vector type and size,
 190         depending on the bit mask in argument 1.
 191         (neon_type_promote): New function. Convert a given "key" type (of an
 192         operand) into the correct type for a different operand, based on a bit
 193         mask.
 194         (type_chk_of_el_type): New function. Convert a type and size into the
 195         compact representation used for type checking.
 196         (el_type_of_type_ckh): New function. Reverse of above (only when a
 197         single bit is set in the bit mask).
 198         (modify_types_allowed): New function. Alter a mask of allowed types
 199         based on a bit mask of modifications.
 200         (neon_check_type): New function. Check the type of the current
 201         instruction against the variable argument list. The "key" type of the
 202         instruction is returned.
 203         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 204         a Neon data-processing instruction depending on whether we're in ARM
 205         mode or Thumb-2 mode.
 206         (neon_logbits): New function.
 207         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 208         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 209         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 210         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 211         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 212         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 213         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 214         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 215         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 216         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 217         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 218         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 219         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 220         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 221         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 222         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 223         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 224         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 225         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 226         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 227         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 228         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 229         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 230         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 231         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 232         helpers.
 233         (parse_neon_type): New function. Parse Neon type specifier.
 234         (opcode_lookup): Allow parsing of Neon type specifiers.
 235         (REGNUM2, REGSETH, REGSET2): New macros.
 236         (reg_names): Add new VFPv3 and Neon registers.
 237         (NUF, nUF, NCE, nCE): New macros for opcode table.
 238         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 239         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 240         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 241         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 242         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 243         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 244         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 245         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 246         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 247         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 248         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 249         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 250         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 251         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 252         fto[us][lh][sd].
 253         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 254         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 255         (arm_option_cpu_value): Add vfp3 and neon.
 256         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 257         VFPv1 attribute.
 258
 259 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 260
 261         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 262         syntax instead of hardcoded opcodes with ".w18" suffixes.
 263         (wide_branch_opcode): New.
 264         (build_transition): Use it to check for wide branch opcodes with
 265         either ".w18" or ".w15" suffixes.
 266
 267 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 268
 269         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 270         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 271         frag's is_literal flag.
 272
 273 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 274
 275         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 276
 277 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 278
 279         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 280         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 281         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 282         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 283         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 284
 285 2005-04-20  Paul Brook  <paul@codesourcery.com>
 286
 287         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 288         all targets.
 289         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 290
 291 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 292
 293         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 294         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 295         Make some cpus unsupported on ELF.  Run "make dep-am".
 296         * Makefile.in: Regenerate.
 297
 298 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 299
 300         * configure.in (--enable-targets): Indent help message.
 301         * configure: Regenerate.
 302
 303 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 304
 305         PR gas/2533
 306         * config/tc-i386.c (i386_immediate): Check illegal immediate
 307         register operand.
 308
 309 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 310
 311         * config/tc-i386.c: Formatting.
 312         (output_disp, output_imm): ISO C90 params.
 313
 314         * frags.c (frag_offset_fixed_p): Constify args.
 315         * frags.h (frag_offset_fixed_p): Ditto.
 316
 317         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 318         (COFF_MAGIC): Delete.
 319
 320         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 321
 322 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 323
 324         * po/POTFILES.in: Regenerated.
 325
 326 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 327
 328         * doc/as.texinfo: Mention that some .type syntaxes are not
 329         supported on all architectures.
 330
 331 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 332
 333         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 334         instructions when such transformations have been disabled.
 335
 336 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 337
 338         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 339         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 340         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 341         decoding the loop instructions.  Remove current_offset variable.
 342         (xtensa_fix_short_loop_frags): Likewise.
 343         (min_bytes_to_other_loop_end): Remove current_offset argument.
 344
 345 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 346
 347         * config/tc-z80.c (z80_optimize_expr): Removed.
 348         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 349
 350 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 351
 352         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 353         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 354         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 355         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 356         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 357         at90can64, at90usb646, at90usb647, at90usb1286 and
 358         at90usb1287.
 359         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 360
 361 2006-04-07  Paul Brook  <paul@codesourcery.com>
 362
 363         * config/tc-arm.c (parse_operands): Set default error message.
 364
 365 2006-04-07  Paul Brook  <paul@codesourcery.com>
 366
 367         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 368
 369 2006-04-07  Paul Brook  <paul@codesourcery.com>
 370
 371         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 372
 373 2006-04-07  Paul Brook  <paul@codesourcery.com>
 374
 375         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 376         (move_or_literal_pool): Handle Thumb-2 instructions.
 377         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 378
 379 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 380
 381         PR 2512.
 382         * config/tc-i386.c (match_template): Move 64-bit operand tests
 383         inside loop.
 384
 385 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 386
 387         * po/Make-in: Add install-html target.
 388         * Makefile.am: Add install-html and install-html-recursive targets.
 389         * Makefile.in: Regenerate.
 390         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 391         * configure: Regenerate.
 392         * doc/Makefile.am: Add install-html and install-html-am targets.
 393         * doc/Makefile.in: Regenerate.
 394
 395 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 396
 397         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 398         second scan.
 399
 400 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 401             Daniel Jacobowitz  <dan@codesourcery.com>
 402
 403         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 404         (GOTT_BASE, GOTT_INDEX): New.
 405         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 406         GOTT_INDEX when generating VxWorks PIC.
 407         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 408         use the generic *-*-vxworks* stanza instead.
 409
 410 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 411
 412         PR 997
 413         * frags.c (frag_offset_fixed_p): New function.
 414         * frags.h (frag_offset_fixed_p): Declare.
 415         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 416         (resolve_expression): Likewise.
 417
 418 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 419
 420         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 421         of the same length but different numbers of slots.
 422
 423 2006-03-30  Andreas Schwab  <schwab@suse.de>
 424
 425         * configure.in: Fix help string for --enable-targets option.
 426         * configure: Regenerate.
 427
 428 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 429
 430         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 431         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 432         overrun and avoid excessive copying.
 433
 434         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 435         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 436         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 437         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 438         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 439         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 440         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 441         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 442         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 443         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 444         (struct m68k_cpu): Change chip field to control_regs.
 445         (current_chip): Remove.
 446         (control_regs): New.
 447         (m68k_archs, m68k_extensions): Adjust.
 448         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 449         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 450         (find_cf_chip): Reimplement for new organization of cpu table.
 451         (select_control_regs): Remove.
 452         (mri_chip): Adjust.
 453         (struct save_opts): Save control regs, not chip.
 454         (s_save, s_restore): Adjust.
 455         (m68k_lookup_cpu): Give deprecated warning when necessary.
 456         (m68k_init_arch): Adjust.
 457         (md_show_usage): Adjust for new cpu table organization.
 458
 459 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 460
 461         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 462         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 463         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 464         "elf/bfin.h".
 465         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 466         (any_gotrel): New rule.
 467         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 468         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 469         "elf/bfin.h".
 470         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 471         (bfin_pic_ptr): New function.
 472         (md_pseudo_table): Add it for ".picptr".
 473         (OPTION_FDPIC): New macro.
 474         (md_longopts): Add -mfdpic.
 475         (md_parse_option): Handle it.
 476         (md_begin): Set BFD flags.
 477         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 478         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 479         us for GOT relocs.
 480         * Makefile.am (bfin-parse.o): Update dependencies.
 481         (DEPTC_bfin_elf): Likewise.
 482         * Makefile.in: Regenerate.
 483
 484 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 485
 486         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 487         mcfemac instead of mcfmac.
 488
 489 2006-03-23  Michael Matz  <matz@suse.de>
 490
 491         * config/tc-i386.c (type_names): Correct placement of 'static'.
 492         (reloc): Map some more relocs to their 64 bit counterpart when
 493         size is 8.
 494         (output_insn): Work around breakage if DEBUG386 is defined.
 495         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 496         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 497         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 498         different from i386.
 499         (output_imm): Ditto.
 500         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 501         Imm64.
 502         (md_convert_frag): Jumps can now be larger than 2GB away, error
 503         out in that case.
 504         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 505         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 506
 507 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 508             Daniel Jacobowitz  <dan@codesourcery.com>
 509             Phil Edwards  <phil@codesourcery.com>
 510             Zack Weinberg  <zack@codesourcery.com>
 511             Mark Mitchell  <mark@codesourcery.com>
 512             Nathan Sidwell  <nathan@codesourcery.com>
 513
 514         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 515         (md_begin): Complain about -G being used for PIC.  Don't change
 516         the text, data and bss alignments on VxWorks.
 517         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 518         generating VxWorks PIC.
 519         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 520         (macro): Likewise, but do not treat la $25 specially for
 521         VxWorks PIC, and do not handle jal.
 522         (OPTION_MVXWORKS_PIC): New macro.
 523         (md_longopts): Add -mvxworks-pic.
 524         (md_parse_option): Don't complain about using PIC and -G together here.
 525         Handle OPTION_MVXWORKS_PIC.
 526         (md_estimate_size_before_relax): Always use the first relaxation
 527         sequence on VxWorks.
 528         * config/tc-mips.h (VXWORKS_PIC): New.
 529
 530 2006-03-21  Paul Brook  <paul@codesourcery.com>
 531
 532         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 533
 534 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 535
 536         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 537         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 538         (get_loop_align_size): New.
 539         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 540         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 541         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 542         (get_noop_aligned_address): Use get_loop_align_size.
 543         (get_aligned_diff): Likewise.
 544
 545 2006-03-21  Paul Brook  <paul@codesourcery.com>
 546
 547         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 548
 549 2006-03-20  Paul Brook  <paul@codesourcery.com>
 550
 551         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 552         (do_t_branch): Encode branches inside IT blocks as unconditional.
 553         (do_t_cps): New function.
 554         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 555         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 556         (opcode_lookup): Allow conditional suffixes on all instructions in
 557         Thumb mode.
 558         (md_assemble): Advance condexec state before checking for errors.
 559         (insns): Use do_t_cps.
 560
 561 2006-03-20  Paul Brook  <paul@codesourcery.com>
 562
 563         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 564         outputting the insn.
 565
 566 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 567
 568         * config/tc-vax.c: Update copyright year.
 569         * config/tc-vax.h: Likewise.
 570
 571 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 572
 573         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 574         make it static.
 575         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 576
 577 2006-03-17  Paul Brook  <paul@codesourcery.com>
 578
 579         * config/tc-arm.c (insns): Add ldm and stm.
 580
 581 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 582
 583         PR gas/2446
 584         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 585
 586 2006-03-16  Paul Brook  <paul@codesourcery.com>
 587
 588         * config/tc-arm.c (insns): Add "svc".
 589
 590 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 591
 592         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 593         flag and avoid double underscore prefixes.
 594
 595 2006-03-10  Paul Brook  <paul@codesourcery.com>
 596
 597         * config/tc-arm.c (md_begin): Handle EABIv5.
 598         (arm_eabis): Add EF_ARM_EABI_VER5.
 599         * doc/c-arm.texi: Document -meabi=5.
 600
 601 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 602
 603         * app.c (do_scrub_chars): Simplify string handling.
 604
 605 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 606             Daniel Jacobowitz  <dan@codesourcery.com>
 607             Zack Weinberg  <zack@codesourcery.com>
 608             Nathan Sidwell  <nathan@codesourcery.com>
 609             Paul Brook  <paul@codesourcery.com>
 610             Ricardo Anguiano  <anguiano@codesourcery.com>
 611             Phil Edwards  <phil@codesourcery.com>
 612
 613         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 614         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 615         R_ARM_ABS12 reloc.
 616         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 617         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 618         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 619
 620 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 621
 622         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 623         even when using the text-section-literals option.
 624
 625 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 626
 627         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 628         and cf.
 629         (m68k_ip): <case 'J'> Check we have some control regs.
 630         (md_parse_option): Allow raw arch switch.
 631         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 632         whether 68881 or cfloat was meant by -mfloat.
 633         (md_show_usage): Adjust extension display.
 634         (m68k_elf_final_processing): Adjust.
 635
 636 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 637
 638         * config/tc-avr.c (avr_mod_hash_value): New function.
 639         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 640         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 641         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 642         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 643         of (int).
 644         (tc_gen_reloc): Handle substractions of symbols, if possible do
 645         fixups, abort otherwise.
 646         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 647         tc_fix_adjustable): Define.
 648
 649 2006-03-02  James E Wilson  <wilson@specifix.com>
 650
 651         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 652         change the template, then clear md.slot[curr].end_of_insn_group.
 653
 654 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 655
 656         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 657
 658 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 659
 660         PR/1070
 661         * macro.c (getstring): Don't treat parentheses special anymore.
 662         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 663         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 664         characters.
 665
 666 2006-02-28  Mat <mat@csail.mit.edu>
 667
 668         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 669
 670 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 671
 672         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 673         field.
 674         (CFI_signal_frame): Define.
 675         (cfi_pseudo_table): Add .cfi_signal_frame.
 676         (dot_cfi): Handle CFI_signal_frame.
 677         (output_cie): Handle cie->signal_frame.
 678         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 679         different.  Copy signal_frame from FDE to newly created CIE.
 680         * doc/as.texinfo: Document .cfi_signal_frame.
 681
 682 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 683
 684         * doc/Makefile.am: Add html target.
 685         * doc/Makefile.in: Regenerate.
 686         * po/Make-in: Add html target.
 687
 688 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 689
 690         * config/tc-i386.c (output_insn): Support Intel Merom New
 691         Instructions.
 692
 693         * config/tc-i386.h (CpuMNI): New.
 694         (CpuUnknownFlags): Add CpuMNI.
 695
 696 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 697
 698         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 699         (hpriv_reg_table): New table for hyperprivileged registers.
 700         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 701         register encoding.
 702
 703 2006-02-24  DJ Delorie  <dj@redhat.com>
 704
 705         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 706         (tc_gen_reloc): Don't define.
 707         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 708         (OPTION_LINKRELAX): New.
 709         (md_longopts): Add it.
 710         (m32c_relax): New.
 711         (md_parse_options): Set it.
 712         (md_assemble): Emit relaxation relocs as needed.
 713         (md_convert_frag): Emit relaxation relocs as needed.
 714         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 715         (m32c_apply_fix): New.
 716         (tc_gen_reloc): New.
 717         (m32c_force_relocation): Force out jump relocs when relaxing.
 718         (m32c_fix_adjustable): Return false if relaxing.
 719
 720 2006-02-24  Paul Brook  <paul@codesourcery.com>
 721
 722         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 723         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 724         (struct asm_barrier_opt): Define.
 725         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 726         (parse_psr): Accept V7M psr names.
 727         (parse_barrier): New function.
 728         (enum operand_parse_code): Add OP_oBARRIER.
 729         (parse_operands): Implement OP_oBARRIER.
 730         (do_barrier): New function.
 731         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 732         (do_t_cpsi): Add V7M restrictions.
 733         (do_t_mrs, do_t_msr): Validate V7M variants.
 734         (md_assemble): Check for NULL variants.
 735         (v7m_psrs, barrier_opt_names): New tables.
 736         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 737         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 738         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 739         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 740         (struct cpu_arch_ver_table): Define.
 741         (cpu_arch_ver): New.
 742         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 743         Tag_CPU_arch_profile.
 744         * doc/c-arm.texi: Document new cpu and arch options.
 745
 746 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 747
 748         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 749
 750 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 751
 752         * config/tc-ia64.c: Update copyright years.
 753
 754 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 755
 756         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 757         SDM 2.2.
 758
 759 2005-02-22  Paul Brook  <paul@codesourcery.com>
 760
 761         * config/tc-arm.c (do_pld): Remove incorrect write to
 762         inst.instruction.
 763         (encode_thumb32_addr_mode): Use correct operand.
 764
 765 2006-02-21  Paul Brook  <paul@codesourcery.com>
 766
 767         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 768
 769 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 770             Anil Paranjape   <anilp1@kpitcummins.com>
 771             Shilin Shakti    <shilins@kpitcummins.com>
 772
 773         * Makefile.am: Add xc16x related entry.
 774         * Makefile.in: Regenerate.
 775         * configure.in: Added xc16x related entry.
 776         * configure: Regenerate.
 777         * config/tc-xc16x.h: New file
 778         * config/tc-xc16x.c: New file
 779         * doc/c-xc16x.texi: New file for xc16x
 780         * doc/all.texi: Entry for xc16x
 781         * doc/Makefile.texi: Added c-xc16x.texi
 782         * NEWS: Announce the support for the new target.
 783
 784 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 785
 786         * configure.tgt: set emulation for mips-*-netbsd*
 787
 788 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 789
 790         * config.in: Rebuilt.
 791
 792 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 793
 794         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 795         from 1, not 0, in error messages.
 796         (md_assemble): Simplify special-case check for ENTRY instructions.
 797         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 798         operand in error message.
 799
 800 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 801
 802         * configure.tgt (arm-*-linux-gnueabi*): Change to
 803         arm-*-linux-*eabi*.
 804
 805 2006-02-10  Nick Clifton  <nickc@redhat.com>
 806
 807         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 808         32-bit value is propagated into the upper bits of a 64-bit long.
 809
 810         * config/tc-arc.c (init_opcode_tables): Fix cast.
 811         (arc_extoper, md_operand): Likewise.
 812
 813 2006-02-09  David Heine  <dlheine@tensilica.com>
 814
 815         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 816         each relaxation step.
 817
 818 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 819
 820         * configure.in (CHECK_DECLS): Add vsnprintf.
 821         * configure: Regenerate.
 822         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 823         include/declare here, but...
 824         * as.h: Move code detecting VARARGS idiom to the top.
 825         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 826         (vsnprintf): Declare if not already declared.
 827
 828 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 829
 830         * as.c (close_output_file): New.
 831         (main): Register close_output_file with xatexit before
 832         dump_statistics. Don't call output_file_close.
 833
 834 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 835
 836         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 837         mcf5329_control_regs): New.
 838         (not_current_architecture, selected_arch, selected_cpu): New.
 839         (m68k_archs, m68k_extensions): New.
 840         (archs): Renamed to ...
 841         (m68k_cpus): ... here.  Adjust.
 842         (n_arches): Remove.
 843         (md_pseudo_table): Add arch and cpu directives.
 844         (find_cf_chip, m68k_ip): Adjust table scanning.
 845         (no_68851, no_68881): Remove.
 846         (md_assemble): Lazily initialize.
 847         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 848         (md_init_after_args): Move functionality to m68k_init_arch.
 849         (mri_chip): Adjust table scanning.
 850         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 851         options with saner parsing.
 852         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 853         m68k_init_arch): New.
 854         (s_m68k_cpu, s_m68k_arch): New.
 855         (md_show_usage): Adjust.
 856         (m68k_elf_final_processing): Set CF EF flags.
 857         * config/tc-m68k.h (m68k_init_after_args): Remove.
 858         (tc_init_after_args): Remove.
 859         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 860         (M68k-Directives): Document .arch and .cpu directives.
 861
 862 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 863
 864         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 865         synonyms for equ and defl.
 866         (z80_cons_fix_new): New function.
 867         (emit_byte): Disallow relative jumps to absolute locations.
 868         (emit_data): Only handle defb, prototype changed, because defb is
 869         now handled as pseudo-op rather than an instruction.
 870         (instab): Entries for defb,defw,db,dw moved from here...
 871         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 872         Add entries for def24,def32,d24,d32.
 873         (md_assemble): Improved error handling.
 874         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 875         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 876         (z80_cons_fix_new): Declare.
 877         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 878         (def24,d24,def32,d32): New pseudo-ops.
 879
 880 2006-02-02  Paul Brook  <paul@codesourcery.com>
 881
 882         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 883
 884 2005-02-02  Paul Brook  <paul@codesourcery.com>
 885
 886         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 887         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
 888         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
 889         T2_OPCODE_RSB): Define.
 890         (thumb32_negate_data_op): New function.
 891         (md_apply_fix): Use it.
 892
 893 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
 894
 895         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
 896         fields.
 897         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
 898         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
 899         subtracted symbols.
 900         (relaxation_requirements): Add pfinish_frag argument and use it to
 901         replace setting tinsn->record_fix fields.
 902         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
 903         and vinsn_to_insnbuf.  Remove references to record_fix and
 904         slot_sub_symbols fields.
 905         (xtensa_mark_narrow_branches): Delete unused code.
 906         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
 907         a symbol.
 908         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
 909         record_fix fields.
 910         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
 911         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
 912         of the record_fix field.  Simplify error messages for unexpected
 913         symbolic operands.
 914         (set_expr_symbol_offset_diff): Delete.
 915
 916 2006-01-31  Paul Brook  <paul@codesourcery.com>
 917
 918         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
 919
 920 2006-01-31  Paul Brook  <paul@codesourcery.com>
 921         Richard Earnshaw <rearnsha@arm.com>
 922
 923         * config/tc-arm.c: Use arm_feature_set.
 924         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
 925         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
 926         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
 927         New variables.
 928         (insns): Use them.
 929         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
 930         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
 931         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
 932         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
 933         feature flags.
 934         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
 935         (arm_opts): Move old cpu/arch options from here...
 936         (arm_legacy_opts): ... to here.
 937         (md_parse_option): Search arm_legacy_opts.
 938         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
 939         (arm_float_abis, arm_eabis): Make const.
 940
 941 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
 942
 943         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
 944
 945 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 946
 947         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
 948         in load immediate intruction.
 949
 950 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 951
 952         * config/bfin-parse.y (value_match): Use correct conversion
 953         specifications in template string for __FILE__ and __LINE__.
 954         (binary): Ditto.
 955         (unary): Ditto.
 956
 957 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
 958
 959         Introduce TLS descriptors for i386 and x86_64.
 960         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
 961         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
 962         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
 963         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
 964         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
 965         displacement bits.
 966         (build_modrm_byte): Set up zero modrm for TLS desc calls.
 967         (lex_got): Handle @tlsdesc and @tlscall.
 968         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
 969
 970 2006-01-11  Nick Clifton  <nickc@redhat.com>
 971
 972         Fixes for building on 64-bit hosts:
 973         * config/tc-avr.c (mod_index): New union to allow conversion
 974         between pointers and integers.
 975         (md_begin, avr_ldi_expression): Use it.
 976         * config/tc-i370.c (md_assemble): Add cast for argument to print
 977         statement.
 978         * config/tc-tic54x.c (subsym_substitute): Likewise.
 979         * config/tc-mn10200.c (md_assemble): Use a union to convert the
 980         opindex field of fr_cgen structure into a pointer so that it can
 981         be stored in a frag.
 982         * config/tc-mn10300.c (md_assemble): Likewise.
 983         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
 984         types.
 985         * config/tc-v850.c: Replace uses of (int) casts with correct
 986         types.
 987
 988 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
 989
 990         PR gas/2117
 991         * symbols.c (snapshot_symbol): Don't change a defined symbol.
 992
 993 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
 994
 995         PR gas/2101
 996         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
 997         a local-label reference.
 998
 999 For older changes see ChangeLog-2005
1000 \f
1001 Local Variables:
1002 mode: change-log
1003 left-margin: 8
1004 fill-column: 74
1005 version-control: never
1006 End: