gas/ChangeLog

   1 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
   2
   3         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
   4         here.
   5         (md_apply_fix3): Multiply offset by 4 here for
   6         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
   7
   8 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
   9             Jan Beulich  <jbeulich@novell.com>
  10
  11         * config/tc-i386.c (output_invalid_buf): Change size for
  12         unsigned char.
  13         * config/tc-tic30.c (output_invalid_buf): Likewise.
  14
  15         * config/tc-i386.c (output_invalid): Cast none-ascii char to
  16         unsigned char.
  17         * config/tc-tic30.c (output_invalid): Likewise.
  18
  19 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
  20
  21         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
  22         (TEXI2POD): Use AM_MAKEINFOFLAGS.
  23         (asconfig.texi): Don't set top_srcdir.
  24         * doc/as.texinfo: Don't use top_srcdir.
  25         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
  26
  27 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
  28
  29         * config/tc-i386.c (output_invalid_buf): Change size to 16.
  30         * config/tc-tic30.c (output_invalid_buf): Likewise.
  31
  32         * config/tc-i386.c (output_invalid): Use snprintf instead of
  33         sprintf.
  34         * config/tc-ia64.c (declare_register_set): Likewise.
  35         (emit_one_bundle): Likewise.
  36         (check_dependencies): Likewise.
  37         * config/tc-tic30.c (output_invalid): Likewise.
  38
  39 2006-05-02  Paul Brook  <paul@codesourcery.com>
  40
  41         * config/tc-arm.c (arm_optimize_expr): New function.
  42         * config/tc-arm.h (md_optimize_expr): Define
  43         (arm_optimize_expr): Add prototype.
  44         (TC_FORCE_RELOCATION_SUB_SAME): Define.
  45
  46 2006-05-02  Ben Elliston  <bje@au.ibm.com>
  47
  48         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
  49         field unsigned.
  50
  51         * sb.h (sb_list_vector): Move to sb.c.
  52         * sb.c (free_list): Use type of sb_list_vector directly.
  53         (sb_build): Fix off-by-one error in assertion about `size'.
  54
  55 2006-05-01  Ben Elliston  <bje@au.ibm.com>
  56
  57         * listing.c (listing_listing): Remove useless loop.
  58         * macro.c (macro_expand): Remove is_positional local variable.
  59         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
  60         and simplify surrounding expressions, where possible.
  61         (assign_symbol): Likewise.
  62         (s_weakref): Likewise.
  63         * symbols.c (colon): Likewise.
  64
  65 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
  66
  67         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
  68
  69 2006-04-30  Thiemo Seufer  <ths@mips.com>
  70             David Ung  <davidu@mips.com>
  71
  72         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
  73         (mips_immed): New table that records various handling of udi
  74         instruction patterns.
  75         (mips_ip): Adds udi handling.
  76
  77 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
  78
  79         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
  80         of list rather than beginning.
  81
  82 2006-04-26  Julian Brown  <julian@codesourcery.com>
  83
  84         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
  85         (is_quarter_float): Rename from above. Simplify slightly.
  86         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
  87         number.
  88         (parse_neon_mov): Parse floating-point constants.
  89         (neon_qfloat_bits): Fix encoding.
  90         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
  91         preference to integer encoding when using the F32 type.
  92
  93 2006-04-26  Julian Brown  <julian@codesourcery.com>
  94
  95         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
  96         zero-initialising structures containing it will lead to invalid types).
  97         (arm_it): Add vectype to each operand.
  98         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
  99         defined field.
 100         (neon_typed_alias): New structure. Extra information for typed
 101         register aliases.
 102         (reg_entry): Add neon type info field.
 103         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 104         Break out alternative syntax for coprocessor registers, etc. into...
 105         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 106         out from arm_reg_parse.
 107         (parse_neon_type): Move. Return SUCCESS/FAIL.
 108         (first_error): New function. Call to ensure first error which occurs is
 109         reported.
 110         (parse_neon_operand_type): Parse exactly one type.
 111         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 112         (parse_typed_reg_or_scalar): New function. Handle core of both
 113         arm_typed_reg_parse and parse_scalar.
 114         (arm_typed_reg_parse): Parse a register with an optional type.
 115         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 116         result.
 117         (parse_scalar): Parse a Neon scalar with optional type.
 118         (parse_reg_list): Use first_error.
 119         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 120         (neon_alias_types_same): New function. Return true if two (alias) types
 121         are the same.
 122         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 123         of elements.
 124         (insert_reg_alias): Return new reg_entry not void.
 125         (insert_neon_reg_alias): New function. Insert type/index information as
 126         well as register for alias.
 127         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 128         make typed register aliases accordingly.
 129         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 130         of line.
 131         (s_unreq): Delete type information if present.
 132         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 133         (s_arm_unwind_save_mmxwcg): Likewise.
 134         (s_arm_unwind_movsp): Likewise.
 135         (s_arm_unwind_setfp): Likewise.
 136         (parse_shift): Likewise.
 137         (parse_shifter_operand): Likewise.
 138         (parse_address): Likewise.
 139         (parse_tb): Likewise.
 140         (tc_arm_regname_to_dw2regnum): Likewise.
 141         (md_pseudo_table): Add dn, qn.
 142         (parse_neon_mov): Handle typed operands.
 143         (parse_operands): Likewise.
 144         (neon_type_mask): Add N_SIZ.
 145         (N_ALLMODS): New macro.
 146         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 147         (el_type_of_type_chk): Add some safeguards.
 148         (modify_types_allowed): Fix logic bug.
 149         (neon_check_type): Handle operands with types.
 150         (neon_three_same): Remove redundant optional arg handling.
 151         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 152         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 153         (do_neon_step): Adjust accordingly.
 154         (neon_cmode_for_logic_imm): Use first_error.
 155         (do_neon_bitfield): Call neon_check_type.
 156         (neon_dyadic): Rename to...
 157         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 158         to allow modification of type of the destination.
 159         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 160         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 161         (do_neon_compare): Make destination be an untyped bitfield.
 162         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 163         (neon_mul_mac): Return early in case of errors.
 164         (neon_move_immediate): Use first_error.
 165         (neon_mac_reg_scalar_long): Fix type to include scalar.
 166         (do_neon_dup): Likewise.
 167         (do_neon_mov): Likewise (in several places).
 168         (do_neon_tbl_tbx): Fix type.
 169         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 170         (do_neon_ld_dup): Exit early in case of errors and/or use
 171         first_error.
 172         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 173         Handle .dn/.qn directives.
 174         (REGDEF): Add zero for reg_entry neon field.
 175
 176 2006-04-26  Julian Brown  <julian@codesourcery.com>
 177
 178         * config/tc-arm.c (limits.h): Include.
 179         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 180         (fpu_vfp_v3_or_neon_ext): Declare constants.
 181         (neon_el_type): New enumeration of types for Neon vector elements.
 182         (neon_type_el): New struct. Define type and size of a vector element.
 183         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 184         instruction.
 185         (neon_type): Define struct. The type of an instruction.
 186         (arm_it): Add 'vectype' for the current instruction.
 187         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 188         (vfp_sp_reg_pos): Rename to...
 189         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 190         tags.
 191         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 192         (Neon D or Q register).
 193         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 194         register.
 195         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 196         (my_get_expression): Allow above constant as argument to accept
 197         64-bit constants with optional prefix.
 198         (arm_reg_parse): Add extra argument to return the specific type of
 199         register in when either a D or Q register (REG_TYPE_NDQ) is
 200         requested. Can be NULL.
 201         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 202         (parse_reg_list): Update for new arm_reg_parse args.
 203         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 204         (parse_neon_el_struct_list): New function. Parse element/structure
 205         register lists for VLD<n>/VST<n> instructions.
 206         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 207         (s_arm_unwind_save_mmxwr): Likewise.
 208         (s_arm_unwind_save_mmxwcg): Likewise.
 209         (s_arm_unwind_movsp): Likewise.
 210         (s_arm_unwind_setfp): Likewise.
 211         (parse_big_immediate): New function. Parse an immediate, which may be
 212         64 bits wide. Put results in inst.operands[i].
 213         (parse_shift): Update for new arm_reg_parse args.
 214         (parse_address): Likewise. Add parsing of alignment specifiers.
 215         (parse_neon_mov): Parse the operands of a VMOV instruction.
 216         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 217         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 218         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 219         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 220         (parse_operands): Handle new codes above.
 221         (encode_arm_vfp_sp_reg): Rename to...
 222         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 223         selected VFP version only supports D0-D15.
 224         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 225         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 226         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 227         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 228         encode_arm_vfp_reg name, and allow 32 D regs.
 229         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 230         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 231         regs.
 232         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 233         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 234         constant-load and conversion insns introduced with VFPv3.
 235         (neon_tab_entry): New struct.
 236         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 237         those which are the targets of pseudo-instructions.
 238         (neon_opc): Enumerate opcodes, use as indices into...
 239         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 240         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 241         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 242         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 243         neon_enc_tab.
 244         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 245         Neon instructions.
 246         (neon_type_mask): New. Compact type representation for type checking.
 247         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 248         permitted type combinations.
 249         (N_IGNORE_TYPE): New macro.
 250         (neon_check_shape): New function. Check an instruction shape for
 251         multiple alternatives. Return the specific shape for the current
 252         instruction.
 253         (neon_modify_type_size): New function. Modify a vector type and size,
 254         depending on the bit mask in argument 1.
 255         (neon_type_promote): New function. Convert a given "key" type (of an
 256         operand) into the correct type for a different operand, based on a bit
 257         mask.
 258         (type_chk_of_el_type): New function. Convert a type and size into the
 259         compact representation used for type checking.
 260         (el_type_of_type_ckh): New function. Reverse of above (only when a
 261         single bit is set in the bit mask).
 262         (modify_types_allowed): New function. Alter a mask of allowed types
 263         based on a bit mask of modifications.
 264         (neon_check_type): New function. Check the type of the current
 265         instruction against the variable argument list. The "key" type of the
 266         instruction is returned.
 267         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 268         a Neon data-processing instruction depending on whether we're in ARM
 269         mode or Thumb-2 mode.
 270         (neon_logbits): New function.
 271         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 272         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 273         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 274         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 275         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 276         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 277         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 278         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 279         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 280         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 281         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 282         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 283         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 284         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 285         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 286         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 287         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 288         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 289         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 290         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 291         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 292         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 293         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 294         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 295         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 296         helpers.
 297         (parse_neon_type): New function. Parse Neon type specifier.
 298         (opcode_lookup): Allow parsing of Neon type specifiers.
 299         (REGNUM2, REGSETH, REGSET2): New macros.
 300         (reg_names): Add new VFPv3 and Neon registers.
 301         (NUF, nUF, NCE, nCE): New macros for opcode table.
 302         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 303         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 304         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 305         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 306         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 307         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 308         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 309         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 310         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 311         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 312         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 313         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 314         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 315         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 316         fto[us][lh][sd].
 317         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 318         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 319         (arm_option_cpu_value): Add vfp3 and neon.
 320         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 321         VFPv1 attribute.
 322
 323 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 324
 325         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 326         syntax instead of hardcoded opcodes with ".w18" suffixes.
 327         (wide_branch_opcode): New.
 328         (build_transition): Use it to check for wide branch opcodes with
 329         either ".w18" or ".w15" suffixes.
 330
 331 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 332
 333         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 334         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 335         frag's is_literal flag.
 336
 337 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 338
 339         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 340
 341 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 342
 343         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 344         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 345         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 346         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 347         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 348
 349 2005-04-20  Paul Brook  <paul@codesourcery.com>
 350
 351         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 352         all targets.
 353         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 354
 355 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 356
 357         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 358         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 359         Make some cpus unsupported on ELF.  Run "make dep-am".
 360         * Makefile.in: Regenerate.
 361
 362 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 363
 364         * configure.in (--enable-targets): Indent help message.
 365         * configure: Regenerate.
 366
 367 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 368
 369         PR gas/2533
 370         * config/tc-i386.c (i386_immediate): Check illegal immediate
 371         register operand.
 372
 373 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 374
 375         * config/tc-i386.c: Formatting.
 376         (output_disp, output_imm): ISO C90 params.
 377
 378         * frags.c (frag_offset_fixed_p): Constify args.
 379         * frags.h (frag_offset_fixed_p): Ditto.
 380
 381         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 382         (COFF_MAGIC): Delete.
 383
 384         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 385
 386 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 387
 388         * po/POTFILES.in: Regenerated.
 389
 390 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 391
 392         * doc/as.texinfo: Mention that some .type syntaxes are not
 393         supported on all architectures.
 394
 395 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 396
 397         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 398         instructions when such transformations have been disabled.
 399
 400 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 401
 402         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 403         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 404         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 405         decoding the loop instructions.  Remove current_offset variable.
 406         (xtensa_fix_short_loop_frags): Likewise.
 407         (min_bytes_to_other_loop_end): Remove current_offset argument.
 408
 409 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 410
 411         * config/tc-z80.c (z80_optimize_expr): Removed.
 412         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 413
 414 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 415
 416         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 417         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 418         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 419         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 420         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 421         at90can64, at90usb646, at90usb647, at90usb1286 and
 422         at90usb1287.
 423         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 424
 425 2006-04-07  Paul Brook  <paul@codesourcery.com>
 426
 427         * config/tc-arm.c (parse_operands): Set default error message.
 428
 429 2006-04-07  Paul Brook  <paul@codesourcery.com>
 430
 431         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 432
 433 2006-04-07  Paul Brook  <paul@codesourcery.com>
 434
 435         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 436
 437 2006-04-07  Paul Brook  <paul@codesourcery.com>
 438
 439         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 440         (move_or_literal_pool): Handle Thumb-2 instructions.
 441         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 442
 443 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 444
 445         PR 2512.
 446         * config/tc-i386.c (match_template): Move 64-bit operand tests
 447         inside loop.
 448
 449 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 450
 451         * po/Make-in: Add install-html target.
 452         * Makefile.am: Add install-html and install-html-recursive targets.
 453         * Makefile.in: Regenerate.
 454         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 455         * configure: Regenerate.
 456         * doc/Makefile.am: Add install-html and install-html-am targets.
 457         * doc/Makefile.in: Regenerate.
 458
 459 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 460
 461         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 462         second scan.
 463
 464 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 465             Daniel Jacobowitz  <dan@codesourcery.com>
 466
 467         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 468         (GOTT_BASE, GOTT_INDEX): New.
 469         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 470         GOTT_INDEX when generating VxWorks PIC.
 471         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 472         use the generic *-*-vxworks* stanza instead.
 473
 474 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 475
 476         PR 997
 477         * frags.c (frag_offset_fixed_p): New function.
 478         * frags.h (frag_offset_fixed_p): Declare.
 479         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 480         (resolve_expression): Likewise.
 481
 482 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 483
 484         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 485         of the same length but different numbers of slots.
 486
 487 2006-03-30  Andreas Schwab  <schwab@suse.de>
 488
 489         * configure.in: Fix help string for --enable-targets option.
 490         * configure: Regenerate.
 491
 492 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 493
 494         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 495         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 496         overrun and avoid excessive copying.
 497
 498         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 499         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 500         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 501         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 502         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 503         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 504         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 505         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 506         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 507         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 508         (struct m68k_cpu): Change chip field to control_regs.
 509         (current_chip): Remove.
 510         (control_regs): New.
 511         (m68k_archs, m68k_extensions): Adjust.
 512         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 513         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 514         (find_cf_chip): Reimplement for new organization of cpu table.
 515         (select_control_regs): Remove.
 516         (mri_chip): Adjust.
 517         (struct save_opts): Save control regs, not chip.
 518         (s_save, s_restore): Adjust.
 519         (m68k_lookup_cpu): Give deprecated warning when necessary.
 520         (m68k_init_arch): Adjust.
 521         (md_show_usage): Adjust for new cpu table organization.
 522
 523 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 524
 525         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 526         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 527         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 528         "elf/bfin.h".
 529         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 530         (any_gotrel): New rule.
 531         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 532         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 533         "elf/bfin.h".
 534         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 535         (bfin_pic_ptr): New function.
 536         (md_pseudo_table): Add it for ".picptr".
 537         (OPTION_FDPIC): New macro.
 538         (md_longopts): Add -mfdpic.
 539         (md_parse_option): Handle it.
 540         (md_begin): Set BFD flags.
 541         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 542         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 543         us for GOT relocs.
 544         * Makefile.am (bfin-parse.o): Update dependencies.
 545         (DEPTC_bfin_elf): Likewise.
 546         * Makefile.in: Regenerate.
 547
 548 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 549
 550         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 551         mcfemac instead of mcfmac.
 552
 553 2006-03-23  Michael Matz  <matz@suse.de>
 554
 555         * config/tc-i386.c (type_names): Correct placement of 'static'.
 556         (reloc): Map some more relocs to their 64 bit counterpart when
 557         size is 8.
 558         (output_insn): Work around breakage if DEBUG386 is defined.
 559         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 560         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 561         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 562         different from i386.
 563         (output_imm): Ditto.
 564         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 565         Imm64.
 566         (md_convert_frag): Jumps can now be larger than 2GB away, error
 567         out in that case.
 568         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 569         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 570
 571 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 572             Daniel Jacobowitz  <dan@codesourcery.com>
 573             Phil Edwards  <phil@codesourcery.com>
 574             Zack Weinberg  <zack@codesourcery.com>
 575             Mark Mitchell  <mark@codesourcery.com>
 576             Nathan Sidwell  <nathan@codesourcery.com>
 577
 578         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 579         (md_begin): Complain about -G being used for PIC.  Don't change
 580         the text, data and bss alignments on VxWorks.
 581         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 582         generating VxWorks PIC.
 583         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 584         (macro): Likewise, but do not treat la $25 specially for
 585         VxWorks PIC, and do not handle jal.
 586         (OPTION_MVXWORKS_PIC): New macro.
 587         (md_longopts): Add -mvxworks-pic.
 588         (md_parse_option): Don't complain about using PIC and -G together here.
 589         Handle OPTION_MVXWORKS_PIC.
 590         (md_estimate_size_before_relax): Always use the first relaxation
 591         sequence on VxWorks.
 592         * config/tc-mips.h (VXWORKS_PIC): New.
 593
 594 2006-03-21  Paul Brook  <paul@codesourcery.com>
 595
 596         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 597
 598 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 599
 600         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 601         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 602         (get_loop_align_size): New.
 603         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 604         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 605         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 606         (get_noop_aligned_address): Use get_loop_align_size.
 607         (get_aligned_diff): Likewise.
 608
 609 2006-03-21  Paul Brook  <paul@codesourcery.com>
 610
 611         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 612
 613 2006-03-20  Paul Brook  <paul@codesourcery.com>
 614
 615         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 616         (do_t_branch): Encode branches inside IT blocks as unconditional.
 617         (do_t_cps): New function.
 618         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 619         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 620         (opcode_lookup): Allow conditional suffixes on all instructions in
 621         Thumb mode.
 622         (md_assemble): Advance condexec state before checking for errors.
 623         (insns): Use do_t_cps.
 624
 625 2006-03-20  Paul Brook  <paul@codesourcery.com>
 626
 627         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 628         outputting the insn.
 629
 630 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 631
 632         * config/tc-vax.c: Update copyright year.
 633         * config/tc-vax.h: Likewise.
 634
 635 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 636
 637         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 638         make it static.
 639         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 640
 641 2006-03-17  Paul Brook  <paul@codesourcery.com>
 642
 643         * config/tc-arm.c (insns): Add ldm and stm.
 644
 645 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 646
 647         PR gas/2446
 648         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 649
 650 2006-03-16  Paul Brook  <paul@codesourcery.com>
 651
 652         * config/tc-arm.c (insns): Add "svc".
 653
 654 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 655
 656         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 657         flag and avoid double underscore prefixes.
 658
 659 2006-03-10  Paul Brook  <paul@codesourcery.com>
 660
 661         * config/tc-arm.c (md_begin): Handle EABIv5.
 662         (arm_eabis): Add EF_ARM_EABI_VER5.
 663         * doc/c-arm.texi: Document -meabi=5.
 664
 665 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 666
 667         * app.c (do_scrub_chars): Simplify string handling.
 668
 669 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 670             Daniel Jacobowitz  <dan@codesourcery.com>
 671             Zack Weinberg  <zack@codesourcery.com>
 672             Nathan Sidwell  <nathan@codesourcery.com>
 673             Paul Brook  <paul@codesourcery.com>
 674             Ricardo Anguiano  <anguiano@codesourcery.com>
 675             Phil Edwards  <phil@codesourcery.com>
 676
 677         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 678         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 679         R_ARM_ABS12 reloc.
 680         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 681         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 682         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 683
 684 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 685
 686         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 687         even when using the text-section-literals option.
 688
 689 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 690
 691         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 692         and cf.
 693         (m68k_ip): <case 'J'> Check we have some control regs.
 694         (md_parse_option): Allow raw arch switch.
 695         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 696         whether 68881 or cfloat was meant by -mfloat.
 697         (md_show_usage): Adjust extension display.
 698         (m68k_elf_final_processing): Adjust.
 699
 700 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 701
 702         * config/tc-avr.c (avr_mod_hash_value): New function.
 703         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 704         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 705         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 706         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 707         of (int).
 708         (tc_gen_reloc): Handle substractions of symbols, if possible do
 709         fixups, abort otherwise.
 710         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 711         tc_fix_adjustable): Define.
 712
 713 2006-03-02  James E Wilson  <wilson@specifix.com>
 714
 715         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 716         change the template, then clear md.slot[curr].end_of_insn_group.
 717
 718 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 719
 720         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 721
 722 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 723
 724         PR/1070
 725         * macro.c (getstring): Don't treat parentheses special anymore.
 726         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 727         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 728         characters.
 729
 730 2006-02-28  Mat <mat@csail.mit.edu>
 731
 732         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 733
 734 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 735
 736         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 737         field.
 738         (CFI_signal_frame): Define.
 739         (cfi_pseudo_table): Add .cfi_signal_frame.
 740         (dot_cfi): Handle CFI_signal_frame.
 741         (output_cie): Handle cie->signal_frame.
 742         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 743         different.  Copy signal_frame from FDE to newly created CIE.
 744         * doc/as.texinfo: Document .cfi_signal_frame.
 745
 746 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 747
 748         * doc/Makefile.am: Add html target.
 749         * doc/Makefile.in: Regenerate.
 750         * po/Make-in: Add html target.
 751
 752 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 753
 754         * config/tc-i386.c (output_insn): Support Intel Merom New
 755         Instructions.
 756
 757         * config/tc-i386.h (CpuMNI): New.
 758         (CpuUnknownFlags): Add CpuMNI.
 759
 760 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 761
 762         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 763         (hpriv_reg_table): New table for hyperprivileged registers.
 764         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 765         register encoding.
 766
 767 2006-02-24  DJ Delorie  <dj@redhat.com>
 768
 769         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 770         (tc_gen_reloc): Don't define.
 771         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 772         (OPTION_LINKRELAX): New.
 773         (md_longopts): Add it.
 774         (m32c_relax): New.
 775         (md_parse_options): Set it.
 776         (md_assemble): Emit relaxation relocs as needed.
 777         (md_convert_frag): Emit relaxation relocs as needed.
 778         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 779         (m32c_apply_fix): New.
 780         (tc_gen_reloc): New.
 781         (m32c_force_relocation): Force out jump relocs when relaxing.
 782         (m32c_fix_adjustable): Return false if relaxing.
 783
 784 2006-02-24  Paul Brook  <paul@codesourcery.com>
 785
 786         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 787         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 788         (struct asm_barrier_opt): Define.
 789         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 790         (parse_psr): Accept V7M psr names.
 791         (parse_barrier): New function.
 792         (enum operand_parse_code): Add OP_oBARRIER.
 793         (parse_operands): Implement OP_oBARRIER.
 794         (do_barrier): New function.
 795         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 796         (do_t_cpsi): Add V7M restrictions.
 797         (do_t_mrs, do_t_msr): Validate V7M variants.
 798         (md_assemble): Check for NULL variants.
 799         (v7m_psrs, barrier_opt_names): New tables.
 800         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 801         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 802         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 803         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 804         (struct cpu_arch_ver_table): Define.
 805         (cpu_arch_ver): New.
 806         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 807         Tag_CPU_arch_profile.
 808         * doc/c-arm.texi: Document new cpu and arch options.
 809
 810 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 811
 812         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 813
 814 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 815
 816         * config/tc-ia64.c: Update copyright years.
 817
 818 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 819
 820         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 821         SDM 2.2.
 822
 823 2005-02-22  Paul Brook  <paul@codesourcery.com>
 824
 825         * config/tc-arm.c (do_pld): Remove incorrect write to
 826         inst.instruction.
 827         (encode_thumb32_addr_mode): Use correct operand.
 828
 829 2006-02-21  Paul Brook  <paul@codesourcery.com>
 830
 831         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 832
 833 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 834             Anil Paranjape   <anilp1@kpitcummins.com>
 835             Shilin Shakti    <shilins@kpitcummins.com>
 836
 837         * Makefile.am: Add xc16x related entry.
 838         * Makefile.in: Regenerate.
 839         * configure.in: Added xc16x related entry.
 840         * configure: Regenerate.
 841         * config/tc-xc16x.h: New file
 842         * config/tc-xc16x.c: New file
 843         * doc/c-xc16x.texi: New file for xc16x
 844         * doc/all.texi: Entry for xc16x
 845         * doc/Makefile.texi: Added c-xc16x.texi
 846         * NEWS: Announce the support for the new target.
 847
 848 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 849
 850         * configure.tgt: set emulation for mips-*-netbsd*
 851
 852 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 853
 854         * config.in: Rebuilt.
 855
 856 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 857
 858         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 859         from 1, not 0, in error messages.
 860         (md_assemble): Simplify special-case check for ENTRY instructions.
 861         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 862         operand in error message.
 863
 864 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 865
 866         * configure.tgt (arm-*-linux-gnueabi*): Change to
 867         arm-*-linux-*eabi*.
 868
 869 2006-02-10  Nick Clifton  <nickc@redhat.com>
 870
 871         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 872         32-bit value is propagated into the upper bits of a 64-bit long.
 873
 874         * config/tc-arc.c (init_opcode_tables): Fix cast.
 875         (arc_extoper, md_operand): Likewise.
 876
 877 2006-02-09  David Heine  <dlheine@tensilica.com>
 878
 879         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 880         each relaxation step.
 881
 882 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 883
 884         * configure.in (CHECK_DECLS): Add vsnprintf.
 885         * configure: Regenerate.
 886         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 887         include/declare here, but...
 888         * as.h: Move code detecting VARARGS idiom to the top.
 889         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 890         (vsnprintf): Declare if not already declared.
 891
 892 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 893
 894         * as.c (close_output_file): New.
 895         (main): Register close_output_file with xatexit before
 896         dump_statistics. Don't call output_file_close.
 897
 898 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 899
 900         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 901         mcf5329_control_regs): New.
 902         (not_current_architecture, selected_arch, selected_cpu): New.
 903         (m68k_archs, m68k_extensions): New.
 904         (archs): Renamed to ...
 905         (m68k_cpus): ... here.  Adjust.
 906         (n_arches): Remove.
 907         (md_pseudo_table): Add arch and cpu directives.
 908         (find_cf_chip, m68k_ip): Adjust table scanning.
 909         (no_68851, no_68881): Remove.
 910         (md_assemble): Lazily initialize.
 911         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 912         (md_init_after_args): Move functionality to m68k_init_arch.
 913         (mri_chip): Adjust table scanning.
 914         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 915         options with saner parsing.
 916         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 917         m68k_init_arch): New.
 918         (s_m68k_cpu, s_m68k_arch): New.
 919         (md_show_usage): Adjust.
 920         (m68k_elf_final_processing): Set CF EF flags.
 921         * config/tc-m68k.h (m68k_init_after_args): Remove.
 922         (tc_init_after_args): Remove.
 923         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 924         (M68k-Directives): Document .arch and .cpu directives.
 925
 926 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 927
 928         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 929         synonyms for equ and defl.
 930         (z80_cons_fix_new): New function.
 931         (emit_byte): Disallow relative jumps to absolute locations.
 932         (emit_data): Only handle defb, prototype changed, because defb is
 933         now handled as pseudo-op rather than an instruction.
 934         (instab): Entries for defb,defw,db,dw moved from here...
 935         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 936         Add entries for def24,def32,d24,d32.
 937         (md_assemble): Improved error handling.
 938         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 939         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 940         (z80_cons_fix_new): Declare.
 941         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 942         (def24,d24,def32,d32): New pseudo-ops.
 943
 944 2006-02-02  Paul Brook  <paul@codesourcery.com>
 945
 946         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 947
 948 2005-02-02  Paul Brook  <paul@codesourcery.com>
 949
 950         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 951         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
 952         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
 953         T2_OPCODE_RSB): Define.
 954         (thumb32_negate_data_op): New function.
 955         (md_apply_fix): Use it.
 956
 957 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
 958
 959         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
 960         fields.
 961         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
 962         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
 963         subtracted symbols.
 964         (relaxation_requirements): Add pfinish_frag argument and use it to
 965         replace setting tinsn->record_fix fields.
 966         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
 967         and vinsn_to_insnbuf.  Remove references to record_fix and
 968         slot_sub_symbols fields.
 969         (xtensa_mark_narrow_branches): Delete unused code.
 970         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
 971         a symbol.
 972         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
 973         record_fix fields.
 974         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
 975         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
 976         of the record_fix field.  Simplify error messages for unexpected
 977         symbolic operands.
 978         (set_expr_symbol_offset_diff): Delete.
 979
 980 2006-01-31  Paul Brook  <paul@codesourcery.com>
 981
 982         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
 983
 984 2006-01-31  Paul Brook  <paul@codesourcery.com>
 985         Richard Earnshaw <rearnsha@arm.com>
 986
 987         * config/tc-arm.c: Use arm_feature_set.
 988         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
 989         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
 990         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
 991         New variables.
 992         (insns): Use them.
 993         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
 994         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
 995         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
 996         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
 997         feature flags.
 998         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
 999         (arm_opts): Move old cpu/arch options from here...
1000         (arm_legacy_opts): ... to here.
1001         (md_parse_option): Search arm_legacy_opts.
1002         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1003         (arm_float_abis, arm_eabis): Make const.
1004
1005 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1006
1007         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1008
1009 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1010
1011         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1012         in load immediate intruction.
1013
1014 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1015
1016         * config/bfin-parse.y (value_match): Use correct conversion
1017         specifications in template string for __FILE__ and __LINE__.
1018         (binary): Ditto.
1019         (unary): Ditto.
1020
1021 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1022
1023         Introduce TLS descriptors for i386 and x86_64.
1024         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1025         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1026         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1027         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1028         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1029         displacement bits.
1030         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1031         (lex_got): Handle @tlsdesc and @tlscall.
1032         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1033
1034 2006-01-11  Nick Clifton  <nickc@redhat.com>
1035
1036         Fixes for building on 64-bit hosts:
1037         * config/tc-avr.c (mod_index): New union to allow conversion
1038         between pointers and integers.
1039         (md_begin, avr_ldi_expression): Use it.
1040         * config/tc-i370.c (md_assemble): Add cast for argument to print
1041         statement.
1042         * config/tc-tic54x.c (subsym_substitute): Likewise.
1043         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1044         opindex field of fr_cgen structure into a pointer so that it can
1045         be stored in a frag.
1046         * config/tc-mn10300.c (md_assemble): Likewise.
1047         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1048         types.
1049         * config/tc-v850.c: Replace uses of (int) casts with correct
1050         types.
1051
1052 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1053
1054         PR gas/2117
1055         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1056
1057 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1058
1059         PR gas/2101
1060         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1061         a local-label reference.
1062
1063 For older changes see ChangeLog-2005
1064 \f
1065 Local Variables:
1066 mode: change-log
1067 left-margin: 8
1068 fill-column: 74
1069 version-control: never
1070 End: