gas/ChangeLog

   1 2006-05-11  Paul Brook  <paul@codesourcery.com>
   2
   3         * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
   4
   5 2006-05-11  Thiemo Seufer  <ths@mips.com>
   6
   7         * config/tc-mips.c (append_insn): Don't check the range of j or
   8         jal addresses.
   9
  10 2006-05-11  Pedro Alves  <pedro_alves@portugalmail.pt>
  11
  12         * config/tc-arm.c (md_pcrel_from_section): Force a bias for
  13         relocs against external symbols for WinCE targets.
  14         (md_apply_fix): Likewise.
  15
  16 2006-05-09  David Ung  <davidu@mips.com>
  17
  18         * config/tc-mips.c (append_insn): Only warn about an out-of-range
  19         j or jal address.
  20
  21 2006-05-09  Nick Clifton  <nickc@redhat.com>
  22
  23         * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
  24         against symbols which are not going to be placed into the symbol
  25         table.
  26
  27 2006-05-09  Ben Elliston  <bje@au.ibm.com>
  28
  29         * expr.c (operand): Remove `if (0 && ..)' statement and
  30         subsequently unused target_op label.  Collapse `if (1 || ..)'
  31         statement.
  32         * app.c (do_scrub_chars): Remove unused case 0, as it is handled
  33         separately above the switch.
  34
  35 2006-05-08  Nick Clifton  <nickc@redhat.com>
  36
  37         PR gas/2623
  38         * config/tc-msp430.c (line_separator_character): Define as |.
  39
  40 2006-05-08  Thiemo Seufer  <ths@mips.com>
  41             Nigel Stephens  <nigel@mips.com>
  42             David Ung  <davidu@mips.com>
  43
  44         * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
  45         (mips_opts): Likewise.
  46         (file_ase_smartmips): New variable.
  47         (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
  48         (macro_build): Handle SmartMIPS instructions.
  49         (mips_ip): Likewise.
  50         (md_longopts): Add argument handling for smartmips.
  51         (md_parse_options, mips_after_parse_args): Likewise.
  52         (s_mipsset): Add .set smartmips support.
  53         (md_show_usage): Document -msmartmips/-mno-smartmips.
  54         * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
  55         .set smartmips.
  56         * doc/c-mips.texi: Likewise.
  57
  58 2006-05-08  Alan Modra  <amodra@bigpond.net.au>
  59
  60         * write.c (relax_segment): Add pass count arg.  Don't error on
  61         negative org/space on first two passes.
  62         (relax_seg_info): New struct.
  63         (relax_seg, write_object_file): Adjust.
  64         * write.h (relax_segment): Update prototype.
  65
  66 2006-05-05  Julian Brown  <julian@codesourcery.com>
  67
  68         * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
  69         checking.
  70         (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
  71         architecture version checks.
  72         (insns): Allow overlapping instructions to be used in VFP mode.
  73
  74 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
  75
  76         PR gas/2598
  77         * config/obj-elf.c (obj_elf_change_section): Allow user
  78         specified SHF_ALPHA_GPREL.
  79
  80 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
  81
  82         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
  83         for PMEM related expressions.
  84
  85 2006-05-05  Nick Clifton  <nickc@redhat.com>
  86
  87         PR gas/2582
  88         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
  89         insertion of a directory separator character into a string at a
  90         given offset.  Uses heuristics to decide when to use a backslash
  91         character rather than a forward-slash character.
  92         (dwarf2_directive_loc): Use the macro.
  93         (out_debug_info): Likewise.
  94
  95 2006-05-05  Thiemo Seufer  <ths@mips.com>
  96             David Ung  <davidu@mips.com>
  97
  98         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
  99         instruction.
 100         (macro): Add new case M_CACHE_AB.
 101
 102 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
 103
 104         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
 105         (opcode_lookup): Issue a warning for opcode with
 106         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
 107         identical to OT_cinfix3.
 108         (TxC3w, TC3w, tC3w): New.
 109         (insns): Use tC3w and TC3w for comparison instructions with
 110         's' suffix.
 111
 112 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
 113
 114         * subsegs.h (struct frchain): Delete frch_seg.
 115         (frchain_root): Delete.
 116         (seg_info): Define as macro.
 117         * subsegs.c (frchain_root): Delete.
 118         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
 119         (subsegs_begin, subseg_change): Adjust for above.
 120         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
 121         rather than to one big list.
 122         (subseg_get): Don't special case abs, und sections.
 123         (subseg_new, subseg_force_new): Don't set frchainP here.
 124         (seg_info): Delete.
 125         (subsegs_print_statistics): Adjust frag chain control list traversal.
 126         * debug.c (dmp_frags):  Likewise.
 127         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
 128         at frchain_root.  Make use of known frchain ordering.
 129         (last_frag_for_seg): Likewise.
 130         (get_frag_fix): Likewise.  Add seg param.
 131         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
 132         * write.c (chain_frchains_together_1): Adjust for struct frchain.
 133         (SUB_SEGMENT_ALIGN): Likewise.
 134         (subsegs_finish): Adjust frchain list traversal.
 135         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
 136         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
 137         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
 138         (xtensa_fix_b_j_loop_end_frags): Likewise.
 139         (xtensa_fix_close_loop_end_frags): Likewise.
 140         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
 141         (retrieve_segment_info): Delete frch_seg initialisation.
 142
 143 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
 144
 145         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
 146         * config/obj-elf.h (obj_sec_set_private_data): Delete.
 147         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
 148         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
 149
 150 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
 151
 152         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
 153         here.
 154         (md_apply_fix3): Multiply offset by 4 here for
 155         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
 156
 157 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 158             Jan Beulich  <jbeulich@novell.com>
 159
 160         * config/tc-i386.c (output_invalid_buf): Change size for
 161         unsigned char.
 162         * config/tc-tic30.c (output_invalid_buf): Likewise.
 163
 164         * config/tc-i386.c (output_invalid): Cast none-ascii char to
 165         unsigned char.
 166         * config/tc-tic30.c (output_invalid): Likewise.
 167
 168 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
 169
 170         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
 171         (TEXI2POD): Use AM_MAKEINFOFLAGS.
 172         (asconfig.texi): Don't set top_srcdir.
 173         * doc/as.texinfo: Don't use top_srcdir.
 174         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 175
 176 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 177
 178         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 179         * config/tc-tic30.c (output_invalid_buf): Likewise.
 180
 181         * config/tc-i386.c (output_invalid): Use snprintf instead of
 182         sprintf.
 183         * config/tc-ia64.c (declare_register_set): Likewise.
 184         (emit_one_bundle): Likewise.
 185         (check_dependencies): Likewise.
 186         * config/tc-tic30.c (output_invalid): Likewise.
 187
 188 2006-05-02  Paul Brook  <paul@codesourcery.com>
 189
 190         * config/tc-arm.c (arm_optimize_expr): New function.
 191         * config/tc-arm.h (md_optimize_expr): Define
 192         (arm_optimize_expr): Add prototype.
 193         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 194
 195 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 196
 197         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 198         field unsigned.
 199
 200         * sb.h (sb_list_vector): Move to sb.c.
 201         * sb.c (free_list): Use type of sb_list_vector directly.
 202         (sb_build): Fix off-by-one error in assertion about `size'.
 203
 204 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 205
 206         * listing.c (listing_listing): Remove useless loop.
 207         * macro.c (macro_expand): Remove is_positional local variable.
 208         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 209         and simplify surrounding expressions, where possible.
 210         (assign_symbol): Likewise.
 211         (s_weakref): Likewise.
 212         * symbols.c (colon): Likewise.
 213
 214 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 215
 216         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 217
 218 2006-04-30  Thiemo Seufer  <ths@mips.com>
 219             David Ung  <davidu@mips.com>
 220
 221         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 222         (mips_immed): New table that records various handling of udi
 223         instruction patterns.
 224         (mips_ip): Adds udi handling.
 225
 226 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 227
 228         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 229         of list rather than beginning.
 230
 231 2006-04-26  Julian Brown  <julian@codesourcery.com>
 232
 233         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 234         (is_quarter_float): Rename from above. Simplify slightly.
 235         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 236         number.
 237         (parse_neon_mov): Parse floating-point constants.
 238         (neon_qfloat_bits): Fix encoding.
 239         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 240         preference to integer encoding when using the F32 type.
 241
 242 2006-04-26  Julian Brown  <julian@codesourcery.com>
 243
 244         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 245         zero-initialising structures containing it will lead to invalid types).
 246         (arm_it): Add vectype to each operand.
 247         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 248         defined field.
 249         (neon_typed_alias): New structure. Extra information for typed
 250         register aliases.
 251         (reg_entry): Add neon type info field.
 252         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 253         Break out alternative syntax for coprocessor registers, etc. into...
 254         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 255         out from arm_reg_parse.
 256         (parse_neon_type): Move. Return SUCCESS/FAIL.
 257         (first_error): New function. Call to ensure first error which occurs is
 258         reported.
 259         (parse_neon_operand_type): Parse exactly one type.
 260         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 261         (parse_typed_reg_or_scalar): New function. Handle core of both
 262         arm_typed_reg_parse and parse_scalar.
 263         (arm_typed_reg_parse): Parse a register with an optional type.
 264         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 265         result.
 266         (parse_scalar): Parse a Neon scalar with optional type.
 267         (parse_reg_list): Use first_error.
 268         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 269         (neon_alias_types_same): New function. Return true if two (alias) types
 270         are the same.
 271         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 272         of elements.
 273         (insert_reg_alias): Return new reg_entry not void.
 274         (insert_neon_reg_alias): New function. Insert type/index information as
 275         well as register for alias.
 276         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 277         make typed register aliases accordingly.
 278         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 279         of line.
 280         (s_unreq): Delete type information if present.
 281         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 282         (s_arm_unwind_save_mmxwcg): Likewise.
 283         (s_arm_unwind_movsp): Likewise.
 284         (s_arm_unwind_setfp): Likewise.
 285         (parse_shift): Likewise.
 286         (parse_shifter_operand): Likewise.
 287         (parse_address): Likewise.
 288         (parse_tb): Likewise.
 289         (tc_arm_regname_to_dw2regnum): Likewise.
 290         (md_pseudo_table): Add dn, qn.
 291         (parse_neon_mov): Handle typed operands.
 292         (parse_operands): Likewise.
 293         (neon_type_mask): Add N_SIZ.
 294         (N_ALLMODS): New macro.
 295         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 296         (el_type_of_type_chk): Add some safeguards.
 297         (modify_types_allowed): Fix logic bug.
 298         (neon_check_type): Handle operands with types.
 299         (neon_three_same): Remove redundant optional arg handling.
 300         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 301         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 302         (do_neon_step): Adjust accordingly.
 303         (neon_cmode_for_logic_imm): Use first_error.
 304         (do_neon_bitfield): Call neon_check_type.
 305         (neon_dyadic): Rename to...
 306         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 307         to allow modification of type of the destination.
 308         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 309         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 310         (do_neon_compare): Make destination be an untyped bitfield.
 311         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 312         (neon_mul_mac): Return early in case of errors.
 313         (neon_move_immediate): Use first_error.
 314         (neon_mac_reg_scalar_long): Fix type to include scalar.
 315         (do_neon_dup): Likewise.
 316         (do_neon_mov): Likewise (in several places).
 317         (do_neon_tbl_tbx): Fix type.
 318         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 319         (do_neon_ld_dup): Exit early in case of errors and/or use
 320         first_error.
 321         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 322         Handle .dn/.qn directives.
 323         (REGDEF): Add zero for reg_entry neon field.
 324
 325 2006-04-26  Julian Brown  <julian@codesourcery.com>
 326
 327         * config/tc-arm.c (limits.h): Include.
 328         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 329         (fpu_vfp_v3_or_neon_ext): Declare constants.
 330         (neon_el_type): New enumeration of types for Neon vector elements.
 331         (neon_type_el): New struct. Define type and size of a vector element.
 332         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 333         instruction.
 334         (neon_type): Define struct. The type of an instruction.
 335         (arm_it): Add 'vectype' for the current instruction.
 336         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 337         (vfp_sp_reg_pos): Rename to...
 338         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 339         tags.
 340         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 341         (Neon D or Q register).
 342         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 343         register.
 344         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 345         (my_get_expression): Allow above constant as argument to accept
 346         64-bit constants with optional prefix.
 347         (arm_reg_parse): Add extra argument to return the specific type of
 348         register in when either a D or Q register (REG_TYPE_NDQ) is
 349         requested. Can be NULL.
 350         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 351         (parse_reg_list): Update for new arm_reg_parse args.
 352         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 353         (parse_neon_el_struct_list): New function. Parse element/structure
 354         register lists for VLD<n>/VST<n> instructions.
 355         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 356         (s_arm_unwind_save_mmxwr): Likewise.
 357         (s_arm_unwind_save_mmxwcg): Likewise.
 358         (s_arm_unwind_movsp): Likewise.
 359         (s_arm_unwind_setfp): Likewise.
 360         (parse_big_immediate): New function. Parse an immediate, which may be
 361         64 bits wide. Put results in inst.operands[i].
 362         (parse_shift): Update for new arm_reg_parse args.
 363         (parse_address): Likewise. Add parsing of alignment specifiers.
 364         (parse_neon_mov): Parse the operands of a VMOV instruction.
 365         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 366         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 367         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 368         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 369         (parse_operands): Handle new codes above.
 370         (encode_arm_vfp_sp_reg): Rename to...
 371         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 372         selected VFP version only supports D0-D15.
 373         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 374         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 375         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 376         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 377         encode_arm_vfp_reg name, and allow 32 D regs.
 378         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 379         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 380         regs.
 381         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 382         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 383         constant-load and conversion insns introduced with VFPv3.
 384         (neon_tab_entry): New struct.
 385         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 386         those which are the targets of pseudo-instructions.
 387         (neon_opc): Enumerate opcodes, use as indices into...
 388         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 389         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 390         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 391         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 392         neon_enc_tab.
 393         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 394         Neon instructions.
 395         (neon_type_mask): New. Compact type representation for type checking.
 396         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 397         permitted type combinations.
 398         (N_IGNORE_TYPE): New macro.
 399         (neon_check_shape): New function. Check an instruction shape for
 400         multiple alternatives. Return the specific shape for the current
 401         instruction.
 402         (neon_modify_type_size): New function. Modify a vector type and size,
 403         depending on the bit mask in argument 1.
 404         (neon_type_promote): New function. Convert a given "key" type (of an
 405         operand) into the correct type for a different operand, based on a bit
 406         mask.
 407         (type_chk_of_el_type): New function. Convert a type and size into the
 408         compact representation used for type checking.
 409         (el_type_of_type_ckh): New function. Reverse of above (only when a
 410         single bit is set in the bit mask).
 411         (modify_types_allowed): New function. Alter a mask of allowed types
 412         based on a bit mask of modifications.
 413         (neon_check_type): New function. Check the type of the current
 414         instruction against the variable argument list. The "key" type of the
 415         instruction is returned.
 416         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 417         a Neon data-processing instruction depending on whether we're in ARM
 418         mode or Thumb-2 mode.
 419         (neon_logbits): New function.
 420         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 421         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 422         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 423         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 424         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 425         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 426         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 427         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 428         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 429         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 430         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 431         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 432         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 433         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 434         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 435         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 436         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 437         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 438         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 439         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 440         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 441         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 442         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 443         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 444         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 445         helpers.
 446         (parse_neon_type): New function. Parse Neon type specifier.
 447         (opcode_lookup): Allow parsing of Neon type specifiers.
 448         (REGNUM2, REGSETH, REGSET2): New macros.
 449         (reg_names): Add new VFPv3 and Neon registers.
 450         (NUF, nUF, NCE, nCE): New macros for opcode table.
 451         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 452         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 453         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 454         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 455         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 456         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 457         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 458         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 459         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 460         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 461         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 462         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 463         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 464         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 465         fto[us][lh][sd].
 466         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 467         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 468         (arm_option_cpu_value): Add vfp3 and neon.
 469         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 470         VFPv1 attribute.
 471
 472 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 473
 474         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 475         syntax instead of hardcoded opcodes with ".w18" suffixes.
 476         (wide_branch_opcode): New.
 477         (build_transition): Use it to check for wide branch opcodes with
 478         either ".w18" or ".w15" suffixes.
 479
 480 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 481
 482         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 483         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 484         frag's is_literal flag.
 485
 486 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 487
 488         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 489
 490 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 491
 492         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 493         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 494         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 495         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 496         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 497
 498 2005-04-20  Paul Brook  <paul@codesourcery.com>
 499
 500         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 501         all targets.
 502         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 503
 504 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 505
 506         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 507         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 508         Make some cpus unsupported on ELF.  Run "make dep-am".
 509         * Makefile.in: Regenerate.
 510
 511 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 512
 513         * configure.in (--enable-targets): Indent help message.
 514         * configure: Regenerate.
 515
 516 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 517
 518         PR gas/2533
 519         * config/tc-i386.c (i386_immediate): Check illegal immediate
 520         register operand.
 521
 522 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 523
 524         * config/tc-i386.c: Formatting.
 525         (output_disp, output_imm): ISO C90 params.
 526
 527         * frags.c (frag_offset_fixed_p): Constify args.
 528         * frags.h (frag_offset_fixed_p): Ditto.
 529
 530         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 531         (COFF_MAGIC): Delete.
 532
 533         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 534
 535 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 536
 537         * po/POTFILES.in: Regenerated.
 538
 539 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 540
 541         * doc/as.texinfo: Mention that some .type syntaxes are not
 542         supported on all architectures.
 543
 544 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 545
 546         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 547         instructions when such transformations have been disabled.
 548
 549 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 550
 551         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 552         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 553         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 554         decoding the loop instructions.  Remove current_offset variable.
 555         (xtensa_fix_short_loop_frags): Likewise.
 556         (min_bytes_to_other_loop_end): Remove current_offset argument.
 557
 558 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 559
 560         * config/tc-z80.c (z80_optimize_expr): Removed.
 561         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 562
 563 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 564
 565         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 566         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 567         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 568         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 569         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 570         at90can64, at90usb646, at90usb647, at90usb1286 and
 571         at90usb1287.
 572         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 573
 574 2006-04-07  Paul Brook  <paul@codesourcery.com>
 575
 576         * config/tc-arm.c (parse_operands): Set default error message.
 577
 578 2006-04-07  Paul Brook  <paul@codesourcery.com>
 579
 580         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 581
 582 2006-04-07  Paul Brook  <paul@codesourcery.com>
 583
 584         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 585
 586 2006-04-07  Paul Brook  <paul@codesourcery.com>
 587
 588         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 589         (move_or_literal_pool): Handle Thumb-2 instructions.
 590         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 591
 592 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 593
 594         PR 2512.
 595         * config/tc-i386.c (match_template): Move 64-bit operand tests
 596         inside loop.
 597
 598 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 599
 600         * po/Make-in: Add install-html target.
 601         * Makefile.am: Add install-html and install-html-recursive targets.
 602         * Makefile.in: Regenerate.
 603         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 604         * configure: Regenerate.
 605         * doc/Makefile.am: Add install-html and install-html-am targets.
 606         * doc/Makefile.in: Regenerate.
 607
 608 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 609
 610         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 611         second scan.
 612
 613 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 614             Daniel Jacobowitz  <dan@codesourcery.com>
 615
 616         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 617         (GOTT_BASE, GOTT_INDEX): New.
 618         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 619         GOTT_INDEX when generating VxWorks PIC.
 620         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 621         use the generic *-*-vxworks* stanza instead.
 622
 623 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 624
 625         PR 997
 626         * frags.c (frag_offset_fixed_p): New function.
 627         * frags.h (frag_offset_fixed_p): Declare.
 628         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 629         (resolve_expression): Likewise.
 630
 631 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 632
 633         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 634         of the same length but different numbers of slots.
 635
 636 2006-03-30  Andreas Schwab  <schwab@suse.de>
 637
 638         * configure.in: Fix help string for --enable-targets option.
 639         * configure: Regenerate.
 640
 641 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 642
 643         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 644         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 645         overrun and avoid excessive copying.
 646
 647         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 648         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 649         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 650         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 651         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 652         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 653         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 654         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 655         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 656         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 657         (struct m68k_cpu): Change chip field to control_regs.
 658         (current_chip): Remove.
 659         (control_regs): New.
 660         (m68k_archs, m68k_extensions): Adjust.
 661         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 662         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 663         (find_cf_chip): Reimplement for new organization of cpu table.
 664         (select_control_regs): Remove.
 665         (mri_chip): Adjust.
 666         (struct save_opts): Save control regs, not chip.
 667         (s_save, s_restore): Adjust.
 668         (m68k_lookup_cpu): Give deprecated warning when necessary.
 669         (m68k_init_arch): Adjust.
 670         (md_show_usage): Adjust for new cpu table organization.
 671
 672 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 673
 674         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 675         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 676         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 677         "elf/bfin.h".
 678         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 679         (any_gotrel): New rule.
 680         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 681         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 682         "elf/bfin.h".
 683         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 684         (bfin_pic_ptr): New function.
 685         (md_pseudo_table): Add it for ".picptr".
 686         (OPTION_FDPIC): New macro.
 687         (md_longopts): Add -mfdpic.
 688         (md_parse_option): Handle it.
 689         (md_begin): Set BFD flags.
 690         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 691         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 692         us for GOT relocs.
 693         * Makefile.am (bfin-parse.o): Update dependencies.
 694         (DEPTC_bfin_elf): Likewise.
 695         * Makefile.in: Regenerate.
 696
 697 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 698
 699         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 700         mcfemac instead of mcfmac.
 701
 702 2006-03-23  Michael Matz  <matz@suse.de>
 703
 704         * config/tc-i386.c (type_names): Correct placement of 'static'.
 705         (reloc): Map some more relocs to their 64 bit counterpart when
 706         size is 8.
 707         (output_insn): Work around breakage if DEBUG386 is defined.
 708         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 709         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 710         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 711         different from i386.
 712         (output_imm): Ditto.
 713         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 714         Imm64.
 715         (md_convert_frag): Jumps can now be larger than 2GB away, error
 716         out in that case.
 717         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 718         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 719
 720 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 721             Daniel Jacobowitz  <dan@codesourcery.com>
 722             Phil Edwards  <phil@codesourcery.com>
 723             Zack Weinberg  <zack@codesourcery.com>
 724             Mark Mitchell  <mark@codesourcery.com>
 725             Nathan Sidwell  <nathan@codesourcery.com>
 726
 727         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 728         (md_begin): Complain about -G being used for PIC.  Don't change
 729         the text, data and bss alignments on VxWorks.
 730         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 731         generating VxWorks PIC.
 732         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 733         (macro): Likewise, but do not treat la $25 specially for
 734         VxWorks PIC, and do not handle jal.
 735         (OPTION_MVXWORKS_PIC): New macro.
 736         (md_longopts): Add -mvxworks-pic.
 737         (md_parse_option): Don't complain about using PIC and -G together here.
 738         Handle OPTION_MVXWORKS_PIC.
 739         (md_estimate_size_before_relax): Always use the first relaxation
 740         sequence on VxWorks.
 741         * config/tc-mips.h (VXWORKS_PIC): New.
 742
 743 2006-03-21  Paul Brook  <paul@codesourcery.com>
 744
 745         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 746
 747 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 748
 749         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 750         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 751         (get_loop_align_size): New.
 752         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 753         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 754         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 755         (get_noop_aligned_address): Use get_loop_align_size.
 756         (get_aligned_diff): Likewise.
 757
 758 2006-03-21  Paul Brook  <paul@codesourcery.com>
 759
 760         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 761
 762 2006-03-20  Paul Brook  <paul@codesourcery.com>
 763
 764         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 765         (do_t_branch): Encode branches inside IT blocks as unconditional.
 766         (do_t_cps): New function.
 767         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 768         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 769         (opcode_lookup): Allow conditional suffixes on all instructions in
 770         Thumb mode.
 771         (md_assemble): Advance condexec state before checking for errors.
 772         (insns): Use do_t_cps.
 773
 774 2006-03-20  Paul Brook  <paul@codesourcery.com>
 775
 776         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 777         outputting the insn.
 778
 779 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 780
 781         * config/tc-vax.c: Update copyright year.
 782         * config/tc-vax.h: Likewise.
 783
 784 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 785
 786         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 787         make it static.
 788         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 789
 790 2006-03-17  Paul Brook  <paul@codesourcery.com>
 791
 792         * config/tc-arm.c (insns): Add ldm and stm.
 793
 794 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 795
 796         PR gas/2446
 797         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 798
 799 2006-03-16  Paul Brook  <paul@codesourcery.com>
 800
 801         * config/tc-arm.c (insns): Add "svc".
 802
 803 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 804
 805         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 806         flag and avoid double underscore prefixes.
 807
 808 2006-03-10  Paul Brook  <paul@codesourcery.com>
 809
 810         * config/tc-arm.c (md_begin): Handle EABIv5.
 811         (arm_eabis): Add EF_ARM_EABI_VER5.
 812         * doc/c-arm.texi: Document -meabi=5.
 813
 814 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 815
 816         * app.c (do_scrub_chars): Simplify string handling.
 817
 818 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 819             Daniel Jacobowitz  <dan@codesourcery.com>
 820             Zack Weinberg  <zack@codesourcery.com>
 821             Nathan Sidwell  <nathan@codesourcery.com>
 822             Paul Brook  <paul@codesourcery.com>
 823             Ricardo Anguiano  <anguiano@codesourcery.com>
 824             Phil Edwards  <phil@codesourcery.com>
 825
 826         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 827         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 828         R_ARM_ABS12 reloc.
 829         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 830         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 831         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 832
 833 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 834
 835         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 836         even when using the text-section-literals option.
 837
 838 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 839
 840         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 841         and cf.
 842         (m68k_ip): <case 'J'> Check we have some control regs.
 843         (md_parse_option): Allow raw arch switch.
 844         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 845         whether 68881 or cfloat was meant by -mfloat.
 846         (md_show_usage): Adjust extension display.
 847         (m68k_elf_final_processing): Adjust.
 848
 849 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 850
 851         * config/tc-avr.c (avr_mod_hash_value): New function.
 852         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 853         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 854         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 855         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 856         of (int).
 857         (tc_gen_reloc): Handle substractions of symbols, if possible do
 858         fixups, abort otherwise.
 859         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 860         tc_fix_adjustable): Define.
 861
 862 2006-03-02  James E Wilson  <wilson@specifix.com>
 863
 864         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 865         change the template, then clear md.slot[curr].end_of_insn_group.
 866
 867 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 868
 869         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 870
 871 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 872
 873         PR/1070
 874         * macro.c (getstring): Don't treat parentheses special anymore.
 875         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 876         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 877         characters.
 878
 879 2006-02-28  Mat <mat@csail.mit.edu>
 880
 881         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 882
 883 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 884
 885         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 886         field.
 887         (CFI_signal_frame): Define.
 888         (cfi_pseudo_table): Add .cfi_signal_frame.
 889         (dot_cfi): Handle CFI_signal_frame.
 890         (output_cie): Handle cie->signal_frame.
 891         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 892         different.  Copy signal_frame from FDE to newly created CIE.
 893         * doc/as.texinfo: Document .cfi_signal_frame.
 894
 895 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 896
 897         * doc/Makefile.am: Add html target.
 898         * doc/Makefile.in: Regenerate.
 899         * po/Make-in: Add html target.
 900
 901 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 902
 903         * config/tc-i386.c (output_insn): Support Intel Merom New
 904         Instructions.
 905
 906         * config/tc-i386.h (CpuMNI): New.
 907         (CpuUnknownFlags): Add CpuMNI.
 908
 909 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 910
 911         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 912         (hpriv_reg_table): New table for hyperprivileged registers.
 913         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 914         register encoding.
 915
 916 2006-02-24  DJ Delorie  <dj@redhat.com>
 917
 918         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 919         (tc_gen_reloc): Don't define.
 920         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 921         (OPTION_LINKRELAX): New.
 922         (md_longopts): Add it.
 923         (m32c_relax): New.
 924         (md_parse_options): Set it.
 925         (md_assemble): Emit relaxation relocs as needed.
 926         (md_convert_frag): Emit relaxation relocs as needed.
 927         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 928         (m32c_apply_fix): New.
 929         (tc_gen_reloc): New.
 930         (m32c_force_relocation): Force out jump relocs when relaxing.
 931         (m32c_fix_adjustable): Return false if relaxing.
 932
 933 2006-02-24  Paul Brook  <paul@codesourcery.com>
 934
 935         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 936         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 937         (struct asm_barrier_opt): Define.
 938         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 939         (parse_psr): Accept V7M psr names.
 940         (parse_barrier): New function.
 941         (enum operand_parse_code): Add OP_oBARRIER.
 942         (parse_operands): Implement OP_oBARRIER.
 943         (do_barrier): New function.
 944         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 945         (do_t_cpsi): Add V7M restrictions.
 946         (do_t_mrs, do_t_msr): Validate V7M variants.
 947         (md_assemble): Check for NULL variants.
 948         (v7m_psrs, barrier_opt_names): New tables.
 949         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 950         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 951         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 952         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 953         (struct cpu_arch_ver_table): Define.
 954         (cpu_arch_ver): New.
 955         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 956         Tag_CPU_arch_profile.
 957         * doc/c-arm.texi: Document new cpu and arch options.
 958
 959 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 960
 961         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 962
 963 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 964
 965         * config/tc-ia64.c: Update copyright years.
 966
 967 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 968
 969         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 970         SDM 2.2.
 971
 972 2005-02-22  Paul Brook  <paul@codesourcery.com>
 973
 974         * config/tc-arm.c (do_pld): Remove incorrect write to
 975         inst.instruction.
 976         (encode_thumb32_addr_mode): Use correct operand.
 977
 978 2006-02-21  Paul Brook  <paul@codesourcery.com>
 979
 980         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 981
 982 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 983             Anil Paranjape   <anilp1@kpitcummins.com>
 984             Shilin Shakti    <shilins@kpitcummins.com>
 985
 986         * Makefile.am: Add xc16x related entry.
 987         * Makefile.in: Regenerate.
 988         * configure.in: Added xc16x related entry.
 989         * configure: Regenerate.
 990         * config/tc-xc16x.h: New file
 991         * config/tc-xc16x.c: New file
 992         * doc/c-xc16x.texi: New file for xc16x
 993         * doc/all.texi: Entry for xc16x
 994         * doc/Makefile.texi: Added c-xc16x.texi
 995         * NEWS: Announce the support for the new target.
 996
 997 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 998
 999         * configure.tgt: set emulation for mips-*-netbsd*
1000
1001 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
1002
1003         * config.in: Rebuilt.
1004
1005 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
1006
1007         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1008         from 1, not 0, in error messages.
1009         (md_assemble): Simplify special-case check for ENTRY instructions.
1010         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1011         operand in error message.
1012
1013 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
1014
1015         * configure.tgt (arm-*-linux-gnueabi*): Change to
1016         arm-*-linux-*eabi*.
1017
1018 2006-02-10  Nick Clifton  <nickc@redhat.com>
1019
1020         * config/tc-crx.c (check_range): Ensure that the sign bit of a
1021         32-bit value is propagated into the upper bits of a 64-bit long.
1022
1023         * config/tc-arc.c (init_opcode_tables): Fix cast.
1024         (arc_extoper, md_operand): Likewise.
1025
1026 2006-02-09  David Heine  <dlheine@tensilica.com>
1027
1028         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1029         each relaxation step.
1030
1031 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
1032
1033         * configure.in (CHECK_DECLS): Add vsnprintf.
1034         * configure: Regenerate.
1035         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1036         include/declare here, but...
1037         * as.h: Move code detecting VARARGS idiom to the top.
1038         (errno.h, stdarg.h, varargs.h, va_list): ...here.
1039         (vsnprintf): Declare if not already declared.
1040
1041 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
1042
1043         * as.c (close_output_file): New.
1044         (main): Register close_output_file with xatexit before
1045         dump_statistics. Don't call output_file_close.
1046
1047 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
1048
1049         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1050         mcf5329_control_regs): New.
1051         (not_current_architecture, selected_arch, selected_cpu): New.
1052         (m68k_archs, m68k_extensions): New.
1053         (archs): Renamed to ...
1054         (m68k_cpus): ... here.  Adjust.
1055         (n_arches): Remove.
1056         (md_pseudo_table): Add arch and cpu directives.
1057         (find_cf_chip, m68k_ip): Adjust table scanning.
1058         (no_68851, no_68881): Remove.
1059         (md_assemble): Lazily initialize.
1060         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1061         (md_init_after_args): Move functionality to m68k_init_arch.
1062         (mri_chip): Adjust table scanning.
1063         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1064         options with saner parsing.
1065         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1066         m68k_init_arch): New.
1067         (s_m68k_cpu, s_m68k_arch): New.
1068         (md_show_usage): Adjust.
1069         (m68k_elf_final_processing): Set CF EF flags.
1070         * config/tc-m68k.h (m68k_init_after_args): Remove.
1071         (tc_init_after_args): Remove.
1072         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1073         (M68k-Directives): Document .arch and .cpu directives.
1074
1075 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1076
1077         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1078         synonyms for equ and defl.
1079         (z80_cons_fix_new): New function.
1080         (emit_byte): Disallow relative jumps to absolute locations.
1081         (emit_data): Only handle defb, prototype changed, because defb is
1082         now handled as pseudo-op rather than an instruction.
1083         (instab): Entries for defb,defw,db,dw moved from here...
1084         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1085         Add entries for def24,def32,d24,d32.
1086         (md_assemble): Improved error handling.
1087         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1088         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1089         (z80_cons_fix_new): Declare.
1090         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1091         (def24,d24,def32,d32): New pseudo-ops.
1092
1093 2006-02-02  Paul Brook  <paul@codesourcery.com>
1094
1095         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1096
1097 2005-02-02  Paul Brook  <paul@codesourcery.com>
1098
1099         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1100         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1101         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1102         T2_OPCODE_RSB): Define.
1103         (thumb32_negate_data_op): New function.
1104         (md_apply_fix): Use it.
1105
1106 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1107
1108         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1109         fields.
1110         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1111         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1112         subtracted symbols.
1113         (relaxation_requirements): Add pfinish_frag argument and use it to
1114         replace setting tinsn->record_fix fields.
1115         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1116         and vinsn_to_insnbuf.  Remove references to record_fix and
1117         slot_sub_symbols fields.
1118         (xtensa_mark_narrow_branches): Delete unused code.
1119         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1120         a symbol.
1121         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1122         record_fix fields.
1123         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1124         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1125         of the record_fix field.  Simplify error messages for unexpected
1126         symbolic operands.
1127         (set_expr_symbol_offset_diff): Delete.
1128
1129 2006-01-31  Paul Brook  <paul@codesourcery.com>
1130
1131         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1132
1133 2006-01-31  Paul Brook  <paul@codesourcery.com>
1134         Richard Earnshaw <rearnsha@arm.com>
1135
1136         * config/tc-arm.c: Use arm_feature_set.
1137         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1138         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1139         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1140         New variables.
1141         (insns): Use them.
1142         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1143         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1144         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1145         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1146         feature flags.
1147         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1148         (arm_opts): Move old cpu/arch options from here...
1149         (arm_legacy_opts): ... to here.
1150         (md_parse_option): Search arm_legacy_opts.
1151         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1152         (arm_float_abis, arm_eabis): Make const.
1153
1154 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1155
1156         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1157
1158 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1159
1160         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1161         in load immediate intruction.
1162
1163 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1164
1165         * config/bfin-parse.y (value_match): Use correct conversion
1166         specifications in template string for __FILE__ and __LINE__.
1167         (binary): Ditto.
1168         (unary): Ditto.
1169
1170 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1171
1172         Introduce TLS descriptors for i386 and x86_64.
1173         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1174         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1175         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1176         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1177         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1178         displacement bits.
1179         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1180         (lex_got): Handle @tlsdesc and @tlscall.
1181         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1182
1183 2006-01-11  Nick Clifton  <nickc@redhat.com>
1184
1185         Fixes for building on 64-bit hosts:
1186         * config/tc-avr.c (mod_index): New union to allow conversion
1187         between pointers and integers.
1188         (md_begin, avr_ldi_expression): Use it.
1189         * config/tc-i370.c (md_assemble): Add cast for argument to print
1190         statement.
1191         * config/tc-tic54x.c (subsym_substitute): Likewise.
1192         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1193         opindex field of fr_cgen structure into a pointer so that it can
1194         be stored in a frag.
1195         * config/tc-mn10300.c (md_assemble): Likewise.
1196         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1197         types.
1198         * config/tc-v850.c: Replace uses of (int) casts with correct
1199         types.
1200
1201 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1202
1203         PR gas/2117
1204         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1205
1206 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1207
1208         PR gas/2101
1209         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1210         a local-label reference.
1211
1212 For older changes see ChangeLog-2005
1213 \f
1214 Local Variables:
1215 mode: change-log
1216 left-margin: 8
1217 fill-column: 74
1218 version-control: never
1219 End: