1 2006-06-07 Alan Modra <amodra@bigpond.net.au>
2 Ladislav Michl <ladis@linux-mips.org>
4 * app.c: Don't include headers already included by as.h.
6 * atof-generic.c: Likewise.
8 * dwarf2dbg.c: Likewise.
10 * input-file.c: Likewise.
11 * input-scrub.c: Likewise.
13 * output-file.c: Likewise.
16 * config/bfin-lex.l: Likewise.
17 * config/obj-coff.h: Likewise.
18 * config/obj-elf.h: Likewise.
19 * config/obj-som.h: Likewise.
20 * config/tc-arc.c: Likewise.
21 * config/tc-arm.c: Likewise.
22 * config/tc-avr.c: Likewise.
23 * config/tc-bfin.c: Likewise.
24 * config/tc-cris.c: Likewise.
25 * config/tc-d10v.c: Likewise.
26 * config/tc-d30v.c: Likewise.
27 * config/tc-dlx.h: Likewise.
28 * config/tc-fr30.c: Likewise.
29 * config/tc-frv.c: Likewise.
30 * config/tc-h8300.c: Likewise.
31 * config/tc-hppa.c: Likewise.
32 * config/tc-i370.c: Likewise.
33 * config/tc-i860.c: Likewise.
34 * config/tc-i960.c: Likewise.
35 * config/tc-ip2k.c: Likewise.
36 * config/tc-iq2000.c: Likewise.
37 * config/tc-m32c.c: Likewise.
38 * config/tc-m32r.c: Likewise.
39 * config/tc-maxq.c: Likewise.
40 * config/tc-mcore.c: Likewise.
41 * config/tc-mips.c: Likewise.
42 * config/tc-mmix.c: Likewise.
43 * config/tc-mn10200.c: Likewise.
44 * config/tc-mn10300.c: Likewise.
45 * config/tc-msp430.c: Likewise.
46 * config/tc-mt.c: Likewise.
47 * config/tc-ns32k.c: Likewise.
48 * config/tc-openrisc.c: Likewise.
49 * config/tc-ppc.c: Likewise.
50 * config/tc-s390.c: Likewise.
51 * config/tc-sh.c: Likewise.
52 * config/tc-sh64.c: Likewise.
53 * config/tc-sparc.c: Likewise.
54 * config/tc-tic30.c: Likewise.
55 * config/tc-tic4x.c: Likewise.
56 * config/tc-tic54x.c: Likewise.
57 * config/tc-v850.c: Likewise.
58 * config/tc-vax.c: Likewise.
59 * config/tc-xc16x.c: Likewise.
60 * config/tc-xstormy16.c: Likewise.
61 * config/tc-xtensa.c: Likewise.
62 * config/tc-z80.c: Likewise.
63 * config/tc-z8k.c: Likewise.
64 * macro.h: Don't include sb.h or ansidecl.h.
65 * sb.h: Don't include stdio.h or ansidecl.h.
66 * cond.c: Include sb.h.
67 * itbl-lex.l: Include as.h instead of other system headers.
68 * itbl-parse.y: Likewise.
69 * itbl-ops.c: Similarly.
70 * itbl-ops.h: Don't include as.h or ansidecl.h.
71 * config/bfin-defs.h: Don't include bfd.h or as.h.
72 * config/bfin-parse.y: Include as.h instead of other system headers.
74 2006-06-06 Ben Elliston <bje@au.ibm.com>
75 Anton Blanchard <anton@samba.org>
77 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
78 (md_show_usage): Document it.
79 (ppc_setup_opcodes): Test power6 opcode flag bits.
80 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
82 2006-06-06 Thiemo Seufer <ths@mips.com>
83 Chao-ying Fu <fu@mips.com>
85 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
86 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
87 (macro_build): Update comment.
88 (mips_ip): Allow DSP64 instructions for MIPS64R2.
89 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
91 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
92 MIPS_CPU_ASE_MDMX flags for sb1.
94 2006-06-05 Thiemo Seufer <ths@mips.com>
96 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
98 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
99 (mips_ip): Make overflowed/underflowed constant arguments in DSP
100 and MT instructions a fatal error. Use INSERT_OPERAND where
101 appropriate. Improve warnings for break and wait code overflows.
102 Use symbolic constant of OP_MASK_COPZ.
103 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
105 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
107 * po/Make-in (top_builddir): Define.
109 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
111 * doc/Makefile.am (TEXI2DVI): Define.
112 * doc/Makefile.in: Regenerate.
113 * doc/c-arc.texi: Fix typo.
115 2006-06-01 Alan Modra <amodra@bigpond.net.au>
117 * config/obj-ieee.c: Delete.
118 * config/obj-ieee.h: Delete.
119 * Makefile.am (OBJ_FORMATS): Remove ieee.
120 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
121 (obj-ieee.o): Remove rule.
122 * Makefile.in: Regenerate.
123 * configure.in (atof): Remove tahoe.
124 (OBJ_MAYBE_IEEE): Don't define.
125 * configure: Regenerate.
126 * config.in: Regenerate.
127 * doc/Makefile.in: Regenerate.
128 * po/POTFILES.in: Regenerate.
130 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
132 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
133 and LIBINTL_DEP everywhere.
135 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
136 * acinclude.m4: Include new gettext macros.
137 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
138 Remove local code for po/Makefile.
139 * Makefile.in, configure, doc/Makefile.in: Regenerated.
141 2006-05-30 Nick Clifton <nickc@redhat.com>
143 * po/es.po: Updated Spanish translation.
145 2006-05-06 Denis Chertykov <denisc@overta.ru>
147 * doc/c-avr.texi: New file.
148 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
149 * doc/all.texi: Set AVR
150 * doc/as.texinfo: Include c-avr.texi
152 2006-05-28 Jie Zhang <jie.zhang@analog.com>
154 * config/bfin-parse.y (check_macfunc): Loose the condition of
155 calling check_multiply_halfregs ().
157 2006-05-25 Jie Zhang <jie.zhang@analog.com>
159 * config/bfin-parse.y (asm_1): Better check and deal with
160 vector and scalar Multiply 16-Bit Operands instructions.
162 2006-05-24 Nick Clifton <nickc@redhat.com>
164 * config/tc-hppa.c: Convert to ISO C90 format.
165 * config/tc-hppa.h: Likewise.
167 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
168 Randolph Chung <randolph@tausq.org>
170 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
171 is_tls_ieoff, is_tls_leoff): Define.
172 (fix_new_hppa): Handle TLS.
173 (cons_fix_new_hppa): Likewise.
175 (md_apply_fix): Handle TLS relocs.
176 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
178 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
180 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
182 2006-05-23 Thiemo Seufer <ths@mips.com>
183 David Ung <davidu@mips.com>
184 Nigel Stephens <nigel@mips.com>
187 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
188 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
189 ISA_HAS_MXHC1): New macros.
190 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
191 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
192 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
193 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
194 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
195 (mips_after_parse_args): Change default handling of float register
196 size to account for 32bit code with 64bit FP. Better sanity checking
197 of ISA/ASE/ABI option combinations.
198 (s_mipsset): Support switching of GPR and FPR sizes via
199 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
201 (mips_elf_final_processing): We should record the use of 64bit FP
202 registers in 32bit code but we don't, because ELF header flags are
204 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
205 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
206 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
207 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
208 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
209 missing -march options. Document .set arch=CPU. Move .set smartmips
210 to ASE page. Use @code for .set FOO examples.
212 2006-05-23 Jie Zhang <jie.zhang@analog.com>
214 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
217 2006-05-23 Jie Zhang <jie.zhang@analog.com>
219 * config/bfin-defs.h (bfin_equals): Remove declaration.
220 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
221 * config/tc-bfin.c (bfin_name_is_register): Remove.
222 (bfin_equals): Remove.
223 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
224 (bfin_name_is_register): Remove declaration.
226 2006-05-19 Thiemo Seufer <ths@mips.com>
227 Nigel Stephens <nigel@mips.com>
229 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
230 (mips_oddfpreg_ok): New function.
233 2006-05-19 Thiemo Seufer <ths@mips.com>
234 David Ung <davidu@mips.com>
236 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
237 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
238 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
239 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
240 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
241 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
242 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
243 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
244 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
245 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
246 reg_names_o32, reg_names_n32n64): Define register classes.
247 (reg_lookup): New function, use register classes.
248 (md_begin): Reserve register names in the symbol table. Simplify
250 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
252 (mips16_ip): Use reg_lookup.
253 (tc_get_register): Likewise.
254 (tc_mips_regname_to_dw2regnum): New function.
256 2006-05-19 Thiemo Seufer <ths@mips.com>
258 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
259 Un-constify string argument.
260 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
262 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
264 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
266 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
268 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
270 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
273 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
275 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
276 cfloat/m68881 to correct architecture before using it.
278 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
280 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
283 2006-05-15 Paul Brook <paul@codesourcery.com>
285 * config/tc-arm.c (arm_adjust_symtab): Use
286 bfd_is_arm_special_symbol_name.
288 2006-05-15 Bob Wilson <bob.wilson@acm.org>
290 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
291 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
292 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
293 Handle errors from calls to xtensa_opcode_is_* functions.
295 2006-05-14 Thiemo Seufer <ths@mips.com>
297 * config/tc-mips.c (macro_build): Test for currently active
299 (mips16_ip): Reject invalid opcodes.
301 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
303 * doc/as.texinfo: Rename "Index" to "AS Index",
304 and "ABORT" to "ABORT (COFF)".
306 2006-05-11 Paul Brook <paul@codesourcery.com>
308 * config/tc-arm.c (parse_half): New function.
309 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
310 (parse_operands): Ditto.
311 (do_mov16): Reject invalid relocations.
312 (do_t_mov16): Ditto. Use Thumb reloc numbers.
313 (insns): Replace Iffff with HALF.
314 (md_apply_fix): Add MOVW and MOVT relocs.
315 (tc_gen_reloc): Ditto.
316 * doc/c-arm.texi: Document relocation operators
318 2006-05-11 Paul Brook <paul@codesourcery.com>
320 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
322 2006-05-11 Thiemo Seufer <ths@mips.com>
324 * config/tc-mips.c (append_insn): Don't check the range of j or
327 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
329 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
330 relocs against external symbols for WinCE targets.
331 (md_apply_fix): Likewise.
333 2006-05-09 David Ung <davidu@mips.com>
335 * config/tc-mips.c (append_insn): Only warn about an out-of-range
338 2006-05-09 Nick Clifton <nickc@redhat.com>
340 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
341 against symbols which are not going to be placed into the symbol
344 2006-05-09 Ben Elliston <bje@au.ibm.com>
346 * expr.c (operand): Remove `if (0 && ..)' statement and
347 subsequently unused target_op label. Collapse `if (1 || ..)'
349 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
350 separately above the switch.
352 2006-05-08 Nick Clifton <nickc@redhat.com>
355 * config/tc-msp430.c (line_separator_character): Define as |.
357 2006-05-08 Thiemo Seufer <ths@mips.com>
358 Nigel Stephens <nigel@mips.com>
359 David Ung <davidu@mips.com>
361 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
362 (mips_opts): Likewise.
363 (file_ase_smartmips): New variable.
364 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
365 (macro_build): Handle SmartMIPS instructions.
367 (md_longopts): Add argument handling for smartmips.
368 (md_parse_options, mips_after_parse_args): Likewise.
369 (s_mipsset): Add .set smartmips support.
370 (md_show_usage): Document -msmartmips/-mno-smartmips.
371 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
373 * doc/c-mips.texi: Likewise.
375 2006-05-08 Alan Modra <amodra@bigpond.net.au>
377 * write.c (relax_segment): Add pass count arg. Don't error on
378 negative org/space on first two passes.
379 (relax_seg_info): New struct.
380 (relax_seg, write_object_file): Adjust.
381 * write.h (relax_segment): Update prototype.
383 2006-05-05 Julian Brown <julian@codesourcery.com>
385 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
387 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
388 architecture version checks.
389 (insns): Allow overlapping instructions to be used in VFP mode.
391 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
394 * config/obj-elf.c (obj_elf_change_section): Allow user
395 specified SHF_ALPHA_GPREL.
397 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
399 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
400 for PMEM related expressions.
402 2006-05-05 Nick Clifton <nickc@redhat.com>
405 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
406 insertion of a directory separator character into a string at a
407 given offset. Uses heuristics to decide when to use a backslash
408 character rather than a forward-slash character.
409 (dwarf2_directive_loc): Use the macro.
410 (out_debug_info): Likewise.
412 2006-05-05 Thiemo Seufer <ths@mips.com>
413 David Ung <davidu@mips.com>
415 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
417 (macro): Add new case M_CACHE_AB.
419 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
421 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
422 (opcode_lookup): Issue a warning for opcode with
423 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
424 identical to OT_cinfix3.
425 (TxC3w, TC3w, tC3w): New.
426 (insns): Use tC3w and TC3w for comparison instructions with
429 2006-05-04 Alan Modra <amodra@bigpond.net.au>
431 * subsegs.h (struct frchain): Delete frch_seg.
432 (frchain_root): Delete.
433 (seg_info): Define as macro.
434 * subsegs.c (frchain_root): Delete.
435 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
436 (subsegs_begin, subseg_change): Adjust for above.
437 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
438 rather than to one big list.
439 (subseg_get): Don't special case abs, und sections.
440 (subseg_new, subseg_force_new): Don't set frchainP here.
442 (subsegs_print_statistics): Adjust frag chain control list traversal.
443 * debug.c (dmp_frags): Likewise.
444 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
445 at frchain_root. Make use of known frchain ordering.
446 (last_frag_for_seg): Likewise.
447 (get_frag_fix): Likewise. Add seg param.
448 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
449 * write.c (chain_frchains_together_1): Adjust for struct frchain.
450 (SUB_SEGMENT_ALIGN): Likewise.
451 (subsegs_finish): Adjust frchain list traversal.
452 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
453 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
454 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
455 (xtensa_fix_b_j_loop_end_frags): Likewise.
456 (xtensa_fix_close_loop_end_frags): Likewise.
457 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
458 (retrieve_segment_info): Delete frch_seg initialisation.
460 2006-05-03 Alan Modra <amodra@bigpond.net.au>
462 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
463 * config/obj-elf.h (obj_sec_set_private_data): Delete.
464 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
465 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
467 2006-05-02 Joseph Myers <joseph@codesourcery.com>
469 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
471 (md_apply_fix3): Multiply offset by 4 here for
472 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
474 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
475 Jan Beulich <jbeulich@novell.com>
477 * config/tc-i386.c (output_invalid_buf): Change size for
479 * config/tc-tic30.c (output_invalid_buf): Likewise.
481 * config/tc-i386.c (output_invalid): Cast none-ascii char to
483 * config/tc-tic30.c (output_invalid): Likewise.
485 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
487 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
488 (TEXI2POD): Use AM_MAKEINFOFLAGS.
489 (asconfig.texi): Don't set top_srcdir.
490 * doc/as.texinfo: Don't use top_srcdir.
491 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
493 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
495 * config/tc-i386.c (output_invalid_buf): Change size to 16.
496 * config/tc-tic30.c (output_invalid_buf): Likewise.
498 * config/tc-i386.c (output_invalid): Use snprintf instead of
500 * config/tc-ia64.c (declare_register_set): Likewise.
501 (emit_one_bundle): Likewise.
502 (check_dependencies): Likewise.
503 * config/tc-tic30.c (output_invalid): Likewise.
505 2006-05-02 Paul Brook <paul@codesourcery.com>
507 * config/tc-arm.c (arm_optimize_expr): New function.
508 * config/tc-arm.h (md_optimize_expr): Define
509 (arm_optimize_expr): Add prototype.
510 (TC_FORCE_RELOCATION_SUB_SAME): Define.
512 2006-05-02 Ben Elliston <bje@au.ibm.com>
514 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
517 * sb.h (sb_list_vector): Move to sb.c.
518 * sb.c (free_list): Use type of sb_list_vector directly.
519 (sb_build): Fix off-by-one error in assertion about `size'.
521 2006-05-01 Ben Elliston <bje@au.ibm.com>
523 * listing.c (listing_listing): Remove useless loop.
524 * macro.c (macro_expand): Remove is_positional local variable.
525 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
526 and simplify surrounding expressions, where possible.
527 (assign_symbol): Likewise.
528 (s_weakref): Likewise.
529 * symbols.c (colon): Likewise.
531 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
533 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
535 2006-04-30 Thiemo Seufer <ths@mips.com>
536 David Ung <davidu@mips.com>
538 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
539 (mips_immed): New table that records various handling of udi
540 instruction patterns.
541 (mips_ip): Adds udi handling.
543 2006-04-28 Alan Modra <amodra@bigpond.net.au>
545 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
546 of list rather than beginning.
548 2006-04-26 Julian Brown <julian@codesourcery.com>
550 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
551 (is_quarter_float): Rename from above. Simplify slightly.
552 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
554 (parse_neon_mov): Parse floating-point constants.
555 (neon_qfloat_bits): Fix encoding.
556 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
557 preference to integer encoding when using the F32 type.
559 2006-04-26 Julian Brown <julian@codesourcery.com>
561 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
562 zero-initialising structures containing it will lead to invalid types).
563 (arm_it): Add vectype to each operand.
564 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
566 (neon_typed_alias): New structure. Extra information for typed
568 (reg_entry): Add neon type info field.
569 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
570 Break out alternative syntax for coprocessor registers, etc. into...
571 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
572 out from arm_reg_parse.
573 (parse_neon_type): Move. Return SUCCESS/FAIL.
574 (first_error): New function. Call to ensure first error which occurs is
576 (parse_neon_operand_type): Parse exactly one type.
577 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
578 (parse_typed_reg_or_scalar): New function. Handle core of both
579 arm_typed_reg_parse and parse_scalar.
580 (arm_typed_reg_parse): Parse a register with an optional type.
581 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
583 (parse_scalar): Parse a Neon scalar with optional type.
584 (parse_reg_list): Use first_error.
585 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
586 (neon_alias_types_same): New function. Return true if two (alias) types
588 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
590 (insert_reg_alias): Return new reg_entry not void.
591 (insert_neon_reg_alias): New function. Insert type/index information as
592 well as register for alias.
593 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
594 make typed register aliases accordingly.
595 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
597 (s_unreq): Delete type information if present.
598 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
599 (s_arm_unwind_save_mmxwcg): Likewise.
600 (s_arm_unwind_movsp): Likewise.
601 (s_arm_unwind_setfp): Likewise.
602 (parse_shift): Likewise.
603 (parse_shifter_operand): Likewise.
604 (parse_address): Likewise.
605 (parse_tb): Likewise.
606 (tc_arm_regname_to_dw2regnum): Likewise.
607 (md_pseudo_table): Add dn, qn.
608 (parse_neon_mov): Handle typed operands.
609 (parse_operands): Likewise.
610 (neon_type_mask): Add N_SIZ.
611 (N_ALLMODS): New macro.
612 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
613 (el_type_of_type_chk): Add some safeguards.
614 (modify_types_allowed): Fix logic bug.
615 (neon_check_type): Handle operands with types.
616 (neon_three_same): Remove redundant optional arg handling.
617 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
618 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
619 (do_neon_step): Adjust accordingly.
620 (neon_cmode_for_logic_imm): Use first_error.
621 (do_neon_bitfield): Call neon_check_type.
622 (neon_dyadic): Rename to...
623 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
624 to allow modification of type of the destination.
625 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
626 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
627 (do_neon_compare): Make destination be an untyped bitfield.
628 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
629 (neon_mul_mac): Return early in case of errors.
630 (neon_move_immediate): Use first_error.
631 (neon_mac_reg_scalar_long): Fix type to include scalar.
632 (do_neon_dup): Likewise.
633 (do_neon_mov): Likewise (in several places).
634 (do_neon_tbl_tbx): Fix type.
635 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
636 (do_neon_ld_dup): Exit early in case of errors and/or use
638 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
639 Handle .dn/.qn directives.
640 (REGDEF): Add zero for reg_entry neon field.
642 2006-04-26 Julian Brown <julian@codesourcery.com>
644 * config/tc-arm.c (limits.h): Include.
645 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
646 (fpu_vfp_v3_or_neon_ext): Declare constants.
647 (neon_el_type): New enumeration of types for Neon vector elements.
648 (neon_type_el): New struct. Define type and size of a vector element.
649 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
651 (neon_type): Define struct. The type of an instruction.
652 (arm_it): Add 'vectype' for the current instruction.
653 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
654 (vfp_sp_reg_pos): Rename to...
655 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
657 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
658 (Neon D or Q register).
659 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
661 (GE_OPT_PREFIX_BIG): Define constant, for use in...
662 (my_get_expression): Allow above constant as argument to accept
663 64-bit constants with optional prefix.
664 (arm_reg_parse): Add extra argument to return the specific type of
665 register in when either a D or Q register (REG_TYPE_NDQ) is
666 requested. Can be NULL.
667 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
668 (parse_reg_list): Update for new arm_reg_parse args.
669 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
670 (parse_neon_el_struct_list): New function. Parse element/structure
671 register lists for VLD<n>/VST<n> instructions.
672 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
673 (s_arm_unwind_save_mmxwr): Likewise.
674 (s_arm_unwind_save_mmxwcg): Likewise.
675 (s_arm_unwind_movsp): Likewise.
676 (s_arm_unwind_setfp): Likewise.
677 (parse_big_immediate): New function. Parse an immediate, which may be
678 64 bits wide. Put results in inst.operands[i].
679 (parse_shift): Update for new arm_reg_parse args.
680 (parse_address): Likewise. Add parsing of alignment specifiers.
681 (parse_neon_mov): Parse the operands of a VMOV instruction.
682 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
683 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
684 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
685 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
686 (parse_operands): Handle new codes above.
687 (encode_arm_vfp_sp_reg): Rename to...
688 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
689 selected VFP version only supports D0-D15.
690 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
691 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
692 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
693 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
694 encode_arm_vfp_reg name, and allow 32 D regs.
695 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
696 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
698 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
699 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
700 constant-load and conversion insns introduced with VFPv3.
701 (neon_tab_entry): New struct.
702 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
703 those which are the targets of pseudo-instructions.
704 (neon_opc): Enumerate opcodes, use as indices into...
705 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
706 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
707 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
708 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
710 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
712 (neon_type_mask): New. Compact type representation for type checking.
713 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
714 permitted type combinations.
715 (N_IGNORE_TYPE): New macro.
716 (neon_check_shape): New function. Check an instruction shape for
717 multiple alternatives. Return the specific shape for the current
719 (neon_modify_type_size): New function. Modify a vector type and size,
720 depending on the bit mask in argument 1.
721 (neon_type_promote): New function. Convert a given "key" type (of an
722 operand) into the correct type for a different operand, based on a bit
724 (type_chk_of_el_type): New function. Convert a type and size into the
725 compact representation used for type checking.
726 (el_type_of_type_ckh): New function. Reverse of above (only when a
727 single bit is set in the bit mask).
728 (modify_types_allowed): New function. Alter a mask of allowed types
729 based on a bit mask of modifications.
730 (neon_check_type): New function. Check the type of the current
731 instruction against the variable argument list. The "key" type of the
732 instruction is returned.
733 (neon_dp_fixup): New function. Fill in and modify instruction bits for
734 a Neon data-processing instruction depending on whether we're in ARM
735 mode or Thumb-2 mode.
736 (neon_logbits): New function.
737 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
738 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
739 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
740 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
741 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
742 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
743 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
744 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
745 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
746 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
747 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
748 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
749 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
750 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
751 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
752 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
753 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
754 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
755 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
756 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
757 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
758 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
759 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
760 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
761 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
763 (parse_neon_type): New function. Parse Neon type specifier.
764 (opcode_lookup): Allow parsing of Neon type specifiers.
765 (REGNUM2, REGSETH, REGSET2): New macros.
766 (reg_names): Add new VFPv3 and Neon registers.
767 (NUF, nUF, NCE, nCE): New macros for opcode table.
768 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
769 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
770 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
771 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
772 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
773 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
774 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
775 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
776 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
777 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
778 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
779 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
780 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
781 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
783 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
784 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
785 (arm_option_cpu_value): Add vfp3 and neon.
786 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
789 2006-04-25 Bob Wilson <bob.wilson@acm.org>
791 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
792 syntax instead of hardcoded opcodes with ".w18" suffixes.
793 (wide_branch_opcode): New.
794 (build_transition): Use it to check for wide branch opcodes with
795 either ".w18" or ".w15" suffixes.
797 2006-04-25 Bob Wilson <bob.wilson@acm.org>
799 * config/tc-xtensa.c (xtensa_create_literal_symbol,
800 xg_assemble_literal, xg_assemble_literal_space): Do not set the
801 frag's is_literal flag.
803 2006-04-25 Bob Wilson <bob.wilson@acm.org>
805 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
807 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
809 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
810 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
811 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
812 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
813 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
815 2005-04-20 Paul Brook <paul@codesourcery.com>
817 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
819 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
821 2006-04-19 Alan Modra <amodra@bigpond.net.au>
823 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
824 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
825 Make some cpus unsupported on ELF. Run "make dep-am".
826 * Makefile.in: Regenerate.
828 2006-04-19 Alan Modra <amodra@bigpond.net.au>
830 * configure.in (--enable-targets): Indent help message.
831 * configure: Regenerate.
833 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
836 * config/tc-i386.c (i386_immediate): Check illegal immediate
839 2006-04-18 Alan Modra <amodra@bigpond.net.au>
841 * config/tc-i386.c: Formatting.
842 (output_disp, output_imm): ISO C90 params.
844 * frags.c (frag_offset_fixed_p): Constify args.
845 * frags.h (frag_offset_fixed_p): Ditto.
847 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
848 (COFF_MAGIC): Delete.
850 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
852 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
854 * po/POTFILES.in: Regenerated.
856 2006-04-16 Mark Mitchell <mark@codesourcery.com>
858 * doc/as.texinfo: Mention that some .type syntaxes are not
859 supported on all architectures.
861 2006-04-14 Sterling Augustine <sterling@tensilica.com>
863 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
864 instructions when such transformations have been disabled.
866 2006-04-10 Sterling Augustine <sterling@tensilica.com>
868 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
869 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
870 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
871 decoding the loop instructions. Remove current_offset variable.
872 (xtensa_fix_short_loop_frags): Likewise.
873 (min_bytes_to_other_loop_end): Remove current_offset argument.
875 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
877 * config/tc-z80.c (z80_optimize_expr): Removed.
878 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
880 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
882 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
883 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
884 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
885 atmega644, atmega329, atmega3290, atmega649, atmega6490,
886 atmega406, atmega640, atmega1280, atmega1281, at90can32,
887 at90can64, at90usb646, at90usb647, at90usb1286 and
889 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
891 2006-04-07 Paul Brook <paul@codesourcery.com>
893 * config/tc-arm.c (parse_operands): Set default error message.
895 2006-04-07 Paul Brook <paul@codesourcery.com>
897 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
899 2006-04-07 Paul Brook <paul@codesourcery.com>
901 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
903 2006-04-07 Paul Brook <paul@codesourcery.com>
905 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
906 (move_or_literal_pool): Handle Thumb-2 instructions.
907 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
909 2006-04-07 Alan Modra <amodra@bigpond.net.au>
912 * config/tc-i386.c (match_template): Move 64-bit operand tests
915 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
917 * po/Make-in: Add install-html target.
918 * Makefile.am: Add install-html and install-html-recursive targets.
919 * Makefile.in: Regenerate.
920 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
921 * configure: Regenerate.
922 * doc/Makefile.am: Add install-html and install-html-am targets.
923 * doc/Makefile.in: Regenerate.
925 2006-04-06 Alan Modra <amodra@bigpond.net.au>
927 * frags.c (frag_offset_fixed_p): Reinitialise offset before
930 2006-04-05 Richard Sandiford <richard@codesourcery.com>
931 Daniel Jacobowitz <dan@codesourcery.com>
933 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
934 (GOTT_BASE, GOTT_INDEX): New.
935 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
936 GOTT_INDEX when generating VxWorks PIC.
937 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
938 use the generic *-*-vxworks* stanza instead.
940 2006-04-04 Alan Modra <amodra@bigpond.net.au>
943 * frags.c (frag_offset_fixed_p): New function.
944 * frags.h (frag_offset_fixed_p): Declare.
945 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
946 (resolve_expression): Likewise.
948 2006-04-03 Sterling Augustine <sterling@tensilica.com>
950 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
951 of the same length but different numbers of slots.
953 2006-03-30 Andreas Schwab <schwab@suse.de>
955 * configure.in: Fix help string for --enable-targets option.
956 * configure: Regenerate.
958 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
960 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
961 (m68k_ip): ... here. Use for all chips. Protect against buffer
962 overrun and avoid excessive copying.
964 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
965 m68020_control_regs, m68040_control_regs, m68060_control_regs,
966 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
967 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
968 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
969 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
970 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
971 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
972 mcf5282_ctrl, mcfv4e_ctrl): ... these.
973 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
974 (struct m68k_cpu): Change chip field to control_regs.
975 (current_chip): Remove.
977 (m68k_archs, m68k_extensions): Adjust.
978 (m68k_cpus): Reorder to be in cpu number order. Adjust.
979 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
980 (find_cf_chip): Reimplement for new organization of cpu table.
981 (select_control_regs): Remove.
983 (struct save_opts): Save control regs, not chip.
984 (s_save, s_restore): Adjust.
985 (m68k_lookup_cpu): Give deprecated warning when necessary.
986 (m68k_init_arch): Adjust.
987 (md_show_usage): Adjust for new cpu table organization.
989 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
991 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
992 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
993 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
995 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
996 (any_gotrel): New rule.
997 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
998 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1000 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1001 (bfin_pic_ptr): New function.
1002 (md_pseudo_table): Add it for ".picptr".
1003 (OPTION_FDPIC): New macro.
1004 (md_longopts): Add -mfdpic.
1005 (md_parse_option): Handle it.
1006 (md_begin): Set BFD flags.
1007 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1008 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1010 * Makefile.am (bfin-parse.o): Update dependencies.
1011 (DEPTC_bfin_elf): Likewise.
1012 * Makefile.in: Regenerate.
1014 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1016 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1017 mcfemac instead of mcfmac.
1019 2006-03-23 Michael Matz <matz@suse.de>
1021 * config/tc-i386.c (type_names): Correct placement of 'static'.
1022 (reloc): Map some more relocs to their 64 bit counterpart when
1024 (output_insn): Work around breakage if DEBUG386 is defined.
1025 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1026 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1027 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1028 different from i386.
1029 (output_imm): Ditto.
1030 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1032 (md_convert_frag): Jumps can now be larger than 2GB away, error
1034 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1035 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1037 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1038 Daniel Jacobowitz <dan@codesourcery.com>
1039 Phil Edwards <phil@codesourcery.com>
1040 Zack Weinberg <zack@codesourcery.com>
1041 Mark Mitchell <mark@codesourcery.com>
1042 Nathan Sidwell <nathan@codesourcery.com>
1044 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1045 (md_begin): Complain about -G being used for PIC. Don't change
1046 the text, data and bss alignments on VxWorks.
1047 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1048 generating VxWorks PIC.
1049 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1050 (macro): Likewise, but do not treat la $25 specially for
1051 VxWorks PIC, and do not handle jal.
1052 (OPTION_MVXWORKS_PIC): New macro.
1053 (md_longopts): Add -mvxworks-pic.
1054 (md_parse_option): Don't complain about using PIC and -G together here.
1055 Handle OPTION_MVXWORKS_PIC.
1056 (md_estimate_size_before_relax): Always use the first relaxation
1057 sequence on VxWorks.
1058 * config/tc-mips.h (VXWORKS_PIC): New.
1060 2006-03-21 Paul Brook <paul@codesourcery.com>
1062 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1064 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1066 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1067 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1068 (get_loop_align_size): New.
1069 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1070 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1071 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1072 (get_noop_aligned_address): Use get_loop_align_size.
1073 (get_aligned_diff): Likewise.
1075 2006-03-21 Paul Brook <paul@codesourcery.com>
1077 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1079 2006-03-20 Paul Brook <paul@codesourcery.com>
1081 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1082 (do_t_branch): Encode branches inside IT blocks as unconditional.
1083 (do_t_cps): New function.
1084 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1085 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1086 (opcode_lookup): Allow conditional suffixes on all instructions in
1088 (md_assemble): Advance condexec state before checking for errors.
1089 (insns): Use do_t_cps.
1091 2006-03-20 Paul Brook <paul@codesourcery.com>
1093 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1094 outputting the insn.
1096 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1098 * config/tc-vax.c: Update copyright year.
1099 * config/tc-vax.h: Likewise.
1101 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1103 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1105 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1107 2006-03-17 Paul Brook <paul@codesourcery.com>
1109 * config/tc-arm.c (insns): Add ldm and stm.
1111 2006-03-17 Ben Elliston <bje@au.ibm.com>
1114 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1116 2006-03-16 Paul Brook <paul@codesourcery.com>
1118 * config/tc-arm.c (insns): Add "svc".
1120 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1122 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1123 flag and avoid double underscore prefixes.
1125 2006-03-10 Paul Brook <paul@codesourcery.com>
1127 * config/tc-arm.c (md_begin): Handle EABIv5.
1128 (arm_eabis): Add EF_ARM_EABI_VER5.
1129 * doc/c-arm.texi: Document -meabi=5.
1131 2006-03-10 Ben Elliston <bje@au.ibm.com>
1133 * app.c (do_scrub_chars): Simplify string handling.
1135 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1136 Daniel Jacobowitz <dan@codesourcery.com>
1137 Zack Weinberg <zack@codesourcery.com>
1138 Nathan Sidwell <nathan@codesourcery.com>
1139 Paul Brook <paul@codesourcery.com>
1140 Ricardo Anguiano <anguiano@codesourcery.com>
1141 Phil Edwards <phil@codesourcery.com>
1143 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1144 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1146 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1147 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1148 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1150 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1152 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1153 even when using the text-section-literals option.
1155 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1157 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1159 (m68k_ip): <case 'J'> Check we have some control regs.
1160 (md_parse_option): Allow raw arch switch.
1161 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1162 whether 68881 or cfloat was meant by -mfloat.
1163 (md_show_usage): Adjust extension display.
1164 (m68k_elf_final_processing): Adjust.
1166 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1168 * config/tc-avr.c (avr_mod_hash_value): New function.
1169 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1170 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1171 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1172 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1174 (tc_gen_reloc): Handle substractions of symbols, if possible do
1175 fixups, abort otherwise.
1176 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1177 tc_fix_adjustable): Define.
1179 2006-03-02 James E Wilson <wilson@specifix.com>
1181 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1182 change the template, then clear md.slot[curr].end_of_insn_group.
1184 2006-02-28 Jan Beulich <jbeulich@novell.com>
1186 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1188 2006-02-28 Jan Beulich <jbeulich@novell.com>
1191 * macro.c (getstring): Don't treat parentheses special anymore.
1192 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1193 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1196 2006-02-28 Mat <mat@csail.mit.edu>
1198 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1200 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1202 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1204 (CFI_signal_frame): Define.
1205 (cfi_pseudo_table): Add .cfi_signal_frame.
1206 (dot_cfi): Handle CFI_signal_frame.
1207 (output_cie): Handle cie->signal_frame.
1208 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1209 different. Copy signal_frame from FDE to newly created CIE.
1210 * doc/as.texinfo: Document .cfi_signal_frame.
1212 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1214 * doc/Makefile.am: Add html target.
1215 * doc/Makefile.in: Regenerate.
1216 * po/Make-in: Add html target.
1218 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1220 * config/tc-i386.c (output_insn): Support Intel Merom New
1223 * config/tc-i386.h (CpuMNI): New.
1224 (CpuUnknownFlags): Add CpuMNI.
1226 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1228 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1229 (hpriv_reg_table): New table for hyperprivileged registers.
1230 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1233 2006-02-24 DJ Delorie <dj@redhat.com>
1235 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1236 (tc_gen_reloc): Don't define.
1237 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1238 (OPTION_LINKRELAX): New.
1239 (md_longopts): Add it.
1241 (md_parse_options): Set it.
1242 (md_assemble): Emit relaxation relocs as needed.
1243 (md_convert_frag): Emit relaxation relocs as needed.
1244 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1245 (m32c_apply_fix): New.
1246 (tc_gen_reloc): New.
1247 (m32c_force_relocation): Force out jump relocs when relaxing.
1248 (m32c_fix_adjustable): Return false if relaxing.
1250 2006-02-24 Paul Brook <paul@codesourcery.com>
1252 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1253 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1254 (struct asm_barrier_opt): Define.
1255 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1256 (parse_psr): Accept V7M psr names.
1257 (parse_barrier): New function.
1258 (enum operand_parse_code): Add OP_oBARRIER.
1259 (parse_operands): Implement OP_oBARRIER.
1260 (do_barrier): New function.
1261 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1262 (do_t_cpsi): Add V7M restrictions.
1263 (do_t_mrs, do_t_msr): Validate V7M variants.
1264 (md_assemble): Check for NULL variants.
1265 (v7m_psrs, barrier_opt_names): New tables.
1266 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1267 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1268 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1269 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1270 (struct cpu_arch_ver_table): Define.
1271 (cpu_arch_ver): New.
1272 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1273 Tag_CPU_arch_profile.
1274 * doc/c-arm.texi: Document new cpu and arch options.
1276 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1278 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1280 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1282 * config/tc-ia64.c: Update copyright years.
1284 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1286 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1289 2005-02-22 Paul Brook <paul@codesourcery.com>
1291 * config/tc-arm.c (do_pld): Remove incorrect write to
1293 (encode_thumb32_addr_mode): Use correct operand.
1295 2006-02-21 Paul Brook <paul@codesourcery.com>
1297 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1299 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1300 Anil Paranjape <anilp1@kpitcummins.com>
1301 Shilin Shakti <shilins@kpitcummins.com>
1303 * Makefile.am: Add xc16x related entry.
1304 * Makefile.in: Regenerate.
1305 * configure.in: Added xc16x related entry.
1306 * configure: Regenerate.
1307 * config/tc-xc16x.h: New file
1308 * config/tc-xc16x.c: New file
1309 * doc/c-xc16x.texi: New file for xc16x
1310 * doc/all.texi: Entry for xc16x
1311 * doc/Makefile.texi: Added c-xc16x.texi
1312 * NEWS: Announce the support for the new target.
1314 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1316 * configure.tgt: set emulation for mips-*-netbsd*
1318 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1320 * config.in: Rebuilt.
1322 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1324 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1325 from 1, not 0, in error messages.
1326 (md_assemble): Simplify special-case check for ENTRY instructions.
1327 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1328 operand in error message.
1330 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1332 * configure.tgt (arm-*-linux-gnueabi*): Change to
1335 2006-02-10 Nick Clifton <nickc@redhat.com>
1337 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1338 32-bit value is propagated into the upper bits of a 64-bit long.
1340 * config/tc-arc.c (init_opcode_tables): Fix cast.
1341 (arc_extoper, md_operand): Likewise.
1343 2006-02-09 David Heine <dlheine@tensilica.com>
1345 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1346 each relaxation step.
1348 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1350 * configure.in (CHECK_DECLS): Add vsnprintf.
1351 * configure: Regenerate.
1352 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1353 include/declare here, but...
1354 * as.h: Move code detecting VARARGS idiom to the top.
1355 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1356 (vsnprintf): Declare if not already declared.
1358 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1360 * as.c (close_output_file): New.
1361 (main): Register close_output_file with xatexit before
1362 dump_statistics. Don't call output_file_close.
1364 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1366 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1367 mcf5329_control_regs): New.
1368 (not_current_architecture, selected_arch, selected_cpu): New.
1369 (m68k_archs, m68k_extensions): New.
1370 (archs): Renamed to ...
1371 (m68k_cpus): ... here. Adjust.
1373 (md_pseudo_table): Add arch and cpu directives.
1374 (find_cf_chip, m68k_ip): Adjust table scanning.
1375 (no_68851, no_68881): Remove.
1376 (md_assemble): Lazily initialize.
1377 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1378 (md_init_after_args): Move functionality to m68k_init_arch.
1379 (mri_chip): Adjust table scanning.
1380 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1381 options with saner parsing.
1382 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1383 m68k_init_arch): New.
1384 (s_m68k_cpu, s_m68k_arch): New.
1385 (md_show_usage): Adjust.
1386 (m68k_elf_final_processing): Set CF EF flags.
1387 * config/tc-m68k.h (m68k_init_after_args): Remove.
1388 (tc_init_after_args): Remove.
1389 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1390 (M68k-Directives): Document .arch and .cpu directives.
1392 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1394 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1395 synonyms for equ and defl.
1396 (z80_cons_fix_new): New function.
1397 (emit_byte): Disallow relative jumps to absolute locations.
1398 (emit_data): Only handle defb, prototype changed, because defb is
1399 now handled as pseudo-op rather than an instruction.
1400 (instab): Entries for defb,defw,db,dw moved from here...
1401 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1402 Add entries for def24,def32,d24,d32.
1403 (md_assemble): Improved error handling.
1404 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1405 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1406 (z80_cons_fix_new): Declare.
1407 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1408 (def24,d24,def32,d32): New pseudo-ops.
1410 2006-02-02 Paul Brook <paul@codesourcery.com>
1412 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1414 2005-02-02 Paul Brook <paul@codesourcery.com>
1416 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1417 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1418 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1419 T2_OPCODE_RSB): Define.
1420 (thumb32_negate_data_op): New function.
1421 (md_apply_fix): Use it.
1423 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1425 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1427 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1428 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1430 (relaxation_requirements): Add pfinish_frag argument and use it to
1431 replace setting tinsn->record_fix fields.
1432 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1433 and vinsn_to_insnbuf. Remove references to record_fix and
1434 slot_sub_symbols fields.
1435 (xtensa_mark_narrow_branches): Delete unused code.
1436 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1438 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1440 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1441 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1442 of the record_fix field. Simplify error messages for unexpected
1444 (set_expr_symbol_offset_diff): Delete.
1446 2006-01-31 Paul Brook <paul@codesourcery.com>
1448 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1450 2006-01-31 Paul Brook <paul@codesourcery.com>
1451 Richard Earnshaw <rearnsha@arm.com>
1453 * config/tc-arm.c: Use arm_feature_set.
1454 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1455 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1456 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1459 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1460 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1461 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1462 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1464 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1465 (arm_opts): Move old cpu/arch options from here...
1466 (arm_legacy_opts): ... to here.
1467 (md_parse_option): Search arm_legacy_opts.
1468 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1469 (arm_float_abis, arm_eabis): Make const.
1471 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1473 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1475 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1477 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1478 in load immediate intruction.
1480 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1482 * config/bfin-parse.y (value_match): Use correct conversion
1483 specifications in template string for __FILE__ and __LINE__.
1487 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1489 Introduce TLS descriptors for i386 and x86_64.
1490 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1491 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1492 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1493 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1494 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1496 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1497 (lex_got): Handle @tlsdesc and @tlscall.
1498 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1500 2006-01-11 Nick Clifton <nickc@redhat.com>
1502 Fixes for building on 64-bit hosts:
1503 * config/tc-avr.c (mod_index): New union to allow conversion
1504 between pointers and integers.
1505 (md_begin, avr_ldi_expression): Use it.
1506 * config/tc-i370.c (md_assemble): Add cast for argument to print
1508 * config/tc-tic54x.c (subsym_substitute): Likewise.
1509 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1510 opindex field of fr_cgen structure into a pointer so that it can
1511 be stored in a frag.
1512 * config/tc-mn10300.c (md_assemble): Likewise.
1513 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1515 * config/tc-v850.c: Replace uses of (int) casts with correct
1518 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1521 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1523 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1526 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1527 a local-label reference.
1529 For older changes see ChangeLog-2005
1535 version-control: never
projects / binutils-gdb.git / blob