PR gas/3172
[binutils-gdb.git] / gas / ChangeLog
1 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
2
3 PR gas/3172
4 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
5 registers as a sub-class of wC registers.
6
7 2006-09-11 Alan Modra <amodra@bigpond.net.au>
8
9 PR gas/3165
10 * config/tc-mips.h (enum dwarf2_format): Forward declare.
11 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
12 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
13 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
14
15 2006-09-08 Nick Clifton <nickc@redhat.com>
16
17 PR gas/3129
18 * doc/as.texinfo (Macro): Improve documentation about separating
19 macro arguments from following text.
20
21 2006-09-08 Paul Brook <paul@codesourcery.com>
22
23 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
24
25 2006-09-07 Paul Brook <paul@codesourcery.com>
26
27 * config/tc-arm.c (parse_operands): Mark operand as present.
28
29 2006-09-04 Paul Brook <paul@codesourcery.com>
30
31 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
32 (do_neon_dyadic_if_i_d): Avoid setting U bit.
33 (do_neon_mac_maybe_scalar): Ditto.
34 (do_neon_dyadic_narrow): Force operand type to NT_integer.
35 (insns): Remove out of date comments.
36
37 2006-08-29 Nick Clifton <nickc@redhat.com>
38
39 * read.c (s_align): Initialize the 'stopc' variable to prevent
40 compiler complaints about it being used without being
41 initialized.
42 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
43 s_float_space, s_struct, cons_worker, equals): Likewise.
44
45 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
46
47 * ecoff.c (ecoff_directive_val): Fix message typo.
48 * config/tc-ns32k.c (convert_iif): Likewise.
49 * config/tc-sh64.c (shmedia_check_limits): Likewise.
50
51 2006-08-25 Sterling Augustine <sterling@tensilica.com>
52 Bob Wilson <bob.wilson@acm.org>
53
54 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
55 the state of the absolute_literals directive. Remove align frag at
56 the start of the literal pool position.
57
58 2006-08-25 Bob Wilson <bob.wilson@acm.org>
59
60 * doc/c-xtensa.texi: Add @group commands in examples.
61
62 2006-08-24 Bob Wilson <bob.wilson@acm.org>
63
64 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
65 (INIT_LITERAL_SECTION_NAME): Delete.
66 (lit_state struct): Remove segment names, init_lit_seg, and
67 fini_lit_seg. Add lit_prefix and current_text_seg.
68 (init_literal_head_h, init_literal_head): Delete.
69 (fini_literal_head_h, fini_literal_head): Delete.
70 (xtensa_begin_directive): Move argument parsing to
71 xtensa_literal_prefix function.
72 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
73 (xtensa_literal_prefix): Parse the directive argument here and
74 record it in the lit_prefix field. Remove code to derive literal
75 section names.
76 (linkonce_len): New.
77 (get_is_linkonce_section): Use linkonce_len. Check for any
78 ".gnu.linkonce.*" section, not just text sections.
79 (md_begin): Remove initialization of deleted lit_state fields.
80 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
81 to init_literal_head and fini_literal_head.
82 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
83 when traversing literal_head list.
84 (match_section_group): New.
85 (cache_literal_section): Rewrite to determine the literal section
86 name on the fly, create the section and return it.
87 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
88 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
89 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
90 Use xtensa_get_property_section from bfd.
91 (retrieve_xtensa_section): Delete.
92 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
93 description to refer to plural literal sections and add xref to
94 the Literal Directive section.
95 (Literal Directive): Describe new rules for deriving literal section
96 names. Add footnote for special case of .init/.fini with
97 --text-section-literals.
98 (Literal Prefix Directive): Replace old naming rules with xref to the
99 Literal Directive section.
100
101 2006-08-21 Joseph Myers <joseph@codesourcery.com>
102
103 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
104 merging with previous long opcode.
105
106 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
107
108 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
109 * Makefile.in: Regenerate.
110 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
111 renamed. Adjust.
112
113 2006-08-16 Julian Brown <julian@codesourcery.com>
114
115 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
116 to use ARM instructions on non-ARM-supporting cores.
117 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
118 mode automatically based on cpu variant.
119 (md_begin): Call above function.
120
121 2006-08-16 Julian Brown <julian@codesourcery.com>
122
123 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
124 recognized in non-unified syntax mode.
125
126 2006-08-15 Thiemo Seufer <ths@mips.com>
127 Nigel Stephens <nigel@mips.com>
128 David Ung <davidu@mips.com>
129
130 * configure.tgt: Handle mips*-sde-elf*.
131
132 2006-08-12 Thiemo Seufer <ths@networkno.de>
133
134 * config/tc-mips.c (mips16_ip): Fix argument register handling
135 for restore instruction.
136
137 2006-08-08 Bob Wilson <bob.wilson@acm.org>
138
139 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
140 (out_sleb128): New.
141 (out_fixed_inc_line_addr): New.
142 (process_entries): Use out_fixed_inc_line_addr when
143 DWARF2_USE_FIXED_ADVANCE_PC is set.
144 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
145
146 2006-08-08 DJ Delorie <dj@redhat.com>
147
148 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
149 vs full symbols so that we never have more than one pointer value
150 for any given symbol in our symbol table.
151
152 2006-08-08 Sterling Augustine <sterling@tensilica.com>
153
154 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
155 and emit DW_AT_ranges when code in compilation unit is not
156 contiguous.
157 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
158 is not contiguous.
159 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
160 (out_debug_ranges): New function to emit .debug_ranges section
161 when code is not contiguous.
162
163 2006-08-08 Nick Clifton <nickc@redhat.com>
164
165 * config/tc-arm.c (WARN_DEPRECATED): Enable.
166
167 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
168
169 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
170 only block.
171 (pe_directive_secrel) [TE_PE]: New function.
172 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
173 loc, loc_mark_labels.
174 [TE_PE]: Handle secrel32.
175 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
176 call.
177 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
178 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
179 (md_section_align): Only round section sizes here for AOUT
180 targets.
181 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
182 (tc_pe_dwarf2_emit_offset): New function.
183 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
184 (cons_fix_new_arm): Handle O_secrel.
185 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
186 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
187 of OBJ_ELF only block.
188 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
189 tc_pe_dwarf2_emit_offset.
190
191 2006-08-04 Richard Sandiford <richard@codesourcery.com>
192
193 * config/tc-sh.c (apply_full_field_fix): New function.
194 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
195 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
196 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
197 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
198
199 2006-08-03 Nick Clifton <nickc@redhat.com>
200
201 PR gas/2991
202 * config.in: Regenerate.
203
204 2006-08-03 Joseph Myers <joseph@codesourcery.com>
205
206 * config/tc-arm.c (parse_operands): Handle invalid register name
207 for OP_RIWR_RIWC.
208
209 2006-08-03 Joseph Myers <joseph@codesourcery.com>
210
211 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
212 (parse_operands): Handle it.
213 (insns): Use it for tmcr and tmrc.
214
215 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
216
217 PR binutils/2983
218 * config/tc-i386.c (md_parse_option): Treat any target starting
219 with elf64_x86_64 as a viable target for the -64 switch.
220 (i386_target_format): For 64-bit ELF flavoured output use
221 ELF_TARGET_FORMAT64.
222 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
223
224 2006-08-02 Nick Clifton <nickc@redhat.com>
225
226 PR gas/2991
227 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
228 bfd/aclocal.m4.
229 * configure.in: Run BFD_BINARY_FOPEN.
230 * configure: Regenerate.
231 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
232 file to include.
233
234 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
235
236 * config/tc-i386.c (md_assemble): Don't update
237 cpu_arch_isa_flags.
238
239 2006-08-01 Thiemo Seufer <ths@mips.com>
240
241 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
242
243 2006-08-01 Thiemo Seufer <ths@mips.com>
244
245 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
246 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
247 BFD_RELOC_32 and BFD_RELOC_16.
248 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
249 md_convert_frag, md_obj_end): Fix comment formatting.
250
251 2006-07-31 Thiemo Seufer <ths@mips.com>
252
253 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
254 handling for BFD_RELOC_MIPS16_JMP.
255
256 2006-07-24 Andreas Schwab <schwab@suse.de>
257
258 PR/2756
259 * read.c (read_a_source_file): Ignore unknown text after line
260 comment character. Fix misleading comment.
261
262 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
263
264 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
265 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
266 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
267 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
268 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
269 doc/c-z80.texi, doc/internals.texi: Fix some typos.
270
271 2006-07-21 Nick Clifton <nickc@redhat.com>
272
273 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
274 linker testsuite.
275
276 2006-07-20 Thiemo Seufer <ths@mips.com>
277 Nigel Stephens <nigel@mips.com>
278
279 * config/tc-mips.c (md_parse_option): Don't infer optimisation
280 options from debug options.
281
282 2006-07-20 Thiemo Seufer <ths@mips.com>
283
284 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
285 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
286
287 2006-07-19 Paul Brook <paul@codesourcery.com>
288
289 * config/tc-arm.c (insns): Fix rbit Arm opcode.
290
291 2006-07-18 Paul Brook <paul@codesourcery.com>
292
293 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
294 (md_convert_frag): Use correct reloc for add_pc. Use
295 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
296 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
297 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
298
299 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
300
301 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
302 when file and line unknown.
303
304 2006-07-17 Thiemo Seufer <ths@mips.com>
305
306 * read.c (s_struct): Use IS_ELF.
307 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
308 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
309 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
310 s_mips_mask): Likewise.
311
312 2006-07-16 Thiemo Seufer <ths@mips.com>
313 David Ung <davidu@mips.com>
314
315 * read.c (s_struct): Handle ELF section changing.
316 * config/tc-mips.c (s_align): Leave enabling auto-align to the
317 generic code.
318 (s_change_sec): Try section changing only if we output ELF.
319
320 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
321
322 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
323 CpuAmdFam10.
324 (smallest_imm_type): Remove Cpu086.
325 (i386_target_format): Likewise.
326
327 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
328 Update CpuXXX.
329
330 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
331 Michael Meissner <michael.meissner@amd.com>
332
333 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
334 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
335 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
336 architecture.
337 (i386_align_code): Ditto.
338 (md_assemble_code): Add support for insertq/extrq instructions,
339 swapping as needed for intel syntax.
340 (swap_imm_operands): New function to swap immediate operands.
341 (swap_operands): Deal with 4 operand instructions.
342 (build_modrm_byte): Add support for insertq instruction.
343
344 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
345
346 * config/tc-i386.h (Size64): Fix a typo in comment.
347
348 2006-07-12 Nick Clifton <nickc@redhat.com>
349
350 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
351 fixup_segment() to repeat a range check on a value that has
352 already been checked here.
353
354 2006-07-07 James E Wilson <wilson@specifix.com>
355
356 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
357
358 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
359 Nick Clifton <nickc@redhat.com>
360
361 PR binutils/2877
362 * doc/as.texi: Fix spelling typo: branchs => branches.
363 * doc/c-m68hc11.texi: Likewise.
364 * config/tc-m68hc11.c: Likewise.
365 Support old spelling of command line switch for backwards
366 compatibility.
367
368 2006-07-04 Thiemo Seufer <ths@mips.com>
369 David Ung <davidu@mips.com>
370
371 * config/tc-mips.c (s_is_linkonce): New function.
372 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
373 weak, external, and linkonce symbols.
374 (pic_need_relax): Use s_is_linkonce.
375
376 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
377
378 * doc/as.texinfo (Org): Remove space.
379 (P2align): Add "@var{abs-expr},".
380
381 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
382
383 * config/tc-i386.c (cpu_arch_tune_set): New.
384 (cpu_arch_isa): Likewise.
385 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
386 nops with short or long nop sequences based on -march=/.arch
387 and -mtune=.
388 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
389 set cpu_arch_tune and cpu_arch_tune_flags.
390 (md_parse_option): For -march=, set cpu_arch_isa and set
391 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
392 0. Set cpu_arch_tune_set to 1 for -mtune=.
393 (i386_target_format): Don't set cpu_arch_tune.
394
395 2006-06-23 Nigel Stephens <nigel@mips.com>
396
397 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
398 generated .sbss.* and .gnu.linkonce.sb.*.
399
400 2006-06-23 Thiemo Seufer <ths@mips.com>
401 David Ung <davidu@mips.com>
402
403 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
404 label_list.
405 * config/tc-mips.c (label_list): Define per-segment label_list.
406 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
407 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
408 mips_from_file_after_relocs, mips_define_label): Use per-segment
409 label_list.
410
411 2006-06-22 Thiemo Seufer <ths@mips.com>
412
413 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
414 (append_insn): Use it.
415 (md_apply_fix): Whitespace formatting.
416 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
417 mips16_extended_frag): Remove register specifier.
418 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
419 constants.
420
421 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
422
423 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
424 a directive saving VFP registers for ARMv6 or later.
425 (s_arm_unwind_save): Add parameter arch_v6 and call
426 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
427 appropriate.
428 (md_pseudo_table): Add entry for new "vsave" directive.
429 * doc/c-arm.texi: Correct error in example for "save"
430 directive (fstmdf -> fstmdx). Also document "vsave" directive.
431
432 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
433 Anatoly Sokolov <aesok@post.ru>
434
435 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
436 and atmega644p devices. Rename atmega164/atmega324 devices to
437 atmega164p/atmega324p.
438 * doc/c-avr.texi: Document new mcu and arch options.
439
440 2006-06-17 Nick Clifton <nickc@redhat.com>
441
442 * config/tc-arm.c (enum parse_operand_result): Move outside of
443 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
444
445 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
446
447 * config/tc-i386.h (processor_type): New.
448 (arch_entry): Add type.
449
450 * config/tc-i386.c (cpu_arch_tune): New.
451 (cpu_arch_tune_flags): Likewise.
452 (cpu_arch_isa_flags): Likewise.
453 (cpu_arch): Updated.
454 (set_cpu_arch): Also update cpu_arch_isa_flags.
455 (md_assemble): Update cpu_arch_isa_flags.
456 (OPTION_MARCH): New.
457 (OPTION_MTUNE): Likewise.
458 (md_longopts): Add -march= and -mtune=.
459 (md_parse_option): Support -march= and -mtune=.
460 (md_show_usage): Add -march=CPU/-mtune=CPU.
461 (i386_target_format): Also update cpu_arch_isa_flags,
462 cpu_arch_tune and cpu_arch_tune_flags.
463
464 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
465
466 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
467
468 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
469
470 * config/tc-arm.c (enum parse_operand_result): New.
471 (struct group_reloc_table_entry): New.
472 (enum group_reloc_type): New.
473 (group_reloc_table): New array.
474 (find_group_reloc_table_entry): New function.
475 (parse_shifter_operand_group_reloc): New function.
476 (parse_address_main): New function, incorporating code
477 from the old parse_address function. To be used via...
478 (parse_address): wrapper for parse_address_main; and
479 (parse_address_group_reloc): new function, likewise.
480 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
481 OP_ADDRGLDRS, OP_ADDRGLDC.
482 (parse_operands): Support for these new operand codes.
483 New macro po_misc_or_fail_no_backtrack.
484 (encode_arm_cp_address): Preserve group relocations.
485 (insns): Modify to use the above operand codes where group
486 relocations are permitted.
487 (md_apply_fix): Handle the group relocations
488 ALU_PC_G0_NC through LDC_SB_G2.
489 (tc_gen_reloc): Likewise.
490 (arm_force_relocation): Leave group relocations for the linker.
491 (arm_fix_adjustable): Likewise.
492
493 2006-06-15 Julian Brown <julian@codesourcery.com>
494
495 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
496 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
497 relocs properly.
498
499 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
500
501 * config/tc-i386.c (process_suffix): Don't add rex64 for
502 "xchg %rax,%rax".
503
504 2006-06-09 Thiemo Seufer <ths@mips.com>
505
506 * config/tc-mips.c (mips_ip): Maintain argument count.
507
508 2006-06-09 Alan Modra <amodra@bigpond.net.au>
509
510 * config/tc-iq2000.c: Include sb.h.
511
512 2006-06-08 Nigel Stephens <nigel@mips.com>
513
514 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
515 aliases for better compatibility with SGI tools.
516
517 2006-06-08 Alan Modra <amodra@bigpond.net.au>
518
519 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
520 * Makefile.am (GASLIBS): Expand @BFDLIB@.
521 (BFDVER_H): Delete.
522 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
523 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
524 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
525 Run "make dep-am".
526 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
527 * Makefile.in: Regenerate.
528 * doc/Makefile.in: Regenerate.
529 * configure: Regenerate.
530
531 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
532
533 * po/Make-in (pdf, ps): New dummy targets.
534
535 2006-06-07 Julian Brown <julian@codesourcery.com>
536
537 * config/tc-arm.c (stdarg.h): include.
538 (arm_it): Add uncond_value field. Add isvec and issingle to operand
539 array.
540 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
541 REG_TYPE_NSDQ (single, double or quad vector reg).
542 (reg_expected_msgs): Update.
543 (BAD_FPU): Add macro for unsupported FPU instruction error.
544 (parse_neon_type): Support 'd' as an alias for .f64.
545 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
546 sets of registers.
547 (parse_vfp_reg_list): Don't update first arg on error.
548 (parse_neon_mov): Support extra syntax for VFP moves.
549 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
550 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
551 (parse_operands): Support isvec, issingle operands fields, new parse
552 codes above.
553 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
554 msr variants.
555 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
556 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
557 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
558 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
559 shapes.
560 (neon_shape): Redefine in terms of above.
561 (neon_shape_class): New enumeration, table of shape classes.
562 (neon_shape_el): New enumeration. One element of a shape.
563 (neon_shape_el_size): Register widths of above, where appropriate.
564 (neon_shape_info): New struct. Info for shape table.
565 (neon_shape_tab): New array.
566 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
567 (neon_check_shape): Rewrite as...
568 (neon_select_shape): New function to classify instruction shapes,
569 driven by new table neon_shape_tab array.
570 (neon_quad): New function. Return 1 if shape should set Q flag in
571 instructions (or equivalent), 0 otherwise.
572 (type_chk_of_el_type): Support F64.
573 (el_type_of_type_chk): Likewise.
574 (neon_check_type): Add support for VFP type checking (VFP data
575 elements fill their containing registers).
576 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
577 in thumb mode for VFP instructions.
578 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
579 and encode the current instruction as if it were that opcode.
580 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
581 arguments, call function in PFN.
582 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
583 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
584 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
585 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
586 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
587 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
588 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
589 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
590 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
591 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
592 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
593 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
594 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
595 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
596 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
597 neon_quad.
598 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
599 between VFP and Neon turns out to belong to Neon. Perform
600 architecture check and fill in condition field if appropriate.
601 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
602 (do_neon_cvt): Add support for VFP variants of instructions.
603 (neon_cvt_flavour): Extend to cover VFP conversions.
604 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
605 vmov variants.
606 (do_neon_ldr_str): Handle single-precision VFP load/store.
607 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
608 NS_NULL not NS_IGNORE.
609 (opcode_tag): Add OT_csuffixF for operands which either take a
610 conditional suffix, or have 0xF in the condition field.
611 (md_assemble): Add support for OT_csuffixF.
612 (NCE): Replace macro with...
613 (NCE_tag, NCE, NCEF): New macros.
614 (nCE): Replace macro with...
615 (nCE_tag, nCE, nCEF): New macros.
616 (insns): Add support for VFP insns or VFP versions of insns msr,
617 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
618 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
619 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
620 VFP/Neon insns together.
621
622 2006-06-07 Alan Modra <amodra@bigpond.net.au>
623 Ladislav Michl <ladis@linux-mips.org>
624
625 * app.c: Don't include headers already included by as.h.
626 * as.c: Likewise.
627 * atof-generic.c: Likewise.
628 * cgen.c: Likewise.
629 * dwarf2dbg.c: Likewise.
630 * expr.c: Likewise.
631 * input-file.c: Likewise.
632 * input-scrub.c: Likewise.
633 * macro.c: Likewise.
634 * output-file.c: Likewise.
635 * read.c: Likewise.
636 * sb.c: Likewise.
637 * config/bfin-lex.l: Likewise.
638 * config/obj-coff.h: Likewise.
639 * config/obj-elf.h: Likewise.
640 * config/obj-som.h: Likewise.
641 * config/tc-arc.c: Likewise.
642 * config/tc-arm.c: Likewise.
643 * config/tc-avr.c: Likewise.
644 * config/tc-bfin.c: Likewise.
645 * config/tc-cris.c: Likewise.
646 * config/tc-d10v.c: Likewise.
647 * config/tc-d30v.c: Likewise.
648 * config/tc-dlx.h: Likewise.
649 * config/tc-fr30.c: Likewise.
650 * config/tc-frv.c: Likewise.
651 * config/tc-h8300.c: Likewise.
652 * config/tc-hppa.c: Likewise.
653 * config/tc-i370.c: Likewise.
654 * config/tc-i860.c: Likewise.
655 * config/tc-i960.c: Likewise.
656 * config/tc-ip2k.c: Likewise.
657 * config/tc-iq2000.c: Likewise.
658 * config/tc-m32c.c: Likewise.
659 * config/tc-m32r.c: Likewise.
660 * config/tc-maxq.c: Likewise.
661 * config/tc-mcore.c: Likewise.
662 * config/tc-mips.c: Likewise.
663 * config/tc-mmix.c: Likewise.
664 * config/tc-mn10200.c: Likewise.
665 * config/tc-mn10300.c: Likewise.
666 * config/tc-msp430.c: Likewise.
667 * config/tc-mt.c: Likewise.
668 * config/tc-ns32k.c: Likewise.
669 * config/tc-openrisc.c: Likewise.
670 * config/tc-ppc.c: Likewise.
671 * config/tc-s390.c: Likewise.
672 * config/tc-sh.c: Likewise.
673 * config/tc-sh64.c: Likewise.
674 * config/tc-sparc.c: Likewise.
675 * config/tc-tic30.c: Likewise.
676 * config/tc-tic4x.c: Likewise.
677 * config/tc-tic54x.c: Likewise.
678 * config/tc-v850.c: Likewise.
679 * config/tc-vax.c: Likewise.
680 * config/tc-xc16x.c: Likewise.
681 * config/tc-xstormy16.c: Likewise.
682 * config/tc-xtensa.c: Likewise.
683 * config/tc-z80.c: Likewise.
684 * config/tc-z8k.c: Likewise.
685 * macro.h: Don't include sb.h or ansidecl.h.
686 * sb.h: Don't include stdio.h or ansidecl.h.
687 * cond.c: Include sb.h.
688 * itbl-lex.l: Include as.h instead of other system headers.
689 * itbl-parse.y: Likewise.
690 * itbl-ops.c: Similarly.
691 * itbl-ops.h: Don't include as.h or ansidecl.h.
692 * config/bfin-defs.h: Don't include bfd.h or as.h.
693 * config/bfin-parse.y: Include as.h instead of other system headers.
694
695 2006-06-06 Ben Elliston <bje@au.ibm.com>
696 Anton Blanchard <anton@samba.org>
697
698 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
699 (md_show_usage): Document it.
700 (ppc_setup_opcodes): Test power6 opcode flag bits.
701 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
702
703 2006-06-06 Thiemo Seufer <ths@mips.com>
704 Chao-ying Fu <fu@mips.com>
705
706 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
707 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
708 (macro_build): Update comment.
709 (mips_ip): Allow DSP64 instructions for MIPS64R2.
710 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
711 CPU_HAS_MDMX.
712 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
713 MIPS_CPU_ASE_MDMX flags for sb1.
714
715 2006-06-05 Thiemo Seufer <ths@mips.com>
716
717 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
718 appropriate.
719 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
720 (mips_ip): Make overflowed/underflowed constant arguments in DSP
721 and MT instructions a fatal error. Use INSERT_OPERAND where
722 appropriate. Improve warnings for break and wait code overflows.
723 Use symbolic constant of OP_MASK_COPZ.
724 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
725
726 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
727
728 * po/Make-in (top_builddir): Define.
729
730 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
731
732 * doc/Makefile.am (TEXI2DVI): Define.
733 * doc/Makefile.in: Regenerate.
734 * doc/c-arc.texi: Fix typo.
735
736 2006-06-01 Alan Modra <amodra@bigpond.net.au>
737
738 * config/obj-ieee.c: Delete.
739 * config/obj-ieee.h: Delete.
740 * Makefile.am (OBJ_FORMATS): Remove ieee.
741 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
742 (obj-ieee.o): Remove rule.
743 * Makefile.in: Regenerate.
744 * configure.in (atof): Remove tahoe.
745 (OBJ_MAYBE_IEEE): Don't define.
746 * configure: Regenerate.
747 * config.in: Regenerate.
748 * doc/Makefile.in: Regenerate.
749 * po/POTFILES.in: Regenerate.
750
751 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
752
753 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
754 and LIBINTL_DEP everywhere.
755 (INTLLIBS): Remove.
756 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
757 * acinclude.m4: Include new gettext macros.
758 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
759 Remove local code for po/Makefile.
760 * Makefile.in, configure, doc/Makefile.in: Regenerated.
761
762 2006-05-30 Nick Clifton <nickc@redhat.com>
763
764 * po/es.po: Updated Spanish translation.
765
766 2006-05-06 Denis Chertykov <denisc@overta.ru>
767
768 * doc/c-avr.texi: New file.
769 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
770 * doc/all.texi: Set AVR
771 * doc/as.texinfo: Include c-avr.texi
772
773 2006-05-28 Jie Zhang <jie.zhang@analog.com>
774
775 * config/bfin-parse.y (check_macfunc): Loose the condition of
776 calling check_multiply_halfregs ().
777
778 2006-05-25 Jie Zhang <jie.zhang@analog.com>
779
780 * config/bfin-parse.y (asm_1): Better check and deal with
781 vector and scalar Multiply 16-Bit Operands instructions.
782
783 2006-05-24 Nick Clifton <nickc@redhat.com>
784
785 * config/tc-hppa.c: Convert to ISO C90 format.
786 * config/tc-hppa.h: Likewise.
787
788 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
789 Randolph Chung <randolph@tausq.org>
790
791 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
792 is_tls_ieoff, is_tls_leoff): Define.
793 (fix_new_hppa): Handle TLS.
794 (cons_fix_new_hppa): Likewise.
795 (pa_ip): Likewise.
796 (md_apply_fix): Handle TLS relocs.
797 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
798
799 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
800
801 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
802
803 2006-05-23 Thiemo Seufer <ths@mips.com>
804 David Ung <davidu@mips.com>
805 Nigel Stephens <nigel@mips.com>
806
807 [ gas/ChangeLog ]
808 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
809 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
810 ISA_HAS_MXHC1): New macros.
811 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
812 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
813 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
814 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
815 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
816 (mips_after_parse_args): Change default handling of float register
817 size to account for 32bit code with 64bit FP. Better sanity checking
818 of ISA/ASE/ABI option combinations.
819 (s_mipsset): Support switching of GPR and FPR sizes via
820 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
821 options.
822 (mips_elf_final_processing): We should record the use of 64bit FP
823 registers in 32bit code but we don't, because ELF header flags are
824 a scarce ressource.
825 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
826 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
827 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
828 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
829 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
830 missing -march options. Document .set arch=CPU. Move .set smartmips
831 to ASE page. Use @code for .set FOO examples.
832
833 2006-05-23 Jie Zhang <jie.zhang@analog.com>
834
835 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
836 if needed.
837
838 2006-05-23 Jie Zhang <jie.zhang@analog.com>
839
840 * config/bfin-defs.h (bfin_equals): Remove declaration.
841 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
842 * config/tc-bfin.c (bfin_name_is_register): Remove.
843 (bfin_equals): Remove.
844 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
845 (bfin_name_is_register): Remove declaration.
846
847 2006-05-19 Thiemo Seufer <ths@mips.com>
848 Nigel Stephens <nigel@mips.com>
849
850 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
851 (mips_oddfpreg_ok): New function.
852 (mips_ip): Use it.
853
854 2006-05-19 Thiemo Seufer <ths@mips.com>
855 David Ung <davidu@mips.com>
856
857 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
858 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
859 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
860 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
861 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
862 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
863 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
864 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
865 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
866 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
867 reg_names_o32, reg_names_n32n64): Define register classes.
868 (reg_lookup): New function, use register classes.
869 (md_begin): Reserve register names in the symbol table. Simplify
870 OBJ_ELF defines.
871 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
872 Use reg_lookup.
873 (mips16_ip): Use reg_lookup.
874 (tc_get_register): Likewise.
875 (tc_mips_regname_to_dw2regnum): New function.
876
877 2006-05-19 Thiemo Seufer <ths@mips.com>
878
879 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
880 Un-constify string argument.
881 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
882 Likewise.
883 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
884 Likewise.
885 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
886 Likewise.
887 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
888 Likewise.
889 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
890 Likewise.
891 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
892 Likewise.
893
894 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
895
896 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
897 cfloat/m68881 to correct architecture before using it.
898
899 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
900
901 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
902 constant values.
903
904 2006-05-15 Paul Brook <paul@codesourcery.com>
905
906 * config/tc-arm.c (arm_adjust_symtab): Use
907 bfd_is_arm_special_symbol_name.
908
909 2006-05-15 Bob Wilson <bob.wilson@acm.org>
910
911 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
912 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
913 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
914 Handle errors from calls to xtensa_opcode_is_* functions.
915
916 2006-05-14 Thiemo Seufer <ths@mips.com>
917
918 * config/tc-mips.c (macro_build): Test for currently active
919 mips16 option.
920 (mips16_ip): Reject invalid opcodes.
921
922 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
923
924 * doc/as.texinfo: Rename "Index" to "AS Index",
925 and "ABORT" to "ABORT (COFF)".
926
927 2006-05-11 Paul Brook <paul@codesourcery.com>
928
929 * config/tc-arm.c (parse_half): New function.
930 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
931 (parse_operands): Ditto.
932 (do_mov16): Reject invalid relocations.
933 (do_t_mov16): Ditto. Use Thumb reloc numbers.
934 (insns): Replace Iffff with HALF.
935 (md_apply_fix): Add MOVW and MOVT relocs.
936 (tc_gen_reloc): Ditto.
937 * doc/c-arm.texi: Document relocation operators
938
939 2006-05-11 Paul Brook <paul@codesourcery.com>
940
941 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
942
943 2006-05-11 Thiemo Seufer <ths@mips.com>
944
945 * config/tc-mips.c (append_insn): Don't check the range of j or
946 jal addresses.
947
948 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
949
950 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
951 relocs against external symbols for WinCE targets.
952 (md_apply_fix): Likewise.
953
954 2006-05-09 David Ung <davidu@mips.com>
955
956 * config/tc-mips.c (append_insn): Only warn about an out-of-range
957 j or jal address.
958
959 2006-05-09 Nick Clifton <nickc@redhat.com>
960
961 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
962 against symbols which are not going to be placed into the symbol
963 table.
964
965 2006-05-09 Ben Elliston <bje@au.ibm.com>
966
967 * expr.c (operand): Remove `if (0 && ..)' statement and
968 subsequently unused target_op label. Collapse `if (1 || ..)'
969 statement.
970 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
971 separately above the switch.
972
973 2006-05-08 Nick Clifton <nickc@redhat.com>
974
975 PR gas/2623
976 * config/tc-msp430.c (line_separator_character): Define as |.
977
978 2006-05-08 Thiemo Seufer <ths@mips.com>
979 Nigel Stephens <nigel@mips.com>
980 David Ung <davidu@mips.com>
981
982 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
983 (mips_opts): Likewise.
984 (file_ase_smartmips): New variable.
985 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
986 (macro_build): Handle SmartMIPS instructions.
987 (mips_ip): Likewise.
988 (md_longopts): Add argument handling for smartmips.
989 (md_parse_options, mips_after_parse_args): Likewise.
990 (s_mipsset): Add .set smartmips support.
991 (md_show_usage): Document -msmartmips/-mno-smartmips.
992 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
993 .set smartmips.
994 * doc/c-mips.texi: Likewise.
995
996 2006-05-08 Alan Modra <amodra@bigpond.net.au>
997
998 * write.c (relax_segment): Add pass count arg. Don't error on
999 negative org/space on first two passes.
1000 (relax_seg_info): New struct.
1001 (relax_seg, write_object_file): Adjust.
1002 * write.h (relax_segment): Update prototype.
1003
1004 2006-05-05 Julian Brown <julian@codesourcery.com>
1005
1006 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1007 checking.
1008 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1009 architecture version checks.
1010 (insns): Allow overlapping instructions to be used in VFP mode.
1011
1012 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1013
1014 PR gas/2598
1015 * config/obj-elf.c (obj_elf_change_section): Allow user
1016 specified SHF_ALPHA_GPREL.
1017
1018 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1019
1020 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1021 for PMEM related expressions.
1022
1023 2006-05-05 Nick Clifton <nickc@redhat.com>
1024
1025 PR gas/2582
1026 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1027 insertion of a directory separator character into a string at a
1028 given offset. Uses heuristics to decide when to use a backslash
1029 character rather than a forward-slash character.
1030 (dwarf2_directive_loc): Use the macro.
1031 (out_debug_info): Likewise.
1032
1033 2006-05-05 Thiemo Seufer <ths@mips.com>
1034 David Ung <davidu@mips.com>
1035
1036 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1037 instruction.
1038 (macro): Add new case M_CACHE_AB.
1039
1040 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1041
1042 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1043 (opcode_lookup): Issue a warning for opcode with
1044 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1045 identical to OT_cinfix3.
1046 (TxC3w, TC3w, tC3w): New.
1047 (insns): Use tC3w and TC3w for comparison instructions with
1048 's' suffix.
1049
1050 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1051
1052 * subsegs.h (struct frchain): Delete frch_seg.
1053 (frchain_root): Delete.
1054 (seg_info): Define as macro.
1055 * subsegs.c (frchain_root): Delete.
1056 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1057 (subsegs_begin, subseg_change): Adjust for above.
1058 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1059 rather than to one big list.
1060 (subseg_get): Don't special case abs, und sections.
1061 (subseg_new, subseg_force_new): Don't set frchainP here.
1062 (seg_info): Delete.
1063 (subsegs_print_statistics): Adjust frag chain control list traversal.
1064 * debug.c (dmp_frags): Likewise.
1065 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1066 at frchain_root. Make use of known frchain ordering.
1067 (last_frag_for_seg): Likewise.
1068 (get_frag_fix): Likewise. Add seg param.
1069 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1070 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1071 (SUB_SEGMENT_ALIGN): Likewise.
1072 (subsegs_finish): Adjust frchain list traversal.
1073 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1074 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1075 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1076 (xtensa_fix_b_j_loop_end_frags): Likewise.
1077 (xtensa_fix_close_loop_end_frags): Likewise.
1078 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1079 (retrieve_segment_info): Delete frch_seg initialisation.
1080
1081 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1082
1083 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1084 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1085 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1086 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1087
1088 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1089
1090 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1091 here.
1092 (md_apply_fix3): Multiply offset by 4 here for
1093 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1094
1095 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1096 Jan Beulich <jbeulich@novell.com>
1097
1098 * config/tc-i386.c (output_invalid_buf): Change size for
1099 unsigned char.
1100 * config/tc-tic30.c (output_invalid_buf): Likewise.
1101
1102 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1103 unsigned char.
1104 * config/tc-tic30.c (output_invalid): Likewise.
1105
1106 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1107
1108 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1109 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1110 (asconfig.texi): Don't set top_srcdir.
1111 * doc/as.texinfo: Don't use top_srcdir.
1112 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1113
1114 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1115
1116 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1117 * config/tc-tic30.c (output_invalid_buf): Likewise.
1118
1119 * config/tc-i386.c (output_invalid): Use snprintf instead of
1120 sprintf.
1121 * config/tc-ia64.c (declare_register_set): Likewise.
1122 (emit_one_bundle): Likewise.
1123 (check_dependencies): Likewise.
1124 * config/tc-tic30.c (output_invalid): Likewise.
1125
1126 2006-05-02 Paul Brook <paul@codesourcery.com>
1127
1128 * config/tc-arm.c (arm_optimize_expr): New function.
1129 * config/tc-arm.h (md_optimize_expr): Define
1130 (arm_optimize_expr): Add prototype.
1131 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1132
1133 2006-05-02 Ben Elliston <bje@au.ibm.com>
1134
1135 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1136 field unsigned.
1137
1138 * sb.h (sb_list_vector): Move to sb.c.
1139 * sb.c (free_list): Use type of sb_list_vector directly.
1140 (sb_build): Fix off-by-one error in assertion about `size'.
1141
1142 2006-05-01 Ben Elliston <bje@au.ibm.com>
1143
1144 * listing.c (listing_listing): Remove useless loop.
1145 * macro.c (macro_expand): Remove is_positional local variable.
1146 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1147 and simplify surrounding expressions, where possible.
1148 (assign_symbol): Likewise.
1149 (s_weakref): Likewise.
1150 * symbols.c (colon): Likewise.
1151
1152 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1153
1154 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1155
1156 2006-04-30 Thiemo Seufer <ths@mips.com>
1157 David Ung <davidu@mips.com>
1158
1159 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1160 (mips_immed): New table that records various handling of udi
1161 instruction patterns.
1162 (mips_ip): Adds udi handling.
1163
1164 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1165
1166 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1167 of list rather than beginning.
1168
1169 2006-04-26 Julian Brown <julian@codesourcery.com>
1170
1171 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1172 (is_quarter_float): Rename from above. Simplify slightly.
1173 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1174 number.
1175 (parse_neon_mov): Parse floating-point constants.
1176 (neon_qfloat_bits): Fix encoding.
1177 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1178 preference to integer encoding when using the F32 type.
1179
1180 2006-04-26 Julian Brown <julian@codesourcery.com>
1181
1182 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1183 zero-initialising structures containing it will lead to invalid types).
1184 (arm_it): Add vectype to each operand.
1185 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1186 defined field.
1187 (neon_typed_alias): New structure. Extra information for typed
1188 register aliases.
1189 (reg_entry): Add neon type info field.
1190 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1191 Break out alternative syntax for coprocessor registers, etc. into...
1192 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1193 out from arm_reg_parse.
1194 (parse_neon_type): Move. Return SUCCESS/FAIL.
1195 (first_error): New function. Call to ensure first error which occurs is
1196 reported.
1197 (parse_neon_operand_type): Parse exactly one type.
1198 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1199 (parse_typed_reg_or_scalar): New function. Handle core of both
1200 arm_typed_reg_parse and parse_scalar.
1201 (arm_typed_reg_parse): Parse a register with an optional type.
1202 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1203 result.
1204 (parse_scalar): Parse a Neon scalar with optional type.
1205 (parse_reg_list): Use first_error.
1206 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1207 (neon_alias_types_same): New function. Return true if two (alias) types
1208 are the same.
1209 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1210 of elements.
1211 (insert_reg_alias): Return new reg_entry not void.
1212 (insert_neon_reg_alias): New function. Insert type/index information as
1213 well as register for alias.
1214 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1215 make typed register aliases accordingly.
1216 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1217 of line.
1218 (s_unreq): Delete type information if present.
1219 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1220 (s_arm_unwind_save_mmxwcg): Likewise.
1221 (s_arm_unwind_movsp): Likewise.
1222 (s_arm_unwind_setfp): Likewise.
1223 (parse_shift): Likewise.
1224 (parse_shifter_operand): Likewise.
1225 (parse_address): Likewise.
1226 (parse_tb): Likewise.
1227 (tc_arm_regname_to_dw2regnum): Likewise.
1228 (md_pseudo_table): Add dn, qn.
1229 (parse_neon_mov): Handle typed operands.
1230 (parse_operands): Likewise.
1231 (neon_type_mask): Add N_SIZ.
1232 (N_ALLMODS): New macro.
1233 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1234 (el_type_of_type_chk): Add some safeguards.
1235 (modify_types_allowed): Fix logic bug.
1236 (neon_check_type): Handle operands with types.
1237 (neon_three_same): Remove redundant optional arg handling.
1238 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1239 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1240 (do_neon_step): Adjust accordingly.
1241 (neon_cmode_for_logic_imm): Use first_error.
1242 (do_neon_bitfield): Call neon_check_type.
1243 (neon_dyadic): Rename to...
1244 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1245 to allow modification of type of the destination.
1246 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1247 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1248 (do_neon_compare): Make destination be an untyped bitfield.
1249 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1250 (neon_mul_mac): Return early in case of errors.
1251 (neon_move_immediate): Use first_error.
1252 (neon_mac_reg_scalar_long): Fix type to include scalar.
1253 (do_neon_dup): Likewise.
1254 (do_neon_mov): Likewise (in several places).
1255 (do_neon_tbl_tbx): Fix type.
1256 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1257 (do_neon_ld_dup): Exit early in case of errors and/or use
1258 first_error.
1259 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1260 Handle .dn/.qn directives.
1261 (REGDEF): Add zero for reg_entry neon field.
1262
1263 2006-04-26 Julian Brown <julian@codesourcery.com>
1264
1265 * config/tc-arm.c (limits.h): Include.
1266 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1267 (fpu_vfp_v3_or_neon_ext): Declare constants.
1268 (neon_el_type): New enumeration of types for Neon vector elements.
1269 (neon_type_el): New struct. Define type and size of a vector element.
1270 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1271 instruction.
1272 (neon_type): Define struct. The type of an instruction.
1273 (arm_it): Add 'vectype' for the current instruction.
1274 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1275 (vfp_sp_reg_pos): Rename to...
1276 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1277 tags.
1278 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1279 (Neon D or Q register).
1280 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1281 register.
1282 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1283 (my_get_expression): Allow above constant as argument to accept
1284 64-bit constants with optional prefix.
1285 (arm_reg_parse): Add extra argument to return the specific type of
1286 register in when either a D or Q register (REG_TYPE_NDQ) is
1287 requested. Can be NULL.
1288 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1289 (parse_reg_list): Update for new arm_reg_parse args.
1290 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1291 (parse_neon_el_struct_list): New function. Parse element/structure
1292 register lists for VLD<n>/VST<n> instructions.
1293 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1294 (s_arm_unwind_save_mmxwr): Likewise.
1295 (s_arm_unwind_save_mmxwcg): Likewise.
1296 (s_arm_unwind_movsp): Likewise.
1297 (s_arm_unwind_setfp): Likewise.
1298 (parse_big_immediate): New function. Parse an immediate, which may be
1299 64 bits wide. Put results in inst.operands[i].
1300 (parse_shift): Update for new arm_reg_parse args.
1301 (parse_address): Likewise. Add parsing of alignment specifiers.
1302 (parse_neon_mov): Parse the operands of a VMOV instruction.
1303 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1304 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1305 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1306 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1307 (parse_operands): Handle new codes above.
1308 (encode_arm_vfp_sp_reg): Rename to...
1309 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1310 selected VFP version only supports D0-D15.
1311 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1312 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1313 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1314 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1315 encode_arm_vfp_reg name, and allow 32 D regs.
1316 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1317 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1318 regs.
1319 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1320 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1321 constant-load and conversion insns introduced with VFPv3.
1322 (neon_tab_entry): New struct.
1323 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1324 those which are the targets of pseudo-instructions.
1325 (neon_opc): Enumerate opcodes, use as indices into...
1326 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1327 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1328 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1329 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1330 neon_enc_tab.
1331 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1332 Neon instructions.
1333 (neon_type_mask): New. Compact type representation for type checking.
1334 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1335 permitted type combinations.
1336 (N_IGNORE_TYPE): New macro.
1337 (neon_check_shape): New function. Check an instruction shape for
1338 multiple alternatives. Return the specific shape for the current
1339 instruction.
1340 (neon_modify_type_size): New function. Modify a vector type and size,
1341 depending on the bit mask in argument 1.
1342 (neon_type_promote): New function. Convert a given "key" type (of an
1343 operand) into the correct type for a different operand, based on a bit
1344 mask.
1345 (type_chk_of_el_type): New function. Convert a type and size into the
1346 compact representation used for type checking.
1347 (el_type_of_type_ckh): New function. Reverse of above (only when a
1348 single bit is set in the bit mask).
1349 (modify_types_allowed): New function. Alter a mask of allowed types
1350 based on a bit mask of modifications.
1351 (neon_check_type): New function. Check the type of the current
1352 instruction against the variable argument list. The "key" type of the
1353 instruction is returned.
1354 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1355 a Neon data-processing instruction depending on whether we're in ARM
1356 mode or Thumb-2 mode.
1357 (neon_logbits): New function.
1358 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1359 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1360 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1361 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1362 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1363 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1364 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1365 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1366 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1367 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1368 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1369 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1370 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1371 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1372 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1373 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1374 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1375 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1376 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1377 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1378 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1379 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1380 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1381 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1382 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1383 helpers.
1384 (parse_neon_type): New function. Parse Neon type specifier.
1385 (opcode_lookup): Allow parsing of Neon type specifiers.
1386 (REGNUM2, REGSETH, REGSET2): New macros.
1387 (reg_names): Add new VFPv3 and Neon registers.
1388 (NUF, nUF, NCE, nCE): New macros for opcode table.
1389 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1390 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1391 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1392 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1393 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1394 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1395 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1396 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1397 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1398 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1399 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1400 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1401 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1402 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1403 fto[us][lh][sd].
1404 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1405 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1406 (arm_option_cpu_value): Add vfp3 and neon.
1407 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1408 VFPv1 attribute.
1409
1410 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1411
1412 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1413 syntax instead of hardcoded opcodes with ".w18" suffixes.
1414 (wide_branch_opcode): New.
1415 (build_transition): Use it to check for wide branch opcodes with
1416 either ".w18" or ".w15" suffixes.
1417
1418 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1419
1420 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1421 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1422 frag's is_literal flag.
1423
1424 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1425
1426 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1427
1428 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1429
1430 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1431 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1432 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1433 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1434 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1435
1436 2005-04-20 Paul Brook <paul@codesourcery.com>
1437
1438 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1439 all targets.
1440 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1441
1442 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1443
1444 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1445 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1446 Make some cpus unsupported on ELF. Run "make dep-am".
1447 * Makefile.in: Regenerate.
1448
1449 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1450
1451 * configure.in (--enable-targets): Indent help message.
1452 * configure: Regenerate.
1453
1454 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1455
1456 PR gas/2533
1457 * config/tc-i386.c (i386_immediate): Check illegal immediate
1458 register operand.
1459
1460 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1461
1462 * config/tc-i386.c: Formatting.
1463 (output_disp, output_imm): ISO C90 params.
1464
1465 * frags.c (frag_offset_fixed_p): Constify args.
1466 * frags.h (frag_offset_fixed_p): Ditto.
1467
1468 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1469 (COFF_MAGIC): Delete.
1470
1471 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1472
1473 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1474
1475 * po/POTFILES.in: Regenerated.
1476
1477 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1478
1479 * doc/as.texinfo: Mention that some .type syntaxes are not
1480 supported on all architectures.
1481
1482 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1483
1484 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1485 instructions when such transformations have been disabled.
1486
1487 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1488
1489 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1490 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1491 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1492 decoding the loop instructions. Remove current_offset variable.
1493 (xtensa_fix_short_loop_frags): Likewise.
1494 (min_bytes_to_other_loop_end): Remove current_offset argument.
1495
1496 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1497
1498 * config/tc-z80.c (z80_optimize_expr): Removed.
1499 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1500
1501 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1502
1503 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1504 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1505 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1506 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1507 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1508 at90can64, at90usb646, at90usb647, at90usb1286 and
1509 at90usb1287.
1510 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1511
1512 2006-04-07 Paul Brook <paul@codesourcery.com>
1513
1514 * config/tc-arm.c (parse_operands): Set default error message.
1515
1516 2006-04-07 Paul Brook <paul@codesourcery.com>
1517
1518 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1519
1520 2006-04-07 Paul Brook <paul@codesourcery.com>
1521
1522 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1523
1524 2006-04-07 Paul Brook <paul@codesourcery.com>
1525
1526 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1527 (move_or_literal_pool): Handle Thumb-2 instructions.
1528 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1529
1530 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1531
1532 PR 2512.
1533 * config/tc-i386.c (match_template): Move 64-bit operand tests
1534 inside loop.
1535
1536 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1537
1538 * po/Make-in: Add install-html target.
1539 * Makefile.am: Add install-html and install-html-recursive targets.
1540 * Makefile.in: Regenerate.
1541 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1542 * configure: Regenerate.
1543 * doc/Makefile.am: Add install-html and install-html-am targets.
1544 * doc/Makefile.in: Regenerate.
1545
1546 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1547
1548 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1549 second scan.
1550
1551 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1552 Daniel Jacobowitz <dan@codesourcery.com>
1553
1554 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1555 (GOTT_BASE, GOTT_INDEX): New.
1556 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1557 GOTT_INDEX when generating VxWorks PIC.
1558 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1559 use the generic *-*-vxworks* stanza instead.
1560
1561 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1562
1563 PR 997
1564 * frags.c (frag_offset_fixed_p): New function.
1565 * frags.h (frag_offset_fixed_p): Declare.
1566 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1567 (resolve_expression): Likewise.
1568
1569 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1570
1571 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1572 of the same length but different numbers of slots.
1573
1574 2006-03-30 Andreas Schwab <schwab@suse.de>
1575
1576 * configure.in: Fix help string for --enable-targets option.
1577 * configure: Regenerate.
1578
1579 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1580
1581 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1582 (m68k_ip): ... here. Use for all chips. Protect against buffer
1583 overrun and avoid excessive copying.
1584
1585 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1586 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1587 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1588 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1589 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1590 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1591 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1592 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1593 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1594 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1595 (struct m68k_cpu): Change chip field to control_regs.
1596 (current_chip): Remove.
1597 (control_regs): New.
1598 (m68k_archs, m68k_extensions): Adjust.
1599 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1600 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1601 (find_cf_chip): Reimplement for new organization of cpu table.
1602 (select_control_regs): Remove.
1603 (mri_chip): Adjust.
1604 (struct save_opts): Save control regs, not chip.
1605 (s_save, s_restore): Adjust.
1606 (m68k_lookup_cpu): Give deprecated warning when necessary.
1607 (m68k_init_arch): Adjust.
1608 (md_show_usage): Adjust for new cpu table organization.
1609
1610 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1611
1612 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1613 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1614 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1615 "elf/bfin.h".
1616 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1617 (any_gotrel): New rule.
1618 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1619 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1620 "elf/bfin.h".
1621 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1622 (bfin_pic_ptr): New function.
1623 (md_pseudo_table): Add it for ".picptr".
1624 (OPTION_FDPIC): New macro.
1625 (md_longopts): Add -mfdpic.
1626 (md_parse_option): Handle it.
1627 (md_begin): Set BFD flags.
1628 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1629 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1630 us for GOT relocs.
1631 * Makefile.am (bfin-parse.o): Update dependencies.
1632 (DEPTC_bfin_elf): Likewise.
1633 * Makefile.in: Regenerate.
1634
1635 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1636
1637 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1638 mcfemac instead of mcfmac.
1639
1640 2006-03-23 Michael Matz <matz@suse.de>
1641
1642 * config/tc-i386.c (type_names): Correct placement of 'static'.
1643 (reloc): Map some more relocs to their 64 bit counterpart when
1644 size is 8.
1645 (output_insn): Work around breakage if DEBUG386 is defined.
1646 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1647 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1648 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1649 different from i386.
1650 (output_imm): Ditto.
1651 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1652 Imm64.
1653 (md_convert_frag): Jumps can now be larger than 2GB away, error
1654 out in that case.
1655 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1656 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1657
1658 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1659 Daniel Jacobowitz <dan@codesourcery.com>
1660 Phil Edwards <phil@codesourcery.com>
1661 Zack Weinberg <zack@codesourcery.com>
1662 Mark Mitchell <mark@codesourcery.com>
1663 Nathan Sidwell <nathan@codesourcery.com>
1664
1665 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1666 (md_begin): Complain about -G being used for PIC. Don't change
1667 the text, data and bss alignments on VxWorks.
1668 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1669 generating VxWorks PIC.
1670 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1671 (macro): Likewise, but do not treat la $25 specially for
1672 VxWorks PIC, and do not handle jal.
1673 (OPTION_MVXWORKS_PIC): New macro.
1674 (md_longopts): Add -mvxworks-pic.
1675 (md_parse_option): Don't complain about using PIC and -G together here.
1676 Handle OPTION_MVXWORKS_PIC.
1677 (md_estimate_size_before_relax): Always use the first relaxation
1678 sequence on VxWorks.
1679 * config/tc-mips.h (VXWORKS_PIC): New.
1680
1681 2006-03-21 Paul Brook <paul@codesourcery.com>
1682
1683 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1684
1685 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1686
1687 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1688 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1689 (get_loop_align_size): New.
1690 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1691 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1692 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1693 (get_noop_aligned_address): Use get_loop_align_size.
1694 (get_aligned_diff): Likewise.
1695
1696 2006-03-21 Paul Brook <paul@codesourcery.com>
1697
1698 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1699
1700 2006-03-20 Paul Brook <paul@codesourcery.com>
1701
1702 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1703 (do_t_branch): Encode branches inside IT blocks as unconditional.
1704 (do_t_cps): New function.
1705 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1706 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1707 (opcode_lookup): Allow conditional suffixes on all instructions in
1708 Thumb mode.
1709 (md_assemble): Advance condexec state before checking for errors.
1710 (insns): Use do_t_cps.
1711
1712 2006-03-20 Paul Brook <paul@codesourcery.com>
1713
1714 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1715 outputting the insn.
1716
1717 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1718
1719 * config/tc-vax.c: Update copyright year.
1720 * config/tc-vax.h: Likewise.
1721
1722 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1723
1724 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1725 make it static.
1726 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1727
1728 2006-03-17 Paul Brook <paul@codesourcery.com>
1729
1730 * config/tc-arm.c (insns): Add ldm and stm.
1731
1732 2006-03-17 Ben Elliston <bje@au.ibm.com>
1733
1734 PR gas/2446
1735 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1736
1737 2006-03-16 Paul Brook <paul@codesourcery.com>
1738
1739 * config/tc-arm.c (insns): Add "svc".
1740
1741 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1742
1743 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1744 flag and avoid double underscore prefixes.
1745
1746 2006-03-10 Paul Brook <paul@codesourcery.com>
1747
1748 * config/tc-arm.c (md_begin): Handle EABIv5.
1749 (arm_eabis): Add EF_ARM_EABI_VER5.
1750 * doc/c-arm.texi: Document -meabi=5.
1751
1752 2006-03-10 Ben Elliston <bje@au.ibm.com>
1753
1754 * app.c (do_scrub_chars): Simplify string handling.
1755
1756 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1757 Daniel Jacobowitz <dan@codesourcery.com>
1758 Zack Weinberg <zack@codesourcery.com>
1759 Nathan Sidwell <nathan@codesourcery.com>
1760 Paul Brook <paul@codesourcery.com>
1761 Ricardo Anguiano <anguiano@codesourcery.com>
1762 Phil Edwards <phil@codesourcery.com>
1763
1764 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1765 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1766 R_ARM_ABS12 reloc.
1767 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1768 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1769 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1770
1771 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1772
1773 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1774 even when using the text-section-literals option.
1775
1776 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1777
1778 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1779 and cf.
1780 (m68k_ip): <case 'J'> Check we have some control regs.
1781 (md_parse_option): Allow raw arch switch.
1782 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1783 whether 68881 or cfloat was meant by -mfloat.
1784 (md_show_usage): Adjust extension display.
1785 (m68k_elf_final_processing): Adjust.
1786
1787 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1788
1789 * config/tc-avr.c (avr_mod_hash_value): New function.
1790 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1791 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1792 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1793 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1794 of (int).
1795 (tc_gen_reloc): Handle substractions of symbols, if possible do
1796 fixups, abort otherwise.
1797 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1798 tc_fix_adjustable): Define.
1799
1800 2006-03-02 James E Wilson <wilson@specifix.com>
1801
1802 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1803 change the template, then clear md.slot[curr].end_of_insn_group.
1804
1805 2006-02-28 Jan Beulich <jbeulich@novell.com>
1806
1807 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1808
1809 2006-02-28 Jan Beulich <jbeulich@novell.com>
1810
1811 PR/1070
1812 * macro.c (getstring): Don't treat parentheses special anymore.
1813 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1814 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1815 characters.
1816
1817 2006-02-28 Mat <mat@csail.mit.edu>
1818
1819 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1820
1821 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1822
1823 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1824 field.
1825 (CFI_signal_frame): Define.
1826 (cfi_pseudo_table): Add .cfi_signal_frame.
1827 (dot_cfi): Handle CFI_signal_frame.
1828 (output_cie): Handle cie->signal_frame.
1829 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1830 different. Copy signal_frame from FDE to newly created CIE.
1831 * doc/as.texinfo: Document .cfi_signal_frame.
1832
1833 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1834
1835 * doc/Makefile.am: Add html target.
1836 * doc/Makefile.in: Regenerate.
1837 * po/Make-in: Add html target.
1838
1839 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1840
1841 * config/tc-i386.c (output_insn): Support Intel Merom New
1842 Instructions.
1843
1844 * config/tc-i386.h (CpuMNI): New.
1845 (CpuUnknownFlags): Add CpuMNI.
1846
1847 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1848
1849 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1850 (hpriv_reg_table): New table for hyperprivileged registers.
1851 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1852 register encoding.
1853
1854 2006-02-24 DJ Delorie <dj@redhat.com>
1855
1856 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1857 (tc_gen_reloc): Don't define.
1858 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1859 (OPTION_LINKRELAX): New.
1860 (md_longopts): Add it.
1861 (m32c_relax): New.
1862 (md_parse_options): Set it.
1863 (md_assemble): Emit relaxation relocs as needed.
1864 (md_convert_frag): Emit relaxation relocs as needed.
1865 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1866 (m32c_apply_fix): New.
1867 (tc_gen_reloc): New.
1868 (m32c_force_relocation): Force out jump relocs when relaxing.
1869 (m32c_fix_adjustable): Return false if relaxing.
1870
1871 2006-02-24 Paul Brook <paul@codesourcery.com>
1872
1873 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1874 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1875 (struct asm_barrier_opt): Define.
1876 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1877 (parse_psr): Accept V7M psr names.
1878 (parse_barrier): New function.
1879 (enum operand_parse_code): Add OP_oBARRIER.
1880 (parse_operands): Implement OP_oBARRIER.
1881 (do_barrier): New function.
1882 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1883 (do_t_cpsi): Add V7M restrictions.
1884 (do_t_mrs, do_t_msr): Validate V7M variants.
1885 (md_assemble): Check for NULL variants.
1886 (v7m_psrs, barrier_opt_names): New tables.
1887 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1888 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1889 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1890 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1891 (struct cpu_arch_ver_table): Define.
1892 (cpu_arch_ver): New.
1893 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1894 Tag_CPU_arch_profile.
1895 * doc/c-arm.texi: Document new cpu and arch options.
1896
1897 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1898
1899 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1900
1901 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1902
1903 * config/tc-ia64.c: Update copyright years.
1904
1905 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1906
1907 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1908 SDM 2.2.
1909
1910 2005-02-22 Paul Brook <paul@codesourcery.com>
1911
1912 * config/tc-arm.c (do_pld): Remove incorrect write to
1913 inst.instruction.
1914 (encode_thumb32_addr_mode): Use correct operand.
1915
1916 2006-02-21 Paul Brook <paul@codesourcery.com>
1917
1918 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1919
1920 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1921 Anil Paranjape <anilp1@kpitcummins.com>
1922 Shilin Shakti <shilins@kpitcummins.com>
1923
1924 * Makefile.am: Add xc16x related entry.
1925 * Makefile.in: Regenerate.
1926 * configure.in: Added xc16x related entry.
1927 * configure: Regenerate.
1928 * config/tc-xc16x.h: New file
1929 * config/tc-xc16x.c: New file
1930 * doc/c-xc16x.texi: New file for xc16x
1931 * doc/all.texi: Entry for xc16x
1932 * doc/Makefile.texi: Added c-xc16x.texi
1933 * NEWS: Announce the support for the new target.
1934
1935 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1936
1937 * configure.tgt: set emulation for mips-*-netbsd*
1938
1939 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1940
1941 * config.in: Rebuilt.
1942
1943 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1944
1945 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1946 from 1, not 0, in error messages.
1947 (md_assemble): Simplify special-case check for ENTRY instructions.
1948 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1949 operand in error message.
1950
1951 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1952
1953 * configure.tgt (arm-*-linux-gnueabi*): Change to
1954 arm-*-linux-*eabi*.
1955
1956 2006-02-10 Nick Clifton <nickc@redhat.com>
1957
1958 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1959 32-bit value is propagated into the upper bits of a 64-bit long.
1960
1961 * config/tc-arc.c (init_opcode_tables): Fix cast.
1962 (arc_extoper, md_operand): Likewise.
1963
1964 2006-02-09 David Heine <dlheine@tensilica.com>
1965
1966 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1967 each relaxation step.
1968
1969 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1970
1971 * configure.in (CHECK_DECLS): Add vsnprintf.
1972 * configure: Regenerate.
1973 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1974 include/declare here, but...
1975 * as.h: Move code detecting VARARGS idiom to the top.
1976 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1977 (vsnprintf): Declare if not already declared.
1978
1979 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1980
1981 * as.c (close_output_file): New.
1982 (main): Register close_output_file with xatexit before
1983 dump_statistics. Don't call output_file_close.
1984
1985 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1986
1987 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1988 mcf5329_control_regs): New.
1989 (not_current_architecture, selected_arch, selected_cpu): New.
1990 (m68k_archs, m68k_extensions): New.
1991 (archs): Renamed to ...
1992 (m68k_cpus): ... here. Adjust.
1993 (n_arches): Remove.
1994 (md_pseudo_table): Add arch and cpu directives.
1995 (find_cf_chip, m68k_ip): Adjust table scanning.
1996 (no_68851, no_68881): Remove.
1997 (md_assemble): Lazily initialize.
1998 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1999 (md_init_after_args): Move functionality to m68k_init_arch.
2000 (mri_chip): Adjust table scanning.
2001 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2002 options with saner parsing.
2003 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2004 m68k_init_arch): New.
2005 (s_m68k_cpu, s_m68k_arch): New.
2006 (md_show_usage): Adjust.
2007 (m68k_elf_final_processing): Set CF EF flags.
2008 * config/tc-m68k.h (m68k_init_after_args): Remove.
2009 (tc_init_after_args): Remove.
2010 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2011 (M68k-Directives): Document .arch and .cpu directives.
2012
2013 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2014
2015 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2016 synonyms for equ and defl.
2017 (z80_cons_fix_new): New function.
2018 (emit_byte): Disallow relative jumps to absolute locations.
2019 (emit_data): Only handle defb, prototype changed, because defb is
2020 now handled as pseudo-op rather than an instruction.
2021 (instab): Entries for defb,defw,db,dw moved from here...
2022 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2023 Add entries for def24,def32,d24,d32.
2024 (md_assemble): Improved error handling.
2025 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2026 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2027 (z80_cons_fix_new): Declare.
2028 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2029 (def24,d24,def32,d32): New pseudo-ops.
2030
2031 2006-02-02 Paul Brook <paul@codesourcery.com>
2032
2033 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2034
2035 2005-02-02 Paul Brook <paul@codesourcery.com>
2036
2037 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2038 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2039 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2040 T2_OPCODE_RSB): Define.
2041 (thumb32_negate_data_op): New function.
2042 (md_apply_fix): Use it.
2043
2044 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2045
2046 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2047 fields.
2048 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2049 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2050 subtracted symbols.
2051 (relaxation_requirements): Add pfinish_frag argument and use it to
2052 replace setting tinsn->record_fix fields.
2053 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2054 and vinsn_to_insnbuf. Remove references to record_fix and
2055 slot_sub_symbols fields.
2056 (xtensa_mark_narrow_branches): Delete unused code.
2057 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2058 a symbol.
2059 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2060 record_fix fields.
2061 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2062 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2063 of the record_fix field. Simplify error messages for unexpected
2064 symbolic operands.
2065 (set_expr_symbol_offset_diff): Delete.
2066
2067 2006-01-31 Paul Brook <paul@codesourcery.com>
2068
2069 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2070
2071 2006-01-31 Paul Brook <paul@codesourcery.com>
2072 Richard Earnshaw <rearnsha@arm.com>
2073
2074 * config/tc-arm.c: Use arm_feature_set.
2075 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2076 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2077 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2078 New variables.
2079 (insns): Use them.
2080 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2081 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2082 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2083 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2084 feature flags.
2085 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2086 (arm_opts): Move old cpu/arch options from here...
2087 (arm_legacy_opts): ... to here.
2088 (md_parse_option): Search arm_legacy_opts.
2089 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2090 (arm_float_abis, arm_eabis): Make const.
2091
2092 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2093
2094 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2095
2096 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2097
2098 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2099 in load immediate intruction.
2100
2101 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2102
2103 * config/bfin-parse.y (value_match): Use correct conversion
2104 specifications in template string for __FILE__ and __LINE__.
2105 (binary): Ditto.
2106 (unary): Ditto.
2107
2108 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2109
2110 Introduce TLS descriptors for i386 and x86_64.
2111 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2112 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2113 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2114 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2115 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2116 displacement bits.
2117 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2118 (lex_got): Handle @tlsdesc and @tlscall.
2119 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2120
2121 2006-01-11 Nick Clifton <nickc@redhat.com>
2122
2123 Fixes for building on 64-bit hosts:
2124 * config/tc-avr.c (mod_index): New union to allow conversion
2125 between pointers and integers.
2126 (md_begin, avr_ldi_expression): Use it.
2127 * config/tc-i370.c (md_assemble): Add cast for argument to print
2128 statement.
2129 * config/tc-tic54x.c (subsym_substitute): Likewise.
2130 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2131 opindex field of fr_cgen structure into a pointer so that it can
2132 be stored in a frag.
2133 * config/tc-mn10300.c (md_assemble): Likewise.
2134 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2135 types.
2136 * config/tc-v850.c: Replace uses of (int) casts with correct
2137 types.
2138
2139 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2140
2141 PR gas/2117
2142 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2143
2144 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2145
2146 PR gas/2101
2147 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2148 a local-label reference.
2149
2150 For older changes see ChangeLog-2005
2151 \f
2152 Local Variables:
2153 mode: change-log
2154 left-margin: 8
2155 fill-column: 74
2156 version-control: never
2157 End: