1 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (MAX_OPERANDS): New macro.
4 (mips_operand_array): New structure.
5 (mips_operands, mips16_operands, micromips_operands): New arrays.
6 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
7 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
8 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
9 (micromips_to_32_reg_q_map): Delete.
10 (insn_operands, insn_opno, insn_extract_operand): New functions.
11 (validate_mips_insn): Take a mips_operand_array as argument and
12 use it to build up a list of operands. Extend to handle INSN_MACRO
14 (validate_mips16_insn): New function.
15 (validate_micromips_insn): Take a mips_operand_array as argument.
17 (md_begin): Initialize mips_operands, mips16_operands and
18 micromips_operands. Call validate_mips_insn and
19 validate_micromips_insn for macro instructions too.
20 Call validate_mips16_insn for MIPS16 instructions.
21 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
23 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
24 them. Handle INSN_UDI.
25 (get_append_method): Use gpr_read_mask.
27 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
29 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
30 flags for MIPS16 and non-MIPS16 instructions.
31 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
32 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
33 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
34 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
35 and non-MIPS16 instructions. Fix formatting.
37 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
39 * config/tc-mips.c (reg_needs_delay): Move later in file.
41 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
43 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
44 Alexander Ivchenko <alexander.ivchenko@intel.com>
45 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
46 Sergey Lega <sergey.s.lega@intel.com>
47 Anna Tikhonova <anna.tikhonova@intel.com>
48 Ilya Tocar <ilya.tocar@intel.com>
49 Andrey Turetskiy <andrey.turetskiy@intel.com>
50 Ilya Verbin <ilya.verbin@intel.com>
51 Kirill Yukhin <kirill.yukhin@intel.com>
52 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
54 * config/tc-i386-intel.c (O_zmmword_ptr): New.
55 (i386_types): Add zmmword.
56 (i386_intel_simplify_register): Allow regzmm.
57 (i386_intel_simplify): Handle zmmwords.
58 (i386_intel_operand): Handle RC/SAE, vector operations and
60 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
61 (struct RC_Operation): New.
62 (struct Mask_Operation): New.
63 (struct Broadcast_Operation): New.
64 (vex_prefix): Size of bytes increased to 4 to support EVEX
66 (enum i386_error): Add new error codes: unsupported_broadcast,
67 broadcast_not_on_src_operand, broadcast_needed,
68 unsupported_masking, mask_not_on_destination, no_default_mask,
69 unsupported_rc_sae, rc_sae_operand_not_last_imm,
70 invalid_register_operand, try_vector_disp8.
71 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
72 rounding, broadcast, memshift.
73 (struct RC_name): New.
77 (extra_symbol_chars): Add '{'.
78 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
79 (i386_operand_type): Add regzmm, regmask and vec_disp8.
80 (match_mem_size): Handle zmmwords.
81 (operand_type_match): Handle zmm-registers.
82 (mode_from_disp_size): Handle vec_disp8.
83 (fits_in_vec_disp8): New.
84 (md_begin): Handle {} properly.
85 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
86 (build_vex_prefix): Handle vrex.
87 (build_evex_prefix): New.
88 (process_immext): Adjust to properly handle EVEX.
89 (md_assemble): Add EVEX encoding support.
90 (swap_2_operands): Correctly handle operands with masking,
91 broadcasting or RC/SAE.
92 (check_VecOperands): Support EVEX features.
93 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
94 (match_template): Support regzmm and handle new error codes.
95 (process_suffix): Handle zmmwords and zmm-registers.
96 (check_byte_reg): Extend to zmm-registers.
97 (process_operands): Extend to zmm-registers.
98 (build_modrm_byte): Handle EVEX.
99 (output_insn): Adjust to properly handle EVEX case.
100 (disp_size): Handle vec_disp8.
101 (output_disp): Support compressed disp8*N evex feature.
102 (output_imm): Handle RC/SAE immediates properly.
103 (check_VecOperations): New.
104 (i386_immediate): Handle EVEX features.
105 (i386_index_check): Handle zmmwords and zmm-registers.
106 (RC_SAE_immediate): New.
107 (i386_att_operand): Handle EVEX features.
108 (parse_real_register): Add a check for ZMM/Mask registers.
109 (OPTION_MEVEXLIG): New.
110 (OPTION_MEVEXWIG): New.
111 (md_longopts): Add mevexlig and mevexwig.
112 (md_parse_option): Handle mevexlig and mevexwig options.
113 (md_show_usage): Add description for mevexlig and mevexwig.
114 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
115 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
117 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
119 * config/tc-i386.c (cpu_arch): Add .sha.
120 * doc/c-i386.texi: Document sha/.sha.
122 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
123 Kirill Yukhin <kirill.yukhin@intel.com>
124 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
126 * config/tc-i386.c (BND_PREFIX): New.
127 (struct _i386_insn): Add new field bnd_prefix.
128 (add_bnd_prefix): New.
130 (i386_operand_type): Add regbnd.
131 (md_assemble): Handle BND prefixes.
132 (parse_insn): Likewise.
133 (output_branch): Likewise.
134 (output_jump): Likewise.
135 (build_modrm_byte): Handle regbnd.
136 (OPTION_MADD_BND_PREFIX): New.
137 (md_longopts): Add entry for 'madd-bnd-prefix'.
138 (md_parse_option): Handle madd-bnd-prefix option.
139 (md_show_usage): Add description for madd-bnd-prefix
141 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
143 2013-07-24 Tristan Gingold <gingold@adacore.com>
145 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
148 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
150 * config/tc-s390.c (s390_machine): Don't force the .machine
151 argument to lower case.
153 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
155 * config/tc-arm.c (s_arm_arch_extension): Improve error message
156 for invalid extension.
158 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
160 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
161 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
162 (aarch64_abi): New variable.
163 (ilp32_p): Change to be a macro.
164 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
165 (struct aarch64_option_abi_value_table): New struct.
166 (aarch64_abis): New table.
167 (aarch64_parse_abi): New function.
168 (aarch64_long_opts): Add entry for -mabi=.
169 * doc/as.texinfo (Target AArch64 options): Document -mabi.
170 * doc/c-aarch64.texi: Likewise.
172 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
174 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
177 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
179 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
181 * config/rx-parse.y: (rx_check_float_support): Add function to
182 check floating point operation support for target RX100 and
184 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
185 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
186 RX200, RX600, and RX610
188 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
190 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
192 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
194 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
195 * doc/c-avr.texi: Likewise.
197 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
199 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
200 error with older GCCs.
201 (mips16_macro_build): Dereference args.
203 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
205 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
206 New functions, split out from...
207 (reg_lookup): ...here. Remove itbl support.
208 (reglist_lookup): Delete.
209 (mips_operand_token_type): New enum.
210 (mips_operand_token): New structure.
211 (mips_operand_tokens): New variable.
212 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
213 (mips_parse_arguments): New functions.
214 (md_begin): Initialize mips_operand_tokens.
215 (mips_arg_info): Add a token field. Remove optional_reg field.
216 (match_char, match_expression): New functions.
217 (match_const_int): Use match_expression. Remove "s" argument
218 and return a boolean result. Remove O_register handling.
219 (match_regno, match_reg, match_reg_range): New functions.
220 (match_int_operand, match_mapped_int_operand, match_msb_operand)
221 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
222 (match_addiusp_operand, match_clo_clz_dest_operand)
223 (match_lwm_swm_list_operand, match_entry_exit_operand)
224 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
225 (match_tied_reg_operand): Remove "s" argument and return a boolean
226 result. Match tokens rather than text. Update calls to
227 match_const_int. Rely on match_regno to call check_regno.
228 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
229 "arg" argument. Return a boolean result.
230 (parse_float_constant): Replace with...
231 (match_float_constant): ...this new function.
232 (match_operand): Remove "s" argument and return a boolean result.
233 Update calls to subfunctions.
234 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
235 rather than string-parsing routines. Update handling of optional
236 registers for token scheme.
238 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
240 * config/tc-mips.c (parse_float_constant): Split out from...
243 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
245 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
248 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
250 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
251 (match_entry_exit_operand): New function.
252 (match_save_restore_list_operand): Likewise.
253 (match_operand): Use them.
254 (check_absolute_expr): Delete.
255 (mips16_ip): Rewrite main parsing loop to use mips_operands.
257 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
259 * config/tc-mips.c: Enable functions commented out in previous patch.
260 (SKIP_SPACE_TABS): Move further up file.
261 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
262 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
263 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
264 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
265 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
266 (micromips_imm_b_map, micromips_imm_c_map): Delete.
267 (mips_lookup_reg_pair): Delete.
268 (macro): Use report_bad_range and report_bad_field.
269 (mips_immed, expr_const_in_range): Delete.
270 (mips_ip): Rewrite main parsing loop to use new functions.
272 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
274 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
275 Change return type to bfd_boolean.
276 (report_bad_range, report_bad_field): New functions.
277 (mips_arg_info): New structure.
278 (match_const_int, convert_reg_type, check_regno, match_int_operand)
279 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
280 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
281 (match_addiusp_operand, match_clo_clz_dest_operand)
282 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
283 (match_pc_operand, match_tied_reg_operand, match_operand)
284 (check_completed_insn): New functions, commented out for now.
286 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
288 * config/tc-mips.c (insn_insert_operand): New function.
289 (macro_build, mips16_macro_build): Put null character check
290 in the for loop and convert continues to breaks. Use operand
291 structures to handle constant operands.
293 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
295 * config/tc-mips.c (validate_mips_insn): Move further up file.
296 Add insn_bits and decode_operand arguments. Use the mips_operand
297 fields to work out which bits an operand occupies. Detect double
299 (validate_micromips_insn): Move further up file. Call into
302 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
304 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
306 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
308 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
310 (macro): Update accordingly.
312 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
314 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
316 (md_assemble): Remove imm_reloc handling.
317 (mips_ip): Update commentary. Use offset_expr and offset_reloc
318 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
319 Use a temporary array rather than imm_reloc when parsing
320 constant expressions. Remove imm_reloc initialization.
321 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
322 for the relaxable field. Use a relax_char variable to track the
323 type of this field. Remove imm_reloc initialization.
325 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
327 * config/tc-mips.c (mips16_ip): Handle "I".
329 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
331 * config/tc-mips.c (mips_flag_nan2008): New variable.
332 (options): Add OPTION_NAN enum value.
333 (md_longopts): Handle it.
334 (md_parse_option): Likewise.
335 (s_nan): New function.
336 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
337 (md_show_usage): Add -mnan.
339 * doc/as.texinfo (Overview): Add -mnan.
340 * doc/c-mips.texi (MIPS Opts): Document -mnan.
341 (MIPS NaN Encodings): New node. Document .nan directive.
342 (MIPS-Dependent): List the new node.
344 2013-07-09 Tristan Gingold <gingold@adacore.com>
346 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
348 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
350 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
351 for 'A' and assume that the constant has been elided if the result
354 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
356 * config/tc-mips.c (gprel16_reloc_p): New function.
357 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
359 (offset_high_part, small_offset_p): New functions.
360 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
361 register load and store macros, handle the 16-bit offset case first.
362 If a 16-bit offset is not suitable for the instruction we're
363 generating, load it into the temporary register using
364 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
365 M_L_DAB code once the address has been constructed. For double load
366 and store macros, again handle the 16-bit offset case first.
367 If the second register cannot be accessed from the same high
368 part as the first, load it into AT using ADDRESS_ADDI_INSN.
369 Fix the handling of LD in cases where the first register is the
370 same as the base. Also handle the case where the offset is
371 not 16 bits and the second register cannot be accessed from the
372 same high part as the first. For unaligned loads and stores,
373 fuse the offbits == 12 and old "ab" handling. Apply this handling
374 whenever the second offset needs a different high part from the first.
375 Construct the offset using ADDRESS_ADDI_INSN where possible,
376 for offbits == 16 as well as offbits == 12. Use offset_reloc
377 when constructing the individual loads and stores.
378 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
379 and offset_reloc before matching against a particular opcode.
380 Handle elided 'A' constants. Allow 'A' constants to use
381 relocation operators.
383 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
385 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
386 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
387 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
389 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
391 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
392 Require the msb to be <= 31 for "+s". Check that the size is <= 31
393 for both "+s" and "+S".
395 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
397 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
398 (mips_ip, mips16_ip): Handle "+i".
400 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
402 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
403 (micromips_to_32_reg_h_map): Rename to...
404 (micromips_to_32_reg_h_map1): ...this.
405 (micromips_to_32_reg_i_map): Rename to...
406 (micromips_to_32_reg_h_map2): ...this.
407 (mips_lookup_reg_pair): New function.
408 (gpr_write_mask, macro): Adjust after above renaming.
409 (validate_micromips_insn): Remove "mi" handling.
410 (mips_ip): Likewise. Parse both registers in a pair for "mh".
412 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
414 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
415 (mips_ip): Remove "+D" and "+T" handling.
417 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
419 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
422 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
424 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
426 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
428 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
429 (aarch64_force_relocation): Likewise.
431 2013-07-02 Alan Modra <amodra@gmail.com>
433 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
435 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
437 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
438 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
439 Replace @sc{mips16} with literal `MIPS16'.
440 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
442 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
444 * config/tc-aarch64.c (reloc_table): Replace
445 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
446 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
447 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
448 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
449 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
450 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
451 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
452 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
453 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
454 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
455 (aarch64_force_relocation): Likewise.
457 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
459 * config/tc-aarch64.c (ilp32_p): New static variable.
460 (elf64_aarch64_target_format): Return the target according to the
462 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
463 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
464 (aarch64_dwarf2_addr_size): New function.
465 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
466 (DWARF2_ADDR_SIZE): New define.
468 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
470 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
472 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
474 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
476 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
478 * config/tc-mips.c (mips_set_options): Add insn32 member.
479 (mips_opts): Initialize it.
480 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
481 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
482 (md_longopts): Add "minsn32" and "mno-insn32" options.
483 (is_size_valid): Handle insn32 mode.
484 (md_assemble): Pass instruction string down to macro.
485 (brk_fmt): Add second dimension and insn32 mode initializers.
486 (mfhl_fmt): Likewise.
487 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
488 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
489 (macro_build_jalr, move_register): Handle insn32 mode.
490 (macro_build_branch_rs): Likewise.
491 (macro): Handle insn32 mode.
492 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
493 (mips_ip): Handle insn32 mode.
494 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
495 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
496 (mips_handle_align): Handle insn32 mode.
497 (md_show_usage): Add -minsn32 and -mno-insn32.
499 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
501 (-minsn32, -mno-insn32): New options.
502 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
504 (MIPS assembly options): New node. Document .set insn32 and
506 (MIPS-Dependent): List the new node.
508 2013-06-25 Nick Clifton <nickc@redhat.com>
510 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
511 the PC in indirect addressing on 430xv2 parts.
512 (msp430_operands): Add version test to hardware bug encoding
515 2013-06-24 Roland McGrath <mcgrathr@google.com>
517 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
518 so it skips whitespace before it.
519 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
521 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
522 (arm_reg_parse_multi): Skip whitespace first.
523 (parse_reg_list): Likewise.
524 (parse_vfp_reg_list): Likewise.
525 (s_arm_unwind_save_mmxwcg): Likewise.
527 2013-06-24 Nick Clifton <nickc@redhat.com>
530 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
532 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
534 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
536 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
538 * config/tc-mips.c: Assert that offsetT and valueT are at least
540 (GPR_SMIN, GPR_SMAX): New macros.
541 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
543 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
545 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
546 conditions. Remove any code deselected by them.
547 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
549 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
551 * NEWS: Note removal of ECOFF support.
552 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
553 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
554 (MULTI_CFILES): Remove config/e-mipsecoff.c.
555 * Makefile.in: Regenerate.
556 * configure.in: Remove MIPS ECOFF references.
557 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
559 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
560 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
561 (mips-*-*): ...this single case.
562 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
563 MIPS emulations to be e-mipself*.
564 * configure: Regenerate.
565 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
566 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
567 (mips-*-sysv*): Remove coff and ecoff cases.
568 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
569 * ecoff.c: Remove reference to MIPS ECOFF.
570 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
571 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
572 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
573 (mips_hi_fixup): Tweak comment.
574 (append_insn): Require a howto.
575 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
577 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
579 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
580 Use "CPU" instead of "cpu".
581 * doc/c-mips.texi: Likewise.
582 (MIPS Opts): Rename to MIPS Options.
583 (MIPS option stack): Rename to MIPS Option Stack.
584 (MIPS ASE instruction generation overrides): Rename to
585 MIPS ASE Instruction Generation Overrides (for now).
586 (MIPS floating-point): Rename to MIPS Floating-Point.
588 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
590 * doc/c-mips.texi (MIPS Macros): New section.
591 (MIPS Object): Replace with...
592 (MIPS Small Data): ...this new section.
594 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
596 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
597 Capitalize name. Use @kindex instead of @cindex for .set entries.
599 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
601 * doc/c-mips.texi (MIPS Stabs): Remove section.
603 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
605 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
606 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
607 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
608 (ISA_SUPPORTS_VIRT64_ASE): Delete.
609 (mips_ase): New structure.
610 (mips_ases): New table.
611 (FP64_ASES): New macro.
612 (mips_ase_groups): New array.
613 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
614 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
616 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
617 (md_parse_option): Use mips_ases and mips_set_ase instead of
618 separate case statements for each ASE option.
619 (mips_after_parse_args): Use FP64_ASES. Use
620 mips_check_isa_supports_ases to check the ASEs against
622 (s_mipsset): Use mips_ases and mips_set_ase instead of
623 separate if statements for each ASE option. Use
624 mips_check_isa_supports_ases, even when a non-ASE option
627 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
629 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
631 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
633 * config/tc-mips.c (md_shortopts, options, md_longopts)
634 (md_longopts_size): Move earlier in file.
636 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
638 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
639 with a single "ase" bitmask.
640 (mips_opts): Update accordingly.
641 (file_ase, file_ase_explicit): New variables.
642 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
643 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
644 (ISA_HAS_ROR): Adjust for mips_set_options change.
645 (is_opcode_valid): Take the base ase mask directly from mips_opts.
646 (mips_ip): Adjust for mips_set_options change.
647 (md_parse_option): Likewise. Update file_ase_explicit.
648 (mips_after_parse_args): Adjust for mips_set_options change.
649 Use bitmask operations to select the default ASEs. Set file_ase
650 rather than individual per-ASE variables.
651 (s_mipsset): Adjust for mips_set_options change.
652 (mips_elf_final_processing): Test file_ase rather than
653 file_ase_mdmx. Remove commented-out code.
655 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
657 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
658 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
659 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
660 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
661 (mips_after_parse_args): Use the new "ase" field to choose
663 (mips_cpu_info_table): Move ASEs from the "flags" field to the
666 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
668 * config/tc-arm.c (symbol_preemptible): New function.
669 (relax_branch): Use it.
671 2013-06-17 Catherine Moore <clm@codesourcery.com>
672 Maciej W. Rozycki <macro@codesourcery.com>
673 Chao-Ying Fu <fu@mips.com>
675 * config/tc-mips.c (mips_set_options): Add ase_eva.
676 (mips_set_options mips_opts): Add ase_eva.
677 (file_ase_eva): Declare.
678 (ISA_SUPPORTS_EVA_ASE): Define.
679 (IS_SEXT_9BIT_NUM): Define.
680 (MIPS_CPU_ASE_EVA): Define.
681 (is_opcode_valid): Add support for ase_eva.
682 (macro_build): Likewise.
684 (validate_mips_insn): Likewise.
685 (validate_micromips_insn): Likewise.
687 (options): Add OPTION_EVA and OPTION_NO_EVA.
688 (md_longopts): Add -meva and -mno-eva.
689 (md_parse_option): Process new options.
690 (mips_after_parse_args): Check for valid EVA combinations.
691 (s_mipsset): Likewise.
693 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
695 * dwarf2dbg.h (dwarf2_move_insn): Declare.
696 * dwarf2dbg.c (line_subseg): Add pmove_tail.
697 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
698 (dwarf2_gen_line_info_1): Update call accordingly.
699 (dwarf2_move_insn): New function.
700 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
702 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
706 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
709 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
710 (dwarf2_gen_line_info_1): Delete.
711 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
712 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
713 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
714 (dwarf2_directive_loc): Push previous .locs instead of generating
717 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
719 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
720 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
722 2013-06-13 Nick Clifton <nickc@redhat.com>
725 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
726 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
727 function. Generates an error if the adjusted offset is out of a
730 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
732 * config/tc-nios2.c (md_apply_fix): Mask constant
733 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
735 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
737 * config/tc-mips.c (append_insn): Don't do branch relaxation for
738 MIPS-3D instructions either.
739 (md_convert_frag): Update the COPx branch mask accordingly.
741 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
743 * doc/as.texinfo (Overview): Add --relax-branch and
745 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
748 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
750 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
753 2013-06-08 Catherine Moore <clm@codesourcery.com>
755 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
756 (is_opcode_valid_16): Pass ase value to opcode_is_member.
757 (append_insn): Change INSN_xxxx to ASE_xxxx.
759 2013-06-01 George Thomas <george.thomas@atmel.com>
761 * gas/config/tc-avr.c: Change ISA for devices with USB support to
764 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
766 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
769 2013-05-31 Paul Brook <paul@codesourcery.com>
772 * config/tc-mips.c (s_ehword): New.
774 2013-05-30 Paul Brook <paul@codesourcery.com>
776 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
778 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
780 * write.c (resolve_reloc_expr_symbols): On REL targets don't
781 convert relocs who have no relocatable field either. Rephrase
782 the conditional so that the PC-relative check is only applied
785 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
787 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
790 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
792 * config/tc-aarch64.c (reloc_table): Update to use
793 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
794 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
795 (md_apply_fix): Likewise.
796 (aarch64_force_relocation): Likewise.
798 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
800 * config/tc-arm.c (it_fsm_post_encode): Improve
801 warning messages about deprecated IT block formats.
803 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
805 * config/tc-aarch64.c (md_apply_fix): Move value range checking
806 inside fx_done condition.
808 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
810 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
812 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
814 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
815 and clean up warning when using PRINT_OPCODE_TABLE.
817 2013-05-20 Alan Modra <amodra@gmail.com>
819 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
820 and data fixups performing shift/high adjust/sign extension on
821 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
822 when writing data fixups rather than recalculating size.
824 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
826 * doc/c-msp430.texi: Fix typo.
828 2013-05-16 Tristan Gingold <gingold@adacore.com>
830 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
831 are also TOC symbols.
833 2013-05-16 Nick Clifton <nickc@redhat.com>
835 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
836 Add -mcpu command to specify core type.
837 * doc/c-msp430.texi: Update documentation.
839 2013-05-09 Andrew Pinski <apinski@cavium.com>
841 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
842 (mips_opts): Update for the new field.
843 (file_ase_virt): New variable.
844 (ISA_SUPPORTS_VIRT_ASE): New macro.
845 (ISA_SUPPORTS_VIRT64_ASE): New macro.
846 (MIPS_CPU_ASE_VIRT): New define.
847 (is_opcode_valid): Handle ase_virt.
848 (macro_build): Handle "+J".
849 (validate_mips_insn): Likewise.
851 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
852 (md_longopts): Add mvirt and mnovirt
853 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
854 (mips_after_parse_args): Handle ase_virt field.
855 (s_mipsset): Handle "virt" and "novirt".
856 (mips_elf_final_processing): Add a comment about virt ASE might need
858 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
859 * doc/c-mips.texi: Document -mvirt and -mno-virt.
860 Document ".set virt" and ".set novirt".
862 2013-05-09 Alan Modra <amodra@gmail.com>
864 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
865 control of operand flag bits.
867 2013-05-07 Alan Modra <amodra@gmail.com>
869 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
870 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
871 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
872 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
873 (md_apply_fix): Set fx_no_overflow for assorted relocations.
874 Shift and sign-extend fieldval for use by some VLE reloc
875 operand->insert functions.
877 2013-05-06 Paul Brook <paul@codesourcery.com>
878 Catherine Moore <clm@codesourcery.com>
880 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
881 (limited_pcrel_reloc_p): Likewise.
882 (md_apply_fix): Likewise.
883 (tc_gen_reloc): Likewise.
885 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
887 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
888 (mips_fix_adjustable): Adjust pc-relative check to use
891 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
893 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
894 (s_mips_stab): Do not restrict to stabn only.
896 2013-05-02 Nick Clifton <nickc@redhat.com>
898 * config/tc-msp430.c: Add support for the MSP430X architecture.
899 Add code to insert a NOP instruction after any instruction that
900 might change the interrupt state.
901 Add support for the LARGE memory model.
902 Add code to initialise the .MSP430.attributes section.
903 * config/tc-msp430.h: Add support for the MSP430X architecture.
904 * doc/c-msp430.texi: Document the new -mL and -mN command line
906 * NEWS: Mention support for the MSP430X architecture.
908 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
910 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
911 alpha*-*-linux*ecoff*.
913 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
915 * config/tc-mips.c (mips_ip): Add sizelo.
916 For "+C", "+G", and "+H", set sizelo and compare against it.
918 2013-04-29 Nick Clifton <nickc@redhat.com>
920 * as.c (Options): Add -gdwarf-sections.
921 (parse_args): Likewise.
922 * as.h (flag_dwarf_sections): Declare.
923 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
924 (process_entries): When -gdwarf-sections is enabled generate
925 fragmentary .debug_line sections.
926 (out_debug_line): Set the section for the .debug_line section end
928 * doc/as.texinfo: Document -gdwarf-sections.
929 * NEWS: Mention -gdwarf-sections.
931 2013-04-26 Christian Groessler <chris@groessler.org>
933 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
934 according to the target parameter. Don't call s_segm since s_segm
935 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
937 (md_begin): Call s_segm according to target parameter from command
940 2013-04-25 Alan Modra <amodra@gmail.com>
942 * configure.in: Allow little-endian linux.
943 * configure: Regenerate.
945 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
947 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
948 "fstatus" control register to "eccinj".
950 2013-04-19 Kai Tietz <ktietz@redhat.com>
952 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
954 2013-04-15 Julian Brown <julian@codesourcery.com>
956 * expr.c (add_to_result, subtract_from_result): Make global.
957 * expr.h (add_to_result, subtract_from_result): Add prototypes.
958 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
959 subtract_from_result to handle extra bit of precision for .sleb128
962 2013-04-10 Julian Brown <julian@codesourcery.com>
964 * read.c (convert_to_bignum): Add sign parameter. Use it
965 instead of X_unsigned to determine sign of resulting bignum.
966 (emit_expr): Pass extra argument to convert_to_bignum.
967 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
968 X_extrabit to convert_to_bignum.
969 (parse_bitfield_cons): Set X_extrabit.
970 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
971 Initialise X_extrabit field as appropriate.
972 (add_to_result): New.
973 (subtract_from_result): New.
975 * expr.h (expressionS): Add X_extrabit field.
977 2013-04-10 Jan Beulich <jbeulich@suse.com>
979 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
980 register being PC when is_t or writeback, and use distinct
981 diagnostic for the latter case.
983 2013-04-10 Jan Beulich <jbeulich@suse.com>
985 * gas/config/tc-arm.c (parse_operands): Re-write
987 (do_barrier): Remove bogus constraint().
988 (do_t_barrier): Remove.
990 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
992 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
993 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
995 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
997 2013-04-09 Jan Beulich <jbeulich@suse.com>
999 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1000 Use local variable Rt in more places.
1001 (do_vmsr): Accept all control registers.
1003 2013-04-09 Jan Beulich <jbeulich@suse.com>
1005 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1006 if there was none specified for moves between scalar and core
1009 2013-04-09 Jan Beulich <jbeulich@suse.com>
1011 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1012 NEON_ALL_LANES case.
1014 2013-04-08 Jan Beulich <jbeulich@suse.com>
1016 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1019 2013-04-08 Jan Beulich <jbeulich@suse.com>
1021 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1024 2013-04-03 Alan Modra <amodra@gmail.com>
1026 * doc/as.texinfo: Add support to generate man options for h8300.
1027 * doc/c-h8300.texi: Likewise.
1029 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1031 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1034 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1037 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1039 2013-03-26 Nick Clifton <nickc@redhat.com>
1042 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1043 start of the file each time.
1046 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1049 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1051 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1054 2013-03-21 Will Newton <will.newton@linaro.org>
1056 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1057 pc-relative str instructions in Thumb mode.
1059 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1061 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1062 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1064 * config/tc-h8300.h: Remove duplicated defines.
1066 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1069 * tc-avr.c (mcu_has_3_byte_pc): New function.
1070 (tc_cfi_frame_initial_instructions): Call it to find return
1073 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1076 * config/tc-tic6x.c (tic6x_try_encode): Handle
1077 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1078 encode register pair numbers when required.
1080 2013-03-15 Will Newton <will.newton@linaro.org>
1082 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1083 in vstr in Thumb mode for pre-ARMv7 cores.
1085 2013-03-14 Andreas Schwab <schwab@suse.de>
1087 * doc/c-arc.texi (ARC Directives): Revert last change and use
1088 @itemize instead of @table.
1089 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1091 2013-03-14 Nick Clifton <nickc@redhat.com>
1094 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1095 NULL message, instead just check ARM_CPU_IS_ANY directly.
1097 2013-03-14 Nick Clifton <nickc@redhat.com>
1100 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1102 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1103 to the @item directives.
1104 (ARM-Neon-Alignment): Move to correct place in the document.
1105 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1107 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1110 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1112 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1113 case. Add default BAD_CASE to switch.
1115 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1117 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1118 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1120 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1122 * config/tc-arm.c (crc_ext_armv8): New feature set.
1123 (UNPRED_REG): New macro.
1124 (do_crc32_1): New function.
1125 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1126 do_crc32ch, do_crc32cw): Likewise.
1128 (insns): Add entries for crc32 mnemonics.
1129 (arm_extensions): Add entry for crc.
1131 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1133 * write.h (struct fix): Add fx_dot_frag field.
1134 (dot_frag): Declare.
1135 * write.c (dot_frag): New variable.
1136 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1137 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1138 * expr.c (expr): Save value of frag_now in dot_frag when setting
1140 * read.c (emit_expr): Likewise. Delete comments.
1142 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1144 * config/tc-i386.c (flag_code_names): Removed.
1145 (i386_index_check): Rewrote.
1147 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1149 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1151 (aarch64_double_precision_fmovable): New function.
1152 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1153 function; handle hexadecimal representation of IEEE754 encoding.
1154 (parse_operands): Update the call to parse_aarch64_imm_float.
1156 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1158 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1159 (check_hle): Updated.
1160 (md_assemble): Likewise.
1161 (parse_insn): Likewise.
1163 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1165 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1166 (md_assemble): Check if REP prefix is OK.
1167 (parse_insn): Remove expecting_string_instruction. Set
1170 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1172 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1174 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1176 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1177 for system registers.
1179 2013-02-27 DJ Delorie <dj@redhat.com>
1181 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1182 (rl78_op): Handle %code().
1183 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1184 (tc_gen_reloc): Likwise; convert to a computed reloc.
1185 (md_apply_fix): Likewise.
1187 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1189 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1191 2013-02-25 Terry Guo <terry.guo@arm.com>
1193 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1194 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1195 list of accepted CPUs.
1197 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1200 * config/tc-i386.c (cpu_arch): Add ".smap".
1202 * doc/c-i386.texi: Document smap.
1204 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1206 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1207 mips_assembling_insn appropriately.
1208 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1210 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1212 * config/tc-mips.c (append_insn): Correct indentation, remove
1215 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1217 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1219 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1221 * configure.tgt: Add nios2-*-rtems*.
1223 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1225 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1228 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1230 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1231 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1233 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1235 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1238 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1239 Andrew Jenner <andrew@codesourcery.com>
1241 Based on patches from Altera Corporation.
1243 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1244 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1245 * Makefile.in: Regenerated.
1246 * configure.tgt: Add case for nios2*-linux*.
1247 * config/obj-elf.c: Conditionally include elf/nios2.h.
1248 * config/tc-nios2.c: New file.
1249 * config/tc-nios2.h: New file.
1250 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1251 * doc/Makefile.in: Regenerated.
1252 * doc/all.texi: Set NIOSII.
1253 * doc/as.texinfo (Overview): Add Nios II options.
1254 (Machine Dependencies): Include c-nios2.texi.
1255 * doc/c-nios2.texi: New file.
1256 * NEWS: Note Altera Nios II support.
1258 2013-02-06 Alan Modra <amodra@gmail.com>
1261 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1262 Don't skip fixups with fx_subsy non-NULL.
1263 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1264 with fx_subsy non-NULL.
1266 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1268 * doc/c-metag.texi: Add "@c man" markers.
1270 2013-02-04 Alan Modra <amodra@gmail.com>
1272 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1274 (TC_ADJUST_RELOC_COUNT): Delete.
1275 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1277 2013-02-04 Alan Modra <amodra@gmail.com>
1279 * po/POTFILES.in: Regenerate.
1281 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1283 * config/tc-metag.c: Make SWAP instruction less permissive with
1286 2013-01-29 DJ Delorie <dj@redhat.com>
1288 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1289 relocs in .word/.etc statements.
1291 2013-01-29 Roland McGrath <mcgrathr@google.com>
1293 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1294 immediate value for 8-bit offset" error so it shows line info.
1296 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1298 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1301 2013-01-24 Nick Clifton <nickc@redhat.com>
1303 * config/tc-v850.c: Add support for e3v5 architecture.
1304 * doc/c-v850.texi: Mention new support.
1306 2013-01-23 Nick Clifton <nickc@redhat.com>
1309 * config/tc-avr.c: Include dwarf2dbg.h.
1311 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1313 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1314 (tc_i386_fix_adjustable): Likewise.
1315 (lex_got): Likewise.
1316 (tc_gen_reloc): Likewise.
1318 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1320 * config/tc-aarch64.c (output_operand_error_record): Change to output
1321 the out-of-range error message as value-expected message if there is
1322 only one single value in the expected range.
1323 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1324 LSL #0 as a programmer-friendly feature.
1326 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1328 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1329 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1330 BFD_RELOC_64_SIZE relocations.
1331 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1333 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1334 relocations against local symbols.
1336 2013-01-16 Alan Modra <amodra@gmail.com>
1338 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1339 finding some sort of toc syntax error, and break to avoid
1340 compiler uninit warning.
1342 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1345 * config/tc-i386.c (lex_got): Increment length by 1 if the
1346 relocation token is removed.
1348 2013-01-15 Nick Clifton <nickc@redhat.com>
1350 * config/tc-v850.c (md_assemble): Allow signed values for
1353 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1355 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1358 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1360 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1361 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1362 * config/tc-ppc.c (md_show_usage): Likewise.
1363 (ppc_handle_align): Handle power8's group ending nop.
1365 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1367 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1368 that the assember exits after the opcodes have been printed.
1370 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1372 * app.c: Remove trailing white spaces.
1376 * dw2gencfi.c: Likewise.
1377 * dwarf2dbg.h: Likewise.
1378 * ecoff.c: Likewise.
1379 * input-file.c: Likewise.
1380 * itbl-lex.h: Likewise.
1381 * output-file.c: Likewise.
1384 * subsegs.c: Likewise.
1385 * symbols.c: Likewise.
1386 * write.c: Likewise.
1387 * config/tc-i386.c: Likewise.
1388 * doc/Makefile.am: Likewise.
1389 * doc/Makefile.in: Likewise.
1390 * doc/c-aarch64.texi: Likewise.
1391 * doc/c-alpha.texi: Likewise.
1392 * doc/c-arc.texi: Likewise.
1393 * doc/c-arm.texi: Likewise.
1394 * doc/c-avr.texi: Likewise.
1395 * doc/c-bfin.texi: Likewise.
1396 * doc/c-cr16.texi: Likewise.
1397 * doc/c-d10v.texi: Likewise.
1398 * doc/c-d30v.texi: Likewise.
1399 * doc/c-h8300.texi: Likewise.
1400 * doc/c-hppa.texi: Likewise.
1401 * doc/c-i370.texi: Likewise.
1402 * doc/c-i386.texi: Likewise.
1403 * doc/c-i860.texi: Likewise.
1404 * doc/c-m32c.texi: Likewise.
1405 * doc/c-m32r.texi: Likewise.
1406 * doc/c-m68hc11.texi: Likewise.
1407 * doc/c-m68k.texi: Likewise.
1408 * doc/c-microblaze.texi: Likewise.
1409 * doc/c-mips.texi: Likewise.
1410 * doc/c-msp430.texi: Likewise.
1411 * doc/c-mt.texi: Likewise.
1412 * doc/c-s390.texi: Likewise.
1413 * doc/c-score.texi: Likewise.
1414 * doc/c-sh.texi: Likewise.
1415 * doc/c-sh64.texi: Likewise.
1416 * doc/c-tic54x.texi: Likewise.
1417 * doc/c-tic6x.texi: Likewise.
1418 * doc/c-v850.texi: Likewise.
1419 * doc/c-xc16x.texi: Likewise.
1420 * doc/c-xgate.texi: Likewise.
1421 * doc/c-xtensa.texi: Likewise.
1422 * doc/c-z80.texi: Likewise.
1423 * doc/internals.texi: Likewise.
1425 2013-01-10 Roland McGrath <mcgrathr@google.com>
1427 * hash.c (hash_new_sized): Make it global.
1428 * hash.h: Declare it.
1429 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1432 2013-01-10 Will Newton <will.newton@imgtec.com>
1434 * Makefile.am: Add Meta.
1435 * Makefile.in: Regenerate.
1436 * config/tc-metag.c: New file.
1437 * config/tc-metag.h: New file.
1438 * configure.tgt: Add Meta.
1439 * doc/Makefile.am: Add Meta.
1440 * doc/Makefile.in: Regenerate.
1441 * doc/all.texi: Add Meta.
1442 * doc/as.texiinfo: Document Meta options.
1443 * doc/c-metag.texi: New file.
1445 2013-01-09 Steve Ellcey <sellcey@mips.com>
1447 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1449 * config/tc-mips.c (internalError): Remove, replace with abort.
1451 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1453 * config/tc-aarch64.c (parse_operands): Change to compare the result
1454 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1456 2013-01-07 Nick Clifton <nickc@redhat.com>
1459 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1460 anticipated character.
1461 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1462 here as it is no longer needed.
1464 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1466 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1467 * doc/c-score.texi (SCORE-Opts): Likewise.
1468 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1470 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1472 * config/tc-mips.c: Add support for MIPS r5900.
1473 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1475 (can_swap_branch_p, get_append_method): Detect some conditional
1476 short loops to fix a bug on the r5900 by NOP in the branch delay
1478 (M_MUL): Support 3 operands in multu on r5900.
1479 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1480 (s_mipsset): Force 32 bit floating point on r5900.
1481 (mips_ip): Check parameter range of instructions mfps and mtps on
1483 * configure.in: Detect CPU type when target string contains r5900
1484 (e.g. mips64r5900el-linux-gnu).
1486 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1488 * as.c (parse_args): Update copyright year to 2013.
1490 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1492 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1495 2013-01-02 Nick Clifton <nickc@redhat.com>
1498 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1501 For older changes see ChangeLog-2012
1503 Copyright (C) 2013 Free Software Foundation, Inc.
1505 Copying and distribution of this file, with or without modification,
1506 are permitted in any medium without royalty provided the copyright
1507 notice and this notice are preserved.
1513 version-control: never