gas/NEWS

   1 -*- text -*-
   2
   3 * Add support for Intel AVX10.1.
   4
   5 * Add support for Intel PBNDKB instructions.
   6
   7 * Add support for Intel SM4 instructions.
   8
   9 * Add support for Intel SM3 instructions.
  10
  11 * Add support for Intel SHA512 instructions.
  12
  13 * Add support for Intel AVX-VNNI-INT16 instructions.
  14
  15 * Add support for Cortex-A520 for AArch64.
  16
  17 * Add support for Cortex-A720 for AArch64.
  18
  19 Changes in 2.41:
  20
  21 * Add support for the KVX instruction set.
  22
  23 * Add support for Intel FRED instructions.
  24
  25 * Add support for Intel LKGS instructions.
  26
  27 * Add support for Intel AMX-COMPLEX instructions.
  28
  29 * Add SME2 support to the AArch64 port.
  30
  31 * A new .insn directive is recognized by x86 gas.
  32
  33 * Add support for LoongArch LSX instructions.
  34
  35 * Add support for LoongArch LASX instructions.
  36
  37 * Add support for LoongArch LVZ instructions.
  38
  39 * Add support for LoongArch LBT instructions.
  40
  41 * Initial LoongArch support for linker relaxation has been added.
  42
  43 * Deprecate the LoongArch register aliases $v0, $v1, $x, $fv0 and $fv1.
  44
  45 Changes in 2.40:
  46
  47 * Add support for Intel RAO-INT instructions.
  48
  49 * Add support for Intel AVX-NE-CONVERT instructions.
  50
  51 * Add support for Intel MSRLIST instructions.
  52
  53 * Add support for Intel WRMSRNS instructions.
  54
  55 * Add support for Intel CMPccXADD instructions.
  56
  57 * Add support for Intel AVX-VNNI-INT8 instructions.
  58
  59 * Add support for Intel AVX-IFMA instructions.
  60
  61 * Add support for Intel PREFETCHI instructions.
  62
  63 * Add support for Intel AMX-FP16 instructions.
  64
  65 * gas now supports --compress-debug-sections=zstd to compress
  66   debug sections with zstd.
  67
  68 * Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd}
  69   that selects the default compression algorithm
  70   for --enable-compressed-debug-sections.
  71
  72 * Add support for various T-Head extensions (XTheadBa, XTheadBb, XTheadBs,
  73   XTheadCmo, XTheadCondMov, XTheadFMemIdx, XTheadFmv, XTheadInt, XTheadMemIdx,
  74   XTheadMemPair, XTheadMac, and XTheadSync) from version 2.0 of the T-Head
  75   ISA manual, which are implemented in the Allwinner D1.
  76
  77 * Add support for the RISC-V Zawrs extension, version 1.0-rc4.
  78
  79 * Add support for Cortex-X1C for Arm.
  80
  81 * New command line option --gsframe to generate SFrame unwind information
  82   on x86_64 and aarch64 targets.
  83
  84 Changes in 2.39:
  85
  86 * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
  87   Intel K1OM.
  88
  89 * Add support for the RISC-V Zicbop, Zicbom, and Zicboz extensions, version
  90   1.0-fd39d01.
  91
  92 * Add support for the RISC-V Zfh extension, version 1.0.
  93
  94 * Add support for the Zhinx extension, version 1.0.0-rc.
  95
  96 * Add support for the RISC-V H extension.
  97
  98 * Add support for the RISC-V Zfhmin extension, version 1.0, and Zhinxmin
  99   extension, version 1.0.0-rc.
 100
 101 Changes in 2.38:
 102
 103 * Add support for AArch64 system registers that were missing in previous
 104   releases.
 105
 106 * Add support for the LoongArch instruction set.
 107
 108 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
 109   to encode aligned vector move as unaligned vector move.
 110
 111 * Add support for Cortex-R52+ for Arm.
 112
 113 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
 114
 115 * Add support for Cortex-A710 for Arm.
 116
 117 * Add support for Scalable Matrix Extension (SME) for AArch64.
 118
 119 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
 120   assembler what to when it encoutners multibyte characters in the input.  The
 121   default is to allow them.  Setting the option to "warn" will generate a
 122   warning message whenever any multibyte character is encountered.  Using the
 123   option to "warn-sym-only" will make the assembler generate a warning whenever a
 124   symbol is defined containing multibyte characters.  (References to undefined
 125   symbols will not generate warnings).
 126
 127 * Outputs of .ds.x directive and .tfloat directive with hex input from
 128   x86 assembler have been reduced from 12 bytes to 10 bytes to match the
 129   output of .tfloat directive.
 130
 131 * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
 132   'armv9.3-a' for -march in AArch64 GAS.
 133
 134 * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
 135   'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
 136
 137 * Add support for Intel AVX512_FP16 instructions.
 138
 139 * Add support for the RISC-V scalar crypto extension, version 1.0.0.
 140
 141 * Add support for the RISC-V vector extension, version 1.0.
 142
 143 * Add support for the Z{f,d,q}inx extensions, version 1.0.0-rc.
 144
 145 * Add support for the RISC-V svinval extension, version 1.0.
 146
 147 * Add support for the RISC-V hypervisor extension, as defined by Privileged
 148   Specification 1.12.
 149
 150 Changes in 2.37:
 151
 152 * arm-symbianelf support removed.
 153
 154 * Add support for Realm Management Extension (RME) for AArch64.
 155
 156 * Add support for the Zba, Zbb, Zbc, and Zbs subsets of the RISC-V
 157   bit manipulation extension, version 0.93.
 158
 159 Changes in 2.36:
 160
 161 * Add support for Intel AVX VNNI instructions.
 162
 163 * Add support for Intel HRESET instruction.
 164
 165 * Add support for Intel UINTR instructions.
 166
 167 * Support non-absolute segment values for i386 lcall and ljmp.
 168
 169 * When setting the link order attribute of ELF sections, it is now possible to
 170   use a numeric section index instead of symbol name.
 171
 172 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
 173   AArch64 and ARM.
 174   Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
 175
 176 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
 177   Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
 178   Extension) system registers for AArch64.
 179
 180 * Add support for Armv8-R and Armv8.7-A AArch64.
 181
 182 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
 183   AArch64.
 184
 185 * Add support for +flagm feature for -march in Armv8.4 AArch64.
 186
 187 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
 188   64-byte load/store instructions for this feature.
 189
 190 * Add support for +pauth (Pointer Authentication) feature for -march in
 191   AArch64.
 192
 193 * Add support for Intel TDX instructions.
 194
 195 * Add support for Intel Key Locker instructions.
 196
 197 * Added a .nop directive to generate a single no-op instruction in a target
 198   neutral manner.  This instruction does have an effect on DWARF line number
 199   generation, if that is active.
 200
 201 * Removed --reduce-memory-overheads and --hash-size as gas now
 202   uses hash tables that can be expand and shrink automatically.
 203
 204 * Add {disp16} pseudo prefix to x86 assembler.
 205
 206 * Add support for Intel AMX instructions.
 207
 208 * Configure with --enable-x86-used-note by default for Linux/x86.
 209
 210 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
 211   sections using the 'R' flag in the .section directive.
 212   SHF_GNU_RETAIN specifies that the section should not be garbage
 213   collected by the linker.  It requires the GNU or FreeBSD ELF OSABIs.
 214
 215 * Add support for the RISC-V Zihintpause extension.
 216
 217 Changes in 2.35:
 218
 219 * X86 NaCl target support is removed.
 220
 221 * Extend .symver directive to update visibility of the original symbol
 222   and assign one original symbol to different versioned symbols.
 223
 224 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
 225
 226 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
 227   -mlfence-before-ret= options to x86 assembler to help mitigate
 228   CVE-2020-0551.
 229
 230 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
 231   (if such output is being generated).  Added the ability to generate
 232   version 5 .debug_line sections.
 233
 234 * Add -mbig-obj support to i386 MingW targets.
 235
 236 * Add support for the -mriscv-isa-version argument, to select the version of
 237   the RISC-V ISA specification used when assembling.
 238
 239 * Remove support for the RISC-V privileged specification, version 1.9.
 240
 241 Changes in 2.34:
 242
 243 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
 244   -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
 245   options to x86 assembler to align branches within a fixed boundary
 246   with segment prefixes or NOPs.
 247
 248 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
 249
 250 * Add support for z80-elf target.
 251
 252 * Add support for relocation of each byte or word of multibyte value to Z80
 253   targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
 254   with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
 255
 256 * Add SDCC support for Z80 targets.
 257
 258 Changes in 2.33:
 259
 260 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
 261   instructions.
 262
 263 * Add support for the Arm Transactional Memory Extension (TME)
 264   instructions.
 265
 266 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
 267   instructions.
 268
 269 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
 270   LLSC Errata.  Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
 271   time option to set the default behavior. Set the default if the configure
 272   option is not used to "no".
 273
 274 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
 275   processors.
 276
 277 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
 278   Cortex-A76AE, and Cortex-A77 processors.
 279
 280 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
 281   floating point literals.  Add .float16_format directive and
 282   -mfp16-format=[ieee|alternative] option for Arm to control the format of the
 283   encoding.
 284
 285 * Add --gdwarf-cie-version command line flag.  This allows control over which
 286   version of DWARF CIE the assembler creates.
 287
 288 Changes in 2.32:
 289
 290 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
 291   VEX.W-ignored (WIG) VEX instructions.
 292
 293 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
 294   notes.  Add a --enable-x86-used-note configure time option to set the
 295   default behavior.  Set the default if the configure option is not used
 296   to "no".
 297
 298 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
 299
 300 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
 301
 302 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
 303
 304 * Add support for the C-SKY processor series.
 305
 306 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
 307   ASE.
 308
 309 Changes in 2.31:
 310
 311 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
 312   now only set the bottom bit of the address of thumb function symbols
 313   if the -mthumb-interwork command line option is active.
 314
 315 * Add support for the MIPS Global INValidate (GINV) ASE.
 316
 317 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
 318
 319 * Add support for the Freescale S12Z architecture.
 320
 321 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
 322   Build Attribute notes if none are present in the input sources.  Add a
 323   --enable-generate-build-notes=[yes|no] configure time option to set the
 324   default behaviour.  Set the default if the configure option is not used
 325   to "no".
 326
 327 * Remove -mold-gcc command-line option for x86 targets.
 328
 329 * Add -O[2|s] command-line options to x86 assembler to enable alternate
 330   shorter instruction encoding.
 331
 332 * Add support for .nops directive.  It is currently supported only for
 333   x86 targets.
 334
 335 * Add support for the .insn directive on RISC-V targets.
 336
 337 Changes in 2.30:
 338
 339 * Add support for loaction views in DWARF debug line information.
 340
 341 Changes in 2.29:
 342
 343 * Add support for ELF SHF_GNU_MBIND.
 344
 345 * Add support for the WebAssembly file format and wasm32 ELF conversion.
 346
 347 * PowerPC gas now checks that the correct register class is used in
 348   instructions.  For instance, "addi %f4,%cr3,%r31" warns three times
 349   that the registers are invalid.
 350
 351 * Add support for the Texas Instruments PRU processor.
 352
 353 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
 354   added to the ARM port.
 355
 356 Changes in 2.28:
 357
 358 * Add support for the RISC-V architecture.
 359
 360 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
 361
 362 Changes in 2.27:
 363
 364 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
 365
 366 * Add --no-pad-sections to stop the assembler from padding the end of output
 367   sections up to their alignment boundary.
 368
 369 * Support for the ARMv8-M architecture has been added to the ARM port.  Support
 370   for the ARMv8-M Security and DSP Extensions has also been added to the ARM
 371   port.
 372
 373 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
 374   .extCoreRegister pseudo-ops that allow an user to define custom
 375   instructions, conditional codes, auxiliary and core registers.
 376
 377 * Add a configure option --enable-elf-stt-common to decide whether ELF
 378   assembler should generate common symbols with the STT_COMMON type by
 379   default.  Default to no.
 380
 381 * New command-line option --elf-stt-common= for ELF targets to control
 382   whether to generate common symbols with the STT_COMMON type.
 383
 384 * Add ability to set section flags and types via numeric values for ELF
 385   based targets.
 386
 387 * Add a configure option --enable-x86-relax-relocations to decide whether
 388   x86 assembler should generate relax relocations by default.  Default to
 389   yes, except for x86 Solaris targets older than Solaris 12.
 390
 391 * New command-line option -mrelax-relocations= for x86 target to control
 392   whether to generate relax relocations.
 393
 394 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
 395   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 396
 397 * Add assembly-time relaxation option for ARC cpus.
 398
 399 * Add --with-cpu=TYPE configure option for ARC gas.  This allows the default
 400   cpu type to be adjusted at configure time.
 401
 402 Changes in 2.26:
 403
 404 * Add a configure option --enable-compressed-debug-sections={all,gas} to
 405   decide whether DWARF debug sections should be compressed by default.
 406
 407 * Add support for the ARC EM/HS, and ARC600/700 architectures.  Remove
 408   assembler support for Argonaut RISC architectures.
 409
 410 * Symbol and label names can now be enclosed in double quotes (") which allows
 411   them to contain characters that are not part of valid symbol names in high
 412   level languages.
 413
 414 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support.  The
 415   previous spelling, -march=armv6zk, is still accepted.
 416
 417 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
 418   Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
 419   extensions has also been added to the Aarch64 port.
 420
 421 * Support for the ARMv8.1 architecture has been added to the ARM port.  Support
 422   for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
 423   been added to the ARM port.
 424
 425 * Extend --compress-debug-sections option to support
 426   --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
 427   targets.
 428
 429 * --compress-debug-sections is turned on for Linux/x86 by default.
 430
 431 Changes in 2.25:
 432
 433 * Add support for the AVR Tiny microcontrollers.
 434
 435 * Replace support for openrisc and or32 with support for or1k.
 436
 437 * Enhanced the ARM port to accept the assembler output from the CodeComposer
 438   Studio tool.  Support is enabled via the new command-line option -mccs.
 439
 440 * Add support for the Andes NDS32.
 441
 442 Changes in 2.24:
 443
 444 * Add support for the Texas Instruments MSP430X processor.
 445
 446 * Add -gdwarf-sections command-line option to enable per-code-section
 447   generation of DWARF .debug_line sections.
 448
 449 * Add support for Altera Nios II.
 450
 451 * Add support for the Imagination Technologies Meta processor.
 452
 453 * Add support for the v850e3v5.
 454
 455 * Remove assembler support for MIPS ECOFF targets.
 456
 457 Changes in 2.23:
 458
 459 * Add support for the 64-bit ARM architecture: AArch64.
 460
 461 * Add support for S12X processor.
 462
 463 * Add support for the VLE extension to the PowerPC architecture.
 464
 465 * Add support for the Freescale XGATE architecture.
 466
 467 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
 468   directives.  These are currently available only for x86 and ARM targets.
 469
 470 * Add support for the Renesas RL78 architecture.
 471
 472 * Add support for the Adapteva EPIPHANY architecture.
 473
 474 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
 475
 476 Changes in 2.22:
 477
 478 * Add support for the Tilera TILEPro and TILE-Gx architectures.
 479
 480 Changes in 2.21:
 481
 482 * Gas no longer requires doubling of ampersands in macros.
 483
 484 * Add support for the TMS320C6000 (TI C6X) processor family.
 485
 486 * GAS now understands an extended syntax in the .section directive flags
 487   for COFF targets that allows the section's alignment to be specified.  This
 488   feature has also been backported to the 2.20 release series, starting with
 489   2.20.1.
 490
 491 * Add support for the Renesas RX processor.
 492
 493 * New command-line option, --compress-debug-sections, which requests
 494   compression of DWARF debug information sections in the relocatable output
 495   file.  Compressed debug sections are supported by readelf, objdump, and
 496   gold, but not currently by Gnu ld.
 497
 498 Changes in 2.20:
 499
 500 * Added support for v850e2 and v850e2v3.
 501
 502 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
 503   pseudo op.  It marks the symbol as being globally unique in the entire
 504   process.
 505
 506 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
 507   in binary rather than text.
 508
 509 * Add support for common symbol alignment to PE formats.
 510
 511 * Add support for the new discriminator column in the DWARF line table,
 512   with a discriminator operand for the .loc directive.
 513
 514 * Add support for Sunplus score architecture.
 515
 516 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
 517   indicate that if the symbol is the target of a relocation, its value should
 518   not be use.  Instead the function should be invoked and its result used as
 519   the value.
 520
 521 * Add support for Lattice Mico32 (lm32) architecture.
 522
 523 * Add support for Xilinx MicroBlaze architecture.
 524
 525 Changes in 2.19:
 526
 527 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
 528   tables without runtime relocation.
 529
 530 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
 531   adds compatibility with H'00 style hex constants.
 532
 533 * New command-line option, -msse-check=[none|error|warning], for x86
 534   targets.
 535
 536 * New sub-option added to the assembler's -a command-line switch to
 537   generate a listing output.  The 'g' sub-option will insert into the listing
 538   various information about the assembly, such as assembler version, the
 539   command-line options used, and a time stamp.
 540
 541 * New command-line option -msse2avx for x86 target to encode SSE
 542   instructions with VEX prefix.
 543
 544 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
 545
 546 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
 547   -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
 548   -mnaked-reg and -mold-gcc, for x86 targets.
 549
 550 * Support for generating wide character strings has been added via the new
 551   pseudo ops: .string16, .string32 and .string64.
 552
 553 * Support for SSE5 has been added to the i386 port.
 554
 555 Changes in 2.18:
 556
 557 * The GAS sources are now released under the GPLv3.
 558
 559 * Support for the National Semiconductor CR16 target has been added.
 560
 561 * Added gas .reloc pseudo.  This is a low-level interface for creating
 562   relocations.
 563
 564 * Add support for x86_64 PE+ target.
 565
 566 * Add support for Score target.
 567
 568 Changes in 2.17:
 569
 570 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
 571
 572 * Support for ms2 architecture has been added.
 573
 574 * Support for the Z80 processor family has been added.
 575
 576 * Add support for the "@<file>" syntax to the command line, so that extra
 577   switches can be read from <file>.
 578
 579 * The SH target supports a new command-line switch --enable-reg-prefix which,
 580   if enabled, will allow register names to be optionally prefixed with a $
 581   character.  This allows register names to be distinguished from label names.
 582
 583 * Macros with a variable number of arguments are now supported. See the
 584   documentation for how this works.
 585
 586 * Added --reduce-memory-overheads switch to reduce the size of the hash
 587   tables used, at the expense of longer assembly times, and
 588   --hash-size=<NUMBER> to set the size of the hash tables used by gas.
 589
 590 * Macro names and macro parameter names can now be any identifier that would
 591   also be legal as a symbol elsewhere. For macro parameter names, this is
 592   known to cause problems in certain sources when the respective target uses
 593   characters inconsistently, and thus macro parameter references may no longer
 594   be recognized as such (see the documentation for details).
 595
 596 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
 597   for the VAX target in order to be more compatible with the VAX MACRO
 598   assembler.
 599
 600 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
 601
 602 Changes in 2.16:
 603
 604 * Redefinition of macros now results in an error.
 605
 606 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
 607
 608 * New command-line option -munwind-check=[warning|error] for IA64
 609   targets.
 610
 611 * The IA64 port now uses automatic dependency violation removal as its default
 612   mode.
 613
 614 * Port to MAXQ processor contributed by HCL Tech.
 615
 616 * Added support for generating unwind tables for ARM ELF targets.
 617
 618 * Add a -g command-line option to generate debug information in the target's
 619   preferred debug format.
 620
 621 * Support for the crx-elf target added.
 622
 623 * Support for the sh-symbianelf target added.
 624
 625 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
 626   on pe[i]-i386; required for this target's DWARF 2 support.
 627
 628 * Support for Motorola MCF521x/5249/547x/548x added.
 629
 630 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
 631   instrucitons.
 632
 633 * New command-line option -mno-shared for MIPS ELF targets.
 634
 635 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
 636   added to enter (and leave) alternate macro syntax mode.
 637
 638 Changes in 2.15:
 639
 640 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
 641   deprecated and will be removed in a future release.
 642
 643 * Added PIC m32r Linux (ELF) and support to M32R assembler.
 644
 645 * Added support for ARM V6.
 646
 647 * Added support for sh4a and variants.
 648
 649 * Support for Renesas M32R2 added.
 650
 651 * Limited support for Mapping Symbols as specified in the ARM ELF
 652   specification has been added to the arm assembler.
 653
 654 * On ARM architectures, added a new gas directive ".unreq" that undoes
 655   definitions created by ".req".
 656
 657 * Support for Motorola ColdFire MCF528x added.
 658
 659 * Added --gstabs+ switch to enable the generation of STABS debug format
 660   information with GNU extensions.
 661
 662 * Added support for MIPS64 Release 2.
 663
 664 * Added support for v850e1.
 665
 666 * Added -n switch for x86 assembler.  By default, x86 GAS replaces
 667   multiple nop instructions used for alignment within code sections
 668   with multi-byte nop instructions such as leal 0(%esi,1),%esi.  This
 669   switch disables the optimization.
 670
 671 * Removed -n option from MIPS assembler.  It was not useful, and confused the
 672   existing -non_shared option.
 673
 674 Changes in 2.14:
 675
 676 * Added support for MIPS32 Release 2.
 677
 678 * Added support for Xtensa architecture.
 679
 680 * Support for Intel's iWMMXt processor (an ARM variant) added.
 681
 682 * An assembler test generator has been contributed and an example file that
 683   uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
 684
 685 * Support for SH2E added.
 686
 687 * GASP has now been removed.
 688
 689 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
 690   DSP's contributed by Michael Hayes and Svein E. Seldal.
 691
 692 * Support for the Ubicom IP2xxx microcontroller added.
 693
 694 Changes in 2.13:
 695
 696 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
 697   and FR500 included.
 698
 699 * Support for DLX processor added.
 700
 701 * GASP has now been deprecated and will be removed in a future release.  Use
 702   the macro facilities in GAS instead.
 703
 704 * GASP now correctly parses floating point numbers. Unless the base is
 705   explicitly specified, they are interpreted as decimal numbers regardless of
 706   the currently specified base.
 707
 708 Changes in 2.12:
 709
 710 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
 711
 712 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
 713
 714 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
 715   specifying the target instruction set.  The old method of specifying the
 716   target processor has been deprecated, but is still accepted for
 717   compatibility.
 718
 719 * Support for the VFP floating-point instruction set has been added to
 720   the ARM assembler.
 721
 722 * New psuedo op: .incbin to include a set of binary data at a given point
 723   in the assembly.  Contributed by Anders Norlander.
 724
 725 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
 726   but still works for compatability.
 727
 728 * The MIPS assembler no longer issues a warning by default when it
 729   generates a nop instruction from a macro. The new command-line option
 730   -n will turn on the warning.
 731
 732 Changes in 2.11:
 733
 734 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
 735
 736 * x86 gas now supports the full Pentium4 instruction set.
 737
 738 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
 739
 740 * Support for Motorola 68HC11 and 68HC12.
 741
 742 * Support for Texas Instruments TMS320C54x (tic54x).
 743
 744 * Support for IA-64.
 745
 746 * Support for i860, by Jason Eckhardt.
 747
 748 * Support for CRIS (Axis Communications ETRAX series).
 749
 750 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
 751
 752 * x86 gas -q command-line option quietens warnings about register size changes
 753   due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
 754   translating various deprecated floating point instructions.
 755
 756 Changes in 2.10:
 757
 758 * Support for the ARM msr instruction was changed to only allow an immediate
 759   operand when altering the flags field.
 760
 761 * Support for ATMEL AVR.
 762
 763 * Support for IBM 370 ELF.  Somewhat experimental.
 764
 765 * Support for numbers with suffixes.
 766
 767 * Added support for breaking to the end of repeat loops.
 768
 769 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
 770
 771 * New .elseif pseudo-op added.
 772
 773 * New --fatal-warnings option.
 774
 775 * picoJava architecture support added.
 776
 777 * Motorola MCore 210 processor support added.
 778
 779 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
 780   assembly programs with intel syntax.
 781
 782 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
 783
 784 * Added -gdwarf2 option to generate DWARF 2 debugging information.
 785
 786 * Full 16-bit mode support for i386.
 787
 788 * Greatly improved instruction operand checking for i386.  This change will
 789   produce errors or warnings on incorrect assembly code that previous versions
 790   of gas accepted.  If you get unexpected messages from code that worked with
 791   older versions of gas, please double check the code before reporting a bug.
 792
 793 * Weak symbol support added for COFF targets.
 794
 795 * Mitsubishi D30V support added.
 796
 797 * Texas Instruments c80 (tms320c80) support added.
 798
 799 * i960 ELF support added.
 800
 801 * ARM ELF support added.
 802
 803 Changes in 2.9:
 804
 805 * Texas Instruments c30 (tms320c30) support added.
 806
 807 * The assembler now optimizes the exception frame information generated by egcs
 808   and gcc 2.8.  The new --traditional-format option disables this optimization.
 809
 810 * Added --gstabs option to generate stabs debugging information.
 811
 812 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
 813   listing.
 814
 815 * Added -MD option to print dependencies.
 816
 817 Changes in 2.8:
 818
 819 * BeOS support added.
 820
 821 * MIPS16 support added.
 822
 823 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
 824
 825 * Alpha/VMS support added.
 826
 827 * m68k options --base-size-default-16, --base-size-default-32,
 828   --disp-size-default-16, and --disp-size-default-32 added.
 829
 830 * The alignment directives now take an optional third argument, which is the
 831   maximum number of bytes to skip.  If doing the alignment would require
 832   skipping more than the given number of bytes, the alignment is not done at
 833   all.
 834
 835 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
 836
 837 * The -a option takes a new suboption, c (e.g., -alc), to skip false
 838   conditionals in listings.
 839
 840 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
 841   the symbol is already defined.
 842
 843 Changes in 2.7:
 844
 845 * The PowerPC assembler now allows the use of symbolic register names (r0,
 846   etc.) if -mregnames is used.  Symbolic names preceded by a '%' (%r0, etc.)
 847   can be used any time.  PowerPC 860 move to/from SPR instructions have been
 848   added.
 849
 850 * Alpha Linux (ELF) support added.
 851
 852 * PowerPC ELF support added.
 853
 854 * m68k Linux (ELF) support added.
 855
 856 * i960 Hx/Jx support added.
 857
 858 * i386/PowerPC gnu-win32 support added.
 859
 860 * SCO ELF support added.  For OpenServer 5 targets (i386-unknown-sco3.2v5) the
 861   default is to build COFF-only support.  To get a set of tools that generate
 862   ELF (they'll understand both COFF and ELF), you must configure with
 863   target=i386-unknown-sco3.2v5elf.
 864
 865 * m88k-motorola-sysv3* support added.
 866
 867 Changes in 2.6:
 868
 869 * Gas now directly supports macros, without requiring GASP.
 870
 871 * Gas now has an MRI assembler compatibility mode.  Use -M or --mri to select
 872   MRI mode.  The pseudo-op ``.mri 1'' will switch into the MRI mode until the
 873   ``.mri 0'' is seen; this can be convenient for inline assembler code.
 874
 875 * Added --defsym SYM=VALUE option.
 876
 877 * Added -mips4 support to MIPS assembler.
 878
 879 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
 880
 881 Changes in 2.4:
 882
 883 * Converted this directory to use an autoconf-generated configure script.
 884
 885 * ARM support, from Richard Earnshaw.
 886
 887 * Updated VMS support, from Pat Rankin, including considerably improved
 888   debugging support.
 889
 890 * Support for the control registers in the 68060.
 891
 892 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
 893   provide for possible future gcc changes, for targets where gas provides some
 894   features not available in the native assembler.  If the native assembler is
 895   used, it should become obvious pretty quickly what the problem is.
 896
 897 * Usage message is available with "--help".
 898
 899 * The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3
 900   also, but didn't get into the NEWS file.)
 901
 902 * Weak symbol support for a.out.
 903
 904 * A bug in the listing code which could cause an infinite loop has been fixed.
 905   Bugs in listings when generating a COFF object file have also been fixed.
 906
 907 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
 908   Paul Kranenburg.
 909
 910 * Improved Alpha support.  Immediate constants can have a much larger range
 911   now. Support for the 21164 has been contributed by Digital.
 912
 913 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
 914
 915 Changes in 2.3:
 916
 917 * Mach i386 support, by David Mackenzie and Ken Raeburn.
 918
 919 * RS/6000 and PowerPC support by Ian Taylor.
 920
 921 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
 922   based on mail received from various people.  The `-h#' option should work
 923   again too.
 924
 925 * HP-PA work, by Jeff Law.  Note, for the PA, gas-2.3 has been designed to work
 926   with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special
 927   version of gcc-2.5.8 has been patched to work with gas-2.3.  You can retrieve
 928   this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
 929   in the "dist" directory.
 930
 931 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
 932   simple tests okay.  I haven't put it through extensive testing.  (GNU make is
 933   currently required for BSD 4.3 builds.)
 934
 935 * Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is
 936   based on code donated by CMU, which used an a.out-based format.  I'm afraid
 937   the alpha-a.out support is pretty badly mangled, and much of it removed;
 938   making it work will require rewriting it as BFD support for the format anyways.
 939
 940 * Irix 5 support.
 941
 942 * The test suites have been fixed up a bit, so that they should work with a
 943   couple different versions of expect and dejagnu.
 944
 945 * Symbols' values are now handled internally as expressions, permitting more
 946   flexibility in evaluating them in some cases.  Some details of relocation
 947   handling have also changed, and simple constant pool management has been
 948   added, to make the Alpha port easier.
 949
 950 * New option "--statistics" for printing out program run times.  This is
 951   intended to be used with the gcc "-Q" option, which prints out times spent in
 952   various phases of compilation.  (You should be able to get all of them
 953   printed out with "gcc -Q -Wa,--statistics", I think.)
 954
 955 Changes in 2.2:
 956
 957 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
 958
 959 * Configurations that are still in development (and therefore are convenient to
 960   have listed in configure.in) still get rejected without a minor change to
 961   gas/Makefile.in, so people not doing development work shouldn't get the
 962   impression that support for such configurations is actually believed to be
 963   reliable.
 964
 965 * The program name (usually "as") is printed when a fatal error message is
 966   displayed.  This should prevent some confusion about the source of occasional
 967   messages about "internal errors".
 968
 969 * ELF support is falling into place.  Support for the 386 should be working.
 970   Support for SPARC Solaris is in.  HPPA support from Utah is being integrated.
 971
 972 * Symbol values are maintained as expressions instead of being immediately
 973   boiled down to add-symbol, sub-symbol, and constant.  This permits slightly
 974   more complex calculations involving symbols whose values are not alreadey
 975   known.
 976
 977 * DBX-style debugging info ("stabs") is now supported for COFF formats.
 978   If any stabs directives are seen in the source, GAS will create two new
 979   sections: a ".stab" and a ".stabstr" section.  The format of the .stab
 980   section is nearly identical to the a.out symbol format, and .stabstr is
 981   its string table.  For this to be useful, you must have configured GCC
 982   to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
 983   that can use the stab sections (4.11 or later).
 984
 985 * LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS
 986   support is in progress.
 987
 988 Changes in 2.1:
 989
 990 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
 991   incorporated, but not well tested yet.
 992
 993 * Altered the opcode table split for m68k; it should require less VM to compile
 994   with gcc now.
 995
 996 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
 997   suggested by Ronald Cole.
 998
 999 * HPPA support (running OSF only, not HPUX) has been contributed by Utah.  This
1000   includes improved ELF support, which I've started adapting for SPARC Solaris
1001   2.x.  Integration isn't completely, so it probably won't work.
1002
1003 * HP9000/300 support, donated by HP, has been merged in.
1004
1005 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
1006
1007 * Better error messages for unsupported configurations (e.g., hppa-hpux).
1008
1009 * Test suite framework is starting to become reasonable.
1010
1011 Changes in 2.0:
1012
1013 * Mostly bug fixes.
1014
1015 * Some more merging of BFD and ELF code, but ELF still doesn't work.
1016
1017 Changes in 1.94:
1018
1019 * BFD merge is partly done.  Adventurous souls may try giving configure the
1020   "--with-bfd-assembler" option.  Currently, ELF format requires it, a.out
1021   format accepts it; SPARC CPU accepts it.  It's the default only for OS "elf"
1022   or "solaris".  (ELF isn't really supported yet.  It needs work.  I've got
1023   some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
1024   fully merged yet.)
1025
1026 * The 68K opcode table has been split in half.  It should now compile under gcc
1027   without consuming ridiculous amounts of memory.
1028
1029 * A couple data structures have been reduced in size.  This should result in
1030   saving a little bit of space at runtime.
1031
1032 * Support for MIPS, from OSF and Ralph Campbell, has been merged in.  The OSF
1033   code provided ROSE format support, which I haven't merged in yet.  (I can
1034   make it available, if anyone wants to try it out.)  Ralph's code, for BSD
1035   4.4, supports a.out format.  We don't have ECOFF support in just yet; it's
1036   coming.
1037
1038 * Support for the Hitachi H8/500 has been added.
1039
1040 * VMS host and target support should be working now, thanks chiefly to Eric
1041   Youngdale.
1042
1043 Changes in 1.93.01:
1044
1045 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
1046
1047 * For i386, .align is now power-of-two; was number-of-bytes.
1048
1049 * For m68k, "%" is now accepted before register names.  For COFF format, which
1050   doesn't use underscore prefixes for C labels, it is required, so variable "a0"
1051   can be distinguished from the register.
1052
1053 * Last public release was 1.38.  Lots of configuration changes since then, lots
1054   of new CPUs and formats, lots of bugs fixed.
1055
1056 \f
1057 Copyright (C) 2012-2023 Free Software Foundation, Inc.
1058
1059 Copying and distribution of this file, with or without modification,
1060 are permitted in any medium without royalty provided the copyright
1061 notice and this notice are preserved.
1062
1063 Local variables:
1064 fill-column: 79
1065 End: