gas/NEWS

   1 -*- text -*-
   2
   3 * Add support for Intel RAO-INT instructions.
   4
   5 * Add support for Intel AVX-NE-CONVERT instructions.
   6
   7 * Add support for Intel MSRLIST instructions.
   8
   9 * Add support for Intel WRMSRNS instructions.
  10
  11 * Add support for Intel CMPccXADD instructions.
  12
  13 * Add support for Intel AVX-VNNI-INT8 instructions.
  14
  15 * Add support for Intel AVX-IFMA instructions.
  16
  17 * Add support for Intel PREFETCHI instructions.
  18
  19 * Add support for Intel AMX-FP16 instructions.
  20
  21 * gas now supports --compress-debug-sections=zstd to compress
  22   debug sections with zstd.
  23
  24 * Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd}
  25   that selects the default compression algorithm
  26   for --enable-compressed-debug-sections.
  27
  28 * Add support for various T-Head extensions (XTheadBa, XTheadBb, XTheadBs,
  29   XTheadCmo, XTheadCondMov, XTheadFMemIdx, XTheadFmv, XTheadInt, XTheadMemIdx,
  30   XTheadMemPair, XTheadMac, and XTheadSync) from version 2.0 of the T-Head
  31   ISA manual, which are implemented in the Allwinner D1.
  32
  33 * Add support for the RISC-V Zawrs extension, version 1.0-rc4.
  34
  35 * Add support for Cortex-X1C for Arm.
  36
  37 * New command line option --gsframe to generate SFrame unwind information
  38   on x86_64 and aarch64 targets.
  39
  40 Changes in 2.39:
  41
  42 * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
  43   Intel K1OM.
  44
  45 * Add support for the RISC-V Zicbop, Zicbom, and Zicboz extensions, version
  46   1.0-fd39d01.
  47
  48 * Add support for the RISC-V Zfh extension, version 1.0.
  49
  50 * Add support for the Zhinx extension, version 1.0.0-rc.
  51
  52 * Add support for the RISC-V H extension.
  53
  54 * Add support for the RISC-V Zfhmin extension, version 1.0, and Zhinxmin
  55   extension, version 1.0.0-rc.
  56
  57 Changes in 2.38:
  58
  59 * Add support for AArch64 system registers that were missing in previous
  60   releases.
  61
  62 * Add support for the LoongArch instruction set.
  63
  64 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
  65   to encode aligned vector move as unaligned vector move.
  66
  67 * Add support for Cortex-R52+ for Arm.
  68
  69 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
  70
  71 * Add support for Cortex-A710 for Arm.
  72
  73 * Add support for Scalable Matrix Extension (SME) for AArch64.
  74
  75 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
  76   assembler what to when it encoutners multibyte characters in the input.  The
  77   default is to allow them.  Setting the option to "warn" will generate a
  78   warning message whenever any multibyte character is encountered.  Using the
  79   option to "warn-sym-only" will make the assembler generate a warning whenever a
  80   symbol is defined containing multibyte characters.  (References to undefined
  81   symbols will not generate warnings).
  82
  83 * Outputs of .ds.x directive and .tfloat directive with hex input from
  84   x86 assembler have been reduced from 12 bytes to 10 bytes to match the
  85   output of .tfloat directive.
  86
  87 * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
  88   'armv9.3-a' for -march in AArch64 GAS.
  89
  90 * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
  91   'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
  92
  93 * Add support for Intel AVX512_FP16 instructions.
  94
  95 * Add support for the RISC-V scalar crypto extension, version 1.0.0.
  96
  97 * Add support for the RISC-V vector extension, version 1.0.
  98
  99 * Add support for the Z{f,d,q}inx extensions, version 1.0.0-rc.
 100
 101 * Add support for the RISC-V svinval extension, version 1.0.
 102
 103 * Add support for the RISC-V hypervisor extension, as defined by Privileged
 104   Specification 1.12.
 105
 106 Changes in 2.37:
 107
 108 * arm-symbianelf support removed.
 109
 110 * Add support for Realm Management Extension (RME) for AArch64.
 111
 112 * Add support for the Zba, Zbb, Zbc, and Zbs subsets of the RISC-V
 113   bit manipulation extension, version 0.93.
 114
 115 Changes in 2.36:
 116
 117 * Add support for Intel AVX VNNI instructions.
 118
 119 * Add support for Intel HRESET instruction.
 120
 121 * Add support for Intel UINTR instructions.
 122
 123 * Support non-absolute segment values for i386 lcall and ljmp.
 124
 125 * When setting the link order attribute of ELF sections, it is now possible to
 126   use a numeric section index instead of symbol name.
 127
 128 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
 129   AArch64 and ARM.
 130   Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
 131
 132 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
 133   Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
 134   Extension) system registers for AArch64.
 135
 136 * Add support for Armv8-R and Armv8.7-A AArch64.
 137
 138 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
 139   AArch64.
 140
 141 * Add support for +flagm feature for -march in Armv8.4 AArch64.
 142
 143 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
 144   64-byte load/store instructions for this feature.
 145
 146 * Add support for +pauth (Pointer Authentication) feature for -march in
 147   AArch64.
 148
 149 * Add support for Intel TDX instructions.
 150
 151 * Add support for Intel Key Locker instructions.
 152
 153 * Added a .nop directive to generate a single no-op instruction in a target
 154   neutral manner.  This instruction does have an effect on DWARF line number
 155   generation, if that is active.
 156
 157 * Removed --reduce-memory-overheads and --hash-size as gas now
 158   uses hash tables that can be expand and shrink automatically.
 159
 160 * Add {disp16} pseudo prefix to x86 assembler.
 161
 162 * Add support for Intel AMX instructions.
 163
 164 * Configure with --enable-x86-used-note by default for Linux/x86.
 165
 166 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
 167   sections using the 'R' flag in the .section directive.
 168   SHF_GNU_RETAIN specifies that the section should not be garbage
 169   collected by the linker.  It requires the GNU or FreeBSD ELF OSABIs.
 170
 171 * Add support for the RISC-V Zihintpause extension.
 172
 173 Changes in 2.35:
 174
 175 * X86 NaCl target support is removed.
 176
 177 * Extend .symver directive to update visibility of the original symbol
 178   and assign one original symbol to different versioned symbols.
 179
 180 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
 181
 182 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
 183   -mlfence-before-ret= options to x86 assembler to help mitigate
 184   CVE-2020-0551.
 185
 186 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
 187   (if such output is being generated).  Added the ability to generate
 188   version 5 .debug_line sections.
 189
 190 * Add -mbig-obj support to i386 MingW targets.
 191
 192 * Add support for the -mriscv-isa-version argument, to select the version of
 193   the RISC-V ISA specification used when assembling.
 194
 195 * Remove support for the RISC-V privileged specification, version 1.9.
 196
 197 Changes in 2.34:
 198
 199 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
 200   -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
 201   options to x86 assembler to align branches within a fixed boundary
 202   with segment prefixes or NOPs.
 203
 204 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
 205
 206 * Add support for z80-elf target.
 207
 208 * Add support for relocation of each byte or word of multibyte value to Z80
 209   targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
 210   with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
 211
 212 * Add SDCC support for Z80 targets.
 213
 214 Changes in 2.33:
 215
 216 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
 217   instructions.
 218
 219 * Add support for the Arm Transactional Memory Extension (TME)
 220   instructions.
 221
 222 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
 223   instructions.
 224
 225 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
 226   LLSC Errata.  Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
 227   time option to set the default behavior. Set the default if the configure
 228   option is not used to "no".
 229
 230 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
 231   processors.
 232
 233 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
 234   Cortex-A76AE, and Cortex-A77 processors.
 235
 236 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
 237   floating point literals.  Add .float16_format directive and
 238   -mfp16-format=[ieee|alternative] option for Arm to control the format of the
 239   encoding.
 240
 241 * Add --gdwarf-cie-version command line flag.  This allows control over which
 242   version of DWARF CIE the assembler creates.
 243
 244 Changes in 2.32:
 245
 246 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
 247   VEX.W-ignored (WIG) VEX instructions.
 248
 249 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
 250   notes.  Add a --enable-x86-used-note configure time option to set the
 251   default behavior.  Set the default if the configure option is not used
 252   to "no".
 253
 254 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
 255
 256 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
 257
 258 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
 259
 260 * Add support for the C-SKY processor series.
 261
 262 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
 263   ASE.
 264
 265 Changes in 2.31:
 266
 267 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
 268   now only set the bottom bit of the address of thumb function symbols
 269   if the -mthumb-interwork command line option is active.
 270
 271 * Add support for the MIPS Global INValidate (GINV) ASE.
 272
 273 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
 274
 275 * Add support for the Freescale S12Z architecture.
 276
 277 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
 278   Build Attribute notes if none are present in the input sources.  Add a
 279   --enable-generate-build-notes=[yes|no] configure time option to set the
 280   default behaviour.  Set the default if the configure option is not used
 281   to "no".
 282
 283 * Remove -mold-gcc command-line option for x86 targets.
 284
 285 * Add -O[2|s] command-line options to x86 assembler to enable alternate
 286   shorter instruction encoding.
 287
 288 * Add support for .nops directive.  It is currently supported only for
 289   x86 targets.
 290
 291 * Add support for the .insn directive on RISC-V targets.
 292
 293 Changes in 2.30:
 294
 295 * Add support for loaction views in DWARF debug line information.
 296
 297 Changes in 2.29:
 298
 299 * Add support for ELF SHF_GNU_MBIND.
 300
 301 * Add support for the WebAssembly file format and wasm32 ELF conversion.
 302
 303 * PowerPC gas now checks that the correct register class is used in
 304   instructions.  For instance, "addi %f4,%cr3,%r31" warns three times
 305   that the registers are invalid.
 306
 307 * Add support for the Texas Instruments PRU processor.
 308
 309 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
 310   added to the ARM port.
 311
 312 Changes in 2.28:
 313
 314 * Add support for the RISC-V architecture.
 315
 316 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
 317
 318 Changes in 2.27:
 319
 320 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
 321
 322 * Add --no-pad-sections to stop the assembler from padding the end of output
 323   sections up to their alignment boundary.
 324
 325 * Support for the ARMv8-M architecture has been added to the ARM port.  Support
 326   for the ARMv8-M Security and DSP Extensions has also been added to the ARM
 327   port.
 328
 329 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
 330   .extCoreRegister pseudo-ops that allow an user to define custom
 331   instructions, conditional codes, auxiliary and core registers.
 332
 333 * Add a configure option --enable-elf-stt-common to decide whether ELF
 334   assembler should generate common symbols with the STT_COMMON type by
 335   default.  Default to no.
 336
 337 * New command-line option --elf-stt-common= for ELF targets to control
 338   whether to generate common symbols with the STT_COMMON type.
 339
 340 * Add ability to set section flags and types via numeric values for ELF
 341   based targets.
 342
 343 * Add a configure option --enable-x86-relax-relocations to decide whether
 344   x86 assembler should generate relax relocations by default.  Default to
 345   yes, except for x86 Solaris targets older than Solaris 12.
 346
 347 * New command-line option -mrelax-relocations= for x86 target to control
 348   whether to generate relax relocations.
 349
 350 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
 351   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 352
 353 * Add assembly-time relaxation option for ARC cpus.
 354
 355 * Add --with-cpu=TYPE configure option for ARC gas.  This allows the default
 356   cpu type to be adjusted at configure time.
 357
 358 Changes in 2.26:
 359
 360 * Add a configure option --enable-compressed-debug-sections={all,gas} to
 361   decide whether DWARF debug sections should be compressed by default.
 362
 363 * Add support for the ARC EM/HS, and ARC600/700 architectures.  Remove
 364   assembler support for Argonaut RISC architectures.
 365
 366 * Symbol and label names can now be enclosed in double quotes (") which allows
 367   them to contain characters that are not part of valid symbol names in high
 368   level languages.
 369
 370 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support.  The
 371   previous spelling, -march=armv6zk, is still accepted.
 372
 373 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
 374   Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
 375   extensions has also been added to the Aarch64 port.
 376
 377 * Support for the ARMv8.1 architecture has been added to the ARM port.  Support
 378   for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
 379   been added to the ARM port.
 380
 381 * Extend --compress-debug-sections option to support
 382   --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
 383   targets.
 384
 385 * --compress-debug-sections is turned on for Linux/x86 by default.
 386
 387 Changes in 2.25:
 388
 389 * Add support for the AVR Tiny microcontrollers.
 390
 391 * Replace support for openrisc and or32 with support for or1k.
 392
 393 * Enhanced the ARM port to accept the assembler output from the CodeComposer
 394   Studio tool.  Support is enabled via the new command-line option -mccs.
 395
 396 * Add support for the Andes NDS32.
 397
 398 Changes in 2.24:
 399
 400 * Add support for the Texas Instruments MSP430X processor.
 401
 402 * Add -gdwarf-sections command-line option to enable per-code-section
 403   generation of DWARF .debug_line sections.
 404
 405 * Add support for Altera Nios II.
 406
 407 * Add support for the Imagination Technologies Meta processor.
 408
 409 * Add support for the v850e3v5.
 410
 411 * Remove assembler support for MIPS ECOFF targets.
 412
 413 Changes in 2.23:
 414
 415 * Add support for the 64-bit ARM architecture: AArch64.
 416
 417 * Add support for S12X processor.
 418
 419 * Add support for the VLE extension to the PowerPC architecture.
 420
 421 * Add support for the Freescale XGATE architecture.
 422
 423 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
 424   directives.  These are currently available only for x86 and ARM targets.
 425
 426 * Add support for the Renesas RL78 architecture.
 427
 428 * Add support for the Adapteva EPIPHANY architecture.
 429
 430 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
 431
 432 Changes in 2.22:
 433
 434 * Add support for the Tilera TILEPro and TILE-Gx architectures.
 435
 436 Changes in 2.21:
 437
 438 * Gas no longer requires doubling of ampersands in macros.
 439
 440 * Add support for the TMS320C6000 (TI C6X) processor family.
 441
 442 * GAS now understands an extended syntax in the .section directive flags
 443   for COFF targets that allows the section's alignment to be specified.  This
 444   feature has also been backported to the 2.20 release series, starting with
 445   2.20.1.
 446
 447 * Add support for the Renesas RX processor.
 448
 449 * New command-line option, --compress-debug-sections, which requests
 450   compression of DWARF debug information sections in the relocatable output
 451   file.  Compressed debug sections are supported by readelf, objdump, and
 452   gold, but not currently by Gnu ld.
 453
 454 Changes in 2.20:
 455
 456 * Added support for v850e2 and v850e2v3.
 457
 458 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
 459   pseudo op.  It marks the symbol as being globally unique in the entire
 460   process.
 461
 462 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
 463   in binary rather than text.
 464
 465 * Add support for common symbol alignment to PE formats.
 466
 467 * Add support for the new discriminator column in the DWARF line table,
 468   with a discriminator operand for the .loc directive.
 469
 470 * Add support for Sunplus score architecture.
 471
 472 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
 473   indicate that if the symbol is the target of a relocation, its value should
 474   not be use.  Instead the function should be invoked and its result used as
 475   the value.
 476
 477 * Add support for Lattice Mico32 (lm32) architecture.
 478
 479 * Add support for Xilinx MicroBlaze architecture.
 480
 481 Changes in 2.19:
 482
 483 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
 484   tables without runtime relocation.
 485
 486 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
 487   adds compatibility with H'00 style hex constants.
 488
 489 * New command-line option, -msse-check=[none|error|warning], for x86
 490   targets.
 491
 492 * New sub-option added to the assembler's -a command-line switch to
 493   generate a listing output.  The 'g' sub-option will insert into the listing
 494   various information about the assembly, such as assembler version, the
 495   command-line options used, and a time stamp.
 496
 497 * New command-line option -msse2avx for x86 target to encode SSE
 498   instructions with VEX prefix.
 499
 500 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
 501
 502 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
 503   -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
 504   -mnaked-reg and -mold-gcc, for x86 targets.
 505
 506 * Support for generating wide character strings has been added via the new
 507   pseudo ops: .string16, .string32 and .string64.
 508
 509 * Support for SSE5 has been added to the i386 port.
 510
 511 Changes in 2.18:
 512
 513 * The GAS sources are now released under the GPLv3.
 514
 515 * Support for the National Semiconductor CR16 target has been added.
 516
 517 * Added gas .reloc pseudo.  This is a low-level interface for creating
 518   relocations.
 519
 520 * Add support for x86_64 PE+ target.
 521
 522 * Add support for Score target.
 523
 524 Changes in 2.17:
 525
 526 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
 527
 528 * Support for ms2 architecture has been added.
 529
 530 * Support for the Z80 processor family has been added.
 531
 532 * Add support for the "@<file>" syntax to the command line, so that extra
 533   switches can be read from <file>.
 534
 535 * The SH target supports a new command-line switch --enable-reg-prefix which,
 536   if enabled, will allow register names to be optionally prefixed with a $
 537   character.  This allows register names to be distinguished from label names.
 538
 539 * Macros with a variable number of arguments are now supported. See the
 540   documentation for how this works.
 541
 542 * Added --reduce-memory-overheads switch to reduce the size of the hash
 543   tables used, at the expense of longer assembly times, and
 544   --hash-size=<NUMBER> to set the size of the hash tables used by gas.
 545
 546 * Macro names and macro parameter names can now be any identifier that would
 547   also be legal as a symbol elsewhere. For macro parameter names, this is
 548   known to cause problems in certain sources when the respective target uses
 549   characters inconsistently, and thus macro parameter references may no longer
 550   be recognized as such (see the documentation for details).
 551
 552 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
 553   for the VAX target in order to be more compatible with the VAX MACRO
 554   assembler.
 555
 556 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
 557
 558 Changes in 2.16:
 559
 560 * Redefinition of macros now results in an error.
 561
 562 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
 563
 564 * New command-line option -munwind-check=[warning|error] for IA64
 565   targets.
 566
 567 * The IA64 port now uses automatic dependency violation removal as its default
 568   mode.
 569
 570 * Port to MAXQ processor contributed by HCL Tech.
 571
 572 * Added support for generating unwind tables for ARM ELF targets.
 573
 574 * Add a -g command-line option to generate debug information in the target's
 575   preferred debug format.
 576
 577 * Support for the crx-elf target added.
 578
 579 * Support for the sh-symbianelf target added.
 580
 581 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
 582   on pe[i]-i386; required for this target's DWARF 2 support.
 583
 584 * Support for Motorola MCF521x/5249/547x/548x added.
 585
 586 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
 587   instrucitons.
 588
 589 * New command-line option -mno-shared for MIPS ELF targets.
 590
 591 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
 592   added to enter (and leave) alternate macro syntax mode.
 593
 594 Changes in 2.15:
 595
 596 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
 597   deprecated and will be removed in a future release.
 598
 599 * Added PIC m32r Linux (ELF) and support to M32R assembler.
 600
 601 * Added support for ARM V6.
 602
 603 * Added support for sh4a and variants.
 604
 605 * Support for Renesas M32R2 added.
 606
 607 * Limited support for Mapping Symbols as specified in the ARM ELF
 608   specification has been added to the arm assembler.
 609
 610 * On ARM architectures, added a new gas directive ".unreq" that undoes
 611   definitions created by ".req".
 612
 613 * Support for Motorola ColdFire MCF528x added.
 614
 615 * Added --gstabs+ switch to enable the generation of STABS debug format
 616   information with GNU extensions.
 617
 618 * Added support for MIPS64 Release 2.
 619
 620 * Added support for v850e1.
 621
 622 * Added -n switch for x86 assembler.  By default, x86 GAS replaces
 623   multiple nop instructions used for alignment within code sections
 624   with multi-byte nop instructions such as leal 0(%esi,1),%esi.  This
 625   switch disables the optimization.
 626
 627 * Removed -n option from MIPS assembler.  It was not useful, and confused the
 628   existing -non_shared option.
 629
 630 Changes in 2.14:
 631
 632 * Added support for MIPS32 Release 2.
 633
 634 * Added support for Xtensa architecture.
 635
 636 * Support for Intel's iWMMXt processor (an ARM variant) added.
 637
 638 * An assembler test generator has been contributed and an example file that
 639   uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
 640
 641 * Support for SH2E added.
 642
 643 * GASP has now been removed.
 644
 645 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
 646   DSP's contributed by Michael Hayes and Svein E. Seldal.
 647
 648 * Support for the Ubicom IP2xxx microcontroller added.
 649
 650 Changes in 2.13:
 651
 652 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
 653   and FR500 included.
 654
 655 * Support for DLX processor added.
 656
 657 * GASP has now been deprecated and will be removed in a future release.  Use
 658   the macro facilities in GAS instead.
 659
 660 * GASP now correctly parses floating point numbers. Unless the base is
 661   explicitly specified, they are interpreted as decimal numbers regardless of
 662   the currently specified base.
 663
 664 Changes in 2.12:
 665
 666 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
 667
 668 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
 669
 670 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
 671   specifying the target instruction set.  The old method of specifying the
 672   target processor has been deprecated, but is still accepted for
 673   compatibility.
 674
 675 * Support for the VFP floating-point instruction set has been added to
 676   the ARM assembler.
 677
 678 * New psuedo op: .incbin to include a set of binary data at a given point
 679   in the assembly.  Contributed by Anders Norlander.
 680
 681 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
 682   but still works for compatability.
 683
 684 * The MIPS assembler no longer issues a warning by default when it
 685   generates a nop instruction from a macro. The new command-line option
 686   -n will turn on the warning.
 687
 688 Changes in 2.11:
 689
 690 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
 691
 692 * x86 gas now supports the full Pentium4 instruction set.
 693
 694 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
 695
 696 * Support for Motorola 68HC11 and 68HC12.
 697
 698 * Support for Texas Instruments TMS320C54x (tic54x).
 699
 700 * Support for IA-64.
 701
 702 * Support for i860, by Jason Eckhardt.
 703
 704 * Support for CRIS (Axis Communications ETRAX series).
 705
 706 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
 707
 708 * x86 gas -q command-line option quietens warnings about register size changes
 709   due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
 710   translating various deprecated floating point instructions.
 711
 712 Changes in 2.10:
 713
 714 * Support for the ARM msr instruction was changed to only allow an immediate
 715   operand when altering the flags field.
 716
 717 * Support for ATMEL AVR.
 718
 719 * Support for IBM 370 ELF.  Somewhat experimental.
 720
 721 * Support for numbers with suffixes.
 722
 723 * Added support for breaking to the end of repeat loops.
 724
 725 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
 726
 727 * New .elseif pseudo-op added.
 728
 729 * New --fatal-warnings option.
 730
 731 * picoJava architecture support added.
 732
 733 * Motorola MCore 210 processor support added.
 734
 735 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
 736   assembly programs with intel syntax.
 737
 738 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
 739
 740 * Added -gdwarf2 option to generate DWARF 2 debugging information.
 741
 742 * Full 16-bit mode support for i386.
 743
 744 * Greatly improved instruction operand checking for i386.  This change will
 745   produce errors or warnings on incorrect assembly code that previous versions
 746   of gas accepted.  If you get unexpected messages from code that worked with
 747   older versions of gas, please double check the code before reporting a bug.
 748
 749 * Weak symbol support added for COFF targets.
 750
 751 * Mitsubishi D30V support added.
 752
 753 * Texas Instruments c80 (tms320c80) support added.
 754
 755 * i960 ELF support added.
 756
 757 * ARM ELF support added.
 758
 759 Changes in 2.9:
 760
 761 * Texas Instruments c30 (tms320c30) support added.
 762
 763 * The assembler now optimizes the exception frame information generated by egcs
 764   and gcc 2.8.  The new --traditional-format option disables this optimization.
 765
 766 * Added --gstabs option to generate stabs debugging information.
 767
 768 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
 769   listing.
 770
 771 * Added -MD option to print dependencies.
 772
 773 Changes in 2.8:
 774
 775 * BeOS support added.
 776
 777 * MIPS16 support added.
 778
 779 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
 780
 781 * Alpha/VMS support added.
 782
 783 * m68k options --base-size-default-16, --base-size-default-32,
 784   --disp-size-default-16, and --disp-size-default-32 added.
 785
 786 * The alignment directives now take an optional third argument, which is the
 787   maximum number of bytes to skip.  If doing the alignment would require
 788   skipping more than the given number of bytes, the alignment is not done at
 789   all.
 790
 791 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
 792
 793 * The -a option takes a new suboption, c (e.g., -alc), to skip false
 794   conditionals in listings.
 795
 796 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
 797   the symbol is already defined.
 798
 799 Changes in 2.7:
 800
 801 * The PowerPC assembler now allows the use of symbolic register names (r0,
 802   etc.) if -mregnames is used.  Symbolic names preceded by a '%' (%r0, etc.)
 803   can be used any time.  PowerPC 860 move to/from SPR instructions have been
 804   added.
 805
 806 * Alpha Linux (ELF) support added.
 807
 808 * PowerPC ELF support added.
 809
 810 * m68k Linux (ELF) support added.
 811
 812 * i960 Hx/Jx support added.
 813
 814 * i386/PowerPC gnu-win32 support added.
 815
 816 * SCO ELF support added.  For OpenServer 5 targets (i386-unknown-sco3.2v5) the
 817   default is to build COFF-only support.  To get a set of tools that generate
 818   ELF (they'll understand both COFF and ELF), you must configure with
 819   target=i386-unknown-sco3.2v5elf.
 820
 821 * m88k-motorola-sysv3* support added.
 822
 823 Changes in 2.6:
 824
 825 * Gas now directly supports macros, without requiring GASP.
 826
 827 * Gas now has an MRI assembler compatibility mode.  Use -M or --mri to select
 828   MRI mode.  The pseudo-op ``.mri 1'' will switch into the MRI mode until the
 829   ``.mri 0'' is seen; this can be convenient for inline assembler code.
 830
 831 * Added --defsym SYM=VALUE option.
 832
 833 * Added -mips4 support to MIPS assembler.
 834
 835 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
 836
 837 Changes in 2.4:
 838
 839 * Converted this directory to use an autoconf-generated configure script.
 840
 841 * ARM support, from Richard Earnshaw.
 842
 843 * Updated VMS support, from Pat Rankin, including considerably improved
 844   debugging support.
 845
 846 * Support for the control registers in the 68060.
 847
 848 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
 849   provide for possible future gcc changes, for targets where gas provides some
 850   features not available in the native assembler.  If the native assembler is
 851   used, it should become obvious pretty quickly what the problem is.
 852
 853 * Usage message is available with "--help".
 854
 855 * The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3
 856   also, but didn't get into the NEWS file.)
 857
 858 * Weak symbol support for a.out.
 859
 860 * A bug in the listing code which could cause an infinite loop has been fixed.
 861   Bugs in listings when generating a COFF object file have also been fixed.
 862
 863 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
 864   Paul Kranenburg.
 865
 866 * Improved Alpha support.  Immediate constants can have a much larger range
 867   now. Support for the 21164 has been contributed by Digital.
 868
 869 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
 870
 871 Changes in 2.3:
 872
 873 * Mach i386 support, by David Mackenzie and Ken Raeburn.
 874
 875 * RS/6000 and PowerPC support by Ian Taylor.
 876
 877 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
 878   based on mail received from various people.  The `-h#' option should work
 879   again too.
 880
 881 * HP-PA work, by Jeff Law.  Note, for the PA, gas-2.3 has been designed to work
 882   with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special
 883   version of gcc-2.5.8 has been patched to work with gas-2.3.  You can retrieve
 884   this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
 885   in the "dist" directory.
 886
 887 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
 888   simple tests okay.  I haven't put it through extensive testing.  (GNU make is
 889   currently required for BSD 4.3 builds.)
 890
 891 * Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is
 892   based on code donated by CMU, which used an a.out-based format.  I'm afraid
 893   the alpha-a.out support is pretty badly mangled, and much of it removed;
 894   making it work will require rewriting it as BFD support for the format anyways.
 895
 896 * Irix 5 support.
 897
 898 * The test suites have been fixed up a bit, so that they should work with a
 899   couple different versions of expect and dejagnu.
 900
 901 * Symbols' values are now handled internally as expressions, permitting more
 902   flexibility in evaluating them in some cases.  Some details of relocation
 903   handling have also changed, and simple constant pool management has been
 904   added, to make the Alpha port easier.
 905
 906 * New option "--statistics" for printing out program run times.  This is
 907   intended to be used with the gcc "-Q" option, which prints out times spent in
 908   various phases of compilation.  (You should be able to get all of them
 909   printed out with "gcc -Q -Wa,--statistics", I think.)
 910
 911 Changes in 2.2:
 912
 913 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
 914
 915 * Configurations that are still in development (and therefore are convenient to
 916   have listed in configure.in) still get rejected without a minor change to
 917   gas/Makefile.in, so people not doing development work shouldn't get the
 918   impression that support for such configurations is actually believed to be
 919   reliable.
 920
 921 * The program name (usually "as") is printed when a fatal error message is
 922   displayed.  This should prevent some confusion about the source of occasional
 923   messages about "internal errors".
 924
 925 * ELF support is falling into place.  Support for the 386 should be working.
 926   Support for SPARC Solaris is in.  HPPA support from Utah is being integrated.
 927
 928 * Symbol values are maintained as expressions instead of being immediately
 929   boiled down to add-symbol, sub-symbol, and constant.  This permits slightly
 930   more complex calculations involving symbols whose values are not alreadey
 931   known.
 932
 933 * DBX-style debugging info ("stabs") is now supported for COFF formats.
 934   If any stabs directives are seen in the source, GAS will create two new
 935   sections: a ".stab" and a ".stabstr" section.  The format of the .stab
 936   section is nearly identical to the a.out symbol format, and .stabstr is
 937   its string table.  For this to be useful, you must have configured GCC
 938   to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
 939   that can use the stab sections (4.11 or later).
 940
 941 * LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS
 942   support is in progress.
 943
 944 Changes in 2.1:
 945
 946 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
 947   incorporated, but not well tested yet.
 948
 949 * Altered the opcode table split for m68k; it should require less VM to compile
 950   with gcc now.
 951
 952 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
 953   suggested by Ronald Cole.
 954
 955 * HPPA support (running OSF only, not HPUX) has been contributed by Utah.  This
 956   includes improved ELF support, which I've started adapting for SPARC Solaris
 957   2.x.  Integration isn't completely, so it probably won't work.
 958
 959 * HP9000/300 support, donated by HP, has been merged in.
 960
 961 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
 962
 963 * Better error messages for unsupported configurations (e.g., hppa-hpux).
 964
 965 * Test suite framework is starting to become reasonable.
 966
 967 Changes in 2.0:
 968
 969 * Mostly bug fixes.
 970
 971 * Some more merging of BFD and ELF code, but ELF still doesn't work.
 972
 973 Changes in 1.94:
 974
 975 * BFD merge is partly done.  Adventurous souls may try giving configure the
 976   "--with-bfd-assembler" option.  Currently, ELF format requires it, a.out
 977   format accepts it; SPARC CPU accepts it.  It's the default only for OS "elf"
 978   or "solaris".  (ELF isn't really supported yet.  It needs work.  I've got
 979   some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
 980   fully merged yet.)
 981
 982 * The 68K opcode table has been split in half.  It should now compile under gcc
 983   without consuming ridiculous amounts of memory.
 984
 985 * A couple data structures have been reduced in size.  This should result in
 986   saving a little bit of space at runtime.
 987
 988 * Support for MIPS, from OSF and Ralph Campbell, has been merged in.  The OSF
 989   code provided ROSE format support, which I haven't merged in yet.  (I can
 990   make it available, if anyone wants to try it out.)  Ralph's code, for BSD
 991   4.4, supports a.out format.  We don't have ECOFF support in just yet; it's
 992   coming.
 993
 994 * Support for the Hitachi H8/500 has been added.
 995
 996 * VMS host and target support should be working now, thanks chiefly to Eric
 997   Youngdale.
 998
 999 Changes in 1.93.01:
1000
1001 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
1002
1003 * For i386, .align is now power-of-two; was number-of-bytes.
1004
1005 * For m68k, "%" is now accepted before register names.  For COFF format, which
1006   doesn't use underscore prefixes for C labels, it is required, so variable "a0"
1007   can be distinguished from the register.
1008
1009 * Last public release was 1.38.  Lots of configuration changes since then, lots
1010   of new CPUs and formats, lots of bugs fixed.
1011
1012 \f
1013 Copyright (C) 2012-2022 Free Software Foundation, Inc.
1014
1015 Copying and distribution of this file, with or without modification,
1016 are permitted in any medium without royalty provided the copyright
1017 notice and this notice are preserved.
1018
1019 Local variables:
1020 fill-column: 79
1021 End: