gas/NEWS

   1 -*- text -*-
   2
   3 Changes in 2.39:
   4
   5 * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
   6   Intel K1OM.
   7
   8 Changes in 2.38:
   9
  10 * Add support for AArch64 system registers that were missing in previous
  11   releases.
  12
  13 * Add support for the LoongArch instruction set.
  14
  15 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
  16   to encode aligned vector move as unaligned vector move.
  17
  18 * Add support for Cortex-R52+ for Arm.
  19
  20 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
  21
  22 * Add support for Cortex-A710 for Arm.
  23
  24 * Add support for Scalable Matrix Extension (SME) for AArch64.
  25
  26 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
  27   assembler what to when it encoutners multibyte characters in the input.  The
  28   default is to allow them.  Setting the option to "warn" will generate a
  29   warning message whenever any multibyte character is encountered.  Using the
  30   option to "warn-sym-only" will make the assembler generate a warning whenever a
  31   symbol is defined containing multibyte characters.  (References to undefined
  32   symbols will not generate warnings).
  33
  34 * Outputs of .ds.x directive and .tfloat directive with hex input from
  35   x86 assembler have been reduced from 12 bytes to 10 bytes to match the
  36   output of .tfloat directive.
  37
  38 * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
  39   'armv9.3-a' for -march in AArch64 GAS.
  40
  41 * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
  42   'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
  43
  44 * Add support for Intel AVX512_FP16 instructions.
  45
  46 Changes in 2.37:
  47
  48 * arm-symbianelf support removed.
  49
  50 * Add support for Realm Management Extension (RME) for AArch64.
  51
  52 Changes in 2.36:
  53
  54 * Add support for Intel AVX VNNI instructions.
  55
  56 * Add support for Intel HRESET instruction.
  57
  58 * Add support for Intel UINTR instructions.
  59
  60 * Support non-absolute segment values for i386 lcall and ljmp.
  61
  62 * When setting the link order attribute of ELF sections, it is now possible to
  63   use a numeric section index instead of symbol name.
  64
  65 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
  66   AArch64 and ARM.
  67   Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
  68
  69 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
  70   Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
  71   Extension) system registers for AArch64.
  72
  73 * Add support for Armv8-R and Armv8.7-A AArch64.
  74
  75 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
  76   AArch64.
  77
  78 * Add support for +flagm feature for -march in Armv8.4 AArch64.
  79
  80 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
  81   64-byte load/store instructions for this feature.
  82
  83 * Add support for +pauth (Pointer Authentication) feature for -march in
  84   AArch64.
  85
  86 * Add support for Intel TDX instructions.
  87
  88 * Add support for Intel Key Locker instructions.
  89
  90 * Added a .nop directive to generate a single no-op instruction in a target
  91   neutral manner.  This instruction does have an effect on DWARF line number
  92   generation, if that is active.
  93
  94 * Removed --reduce-memory-overheads and --hash-size as gas now
  95   uses hash tables that can be expand and shrink automatically.
  96
  97 * Add {disp16} pseudo prefix to x86 assembler.
  98
  99 * Add support for Intel AMX instructions.
 100
 101 * Configure with --enable-x86-used-note by default for Linux/x86.
 102
 103 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
 104   sections using the 'R' flag in the .section directive.
 105   SHF_GNU_RETAIN specifies that the section should not be garbage
 106   collected by the linker.  It requires the GNU or FreeBSD ELF OSABIs.
 107
 108 Changes in 2.35:
 109
 110 * X86 NaCl target support is removed.
 111
 112 * Extend .symver directive to update visibility of the original symbol
 113   and assign one original symbol to different versioned symbols.
 114
 115 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
 116
 117 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
 118   -mlfence-before-ret= options to x86 assembler to help mitigate
 119   CVE-2020-0551.
 120
 121 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
 122   (if such output is being generated).  Added the ability to generate
 123   version 5 .debug_line sections.
 124
 125 * Add -mbig-obj support to i386 MingW targets.
 126
 127 * Add support for the -mriscv-isa-version argument, to select the version of
 128   the RISC-V ISA specification used when assembling.
 129
 130 * Remove support for the RISC-V privileged specification, version 1.9.
 131
 132 Changes in 2.34:
 133
 134 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
 135   -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
 136   options to x86 assembler to align branches within a fixed boundary
 137   with segment prefixes or NOPs.
 138
 139 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
 140
 141 * Add support for z80-elf target.
 142
 143 * Add support for relocation of each byte or word of multibyte value to Z80
 144   targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
 145   with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
 146
 147 * Add SDCC support for Z80 targets.
 148
 149 Changes in 2.33:
 150
 151 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
 152   instructions.
 153
 154 * Add support for the Arm Transactional Memory Extension (TME)
 155   instructions.
 156
 157 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
 158   instructions.
 159
 160 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
 161   LLSC Errata.  Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
 162   time option to set the default behavior. Set the default if the configure
 163   option is not used to "no".
 164
 165 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
 166   processors.
 167
 168 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
 169   Cortex-A76AE, and Cortex-A77 processors.
 170
 171 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
 172   floating point literals.  Add .float16_format directive and
 173   -mfp16-format=[ieee|alternative] option for Arm to control the format of the
 174   encoding.
 175
 176 * Add --gdwarf-cie-version command line flag.  This allows control over which
 177   version of DWARF CIE the assembler creates.
 178
 179 Changes in 2.32:
 180
 181 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
 182   VEX.W-ignored (WIG) VEX instructions.
 183
 184 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
 185   notes.  Add a --enable-x86-used-note configure time option to set the
 186   default behavior.  Set the default if the configure option is not used
 187   to "no".
 188
 189 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
 190
 191 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
 192
 193 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
 194
 195 * Add support for the C-SKY processor series.
 196
 197 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
 198   ASE.
 199
 200 Changes in 2.31:
 201
 202 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
 203   now only set the bottom bit of the address of thumb function symbols
 204   if the -mthumb-interwork command line option is active.
 205
 206 * Add support for the MIPS Global INValidate (GINV) ASE.
 207
 208 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
 209
 210 * Add support for the Freescale S12Z architecture.
 211
 212 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
 213   Build Attribute notes if none are present in the input sources.  Add a
 214   --enable-generate-build-notes=[yes|no] configure time option to set the
 215   default behaviour.  Set the default if the configure option is not used
 216   to "no".
 217
 218 * Remove -mold-gcc command-line option for x86 targets.
 219
 220 * Add -O[2|s] command-line options to x86 assembler to enable alternate
 221   shorter instruction encoding.
 222
 223 * Add support for .nops directive.  It is currently supported only for
 224   x86 targets.
 225
 226 * Add support for the .insn directive on RISC-V targets.
 227
 228 Changes in 2.30:
 229
 230 * Add support for loaction views in DWARF debug line information.
 231
 232 Changes in 2.29:
 233
 234 * Add support for ELF SHF_GNU_MBIND.
 235
 236 * Add support for the WebAssembly file format and wasm32 ELF conversion.
 237
 238 * PowerPC gas now checks that the correct register class is used in
 239   instructions.  For instance, "addi %f4,%cr3,%r31" warns three times
 240   that the registers are invalid.
 241
 242 * Add support for the Texas Instruments PRU processor.
 243
 244 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
 245   added to the ARM port.
 246
 247 Changes in 2.28:
 248
 249 * Add support for the RISC-V architecture.
 250
 251 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
 252
 253 Changes in 2.27:
 254
 255 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
 256
 257 * Add --no-pad-sections to stop the assembler from padding the end of output
 258   sections up to their alignment boundary.
 259
 260 * Support for the ARMv8-M architecture has been added to the ARM port.  Support
 261   for the ARMv8-M Security and DSP Extensions has also been added to the ARM
 262   port.
 263
 264 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
 265   .extCoreRegister pseudo-ops that allow an user to define custom
 266   instructions, conditional codes, auxiliary and core registers.
 267
 268 * Add a configure option --enable-elf-stt-common to decide whether ELF
 269   assembler should generate common symbols with the STT_COMMON type by
 270   default.  Default to no.
 271
 272 * New command-line option --elf-stt-common= for ELF targets to control
 273   whether to generate common symbols with the STT_COMMON type.
 274
 275 * Add ability to set section flags and types via numeric values for ELF
 276   based targets.
 277
 278 * Add a configure option --enable-x86-relax-relocations to decide whether
 279   x86 assembler should generate relax relocations by default.  Default to
 280   yes, except for x86 Solaris targets older than Solaris 12.
 281
 282 * New command-line option -mrelax-relocations= for x86 target to control
 283   whether to generate relax relocations.
 284
 285 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
 286   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 287
 288 * Add assembly-time relaxation option for ARC cpus.
 289
 290 * Add --with-cpu=TYPE configure option for ARC gas.  This allows the default
 291   cpu type to be adjusted at configure time.
 292
 293 Changes in 2.26:
 294
 295 * Add a configure option --enable-compressed-debug-sections={all,gas} to
 296   decide whether DWARF debug sections should be compressed by default.
 297
 298 * Add support for the ARC EM/HS, and ARC600/700 architectures.  Remove
 299   assembler support for Argonaut RISC architectures.
 300
 301 * Symbol and label names can now be enclosed in double quotes (") which allows
 302   them to contain characters that are not part of valid symbol names in high
 303   level languages.
 304
 305 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support.  The
 306   previous spelling, -march=armv6zk, is still accepted.
 307
 308 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
 309   Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
 310   extensions has also been added to the Aarch64 port.
 311
 312 * Support for the ARMv8.1 architecture has been added to the ARM port.  Support
 313   for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
 314   been added to the ARM port.
 315
 316 * Extend --compress-debug-sections option to support
 317   --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
 318   targets.
 319
 320 * --compress-debug-sections is turned on for Linux/x86 by default.
 321
 322 Changes in 2.25:
 323
 324 * Add support for the AVR Tiny microcontrollers.
 325
 326 * Replace support for openrisc and or32 with support for or1k.
 327
 328 * Enhanced the ARM port to accept the assembler output from the CodeComposer
 329   Studio tool.  Support is enabled via the new command-line option -mccs.
 330
 331 * Add support for the Andes NDS32.
 332
 333 Changes in 2.24:
 334
 335 * Add support for the Texas Instruments MSP430X processor.
 336
 337 * Add -gdwarf-sections command-line option to enable per-code-section
 338   generation of DWARF .debug_line sections.
 339
 340 * Add support for Altera Nios II.
 341
 342 * Add support for the Imagination Technologies Meta processor.
 343
 344 * Add support for the v850e3v5.
 345
 346 * Remove assembler support for MIPS ECOFF targets.
 347
 348 Changes in 2.23:
 349
 350 * Add support for the 64-bit ARM architecture: AArch64.
 351
 352 * Add support for S12X processor.
 353
 354 * Add support for the VLE extension to the PowerPC architecture.
 355
 356 * Add support for the Freescale XGATE architecture.
 357
 358 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
 359   directives.  These are currently available only for x86 and ARM targets.
 360
 361 * Add support for the Renesas RL78 architecture.
 362
 363 * Add support for the Adapteva EPIPHANY architecture.
 364
 365 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
 366
 367 Changes in 2.22:
 368
 369 * Add support for the Tilera TILEPro and TILE-Gx architectures.
 370
 371 Changes in 2.21:
 372
 373 * Gas no longer requires doubling of ampersands in macros.
 374
 375 * Add support for the TMS320C6000 (TI C6X) processor family.
 376
 377 * GAS now understands an extended syntax in the .section directive flags
 378   for COFF targets that allows the section's alignment to be specified.  This
 379   feature has also been backported to the 2.20 release series, starting with
 380   2.20.1.
 381
 382 * Add support for the Renesas RX processor.
 383
 384 * New command-line option, --compress-debug-sections, which requests
 385   compression of DWARF debug information sections in the relocatable output
 386   file.  Compressed debug sections are supported by readelf, objdump, and
 387   gold, but not currently by Gnu ld.
 388
 389 Changes in 2.20:
 390
 391 * Added support for v850e2 and v850e2v3.
 392
 393 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
 394   pseudo op.  It marks the symbol as being globally unique in the entire
 395   process.
 396
 397 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
 398   in binary rather than text.
 399
 400 * Add support for common symbol alignment to PE formats.
 401
 402 * Add support for the new discriminator column in the DWARF line table,
 403   with a discriminator operand for the .loc directive.
 404
 405 * Add support for Sunplus score architecture.
 406
 407 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
 408   indicate that if the symbol is the target of a relocation, its value should
 409   not be use.  Instead the function should be invoked and its result used as
 410   the value.
 411
 412 * Add support for Lattice Mico32 (lm32) architecture.
 413
 414 * Add support for Xilinx MicroBlaze architecture.
 415
 416 Changes in 2.19:
 417
 418 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
 419   tables without runtime relocation.
 420
 421 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
 422   adds compatibility with H'00 style hex constants.
 423
 424 * New command-line option, -msse-check=[none|error|warning], for x86
 425   targets.
 426
 427 * New sub-option added to the assembler's -a command-line switch to
 428   generate a listing output.  The 'g' sub-option will insert into the listing
 429   various information about the assembly, such as assembler version, the
 430   command-line options used, and a time stamp.
 431
 432 * New command-line option -msse2avx for x86 target to encode SSE
 433   instructions with VEX prefix.
 434
 435 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
 436
 437 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
 438   -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
 439   -mnaked-reg and -mold-gcc, for x86 targets.
 440
 441 * Support for generating wide character strings has been added via the new
 442   pseudo ops: .string16, .string32 and .string64.
 443
 444 * Support for SSE5 has been added to the i386 port.
 445
 446 Changes in 2.18:
 447
 448 * The GAS sources are now released under the GPLv3.
 449
 450 * Support for the National Semiconductor CR16 target has been added.
 451
 452 * Added gas .reloc pseudo.  This is a low-level interface for creating
 453   relocations.
 454
 455 * Add support for x86_64 PE+ target.
 456
 457 * Add support for Score target.
 458
 459 Changes in 2.17:
 460
 461 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
 462
 463 * Support for ms2 architecture has been added.
 464
 465 * Support for the Z80 processor family has been added.
 466
 467 * Add support for the "@<file>" syntax to the command line, so that extra
 468   switches can be read from <file>.
 469
 470 * The SH target supports a new command-line switch --enable-reg-prefix which,
 471   if enabled, will allow register names to be optionally prefixed with a $
 472   character.  This allows register names to be distinguished from label names.
 473
 474 * Macros with a variable number of arguments are now supported. See the
 475   documentation for how this works.
 476
 477 * Added --reduce-memory-overheads switch to reduce the size of the hash
 478   tables used, at the expense of longer assembly times, and
 479   --hash-size=<NUMBER> to set the size of the hash tables used by gas.
 480
 481 * Macro names and macro parameter names can now be any identifier that would
 482   also be legal as a symbol elsewhere. For macro parameter names, this is
 483   known to cause problems in certain sources when the respective target uses
 484   characters inconsistently, and thus macro parameter references may no longer
 485   be recognized as such (see the documentation for details).
 486
 487 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
 488   for the VAX target in order to be more compatible with the VAX MACRO
 489   assembler.
 490
 491 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
 492
 493 Changes in 2.16:
 494
 495 * Redefinition of macros now results in an error.
 496
 497 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
 498
 499 * New command-line option -munwind-check=[warning|error] for IA64
 500   targets.
 501
 502 * The IA64 port now uses automatic dependency violation removal as its default
 503   mode.
 504
 505 * Port to MAXQ processor contributed by HCL Tech.
 506
 507 * Added support for generating unwind tables for ARM ELF targets.
 508
 509 * Add a -g command-line option to generate debug information in the target's
 510   preferred debug format.
 511
 512 * Support for the crx-elf target added.
 513
 514 * Support for the sh-symbianelf target added.
 515
 516 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
 517   on pe[i]-i386; required for this target's DWARF 2 support.
 518
 519 * Support for Motorola MCF521x/5249/547x/548x added.
 520
 521 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
 522   instrucitons.
 523
 524 * New command-line option -mno-shared for MIPS ELF targets.
 525
 526 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
 527   added to enter (and leave) alternate macro syntax mode.
 528
 529 Changes in 2.15:
 530
 531 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
 532   deprecated and will be removed in a future release.
 533
 534 * Added PIC m32r Linux (ELF) and support to M32R assembler.
 535
 536 * Added support for ARM V6.
 537
 538 * Added support for sh4a and variants.
 539
 540 * Support for Renesas M32R2 added.
 541
 542 * Limited support for Mapping Symbols as specified in the ARM ELF
 543   specification has been added to the arm assembler.
 544
 545 * On ARM architectures, added a new gas directive ".unreq" that undoes
 546   definitions created by ".req".
 547
 548 * Support for Motorola ColdFire MCF528x added.
 549
 550 * Added --gstabs+ switch to enable the generation of STABS debug format
 551   information with GNU extensions.
 552
 553 * Added support for MIPS64 Release 2.
 554
 555 * Added support for v850e1.
 556
 557 * Added -n switch for x86 assembler.  By default, x86 GAS replaces
 558   multiple nop instructions used for alignment within code sections
 559   with multi-byte nop instructions such as leal 0(%esi,1),%esi.  This
 560   switch disables the optimization.
 561
 562 * Removed -n option from MIPS assembler.  It was not useful, and confused the
 563   existing -non_shared option.
 564
 565 Changes in 2.14:
 566
 567 * Added support for MIPS32 Release 2.
 568
 569 * Added support for Xtensa architecture.
 570
 571 * Support for Intel's iWMMXt processor (an ARM variant) added.
 572
 573 * An assembler test generator has been contributed and an example file that
 574   uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
 575
 576 * Support for SH2E added.
 577
 578 * GASP has now been removed.
 579
 580 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
 581   DSP's contributed by Michael Hayes and Svein E. Seldal.
 582
 583 * Support for the Ubicom IP2xxx microcontroller added.
 584
 585 Changes in 2.13:
 586
 587 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
 588   and FR500 included.
 589
 590 * Support for DLX processor added.
 591
 592 * GASP has now been deprecated and will be removed in a future release.  Use
 593   the macro facilities in GAS instead.
 594
 595 * GASP now correctly parses floating point numbers. Unless the base is
 596   explicitly specified, they are interpreted as decimal numbers regardless of
 597   the currently specified base.
 598
 599 Changes in 2.12:
 600
 601 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
 602
 603 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
 604
 605 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
 606   specifying the target instruction set.  The old method of specifying the
 607   target processor has been deprecated, but is still accepted for
 608   compatibility.
 609
 610 * Support for the VFP floating-point instruction set has been added to
 611   the ARM assembler.
 612
 613 * New psuedo op: .incbin to include a set of binary data at a given point
 614   in the assembly.  Contributed by Anders Norlander.
 615
 616 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
 617   but still works for compatability.
 618
 619 * The MIPS assembler no longer issues a warning by default when it
 620   generates a nop instruction from a macro. The new command-line option
 621   -n will turn on the warning.
 622
 623 Changes in 2.11:
 624
 625 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
 626
 627 * x86 gas now supports the full Pentium4 instruction set.
 628
 629 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
 630
 631 * Support for Motorola 68HC11 and 68HC12.
 632
 633 * Support for Texas Instruments TMS320C54x (tic54x).
 634
 635 * Support for IA-64.
 636
 637 * Support for i860, by Jason Eckhardt.
 638
 639 * Support for CRIS (Axis Communications ETRAX series).
 640
 641 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
 642
 643 * x86 gas -q command-line option quietens warnings about register size changes
 644   due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
 645   translating various deprecated floating point instructions.
 646
 647 Changes in 2.10:
 648
 649 * Support for the ARM msr instruction was changed to only allow an immediate
 650   operand when altering the flags field.
 651
 652 * Support for ATMEL AVR.
 653
 654 * Support for IBM 370 ELF.  Somewhat experimental.
 655
 656 * Support for numbers with suffixes.
 657
 658 * Added support for breaking to the end of repeat loops.
 659
 660 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
 661
 662 * New .elseif pseudo-op added.
 663
 664 * New --fatal-warnings option.
 665
 666 * picoJava architecture support added.
 667
 668 * Motorola MCore 210 processor support added.
 669
 670 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
 671   assembly programs with intel syntax.
 672
 673 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
 674
 675 * Added -gdwarf2 option to generate DWARF 2 debugging information.
 676
 677 * Full 16-bit mode support for i386.
 678
 679 * Greatly improved instruction operand checking for i386.  This change will
 680   produce errors or warnings on incorrect assembly code that previous versions
 681   of gas accepted.  If you get unexpected messages from code that worked with
 682   older versions of gas, please double check the code before reporting a bug.
 683
 684 * Weak symbol support added for COFF targets.
 685
 686 * Mitsubishi D30V support added.
 687
 688 * Texas Instruments c80 (tms320c80) support added.
 689
 690 * i960 ELF support added.
 691
 692 * ARM ELF support added.
 693
 694 Changes in 2.9:
 695
 696 * Texas Instruments c30 (tms320c30) support added.
 697
 698 * The assembler now optimizes the exception frame information generated by egcs
 699   and gcc 2.8.  The new --traditional-format option disables this optimization.
 700
 701 * Added --gstabs option to generate stabs debugging information.
 702
 703 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
 704   listing.
 705
 706 * Added -MD option to print dependencies.
 707
 708 Changes in 2.8:
 709
 710 * BeOS support added.
 711
 712 * MIPS16 support added.
 713
 714 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
 715
 716 * Alpha/VMS support added.
 717
 718 * m68k options --base-size-default-16, --base-size-default-32,
 719   --disp-size-default-16, and --disp-size-default-32 added.
 720
 721 * The alignment directives now take an optional third argument, which is the
 722   maximum number of bytes to skip.  If doing the alignment would require
 723   skipping more than the given number of bytes, the alignment is not done at
 724   all.
 725
 726 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
 727
 728 * The -a option takes a new suboption, c (e.g., -alc), to skip false
 729   conditionals in listings.
 730
 731 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
 732   the symbol is already defined.
 733
 734 Changes in 2.7:
 735
 736 * The PowerPC assembler now allows the use of symbolic register names (r0,
 737   etc.) if -mregnames is used.  Symbolic names preceded by a '%' (%r0, etc.)
 738   can be used any time.  PowerPC 860 move to/from SPR instructions have been
 739   added.
 740
 741 * Alpha Linux (ELF) support added.
 742
 743 * PowerPC ELF support added.
 744
 745 * m68k Linux (ELF) support added.
 746
 747 * i960 Hx/Jx support added.
 748
 749 * i386/PowerPC gnu-win32 support added.
 750
 751 * SCO ELF support added.  For OpenServer 5 targets (i386-unknown-sco3.2v5) the
 752   default is to build COFF-only support.  To get a set of tools that generate
 753   ELF (they'll understand both COFF and ELF), you must configure with
 754   target=i386-unknown-sco3.2v5elf.
 755
 756 * m88k-motorola-sysv3* support added.
 757
 758 Changes in 2.6:
 759
 760 * Gas now directly supports macros, without requiring GASP.
 761
 762 * Gas now has an MRI assembler compatibility mode.  Use -M or --mri to select
 763   MRI mode.  The pseudo-op ``.mri 1'' will switch into the MRI mode until the
 764   ``.mri 0'' is seen; this can be convenient for inline assembler code.
 765
 766 * Added --defsym SYM=VALUE option.
 767
 768 * Added -mips4 support to MIPS assembler.
 769
 770 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
 771
 772 Changes in 2.4:
 773
 774 * Converted this directory to use an autoconf-generated configure script.
 775
 776 * ARM support, from Richard Earnshaw.
 777
 778 * Updated VMS support, from Pat Rankin, including considerably improved
 779   debugging support.
 780
 781 * Support for the control registers in the 68060.
 782
 783 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
 784   provide for possible future gcc changes, for targets where gas provides some
 785   features not available in the native assembler.  If the native assembler is
 786   used, it should become obvious pretty quickly what the problem is.
 787
 788 * Usage message is available with "--help".
 789
 790 * The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3
 791   also, but didn't get into the NEWS file.)
 792
 793 * Weak symbol support for a.out.
 794
 795 * A bug in the listing code which could cause an infinite loop has been fixed.
 796   Bugs in listings when generating a COFF object file have also been fixed.
 797
 798 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
 799   Paul Kranenburg.
 800
 801 * Improved Alpha support.  Immediate constants can have a much larger range
 802   now. Support for the 21164 has been contributed by Digital.
 803
 804 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
 805
 806 Changes in 2.3:
 807
 808 * Mach i386 support, by David Mackenzie and Ken Raeburn.
 809
 810 * RS/6000 and PowerPC support by Ian Taylor.
 811
 812 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
 813   based on mail received from various people.  The `-h#' option should work
 814   again too.
 815
 816 * HP-PA work, by Jeff Law.  Note, for the PA, gas-2.3 has been designed to work
 817   with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special
 818   version of gcc-2.5.8 has been patched to work with gas-2.3.  You can retrieve
 819   this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
 820   in the "dist" directory.
 821
 822 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
 823   simple tests okay.  I haven't put it through extensive testing.  (GNU make is
 824   currently required for BSD 4.3 builds.)
 825
 826 * Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is
 827   based on code donated by CMU, which used an a.out-based format.  I'm afraid
 828   the alpha-a.out support is pretty badly mangled, and much of it removed;
 829   making it work will require rewriting it as BFD support for the format anyways.
 830
 831 * Irix 5 support.
 832
 833 * The test suites have been fixed up a bit, so that they should work with a
 834   couple different versions of expect and dejagnu.
 835
 836 * Symbols' values are now handled internally as expressions, permitting more
 837   flexibility in evaluating them in some cases.  Some details of relocation
 838   handling have also changed, and simple constant pool management has been
 839   added, to make the Alpha port easier.
 840
 841 * New option "--statistics" for printing out program run times.  This is
 842   intended to be used with the gcc "-Q" option, which prints out times spent in
 843   various phases of compilation.  (You should be able to get all of them
 844   printed out with "gcc -Q -Wa,--statistics", I think.)
 845
 846 Changes in 2.2:
 847
 848 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
 849
 850 * Configurations that are still in development (and therefore are convenient to
 851   have listed in configure.in) still get rejected without a minor change to
 852   gas/Makefile.in, so people not doing development work shouldn't get the
 853   impression that support for such configurations is actually believed to be
 854   reliable.
 855
 856 * The program name (usually "as") is printed when a fatal error message is
 857   displayed.  This should prevent some confusion about the source of occasional
 858   messages about "internal errors".
 859
 860 * ELF support is falling into place.  Support for the 386 should be working.
 861   Support for SPARC Solaris is in.  HPPA support from Utah is being integrated.
 862
 863 * Symbol values are maintained as expressions instead of being immediately
 864   boiled down to add-symbol, sub-symbol, and constant.  This permits slightly
 865   more complex calculations involving symbols whose values are not alreadey
 866   known.
 867
 868 * DBX-style debugging info ("stabs") is now supported for COFF formats.
 869   If any stabs directives are seen in the source, GAS will create two new
 870   sections: a ".stab" and a ".stabstr" section.  The format of the .stab
 871   section is nearly identical to the a.out symbol format, and .stabstr is
 872   its string table.  For this to be useful, you must have configured GCC
 873   to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
 874   that can use the stab sections (4.11 or later).
 875
 876 * LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS
 877   support is in progress.
 878
 879 Changes in 2.1:
 880
 881 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
 882   incorporated, but not well tested yet.
 883
 884 * Altered the opcode table split for m68k; it should require less VM to compile
 885   with gcc now.
 886
 887 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
 888   suggested by Ronald Cole.
 889
 890 * HPPA support (running OSF only, not HPUX) has been contributed by Utah.  This
 891   includes improved ELF support, which I've started adapting for SPARC Solaris
 892   2.x.  Integration isn't completely, so it probably won't work.
 893
 894 * HP9000/300 support, donated by HP, has been merged in.
 895
 896 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
 897
 898 * Better error messages for unsupported configurations (e.g., hppa-hpux).
 899
 900 * Test suite framework is starting to become reasonable.
 901
 902 Changes in 2.0:
 903
 904 * Mostly bug fixes.
 905
 906 * Some more merging of BFD and ELF code, but ELF still doesn't work.
 907
 908 Changes in 1.94:
 909
 910 * BFD merge is partly done.  Adventurous souls may try giving configure the
 911   "--with-bfd-assembler" option.  Currently, ELF format requires it, a.out
 912   format accepts it; SPARC CPU accepts it.  It's the default only for OS "elf"
 913   or "solaris".  (ELF isn't really supported yet.  It needs work.  I've got
 914   some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
 915   fully merged yet.)
 916
 917 * The 68K opcode table has been split in half.  It should now compile under gcc
 918   without consuming ridiculous amounts of memory.
 919
 920 * A couple data structures have been reduced in size.  This should result in
 921   saving a little bit of space at runtime.
 922
 923 * Support for MIPS, from OSF and Ralph Campbell, has been merged in.  The OSF
 924   code provided ROSE format support, which I haven't merged in yet.  (I can
 925   make it available, if anyone wants to try it out.)  Ralph's code, for BSD
 926   4.4, supports a.out format.  We don't have ECOFF support in just yet; it's
 927   coming.
 928
 929 * Support for the Hitachi H8/500 has been added.
 930
 931 * VMS host and target support should be working now, thanks chiefly to Eric
 932   Youngdale.
 933
 934 Changes in 1.93.01:
 935
 936 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
 937
 938 * For i386, .align is now power-of-two; was number-of-bytes.
 939
 940 * For m68k, "%" is now accepted before register names.  For COFF format, which
 941   doesn't use underscore prefixes for C labels, it is required, so variable "a0"
 942   can be distinguished from the register.
 943
 944 * Last public release was 1.38.  Lots of configuration changes since then, lots
 945   of new CPUs and formats, lots of bugs fixed.
 946
 947 \f
 948 Copyright (C) 2012-2022 Free Software Foundation, Inc.
 949
 950 Copying and distribution of this file, with or without modification,
 951 are permitted in any medium without royalty provided the copyright
 952 notice and this notice are preserved.
 953
 954 Local variables:
 955 fill-column: 79
 956 End: